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424b21487db973842c96c88bfe92b7af51543bfe
[mesa.git] / src / mesa / drivers / dri / i965 / brw_disasm.c
1 /*
2 * Copyright © 2008 Keith Packard
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
13 *
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20 * OF THIS SOFTWARE.
21 */
22
23 #include <stdio.h>
24 #include <stdlib.h>
25 #include <string.h>
26 #include <getopt.h>
27 #include <unistd.h>
28 #include <stdarg.h>
29
30 #include "brw_context.h"
31 #include "brw_defines.h"
32 #include "brw_reg.h"
33 #include "brw_inst.h"
34
35 const struct opcode_desc opcode_descs[128] = {
36 [BRW_OPCODE_MOV] = { .name = "mov", .nsrc = 1, .ndst = 1 },
37 [BRW_OPCODE_FRC] = { .name = "frc", .nsrc = 1, .ndst = 1 },
38 [BRW_OPCODE_RNDU] = { .name = "rndu", .nsrc = 1, .ndst = 1 },
39 [BRW_OPCODE_RNDD] = { .name = "rndd", .nsrc = 1, .ndst = 1 },
40 [BRW_OPCODE_RNDE] = { .name = "rnde", .nsrc = 1, .ndst = 1 },
41 [BRW_OPCODE_RNDZ] = { .name = "rndz", .nsrc = 1, .ndst = 1 },
42 [BRW_OPCODE_NOT] = { .name = "not", .nsrc = 1, .ndst = 1 },
43 [BRW_OPCODE_LZD] = { .name = "lzd", .nsrc = 1, .ndst = 1 },
44 [BRW_OPCODE_F32TO16] = { .name = "f32to16", .nsrc = 1, .ndst = 1 },
45 [BRW_OPCODE_F16TO32] = { .name = "f16to32", .nsrc = 1, .ndst = 1 },
46 [BRW_OPCODE_BFREV] = { .name = "bfrev", .nsrc = 1, .ndst = 1 },
47 [BRW_OPCODE_FBH] = { .name = "fbh", .nsrc = 1, .ndst = 1 },
48 [BRW_OPCODE_FBL] = { .name = "fbl", .nsrc = 1, .ndst = 1 },
49 [BRW_OPCODE_CBIT] = { .name = "cbit", .nsrc = 1, .ndst = 1 },
50
51 [BRW_OPCODE_MUL] = { .name = "mul", .nsrc = 2, .ndst = 1 },
52 [BRW_OPCODE_MAC] = { .name = "mac", .nsrc = 2, .ndst = 1 },
53 [BRW_OPCODE_MACH] = { .name = "mach", .nsrc = 2, .ndst = 1 },
54 [BRW_OPCODE_LINE] = { .name = "line", .nsrc = 2, .ndst = 1 },
55 [BRW_OPCODE_PLN] = { .name = "pln", .nsrc = 2, .ndst = 1 },
56 [BRW_OPCODE_MAD] = { .name = "mad", .nsrc = 3, .ndst = 1 },
57 [BRW_OPCODE_LRP] = { .name = "lrp", .nsrc = 3, .ndst = 1 },
58 [BRW_OPCODE_SAD2] = { .name = "sad2", .nsrc = 2, .ndst = 1 },
59 [BRW_OPCODE_SADA2] = { .name = "sada2", .nsrc = 2, .ndst = 1 },
60 [BRW_OPCODE_DP4] = { .name = "dp4", .nsrc = 2, .ndst = 1 },
61 [BRW_OPCODE_DPH] = { .name = "dph", .nsrc = 2, .ndst = 1 },
62 [BRW_OPCODE_DP3] = { .name = "dp3", .nsrc = 2, .ndst = 1 },
63 [BRW_OPCODE_DP2] = { .name = "dp2", .nsrc = 2, .ndst = 1 },
64 [BRW_OPCODE_MATH] = { .name = "math", .nsrc = 2, .ndst = 1 },
65
66 [BRW_OPCODE_AVG] = { .name = "avg", .nsrc = 2, .ndst = 1 },
67 [BRW_OPCODE_ADD] = { .name = "add", .nsrc = 2, .ndst = 1 },
68 [BRW_OPCODE_SEL] = { .name = "sel", .nsrc = 2, .ndst = 1 },
69 [BRW_OPCODE_AND] = { .name = "and", .nsrc = 2, .ndst = 1 },
70 [BRW_OPCODE_OR] = { .name = "or", .nsrc = 2, .ndst = 1 },
71 [BRW_OPCODE_XOR] = { .name = "xor", .nsrc = 2, .ndst = 1 },
72 [BRW_OPCODE_SHR] = { .name = "shr", .nsrc = 2, .ndst = 1 },
73 [BRW_OPCODE_SHL] = { .name = "shl", .nsrc = 2, .ndst = 1 },
74 [BRW_OPCODE_ASR] = { .name = "asr", .nsrc = 2, .ndst = 1 },
75 [BRW_OPCODE_CMP] = { .name = "cmp", .nsrc = 2, .ndst = 1 },
76 [BRW_OPCODE_CMPN] = { .name = "cmpn", .nsrc = 2, .ndst = 1 },
77 [BRW_OPCODE_CSEL] = { .name = "csel", .nsrc = 3, .ndst = 1 },
78 [BRW_OPCODE_BFE] = { .name = "bfe", .nsrc = 3, .ndst = 1 },
79 [BRW_OPCODE_BFI1] = { .name = "bfi1", .nsrc = 2, .ndst = 1 },
80 [BRW_OPCODE_BFI2] = { .name = "bfi2", .nsrc = 3, .ndst = 1 },
81 [BRW_OPCODE_ADDC] = { .name = "addc", .nsrc = 2, .ndst = 1 },
82 [BRW_OPCODE_SUBB] = { .name = "subb", .nsrc = 2, .ndst = 1 },
83
84 [BRW_OPCODE_SEND] = { .name = "send", .nsrc = 1, .ndst = 1 },
85 [BRW_OPCODE_SENDC] = { .name = "sendc", .nsrc = 1, .ndst = 1 },
86 [BRW_OPCODE_NOP] = { .name = "nop", .nsrc = 0, .ndst = 0 },
87 [BRW_OPCODE_JMPI] = { .name = "jmpi", .nsrc = 0, .ndst = 0 },
88 [BRW_OPCODE_IF] = { .name = "if", .nsrc = 2, .ndst = 0 },
89 [BRW_OPCODE_IFF] = { .name = "iff", .nsrc = 2, .ndst = 1 },
90 [BRW_OPCODE_WHILE] = { .name = "while", .nsrc = 2, .ndst = 0 },
91 [BRW_OPCODE_ELSE] = { .name = "else", .nsrc = 2, .ndst = 0 },
92 [BRW_OPCODE_BREAK] = { .name = "break", .nsrc = 2, .ndst = 0 },
93 [BRW_OPCODE_CONTINUE] = { .name = "cont", .nsrc = 1, .ndst = 0 },
94 [BRW_OPCODE_HALT] = { .name = "halt", .nsrc = 1, .ndst = 0 },
95 [BRW_OPCODE_MSAVE] = { .name = "msave", .nsrc = 1, .ndst = 1 },
96 [BRW_OPCODE_PUSH] = { .name = "push", .nsrc = 1, .ndst = 1 },
97 [BRW_OPCODE_MRESTORE] = { .name = "mrest", .nsrc = 1, .ndst = 1 },
98 [BRW_OPCODE_POP] = { .name = "pop", .nsrc = 2, .ndst = 0 },
99 [BRW_OPCODE_WAIT] = { .name = "wait", .nsrc = 1, .ndst = 0 },
100 [BRW_OPCODE_DO] = { .name = "do", .nsrc = 0, .ndst = 0 },
101 [BRW_OPCODE_ENDIF] = { .name = "endif", .nsrc = 2, .ndst = 0 },
102 };
103
104 static bool
105 has_jip(struct brw_context *brw, enum opcode opcode)
106 {
107 if (brw->gen < 6)
108 return false;
109
110 return opcode == BRW_OPCODE_IF ||
111 opcode == BRW_OPCODE_ELSE ||
112 opcode == BRW_OPCODE_ENDIF ||
113 opcode == BRW_OPCODE_WHILE;
114 }
115
116 static bool
117 has_uip(struct brw_context *brw, enum opcode opcode)
118 {
119 if (brw->gen < 6)
120 return false;
121
122 return (brw->gen >= 7 && opcode == BRW_OPCODE_IF) ||
123 (brw->gen >= 8 && opcode == BRW_OPCODE_ELSE) ||
124 opcode == BRW_OPCODE_BREAK ||
125 opcode == BRW_OPCODE_CONTINUE ||
126 opcode == BRW_OPCODE_HALT;
127 }
128
129 static bool
130 is_logic_instruction(unsigned opcode)
131 {
132 return opcode == BRW_OPCODE_AND ||
133 opcode == BRW_OPCODE_NOT ||
134 opcode == BRW_OPCODE_OR ||
135 opcode == BRW_OPCODE_XOR;
136 }
137
138 const char *const conditional_modifier[16] = {
139 [BRW_CONDITIONAL_NONE] = "",
140 [BRW_CONDITIONAL_Z] = ".e",
141 [BRW_CONDITIONAL_NZ] = ".ne",
142 [BRW_CONDITIONAL_G] = ".g",
143 [BRW_CONDITIONAL_GE] = ".ge",
144 [BRW_CONDITIONAL_L] = ".l",
145 [BRW_CONDITIONAL_LE] = ".le",
146 [BRW_CONDITIONAL_R] = ".r",
147 [BRW_CONDITIONAL_O] = ".o",
148 [BRW_CONDITIONAL_U] = ".u",
149 };
150
151 static const char *const m_negate[2] = {
152 [0] = "",
153 [1] = "-",
154 };
155
156 static const char *const _abs[2] = {
157 [0] = "",
158 [1] = "(abs)",
159 };
160
161 static const char *const m_bitnot[2] = { "", "~" };
162
163 static const char *const vert_stride[16] = {
164 [0] = "0",
165 [1] = "1",
166 [2] = "2",
167 [3] = "4",
168 [4] = "8",
169 [5] = "16",
170 [6] = "32",
171 [15] = "VxH",
172 };
173
174 static const char *const width[8] = {
175 [0] = "1",
176 [1] = "2",
177 [2] = "4",
178 [3] = "8",
179 [4] = "16",
180 };
181
182 static const char *const horiz_stride[4] = {
183 [0] = "0",
184 [1] = "1",
185 [2] = "2",
186 [3] = "4"
187 };
188
189 static const char *const chan_sel[4] = {
190 [0] = "x",
191 [1] = "y",
192 [2] = "z",
193 [3] = "w",
194 };
195
196 static const char *const debug_ctrl[2] = {
197 [0] = "",
198 [1] = ".breakpoint"
199 };
200
201 static const char *const saturate[2] = {
202 [0] = "",
203 [1] = ".sat"
204 };
205
206 static const char *const cmpt_ctrl[2] = {
207 [0] = "",
208 [1] = "compacted"
209 };
210
211 static const char *const accwr[2] = {
212 [0] = "",
213 [1] = "AccWrEnable"
214 };
215
216 static const char *const wectrl[2] = {
217 [0] = "",
218 [1] = "WE_all"
219 };
220
221 static const char *const exec_size[8] = {
222 [0] = "1",
223 [1] = "2",
224 [2] = "4",
225 [3] = "8",
226 [4] = "16",
227 [5] = "32"
228 };
229
230 static const char *const pred_inv[2] = {
231 [0] = "+",
232 [1] = "-"
233 };
234
235 static const char *const pred_ctrl_align16[16] = {
236 [1] = "",
237 [2] = ".x",
238 [3] = ".y",
239 [4] = ".z",
240 [5] = ".w",
241 [6] = ".any4h",
242 [7] = ".all4h",
243 };
244
245 static const char *const pred_ctrl_align1[16] = {
246 [BRW_PREDICATE_NORMAL] = "",
247 [BRW_PREDICATE_ALIGN1_ANYV] = ".anyv",
248 [BRW_PREDICATE_ALIGN1_ALLV] = ".allv",
249 [BRW_PREDICATE_ALIGN1_ANY2H] = ".any2h",
250 [BRW_PREDICATE_ALIGN1_ALL2H] = ".all2h",
251 [BRW_PREDICATE_ALIGN1_ANY4H] = ".any4h",
252 [BRW_PREDICATE_ALIGN1_ALL4H] = ".all4h",
253 [BRW_PREDICATE_ALIGN1_ANY8H] = ".any8h",
254 [BRW_PREDICATE_ALIGN1_ALL8H] = ".all8h",
255 [BRW_PREDICATE_ALIGN1_ANY16H] = ".any16h",
256 [BRW_PREDICATE_ALIGN1_ALL16H] = ".all16h",
257 [BRW_PREDICATE_ALIGN1_ANY32H] = ".any32h",
258 [BRW_PREDICATE_ALIGN1_ANY32H] = ".all32h",
259 };
260
261 static const char *const thread_ctrl[4] = {
262 [BRW_THREAD_NORMAL] = "",
263 [BRW_THREAD_ATOMIC] = "atomic",
264 [BRW_THREAD_SWITCH] = "switch",
265 };
266
267 static const char *const compr_ctrl[4] = {
268 [0] = "",
269 [1] = "sechalf",
270 [2] = "compr",
271 [3] = "compr4",
272 };
273
274 static const char *const dep_ctrl[4] = {
275 [0] = "",
276 [1] = "NoDDClr",
277 [2] = "NoDDChk",
278 [3] = "NoDDClr,NoDDChk",
279 };
280
281 static const char *const mask_ctrl[4] = {
282 [0] = "",
283 [1] = "nomask",
284 };
285
286 static const char *const access_mode[2] = {
287 [0] = "align1",
288 [1] = "align16",
289 };
290
291 static const char * const reg_encoding[] = {
292 [BRW_HW_REG_TYPE_UD] = "UD",
293 [BRW_HW_REG_TYPE_D] = "D",
294 [BRW_HW_REG_TYPE_UW] = "UW",
295 [BRW_HW_REG_TYPE_W] = "W",
296 [BRW_HW_REG_NON_IMM_TYPE_UB] = "UB",
297 [BRW_HW_REG_NON_IMM_TYPE_B] = "B",
298 [GEN7_HW_REG_NON_IMM_TYPE_DF] = "DF",
299 [BRW_HW_REG_TYPE_F] = "F",
300 [GEN8_HW_REG_TYPE_UQ] = "UQ",
301 [GEN8_HW_REG_TYPE_Q] = "Q",
302 [GEN8_HW_REG_NON_IMM_TYPE_HF] = "HF",
303 };
304
305 static const char *const three_source_reg_encoding[] = {
306 [BRW_3SRC_TYPE_F] = "F",
307 [BRW_3SRC_TYPE_D] = "D",
308 [BRW_3SRC_TYPE_UD] = "UD",
309 };
310
311 const int reg_type_size[] = {
312 [BRW_HW_REG_TYPE_UD] = 4,
313 [BRW_HW_REG_TYPE_D] = 4,
314 [BRW_HW_REG_TYPE_UW] = 2,
315 [BRW_HW_REG_TYPE_W] = 2,
316 [BRW_HW_REG_NON_IMM_TYPE_UB] = 1,
317 [BRW_HW_REG_NON_IMM_TYPE_B] = 1,
318 [GEN7_HW_REG_NON_IMM_TYPE_DF] = 8,
319 [BRW_HW_REG_TYPE_F] = 4,
320 [GEN8_HW_REG_TYPE_UQ] = 8,
321 [GEN8_HW_REG_TYPE_Q] = 8,
322 [GEN8_HW_REG_NON_IMM_TYPE_HF] = 2,
323 };
324
325 static const char *const reg_file[4] = {
326 [0] = "A",
327 [1] = "g",
328 [2] = "m",
329 [3] = "imm",
330 };
331
332 static const char *const writemask[16] = {
333 [0x0] = ".",
334 [0x1] = ".x",
335 [0x2] = ".y",
336 [0x3] = ".xy",
337 [0x4] = ".z",
338 [0x5] = ".xz",
339 [0x6] = ".yz",
340 [0x7] = ".xyz",
341 [0x8] = ".w",
342 [0x9] = ".xw",
343 [0xa] = ".yw",
344 [0xb] = ".xyw",
345 [0xc] = ".zw",
346 [0xd] = ".xzw",
347 [0xe] = ".yzw",
348 [0xf] = "",
349 };
350
351 static const char *const end_of_thread[2] = {
352 [0] = "",
353 [1] = "EOT"
354 };
355
356 /* SFIDs on Gen4-5 */
357 static const char *const gen4_sfid[16] = {
358 [BRW_SFID_NULL] = "null",
359 [BRW_SFID_MATH] = "math",
360 [BRW_SFID_SAMPLER] = "sampler",
361 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
362 [BRW_SFID_DATAPORT_READ] = "read",
363 [BRW_SFID_DATAPORT_WRITE] = "write",
364 [BRW_SFID_URB] = "urb",
365 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
366 [BRW_SFID_VME] = "vme",
367 };
368
369 static const char *const gen6_sfid[16] = {
370 [BRW_SFID_NULL] = "null",
371 [BRW_SFID_MATH] = "math",
372 [BRW_SFID_SAMPLER] = "sampler",
373 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
374 [BRW_SFID_URB] = "urb",
375 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
376 [GEN6_SFID_DATAPORT_SAMPLER_CACHE] = "sampler",
377 [GEN6_SFID_DATAPORT_RENDER_CACHE] = "render",
378 [GEN6_SFID_DATAPORT_CONSTANT_CACHE] = "const",
379 [GEN7_SFID_DATAPORT_DATA_CACHE] = "data",
380 [GEN7_SFID_PIXEL_INTERPOLATOR] = "pixel interp",
381 [HSW_SFID_DATAPORT_DATA_CACHE_1] = "dp data 1",
382 [HSW_SFID_CRE] = "cre",
383 };
384
385 static const char *const dp_write_port_msg_type[8] = {
386 [0b000] = "OWord block write",
387 [0b001] = "OWord dual block write",
388 [0b010] = "media block write",
389 [0b011] = "DWord scattered write",
390 [0b100] = "RT write",
391 [0b101] = "streamed VB write",
392 [0b110] = "RT UNORM write", /* G45+ */
393 [0b111] = "flush render cache",
394 };
395
396 static const char *const dp_rc_msg_type_gen6[16] = {
397 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read",
398 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read",
399 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read",
400 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read",
401 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] =
402 "OWORD unaligned block read",
403 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read",
404 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write",
405 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write",
406 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] =
407 "OWORD dual block write",
408 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write",
409 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] =
410 "DWORD scattered write",
411 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write",
412 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write",
413 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORM write",
414 };
415
416 static const char *const m_rt_write_subtype[] = {
417 [0b000] = "SIMD16",
418 [0b001] = "SIMD16/RepData",
419 [0b010] = "SIMD8/DualSrcLow",
420 [0b011] = "SIMD8/DualSrcHigh",
421 [0b100] = "SIMD8",
422 [0b101] = "SIMD8/ImageWrite", /* Gen6+ */
423 [0b111] = "SIMD16/RepData-111", /* no idea how this is different than 1 */
424 };
425
426 static const char *const dp_dc0_msg_type_gen7[16] = {
427 [GEN7_DATAPORT_DC_OWORD_BLOCK_READ] = "DC OWORD block read",
428 [GEN7_DATAPORT_DC_UNALIGNED_OWORD_BLOCK_READ] =
429 "DC unaligned OWORD block read",
430 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_READ] = "DC OWORD dual block read",
431 [GEN7_DATAPORT_DC_DWORD_SCATTERED_READ] = "DC DWORD scattered read",
432 [GEN7_DATAPORT_DC_BYTE_SCATTERED_READ] = "DC byte scattered read",
433 [GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP] = "DC untyped atomic",
434 [GEN7_DATAPORT_DC_MEMORY_FENCE] = "DC mfence",
435 [GEN7_DATAPORT_DC_OWORD_BLOCK_WRITE] = "DC OWORD block write",
436 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_WRITE] = "DC OWORD dual block write",
437 [GEN7_DATAPORT_DC_DWORD_SCATTERED_WRITE] = "DC DWORD scatterd write",
438 [GEN7_DATAPORT_DC_BYTE_SCATTERED_WRITE] = "DC byte scattered write",
439 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
440 };
441
442 static const char *const dp_dc1_msg_type_hsw[16] = {
443 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ] = "untyped surface read",
444 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP] = "DC untyped atomic op",
445 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2] =
446 "DC untyped 4x2 atomic op",
447 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_READ] = "DC media block read",
448 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ] = "DC typed surface read",
449 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP] = "DC typed atomic",
450 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2] = "DC typed 4x2 atomic op",
451 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
452 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_WRITE] = "DC media block write",
453 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP] = "DC atomic counter op",
454 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2] =
455 "DC 4x2 atomic counter op",
456 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE] = "DC typed surface write",
457 };
458
459 static const char *const aop[16] = {
460 [BRW_AOP_AND] = "and",
461 [BRW_AOP_OR] = "or",
462 [BRW_AOP_XOR] = "xor",
463 [BRW_AOP_MOV] = "mov",
464 [BRW_AOP_INC] = "inc",
465 [BRW_AOP_DEC] = "dec",
466 [BRW_AOP_ADD] = "add",
467 [BRW_AOP_SUB] = "sub",
468 [BRW_AOP_REVSUB] = "revsub",
469 [BRW_AOP_IMAX] = "imax",
470 [BRW_AOP_IMIN] = "imin",
471 [BRW_AOP_UMAX] = "umax",
472 [BRW_AOP_UMIN] = "umin",
473 [BRW_AOP_CMPWR] = "cmpwr",
474 [BRW_AOP_PREDEC] = "predec",
475 };
476
477 static const char * const pixel_interpolator_msg_types[4] = {
478 [GEN7_PIXEL_INTERPOLATOR_LOC_SHARED_OFFSET] = "per_message_offset",
479 [GEN7_PIXEL_INTERPOLATOR_LOC_SAMPLE] = "sample_position",
480 [GEN7_PIXEL_INTERPOLATOR_LOC_CENTROID] = "centroid",
481 [GEN7_PIXEL_INTERPOLATOR_LOC_PER_SLOT_OFFSET] = "per_slot_offset",
482 };
483
484 static const char *const math_function[16] = {
485 [BRW_MATH_FUNCTION_INV] = "inv",
486 [BRW_MATH_FUNCTION_LOG] = "log",
487 [BRW_MATH_FUNCTION_EXP] = "exp",
488 [BRW_MATH_FUNCTION_SQRT] = "sqrt",
489 [BRW_MATH_FUNCTION_RSQ] = "rsq",
490 [BRW_MATH_FUNCTION_SIN] = "sin",
491 [BRW_MATH_FUNCTION_COS] = "cos",
492 [BRW_MATH_FUNCTION_SINCOS] = "sincos",
493 [BRW_MATH_FUNCTION_FDIV] = "fdiv",
494 [BRW_MATH_FUNCTION_POW] = "pow",
495 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] = "intdivmod",
496 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] = "intdiv",
497 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER] = "intmod",
498 [GEN8_MATH_FUNCTION_INVM] = "invm",
499 [GEN8_MATH_FUNCTION_RSQRTM] = "rsqrtm",
500 };
501
502 static const char *const math_saturate[2] = {
503 [0] = "",
504 [1] = "sat"
505 };
506
507 static const char *const math_signed[2] = {
508 [0] = "",
509 [1] = "signed"
510 };
511
512 static const char *const math_scalar[2] = {
513 [0] = "",
514 [1] = "scalar"
515 };
516
517 static const char *const math_precision[2] = {
518 [0] = "",
519 [1] = "partial_precision"
520 };
521
522 static const char *const gen5_urb_opcode[] = {
523 [0] = "urb_write",
524 [1] = "ff_sync",
525 };
526
527 static const char *const gen7_urb_opcode[] = {
528 [0] = "write HWord",
529 [1] = "write OWord",
530 [2] = "read HWord",
531 [3] = "read OWord",
532 [4] = "atomic mov", /* Gen7+ */
533 [5] = "atomic inc", /* Gen7+ */
534 [6] = "atomic add", /* Gen8+ */
535 [7] = "SIMD8 write", /* Gen8+ */
536 [8] = "SIMD8 read", /* Gen8+ */
537 /* [9-15] - reserved */
538 };
539
540 static const char *const urb_swizzle[4] = {
541 [BRW_URB_SWIZZLE_NONE] = "",
542 [BRW_URB_SWIZZLE_INTERLEAVE] = "interleave",
543 [BRW_URB_SWIZZLE_TRANSPOSE] = "transpose",
544 };
545
546 static const char *const urb_allocate[2] = {
547 [0] = "",
548 [1] = "allocate"
549 };
550
551 static const char *const urb_used[2] = {
552 [0] = "",
553 [1] = "used"
554 };
555
556 static const char *const urb_complete[2] = {
557 [0] = "",
558 [1] = "complete"
559 };
560
561 static const char *const sampler_target_format[4] = {
562 [0] = "F",
563 [2] = "UD",
564 [3] = "D"
565 };
566
567
568 static int column;
569
570 static int
571 string(FILE *file, const char *string)
572 {
573 fputs(string, file);
574 column += strlen(string);
575 return 0;
576 }
577
578 static int
579 format(FILE *f, const char *format, ...)
580 {
581 char buf[1024];
582 va_list args;
583 va_start(args, format);
584
585 vsnprintf(buf, sizeof(buf) - 1, format, args);
586 va_end(args);
587 string(f, buf);
588 return 0;
589 }
590
591 static int
592 newline(FILE *f)
593 {
594 putc('\n', f);
595 column = 0;
596 return 0;
597 }
598
599 static int
600 pad(FILE *f, int c)
601 {
602 do
603 string(f, " ");
604 while (column < c);
605 return 0;
606 }
607
608 static int
609 control(FILE *file, const char *name, const char *const ctrl[],
610 unsigned id, int *space)
611 {
612 if (!ctrl[id]) {
613 fprintf(file, "*** invalid %s value %d ", name, id);
614 return 1;
615 }
616 if (ctrl[id][0]) {
617 if (space && *space)
618 string(file, " ");
619 string(file, ctrl[id]);
620 if (space)
621 *space = 1;
622 }
623 return 0;
624 }
625
626 static int
627 print_opcode(FILE *file, int id)
628 {
629 if (!opcode_descs[id].name) {
630 format(file, "*** invalid opcode value %d ", id);
631 return 1;
632 }
633 string(file, opcode_descs[id].name);
634 return 0;
635 }
636
637 static int
638 reg(FILE *file, unsigned _reg_file, unsigned _reg_nr)
639 {
640 int err = 0;
641
642 /* Clear the Compr4 instruction compression bit. */
643 if (_reg_file == BRW_MESSAGE_REGISTER_FILE)
644 _reg_nr &= ~(1 << 7);
645
646 if (_reg_file == BRW_ARCHITECTURE_REGISTER_FILE) {
647 switch (_reg_nr & 0xf0) {
648 case BRW_ARF_NULL:
649 string(file, "null");
650 return -1;
651 case BRW_ARF_ADDRESS:
652 format(file, "a%d", _reg_nr & 0x0f);
653 break;
654 case BRW_ARF_ACCUMULATOR:
655 format(file, "acc%d", _reg_nr & 0x0f);
656 break;
657 case BRW_ARF_FLAG:
658 format(file, "f%d", _reg_nr & 0x0f);
659 break;
660 case BRW_ARF_MASK:
661 format(file, "mask%d", _reg_nr & 0x0f);
662 break;
663 case BRW_ARF_MASK_STACK:
664 format(file, "msd%d", _reg_nr & 0x0f);
665 break;
666 case BRW_ARF_STATE:
667 format(file, "sr%d", _reg_nr & 0x0f);
668 break;
669 case BRW_ARF_CONTROL:
670 format(file, "cr%d", _reg_nr & 0x0f);
671 break;
672 case BRW_ARF_NOTIFICATION_COUNT:
673 format(file, "n%d", _reg_nr & 0x0f);
674 break;
675 case BRW_ARF_IP:
676 string(file, "ip");
677 return -1;
678 break;
679 default:
680 format(file, "ARF%d", _reg_nr);
681 break;
682 }
683 } else {
684 err |= control(file, "src reg file", reg_file, _reg_file, NULL);
685 format(file, "%d", _reg_nr);
686 }
687 return err;
688 }
689
690 static int
691 dest(FILE *file, struct brw_context *brw, brw_inst *inst)
692 {
693 int err = 0;
694
695 if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
696 if (brw_inst_dst_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
697 err |= reg(file, brw_inst_dst_reg_file(brw, inst),
698 brw_inst_dst_da_reg_nr(brw, inst));
699 if (err == -1)
700 return 0;
701 if (brw_inst_dst_da1_subreg_nr(brw, inst))
702 format(file, ".%d", brw_inst_dst_da1_subreg_nr(brw, inst) /
703 reg_type_size[brw_inst_dst_reg_type(brw, inst)]);
704 string(file, "<");
705 err |= control(file, "horiz stride", horiz_stride,
706 brw_inst_dst_hstride(brw, inst), NULL);
707 string(file, ">");
708 err |= control(file, "dest reg encoding", reg_encoding,
709 brw_inst_dst_reg_type(brw, inst), NULL);
710 } else {
711 string(file, "g[a0");
712 if (brw_inst_dst_ia_subreg_nr(brw, inst))
713 format(file, ".%d", brw_inst_dst_ia_subreg_nr(brw, inst) /
714 reg_type_size[brw_inst_dst_reg_type(brw, inst)]);
715 if (brw_inst_dst_ia1_addr_imm(brw, inst))
716 format(file, " %d", brw_inst_dst_ia1_addr_imm(brw, inst));
717 string(file, "]<");
718 err |= control(file, "horiz stride", horiz_stride,
719 brw_inst_dst_hstride(brw, inst), NULL);
720 string(file, ">");
721 err |= control(file, "dest reg encoding", reg_encoding,
722 brw_inst_dst_reg_type(brw, inst), NULL);
723 }
724 } else {
725 if (brw_inst_dst_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
726 err |= reg(file, brw_inst_dst_reg_file(brw, inst),
727 brw_inst_dst_da_reg_nr(brw, inst));
728 if (err == -1)
729 return 0;
730 if (brw_inst_dst_da16_subreg_nr(brw, inst))
731 format(file, ".%d", brw_inst_dst_da16_subreg_nr(brw, inst) /
732 reg_type_size[brw_inst_dst_reg_type(brw, inst)]);
733 string(file, "<1>");
734 err |= control(file, "writemask", writemask,
735 brw_inst_da16_writemask(brw, inst), NULL);
736 err |= control(file, "dest reg encoding", reg_encoding,
737 brw_inst_dst_reg_type(brw, inst), NULL);
738 } else {
739 err = 1;
740 string(file, "Indirect align16 address mode not supported");
741 }
742 }
743
744 return 0;
745 }
746
747 static int
748 dest_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
749 {
750 int err = 0;
751 uint32_t reg_file;
752
753 if (brw->gen == 6 && brw_inst_3src_dst_reg_file(brw, inst))
754 reg_file = BRW_MESSAGE_REGISTER_FILE;
755 else
756 reg_file = BRW_GENERAL_REGISTER_FILE;
757
758 err |= reg(file, reg_file, brw_inst_3src_dst_reg_nr(brw, inst));
759 if (err == -1)
760 return 0;
761 if (brw_inst_3src_dst_subreg_nr(brw, inst))
762 format(file, ".%d", brw_inst_3src_dst_subreg_nr(brw, inst));
763 string(file, "<1>");
764 err |= control(file, "writemask", writemask,
765 brw_inst_3src_dst_writemask(brw, inst), NULL);
766 err |= control(file, "dest reg encoding", three_source_reg_encoding,
767 brw_inst_3src_dst_type(brw, inst), NULL);
768
769 return 0;
770 }
771
772 static int
773 src_align1_region(FILE *file,
774 unsigned _vert_stride, unsigned _width,
775 unsigned _horiz_stride)
776 {
777 int err = 0;
778 string(file, "<");
779 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
780 string(file, ",");
781 err |= control(file, "width", width, _width, NULL);
782 string(file, ",");
783 err |= control(file, "horiz_stride", horiz_stride, _horiz_stride, NULL);
784 string(file, ">");
785 return err;
786 }
787
788 static int
789 src_da1(FILE *file,
790 const struct brw_context *brw,
791 unsigned opcode,
792 unsigned type, unsigned _reg_file,
793 unsigned _vert_stride, unsigned _width, unsigned _horiz_stride,
794 unsigned reg_num, unsigned sub_reg_num, unsigned __abs,
795 unsigned _negate)
796 {
797 int err = 0;
798
799 if (brw->gen >= 8 && is_logic_instruction(opcode))
800 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
801 else
802 err |= control(file, "negate", m_negate, _negate, NULL);
803
804 err |= control(file, "abs", _abs, __abs, NULL);
805
806 err |= reg(file, _reg_file, reg_num);
807 if (err == -1)
808 return 0;
809 if (sub_reg_num)
810 format(file, ".%d", sub_reg_num / reg_type_size[type]); /* use formal style like spec */
811 src_align1_region(file, _vert_stride, _width, _horiz_stride);
812 err |= control(file, "src reg encoding", reg_encoding, type, NULL);
813 return err;
814 }
815
816 static int
817 src_ia1(FILE *file,
818 const struct brw_context *brw,
819 unsigned opcode,
820 unsigned type,
821 unsigned _reg_file,
822 int _addr_imm,
823 unsigned _addr_subreg_nr,
824 unsigned _negate,
825 unsigned __abs,
826 unsigned _addr_mode,
827 unsigned _horiz_stride, unsigned _width, unsigned _vert_stride)
828 {
829 int err = 0;
830
831 if (brw->gen >= 8 && is_logic_instruction(opcode))
832 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
833 else
834 err |= control(file, "negate", m_negate, _negate, NULL);
835
836 err |= control(file, "abs", _abs, __abs, NULL);
837
838 string(file, "g[a0");
839 if (_addr_subreg_nr)
840 format(file, ".%d", _addr_subreg_nr);
841 if (_addr_imm)
842 format(file, " %d", _addr_imm);
843 string(file, "]");
844 src_align1_region(file, _vert_stride, _width, _horiz_stride);
845 err |= control(file, "src reg encoding", reg_encoding, type, NULL);
846 return err;
847 }
848
849 static int
850 src_swizzle(FILE *file, unsigned swiz)
851 {
852 unsigned x = BRW_GET_SWZ(swiz, BRW_CHANNEL_X);
853 unsigned y = BRW_GET_SWZ(swiz, BRW_CHANNEL_Y);
854 unsigned z = BRW_GET_SWZ(swiz, BRW_CHANNEL_Z);
855 unsigned w = BRW_GET_SWZ(swiz, BRW_CHANNEL_W);
856 int err = 0;
857
858 if (x == y && x == z && x == w) {
859 string(file, ".");
860 err |= control(file, "channel select", chan_sel, x, NULL);
861 } else if (swiz != BRW_SWIZZLE_XYZW) {
862 string(file, ".");
863 err |= control(file, "channel select", chan_sel, x, NULL);
864 err |= control(file, "channel select", chan_sel, y, NULL);
865 err |= control(file, "channel select", chan_sel, z, NULL);
866 err |= control(file, "channel select", chan_sel, w, NULL);
867 }
868 return err;
869 }
870
871 static int
872 src_da16(FILE *file,
873 const struct brw_context *brw,
874 unsigned opcode,
875 unsigned _reg_type,
876 unsigned _reg_file,
877 unsigned _vert_stride,
878 unsigned _reg_nr,
879 unsigned _subreg_nr,
880 unsigned __abs,
881 unsigned _negate,
882 unsigned swz_x, unsigned swz_y, unsigned swz_z, unsigned swz_w)
883 {
884 int err = 0;
885
886 if (brw->gen >= 8 && is_logic_instruction(opcode))
887 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
888 else
889 err |= control(file, "negate", m_negate, _negate, NULL);
890
891 err |= control(file, "abs", _abs, __abs, NULL);
892
893 err |= reg(file, _reg_file, _reg_nr);
894 if (err == -1)
895 return 0;
896 if (_subreg_nr)
897 /* bit4 for subreg number byte addressing. Make this same meaning as
898 in da1 case, so output looks consistent. */
899 format(file, ".%d", 16 / reg_type_size[_reg_type]);
900 string(file, "<");
901 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
902 string(file, ",4,1>");
903 err |= src_swizzle(file, BRW_SWIZZLE4(swz_x, swz_y, swz_z, swz_w));
904 err |= control(file, "src da16 reg type", reg_encoding, _reg_type, NULL);
905 return err;
906 }
907
908 static int
909 src0_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
910 {
911 int err = 0;
912 unsigned src0_subreg_nr = brw_inst_3src_src0_subreg_nr(brw, inst);
913
914 err |= control(file, "negate", m_negate,
915 brw_inst_3src_src0_negate(brw, inst), NULL);
916 err |= control(file, "abs", _abs, brw_inst_3src_src0_abs(brw, inst), NULL);
917
918 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
919 brw_inst_3src_src0_reg_nr(brw, inst));
920 if (err == -1)
921 return 0;
922 if (src0_subreg_nr)
923 format(file, ".%d", src0_subreg_nr);
924 if (brw_inst_3src_src0_rep_ctrl(brw, inst))
925 string(file, "<0,1,0>");
926 else
927 string(file, "<4,4,1>");
928 err |= control(file, "src da16 reg type", three_source_reg_encoding,
929 brw_inst_3src_src_type(brw, inst), NULL);
930 err |= src_swizzle(file, brw_inst_3src_src0_swizzle(brw, inst));
931 return err;
932 }
933
934 static int
935 src1_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
936 {
937 int err = 0;
938 unsigned src1_subreg_nr = brw_inst_3src_src1_subreg_nr(brw, inst);
939
940 err |= control(file, "negate", m_negate,
941 brw_inst_3src_src1_negate(brw, inst), NULL);
942 err |= control(file, "abs", _abs, brw_inst_3src_src1_abs(brw, inst), NULL);
943
944 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
945 brw_inst_3src_src1_reg_nr(brw, inst));
946 if (err == -1)
947 return 0;
948 if (src1_subreg_nr)
949 format(file, ".%d", src1_subreg_nr);
950 if (brw_inst_3src_src1_rep_ctrl(brw, inst))
951 string(file, "<0,1,0>");
952 else
953 string(file, "<4,4,1>");
954 err |= control(file, "src da16 reg type", three_source_reg_encoding,
955 brw_inst_3src_src_type(brw, inst), NULL);
956 err |= src_swizzle(file, brw_inst_3src_src1_swizzle(brw, inst));
957 return err;
958 }
959
960
961 static int
962 src2_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
963 {
964 int err = 0;
965 unsigned src2_subreg_nr = brw_inst_3src_src2_subreg_nr(brw, inst);
966
967 err |= control(file, "negate", m_negate,
968 brw_inst_3src_src2_negate(brw, inst), NULL);
969 err |= control(file, "abs", _abs, brw_inst_3src_src2_abs(brw, inst), NULL);
970
971 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
972 brw_inst_3src_src2_reg_nr(brw, inst));
973 if (err == -1)
974 return 0;
975 if (src2_subreg_nr)
976 format(file, ".%d", src2_subreg_nr);
977 if (brw_inst_3src_src2_rep_ctrl(brw, inst))
978 string(file, "<0,1,0>");
979 else
980 string(file, "<4,4,1>");
981 err |= control(file, "src da16 reg type", three_source_reg_encoding,
982 brw_inst_3src_src_type(brw, inst), NULL);
983 err |= src_swizzle(file, brw_inst_3src_src2_swizzle(brw, inst));
984 return err;
985 }
986
987 static int
988 imm(FILE *file, struct brw_context *brw, unsigned type, brw_inst *inst)
989 {
990 switch (type) {
991 case BRW_HW_REG_TYPE_UD:
992 format(file, "0x%08xUD", brw_inst_imm_ud(brw, inst));
993 break;
994 case BRW_HW_REG_TYPE_D:
995 format(file, "%dD", brw_inst_imm_d(brw, inst));
996 break;
997 case BRW_HW_REG_TYPE_UW:
998 format(file, "0x%04xUW", (uint16_t) brw_inst_imm_ud(brw, inst));
999 break;
1000 case BRW_HW_REG_TYPE_W:
1001 format(file, "%dW", (int16_t) brw_inst_imm_d(brw, inst));
1002 break;
1003 case BRW_HW_REG_IMM_TYPE_UV:
1004 format(file, "0x%08xUV", brw_inst_imm_ud(brw, inst));
1005 break;
1006 case BRW_HW_REG_IMM_TYPE_VF:
1007 format(file, "Vector Float");
1008 break;
1009 case BRW_HW_REG_IMM_TYPE_V:
1010 format(file, "0x%08xV", brw_inst_imm_ud(brw, inst));
1011 break;
1012 case BRW_HW_REG_TYPE_F:
1013 format(file, "%-gF", brw_inst_imm_f(brw, inst));
1014 break;
1015 case GEN8_HW_REG_IMM_TYPE_DF:
1016 string(file, "Double IMM");
1017 break;
1018 case GEN8_HW_REG_IMM_TYPE_HF:
1019 string(file, "Half Float IMM");
1020 break;
1021 }
1022 return 0;
1023 }
1024
1025 static int
1026 src0(FILE *file, struct brw_context *brw, brw_inst *inst)
1027 {
1028 if (brw_inst_src0_reg_file(brw, inst) == BRW_IMMEDIATE_VALUE) {
1029 return imm(file, brw, brw_inst_src0_reg_type(brw, inst), inst);
1030 } else if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
1031 if (brw_inst_src0_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
1032 return src_da1(file,
1033 brw,
1034 brw_inst_opcode(brw, inst),
1035 brw_inst_src0_reg_type(brw, inst),
1036 brw_inst_src0_reg_file(brw, inst),
1037 brw_inst_src0_vstride(brw, inst),
1038 brw_inst_src0_width(brw, inst),
1039 brw_inst_src0_hstride(brw, inst),
1040 brw_inst_src0_da_reg_nr(brw, inst),
1041 brw_inst_src0_da1_subreg_nr(brw, inst),
1042 brw_inst_src0_abs(brw, inst),
1043 brw_inst_src0_negate(brw, inst));
1044 } else {
1045 return src_ia1(file,
1046 brw,
1047 brw_inst_opcode(brw, inst),
1048 brw_inst_src0_reg_type(brw, inst),
1049 brw_inst_src0_reg_file(brw, inst),
1050 brw_inst_src0_ia1_addr_imm(brw, inst),
1051 brw_inst_src0_ia_subreg_nr(brw, inst),
1052 brw_inst_src0_negate(brw, inst),
1053 brw_inst_src0_abs(brw, inst),
1054 brw_inst_src0_address_mode(brw, inst),
1055 brw_inst_src0_hstride(brw, inst),
1056 brw_inst_src0_width(brw, inst),
1057 brw_inst_src0_vstride(brw, inst));
1058 }
1059 } else {
1060 if (brw_inst_src0_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
1061 return src_da16(file,
1062 brw,
1063 brw_inst_opcode(brw, inst),
1064 brw_inst_src0_reg_type(brw, inst),
1065 brw_inst_src0_reg_file(brw, inst),
1066 brw_inst_src0_vstride(brw, inst),
1067 brw_inst_src0_da_reg_nr(brw, inst),
1068 brw_inst_src0_da16_subreg_nr(brw, inst),
1069 brw_inst_src0_abs(brw, inst),
1070 brw_inst_src0_negate(brw, inst),
1071 brw_inst_src0_da16_swiz_x(brw, inst),
1072 brw_inst_src0_da16_swiz_y(brw, inst),
1073 brw_inst_src0_da16_swiz_z(brw, inst),
1074 brw_inst_src0_da16_swiz_w(brw, inst));
1075 } else {
1076 string(file, "Indirect align16 address mode not supported");
1077 return 1;
1078 }
1079 }
1080 }
1081
1082 static int
1083 src1(FILE *file, struct brw_context *brw, brw_inst *inst)
1084 {
1085 if (brw_inst_src1_reg_file(brw, inst) == BRW_IMMEDIATE_VALUE) {
1086 return imm(file, brw, brw_inst_src1_reg_type(brw, inst), inst);
1087 } else if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
1088 if (brw_inst_src1_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
1089 return src_da1(file,
1090 brw,
1091 brw_inst_opcode(brw, inst),
1092 brw_inst_src1_reg_type(brw, inst),
1093 brw_inst_src1_reg_file(brw, inst),
1094 brw_inst_src1_vstride(brw, inst),
1095 brw_inst_src1_width(brw, inst),
1096 brw_inst_src1_hstride(brw, inst),
1097 brw_inst_src1_da_reg_nr(brw, inst),
1098 brw_inst_src1_da1_subreg_nr(brw, inst),
1099 brw_inst_src1_abs(brw, inst),
1100 brw_inst_src1_negate(brw, inst));
1101 } else {
1102 return src_ia1(file,
1103 brw,
1104 brw_inst_opcode(brw, inst),
1105 brw_inst_src1_reg_type(brw, inst),
1106 brw_inst_src1_reg_file(brw, inst),
1107 brw_inst_src1_ia1_addr_imm(brw, inst),
1108 brw_inst_src1_ia_subreg_nr(brw, inst),
1109 brw_inst_src1_negate(brw, inst),
1110 brw_inst_src1_abs(brw, inst),
1111 brw_inst_src1_address_mode(brw, inst),
1112 brw_inst_src1_hstride(brw, inst),
1113 brw_inst_src1_width(brw, inst),
1114 brw_inst_src1_vstride(brw, inst));
1115 }
1116 } else {
1117 if (brw_inst_src1_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
1118 return src_da16(file,
1119 brw,
1120 brw_inst_opcode(brw, inst),
1121 brw_inst_src1_reg_type(brw, inst),
1122 brw_inst_src1_reg_file(brw, inst),
1123 brw_inst_src1_vstride(brw, inst),
1124 brw_inst_src1_da_reg_nr(brw, inst),
1125 brw_inst_src1_da16_subreg_nr(brw, inst),
1126 brw_inst_src1_abs(brw, inst),
1127 brw_inst_src1_negate(brw, inst),
1128 brw_inst_src1_da16_swiz_x(brw, inst),
1129 brw_inst_src1_da16_swiz_y(brw, inst),
1130 brw_inst_src1_da16_swiz_z(brw, inst),
1131 brw_inst_src1_da16_swiz_w(brw, inst));
1132 } else {
1133 string(file, "Indirect align16 address mode not supported");
1134 return 1;
1135 }
1136 }
1137 }
1138
1139 static int
1140 qtr_ctrl(FILE *file, struct brw_context *brw, brw_inst *inst)
1141 {
1142 int qtr_ctl = brw_inst_qtr_control(brw, inst);
1143 int exec_size = 1 << brw_inst_exec_size(brw, inst);
1144
1145 if (exec_size == 8) {
1146 switch (qtr_ctl) {
1147 case 0:
1148 string(file, " 1Q");
1149 break;
1150 case 1:
1151 string(file, " 2Q");
1152 break;
1153 case 2:
1154 string(file, " 3Q");
1155 break;
1156 case 3:
1157 string(file, " 4Q");
1158 break;
1159 }
1160 } else if (exec_size == 16) {
1161 if (qtr_ctl < 2)
1162 string(file, " 1H");
1163 else
1164 string(file, " 2H");
1165 }
1166 return 0;
1167 }
1168
1169 int
1170 brw_disassemble_inst(FILE *file, struct brw_context *brw, brw_inst *inst,
1171 bool is_compacted)
1172 {
1173 int err = 0;
1174 int space = 0;
1175
1176 const enum opcode opcode = brw_inst_opcode(brw, inst);
1177
1178 if (brw_inst_pred_control(brw, inst)) {
1179 string(file, "(");
1180 err |= control(file, "predicate inverse", pred_inv,
1181 brw_inst_pred_inv(brw, inst), NULL);
1182 format(file, "f%d", brw->gen >= 7 ? brw_inst_flag_reg_nr(brw, inst) : 0);
1183 if (brw_inst_flag_subreg_nr(brw, inst))
1184 format(file, ".%d", brw_inst_flag_subreg_nr(brw, inst));
1185 if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
1186 err |= control(file, "predicate control align1", pred_ctrl_align1,
1187 brw_inst_pred_control(brw, inst), NULL);
1188 } else {
1189 err |= control(file, "predicate control align16", pred_ctrl_align16,
1190 brw_inst_pred_control(brw, inst), NULL);
1191 }
1192 string(file, ") ");
1193 }
1194
1195 err |= print_opcode(file, opcode);
1196 err |= control(file, "saturate", saturate, brw_inst_saturate(brw, inst),
1197 NULL);
1198
1199 err |= control(file, "debug control", debug_ctrl,
1200 brw_inst_debug_control(brw, inst), NULL);
1201
1202 if (opcode == BRW_OPCODE_MATH) {
1203 string(file, " ");
1204 err |= control(file, "function", math_function,
1205 brw_inst_math_function(brw, inst), NULL);
1206 } else if (opcode != BRW_OPCODE_SEND && opcode != BRW_OPCODE_SENDC) {
1207 err |= control(file, "conditional modifier", conditional_modifier,
1208 brw_inst_cond_modifier(brw, inst), NULL);
1209
1210 /* If we're using the conditional modifier, print which flags reg is
1211 * used for it. Note that on gen6+, the embedded-condition SEL and
1212 * control flow doesn't update flags.
1213 */
1214 if (brw_inst_cond_modifier(brw, inst) &&
1215 (brw->gen < 6 || (opcode != BRW_OPCODE_SEL &&
1216 opcode != BRW_OPCODE_IF &&
1217 opcode != BRW_OPCODE_WHILE))) {
1218 format(file, ".f%d",
1219 brw->gen >= 7 ? brw_inst_flag_reg_nr(brw, inst) : 0);
1220 if (brw_inst_flag_subreg_nr(brw, inst))
1221 format(file, ".%d", brw_inst_flag_subreg_nr(brw, inst));
1222 }
1223 }
1224
1225 if (opcode != BRW_OPCODE_NOP) {
1226 string(file, "(");
1227 err |= control(file, "execution size", exec_size,
1228 brw_inst_exec_size(brw, inst), NULL);
1229 string(file, ")");
1230 }
1231
1232 if (opcode == BRW_OPCODE_SEND && brw->gen < 6)
1233 format(file, " %d", brw_inst_base_mrf(brw, inst));
1234
1235 if (has_uip(brw, opcode)) {
1236 /* Instructions that have UIP also have JIP. */
1237 pad(file, 16);
1238 format(file, "JIP: %d", brw_inst_jip(brw, inst));
1239 pad(file, 32);
1240 format(file, "UIP: %d", brw_inst_uip(brw, inst));
1241 } else if (has_jip(brw, opcode)) {
1242 pad(file, 16);
1243 if (brw->gen >= 7) {
1244 format(file, "JIP: %d", brw_inst_jip(brw, inst));
1245 } else {
1246 format(file, "JIP: %d", brw_inst_gen6_jump_count(brw, inst));
1247 }
1248 } else if (brw->gen < 6 && (opcode == BRW_OPCODE_BREAK ||
1249 opcode == BRW_OPCODE_CONTINUE ||
1250 opcode == BRW_OPCODE_ELSE)) {
1251 pad(file, 16);
1252 format(file, "Jump: %d", brw_inst_gen4_jump_count(brw, inst));
1253 pad(file, 32);
1254 format(file, "Pop: %d", brw_inst_gen4_pop_count(brw, inst));
1255 } else if (brw->gen < 6 && (opcode == BRW_OPCODE_IF ||
1256 opcode == BRW_OPCODE_IFF ||
1257 opcode == BRW_OPCODE_HALT)) {
1258 pad(file, 16);
1259 format(file, "Jump: %d", brw_inst_gen4_pop_count(brw, inst));
1260 } else if (brw->gen < 6 && opcode == BRW_OPCODE_ENDIF) {
1261 pad(file, 16);
1262 format(file, "Pop: %d", brw_inst_gen4_pop_count(brw, inst));
1263 } else if (opcode == BRW_OPCODE_JMPI) {
1264 format(file, " %d", brw_inst_imm_d(brw, inst));
1265 } else if (opcode_descs[opcode].nsrc == 3) {
1266 pad(file, 16);
1267 err |= dest_3src(file, brw, inst);
1268
1269 pad(file, 32);
1270 err |= src0_3src(file, brw, inst);
1271
1272 pad(file, 48);
1273 err |= src1_3src(file, brw, inst);
1274
1275 pad(file, 64);
1276 err |= src2_3src(file, brw, inst);
1277 } else {
1278 if (opcode_descs[opcode].ndst > 0) {
1279 pad(file, 16);
1280 err |= dest(file, brw, inst);
1281 }
1282
1283 if (opcode_descs[opcode].nsrc > 0) {
1284 pad(file, 32);
1285 err |= src0(file, brw, inst);
1286 }
1287
1288 if (opcode_descs[opcode].nsrc > 1) {
1289 pad(file, 48);
1290 err |= src1(file, brw, inst);
1291 }
1292 }
1293
1294 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) {
1295 enum brw_message_target sfid = brw_inst_sfid(brw, inst);
1296
1297 if (brw_inst_src1_reg_file(brw, inst) != BRW_IMMEDIATE_VALUE) {
1298 /* show the indirect descriptor source */
1299 pad(file, 48);
1300 err |= src1(file, brw, inst);
1301 }
1302
1303 newline(file);
1304 pad(file, 16);
1305 space = 0;
1306
1307 fprintf(file, " ");
1308 err |= control(file, "SFID", brw->gen >= 6 ? gen6_sfid : gen4_sfid,
1309 sfid, &space);
1310
1311
1312 if (brw_inst_src1_reg_file(brw, inst) != BRW_IMMEDIATE_VALUE) {
1313 format(file, " indirect");
1314 } else {
1315 switch (sfid) {
1316 case BRW_SFID_MATH:
1317 err |= control(file, "math function", math_function,
1318 brw_inst_math_msg_function(brw, inst), &space);
1319 err |= control(file, "math saturate", math_saturate,
1320 brw_inst_math_msg_saturate(brw, inst), &space);
1321 err |= control(file, "math signed", math_signed,
1322 brw_inst_math_msg_signed_int(brw, inst), &space);
1323 err |= control(file, "math scalar", math_scalar,
1324 brw_inst_math_msg_data_type(brw, inst), &space);
1325 err |= control(file, "math precision", math_precision,
1326 brw_inst_math_msg_precision(brw, inst), &space);
1327 break;
1328 case BRW_SFID_SAMPLER:
1329 if (brw->gen >= 5) {
1330 format(file, " (%d, %d, %d, %d)",
1331 brw_inst_binding_table_index(brw, inst),
1332 brw_inst_sampler(brw, inst),
1333 brw_inst_sampler_msg_type(brw, inst),
1334 brw_inst_sampler_simd_mode(brw, inst));
1335 } else {
1336 format(file, " (%d, %d, %d, ",
1337 brw_inst_binding_table_index(brw, inst),
1338 brw_inst_sampler(brw, inst),
1339 brw_inst_sampler_msg_type(brw, inst));
1340 if (!brw->is_g4x) {
1341 err |= control(file, "sampler target format",
1342 sampler_target_format,
1343 brw_inst_sampler_return_format(brw, inst), NULL);
1344 }
1345 string(file, ")");
1346 }
1347 break;
1348 case GEN6_SFID_DATAPORT_SAMPLER_CACHE:
1349 /* aka BRW_SFID_DATAPORT_READ on Gen4-5 */
1350 if (brw->gen >= 6) {
1351 format(file, " (%d, %d, %d, %d)",
1352 brw_inst_binding_table_index(brw, inst),
1353 brw_inst_dp_msg_control(brw, inst),
1354 brw_inst_dp_msg_type(brw, inst),
1355 brw->gen >= 7 ? 0 : brw_inst_dp_write_commit(brw, inst));
1356 } else {
1357 format(file, " (%d, %d, %d)",
1358 brw_inst_binding_table_index(brw, inst),
1359 brw_inst_dp_read_msg_control(brw, inst),
1360 brw_inst_dp_read_msg_type(brw, inst));
1361 }
1362 break;
1363
1364 case GEN6_SFID_DATAPORT_RENDER_CACHE: {
1365 /* aka BRW_SFID_DATAPORT_WRITE on Gen4-5 */
1366 unsigned msg_type = brw_inst_dp_write_msg_type(brw, inst);
1367
1368 err |= control(file, "DP rc message type",
1369 brw->gen >= 6 ? dp_rc_msg_type_gen6
1370 : dp_write_port_msg_type,
1371 msg_type, &space);
1372
1373 bool is_rt_write = msg_type ==
1374 (brw->gen >= 6 ? GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
1375 : BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE);
1376
1377 if (is_rt_write) {
1378 err |= control(file, "RT message type", m_rt_write_subtype,
1379 brw_inst_rt_message_type(brw, inst), &space);
1380 if (brw->gen >= 6 && brw_inst_rt_slot_group(brw, inst))
1381 string(file, " Hi");
1382 if (brw_inst_rt_last(brw, inst))
1383 string(file, " LastRT");
1384 if (brw->gen < 7 && brw_inst_dp_write_commit(brw, inst))
1385 string(file, " WriteCommit");
1386 } else {
1387 format(file, " MsgCtrl = 0x%x",
1388 brw_inst_dp_write_msg_control(brw, inst));
1389 }
1390
1391 format(file, " Surface = %d", brw_inst_binding_table_index(brw, inst));
1392 break;
1393 }
1394
1395 case BRW_SFID_URB:
1396 format(file, " %d", brw_inst_urb_global_offset(brw, inst));
1397
1398 space = 1;
1399 if (brw->gen >= 7) {
1400 err |= control(file, "urb opcode", gen7_urb_opcode,
1401 brw_inst_urb_opcode(brw, inst), &space);
1402 } else if (brw->gen >= 5) {
1403 err |= control(file, "urb opcode", gen5_urb_opcode,
1404 brw_inst_urb_opcode(brw, inst), &space);
1405 }
1406 err |= control(file, "urb swizzle", urb_swizzle,
1407 brw_inst_urb_swizzle_control(brw, inst), &space);
1408 if (brw->gen < 7) {
1409 err |= control(file, "urb allocate", urb_allocate,
1410 brw_inst_urb_allocate(brw, inst), &space);
1411 err |= control(file, "urb used", urb_used,
1412 brw_inst_urb_used(brw, inst), &space);
1413 }
1414 if (brw->gen < 8) {
1415 err |= control(file, "urb complete", urb_complete,
1416 brw_inst_urb_complete(brw, inst), &space);
1417 }
1418 break;
1419 case BRW_SFID_THREAD_SPAWNER:
1420 break;
1421 case GEN7_SFID_DATAPORT_DATA_CACHE:
1422 if (brw->gen >= 7) {
1423 format(file, " (");
1424
1425 err |= control(file, "DP DC0 message type",
1426 dp_dc0_msg_type_gen7,
1427 brw_inst_dp_msg_type(brw, inst), &space);
1428
1429 format(file, ", %d, ", brw_inst_binding_table_index(brw, inst));
1430
1431 switch (brw_inst_dp_msg_type(brw, inst)) {
1432 case GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP:
1433 control(file, "atomic op", aop,
1434 brw_inst_imm_ud(brw, inst) >> 8 & 0xf, &space);
1435 break;
1436 default:
1437 format(file, "%d", brw_inst_dp_msg_control(brw, inst));
1438 }
1439 format(file, ")");
1440 break;
1441 }
1442 /* FALLTHROUGH */
1443
1444 case HSW_SFID_DATAPORT_DATA_CACHE_1: {
1445 if (brw->gen >= 7) {
1446 format(file, " (");
1447
1448 unsigned msg_ctrl = brw_inst_dp_msg_control(brw, inst);
1449
1450 err |= control(file, "DP DC1 message type",
1451 dp_dc1_msg_type_hsw,
1452 brw_inst_dp_msg_type(brw, inst), &space);
1453
1454 format(file, ", Surface = %d, ",
1455 brw_inst_binding_table_index(brw, inst));
1456
1457 switch (brw_inst_dp_msg_type(brw, inst)) {
1458 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP:
1459 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP:
1460 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP:
1461 format(file, "SIMD%d,", (msg_ctrl & (1 << 4)) ? 8 : 16);
1462 /* fallthrough */
1463 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2:
1464 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2:
1465 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2:
1466 control(file, "atomic op", aop, msg_ctrl & 0xf, &space);
1467 break;
1468 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ:
1469 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE:
1470 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ:
1471 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE: {
1472 static const char *simd_modes[] = { "4x2", "16", "8" };
1473 format(file, "SIMD%s, Mask = 0x%x",
1474 simd_modes[msg_ctrl >> 4], msg_ctrl & 0xf);
1475 break;
1476 }
1477 default:
1478 format(file, "0x%x", msg_ctrl);
1479 }
1480 format(file, ")");
1481 break;
1482 }
1483 /* FALLTHROUGH */
1484 }
1485
1486 case GEN7_SFID_PIXEL_INTERPOLATOR:
1487 if (brw->gen >= 7) {
1488 format(file, " (%s, %s, 0x%02x)",
1489 brw_inst_pi_nopersp(brw, inst) ? "linear" : "persp",
1490 pixel_interpolator_msg_types[brw_inst_pi_message_type(brw, inst)],
1491 brw_inst_pi_message_data(brw, inst));
1492 break;
1493 }
1494 /* FALLTHROUGH */
1495
1496 default:
1497 format(file, "unsupported shared function ID %d", sfid);
1498 break;
1499 }
1500
1501 if (space)
1502 string(file, " ");
1503 format(file, "mlen %d", brw_inst_mlen(brw, inst));
1504 format(file, " rlen %d", brw_inst_rlen(brw, inst));
1505 }
1506 }
1507 pad(file, 64);
1508 if (opcode != BRW_OPCODE_NOP) {
1509 string(file, "{");
1510 space = 1;
1511 err |= control(file, "access mode", access_mode,
1512 brw_inst_access_mode(brw, inst), &space);
1513 if (brw->gen >= 6) {
1514 err |= control(file, "write enable control", wectrl,
1515 brw_inst_mask_control(brw, inst), &space);
1516 } else {
1517 err |= control(file, "mask control", mask_ctrl,
1518 brw_inst_mask_control(brw, inst), &space);
1519 }
1520 err |= control(file, "dependency control", dep_ctrl,
1521 ((brw_inst_no_dd_check(brw, inst) << 1) |
1522 brw_inst_no_dd_clear(brw, inst)), &space);
1523
1524 if (brw->gen >= 6)
1525 err |= qtr_ctrl(file, brw, inst);
1526 else {
1527 if (brw_inst_qtr_control(brw, inst) == BRW_COMPRESSION_COMPRESSED &&
1528 opcode_descs[opcode].ndst > 0 &&
1529 brw_inst_dst_reg_file(brw, inst) == BRW_MESSAGE_REGISTER_FILE &&
1530 brw_inst_dst_da_reg_nr(brw, inst) & (1 << 7)) {
1531 format(file, " compr4");
1532 } else {
1533 err |= control(file, "compression control", compr_ctrl,
1534 brw_inst_qtr_control(brw, inst), &space);
1535 }
1536 }
1537
1538 err |= control(file, "compaction", cmpt_ctrl, is_compacted, &space);
1539 err |= control(file, "thread control", thread_ctrl,
1540 brw_inst_thread_control(brw, inst), &space);
1541 if (brw->gen >= 6)
1542 err |= control(file, "acc write control", accwr,
1543 brw_inst_acc_wr_control(brw, inst), &space);
1544 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC)
1545 err |= control(file, "end of thread", end_of_thread,
1546 brw_inst_eot(brw, inst), &space);
1547 if (space)
1548 string(file, " ");
1549 string(file, "}");
1550 }
1551 string(file, ";");
1552 newline(file);
1553 return err;
1554 }