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50551f46c95e387274dbd04622546d4dc795a54b
[mesa.git] / src / mesa / drivers / dri / i965 / brw_disasm.c
1 /*
2 * Copyright © 2008 Keith Packard
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
13 *
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20 * OF THIS SOFTWARE.
21 */
22
23 #include <stdio.h>
24 #include <stdlib.h>
25 #include <string.h>
26 #include <getopt.h>
27 #include <unistd.h>
28 #include <stdarg.h>
29
30 #include "main/mtypes.h"
31
32 #include "brw_context.h"
33 #include "brw_defines.h"
34
35 const struct opcode_desc opcode_descs[128] = {
36 [BRW_OPCODE_MOV] = { .name = "mov", .nsrc = 1, .ndst = 1 },
37 [BRW_OPCODE_FRC] = { .name = "frc", .nsrc = 1, .ndst = 1 },
38 [BRW_OPCODE_RNDU] = { .name = "rndu", .nsrc = 1, .ndst = 1 },
39 [BRW_OPCODE_RNDD] = { .name = "rndd", .nsrc = 1, .ndst = 1 },
40 [BRW_OPCODE_RNDE] = { .name = "rnde", .nsrc = 1, .ndst = 1 },
41 [BRW_OPCODE_RNDZ] = { .name = "rndz", .nsrc = 1, .ndst = 1 },
42 [BRW_OPCODE_NOT] = { .name = "not", .nsrc = 1, .ndst = 1 },
43 [BRW_OPCODE_LZD] = { .name = "lzd", .nsrc = 1, .ndst = 1 },
44 [BRW_OPCODE_F32TO16] = { .name = "f32to16", .nsrc = 1, .ndst = 1 },
45 [BRW_OPCODE_F16TO32] = { .name = "f16to32", .nsrc = 1, .ndst = 1 },
46
47 [BRW_OPCODE_MUL] = { .name = "mul", .nsrc = 2, .ndst = 1 },
48 [BRW_OPCODE_MAC] = { .name = "mac", .nsrc = 2, .ndst = 1 },
49 [BRW_OPCODE_MACH] = { .name = "mach", .nsrc = 2, .ndst = 1 },
50 [BRW_OPCODE_LINE] = { .name = "line", .nsrc = 2, .ndst = 1 },
51 [BRW_OPCODE_PLN] = { .name = "pln", .nsrc = 2, .ndst = 1 },
52 [BRW_OPCODE_MAD] = { .name = "mad", .nsrc = 3, .ndst = 1 },
53 [BRW_OPCODE_SAD2] = { .name = "sad2", .nsrc = 2, .ndst = 1 },
54 [BRW_OPCODE_SADA2] = { .name = "sada2", .nsrc = 2, .ndst = 1 },
55 [BRW_OPCODE_DP4] = { .name = "dp4", .nsrc = 2, .ndst = 1 },
56 [BRW_OPCODE_DPH] = { .name = "dph", .nsrc = 2, .ndst = 1 },
57 [BRW_OPCODE_DP3] = { .name = "dp3", .nsrc = 2, .ndst = 1 },
58 [BRW_OPCODE_DP2] = { .name = "dp2", .nsrc = 2, .ndst = 1 },
59 [BRW_OPCODE_MATH] = { .name = "math", .nsrc = 2, .ndst = 1 },
60
61 [BRW_OPCODE_AVG] = { .name = "avg", .nsrc = 2, .ndst = 1 },
62 [BRW_OPCODE_ADD] = { .name = "add", .nsrc = 2, .ndst = 1 },
63 [BRW_OPCODE_SEL] = { .name = "sel", .nsrc = 2, .ndst = 1 },
64 [BRW_OPCODE_AND] = { .name = "and", .nsrc = 2, .ndst = 1 },
65 [BRW_OPCODE_OR] = { .name = "or", .nsrc = 2, .ndst = 1 },
66 [BRW_OPCODE_XOR] = { .name = "xor", .nsrc = 2, .ndst = 1 },
67 [BRW_OPCODE_SHR] = { .name = "shr", .nsrc = 2, .ndst = 1 },
68 [BRW_OPCODE_SHL] = { .name = "shl", .nsrc = 2, .ndst = 1 },
69 [BRW_OPCODE_ASR] = { .name = "asr", .nsrc = 2, .ndst = 1 },
70 [BRW_OPCODE_CMP] = { .name = "cmp", .nsrc = 2, .ndst = 1 },
71 [BRW_OPCODE_CMPN] = { .name = "cmpn", .nsrc = 2, .ndst = 1 },
72
73 [BRW_OPCODE_SEND] = { .name = "send", .nsrc = 1, .ndst = 1 },
74 [BRW_OPCODE_SENDC] = { .name = "sendc", .nsrc = 1, .ndst = 1 },
75 [BRW_OPCODE_NOP] = { .name = "nop", .nsrc = 0, .ndst = 0 },
76 [BRW_OPCODE_JMPI] = { .name = "jmpi", .nsrc = 0, .ndst = 0 },
77 [BRW_OPCODE_IF] = { .name = "if", .nsrc = 2, .ndst = 0 },
78 [BRW_OPCODE_IFF] = { .name = "iff", .nsrc = 2, .ndst = 1 },
79 [BRW_OPCODE_WHILE] = { .name = "while", .nsrc = 2, .ndst = 0 },
80 [BRW_OPCODE_ELSE] = { .name = "else", .nsrc = 2, .ndst = 0 },
81 [BRW_OPCODE_BREAK] = { .name = "break", .nsrc = 2, .ndst = 0 },
82 [BRW_OPCODE_CONTINUE] = { .name = "cont", .nsrc = 1, .ndst = 0 },
83 [BRW_OPCODE_HALT] = { .name = "halt", .nsrc = 1, .ndst = 0 },
84 [BRW_OPCODE_MSAVE] = { .name = "msave", .nsrc = 1, .ndst = 1 },
85 [BRW_OPCODE_PUSH] = { .name = "push", .nsrc = 1, .ndst = 1 },
86 [BRW_OPCODE_MRESTORE] = { .name = "mrest", .nsrc = 1, .ndst = 1 },
87 [BRW_OPCODE_POP] = { .name = "pop", .nsrc = 2, .ndst = 0 },
88 [BRW_OPCODE_WAIT] = { .name = "wait", .nsrc = 1, .ndst = 0 },
89 [BRW_OPCODE_DO] = { .name = "do", .nsrc = 0, .ndst = 0 },
90 [BRW_OPCODE_ENDIF] = { .name = "endif", .nsrc = 2, .ndst = 0 },
91 };
92 static const struct opcode_desc *opcode = opcode_descs;
93
94 static const char * const conditional_modifier[16] = {
95 [BRW_CONDITIONAL_NONE] = "",
96 [BRW_CONDITIONAL_Z] = ".e",
97 [BRW_CONDITIONAL_NZ] = ".ne",
98 [BRW_CONDITIONAL_G] = ".g",
99 [BRW_CONDITIONAL_GE] = ".ge",
100 [BRW_CONDITIONAL_L] = ".l",
101 [BRW_CONDITIONAL_LE] = ".le",
102 [BRW_CONDITIONAL_R] = ".r",
103 [BRW_CONDITIONAL_O] = ".o",
104 [BRW_CONDITIONAL_U] = ".u",
105 };
106
107 static const char * const negate[2] = {
108 [0] = "",
109 [1] = "-",
110 };
111
112 static const char * const _abs[2] = {
113 [0] = "",
114 [1] = "(abs)",
115 };
116
117 static const char * const vert_stride[16] = {
118 [0] = "0",
119 [1] = "1",
120 [2] = "2",
121 [3] = "4",
122 [4] = "8",
123 [5] = "16",
124 [6] = "32",
125 [15] = "VxH",
126 };
127
128 static const char * const width[8] = {
129 [0] = "1",
130 [1] = "2",
131 [2] = "4",
132 [3] = "8",
133 [4] = "16",
134 };
135
136 static const char * const horiz_stride[4] = {
137 [0] = "0",
138 [1] = "1",
139 [2] = "2",
140 [3] = "4"
141 };
142
143 static const char * const chan_sel[4] = {
144 [0] = "x",
145 [1] = "y",
146 [2] = "z",
147 [3] = "w",
148 };
149
150 static const char * const debug_ctrl[2] = {
151 [0] = "",
152 [1] = ".breakpoint"
153 };
154
155 static const char * const saturate[2] = {
156 [0] = "",
157 [1] = ".sat"
158 };
159
160 static const char * const accwr[2] = {
161 [0] = "",
162 [1] = "AccWrEnable"
163 };
164
165 static const char * const wectrl[2] = {
166 [0] = "WE_normal",
167 [1] = "WE_all"
168 };
169
170 static const char * const exec_size[8] = {
171 [0] = "1",
172 [1] = "2",
173 [2] = "4",
174 [3] = "8",
175 [4] = "16",
176 [5] = "32"
177 };
178
179 static const char * const pred_inv[2] = {
180 [0] = "+",
181 [1] = "-"
182 };
183
184 static const char * const pred_ctrl_align16[16] = {
185 [1] = "",
186 [2] = ".x",
187 [3] = ".y",
188 [4] = ".z",
189 [5] = ".w",
190 [6] = ".any4h",
191 [7] = ".all4h",
192 };
193
194 static const char * const pred_ctrl_align1[16] = {
195 [1] = "",
196 [2] = ".anyv",
197 [3] = ".allv",
198 [4] = ".any2h",
199 [5] = ".all2h",
200 [6] = ".any4h",
201 [7] = ".all4h",
202 [8] = ".any8h",
203 [9] = ".all8h",
204 [10] = ".any16h",
205 [11] = ".all16h",
206 };
207
208 static const char * const thread_ctrl[4] = {
209 [0] = "",
210 [2] = "switch"
211 };
212
213 static const char * const compr_ctrl[4] = {
214 [0] = "",
215 [1] = "sechalf",
216 [2] = "compr",
217 [3] = "compr4",
218 };
219
220 static const char * const dep_ctrl[4] = {
221 [0] = "",
222 [1] = "NoDDClr",
223 [2] = "NoDDChk",
224 [3] = "NoDDClr,NoDDChk",
225 };
226
227 static const char * const mask_ctrl[4] = {
228 [0] = "",
229 [1] = "nomask",
230 };
231
232 static const char * const access_mode[2] = {
233 [0] = "align1",
234 [1] = "align16",
235 };
236
237 static const char * const reg_encoding[8] = {
238 [0] = "UD",
239 [1] = "D",
240 [2] = "UW",
241 [3] = "W",
242 [4] = "UB",
243 [5] = "B",
244 [7] = "F"
245 };
246
247 const int reg_type_size[8] = {
248 [0] = 4,
249 [1] = 4,
250 [2] = 2,
251 [3] = 2,
252 [4] = 1,
253 [5] = 1,
254 [7] = 4
255 };
256
257 static const char * const reg_file[4] = {
258 [0] = "A",
259 [1] = "g",
260 [2] = "m",
261 [3] = "imm",
262 };
263
264 static const char * const writemask[16] = {
265 [0x0] = ".",
266 [0x1] = ".x",
267 [0x2] = ".y",
268 [0x3] = ".xy",
269 [0x4] = ".z",
270 [0x5] = ".xz",
271 [0x6] = ".yz",
272 [0x7] = ".xyz",
273 [0x8] = ".w",
274 [0x9] = ".xw",
275 [0xa] = ".yw",
276 [0xb] = ".xyw",
277 [0xc] = ".zw",
278 [0xd] = ".xzw",
279 [0xe] = ".yzw",
280 [0xf] = "",
281 };
282
283 static const char * const end_of_thread[2] = {
284 [0] = "",
285 [1] = "EOT"
286 };
287
288 static const char * const target_function[16] = {
289 [BRW_SFID_NULL] = "null",
290 [BRW_SFID_MATH] = "math",
291 [BRW_SFID_SAMPLER] = "sampler",
292 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
293 [BRW_SFID_DATAPORT_READ] = "read",
294 [BRW_SFID_DATAPORT_WRITE] = "write",
295 [BRW_SFID_URB] = "urb",
296 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner"
297 };
298
299 static const char * const target_function_gen6[16] = {
300 [BRW_SFID_NULL] = "null",
301 [BRW_SFID_MATH] = "math",
302 [BRW_SFID_SAMPLER] = "sampler",
303 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
304 [BRW_SFID_URB] = "urb",
305 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
306 [GEN6_SFID_DATAPORT_SAMPLER_CACHE] = "sampler",
307 [GEN6_SFID_DATAPORT_RENDER_CACHE] = "render",
308 [GEN6_SFID_DATAPORT_CONSTANT_CACHE] = "const",
309 [GEN7_SFID_DATAPORT_DATA_CACHE] = "data"
310 };
311
312 static const char * const dp_rc_msg_type_gen6[16] = {
313 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read",
314 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read",
315 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read",
316 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read",
317 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] = "OWORD unaligned block read",
318 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read",
319 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write",
320 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write",
321 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] = "OWORD dual block write",
322 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write",
323 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] = "DWORD scattered write",
324 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write",
325 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write",
326 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORMc write",
327 };
328
329 static const char * const math_function[16] = {
330 [BRW_MATH_FUNCTION_INV] = "inv",
331 [BRW_MATH_FUNCTION_LOG] = "log",
332 [BRW_MATH_FUNCTION_EXP] = "exp",
333 [BRW_MATH_FUNCTION_SQRT] = "sqrt",
334 [BRW_MATH_FUNCTION_RSQ] = "rsq",
335 [BRW_MATH_FUNCTION_SIN] = "sin",
336 [BRW_MATH_FUNCTION_COS] = "cos",
337 [BRW_MATH_FUNCTION_SINCOS] = "sincos",
338 [BRW_MATH_FUNCTION_TAN] = "tan",
339 [BRW_MATH_FUNCTION_POW] = "pow",
340 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] = "intdivmod",
341 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] = "intdiv",
342 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER] = "intmod",
343 };
344
345 static const char * const math_saturate[2] = {
346 [0] = "",
347 [1] = "sat"
348 };
349
350 static const char * const math_signed[2] = {
351 [0] = "",
352 [1] = "signed"
353 };
354
355 static const char * const math_scalar[2] = {
356 [0] = "",
357 [1] = "scalar"
358 };
359
360 static const char * const math_precision[2] = {
361 [0] = "",
362 [1] = "partial_precision"
363 };
364
365 static const char * const urb_opcode[2] = {
366 [0] = "urb_write",
367 [1] = "ff_sync",
368 };
369
370 static const char * const urb_swizzle[4] = {
371 [BRW_URB_SWIZZLE_NONE] = "",
372 [BRW_URB_SWIZZLE_INTERLEAVE] = "interleave",
373 [BRW_URB_SWIZZLE_TRANSPOSE] = "transpose",
374 };
375
376 static const char * const urb_allocate[2] = {
377 [0] = "",
378 [1] = "allocate"
379 };
380
381 static const char * const urb_used[2] = {
382 [0] = "",
383 [1] = "used"
384 };
385
386 static const char * const urb_complete[2] = {
387 [0] = "",
388 [1] = "complete"
389 };
390
391 static const char * const sampler_target_format[4] = {
392 [0] = "F",
393 [2] = "UD",
394 [3] = "D"
395 };
396
397
398 static int column;
399
400 static int string (FILE *file, const char *string)
401 {
402 fputs (string, file);
403 column += strlen (string);
404 return 0;
405 }
406
407 static int format (FILE *f, const char *format, ...)
408 {
409 char buf[1024];
410 va_list args;
411 va_start (args, format);
412
413 vsnprintf (buf, sizeof (buf) - 1, format, args);
414 va_end (args);
415 string (f, buf);
416 return 0;
417 }
418
419 static int newline (FILE *f)
420 {
421 putc ('\n', f);
422 column = 0;
423 return 0;
424 }
425
426 static int pad (FILE *f, int c)
427 {
428 do
429 string (f, " ");
430 while (column < c);
431 return 0;
432 }
433
434 static int control (FILE *file, const char *name, const char * const ctrl[],
435 GLuint id, int *space)
436 {
437 if (!ctrl[id]) {
438 fprintf (file, "*** invalid %s value %d ",
439 name, id);
440 return 1;
441 }
442 if (ctrl[id][0])
443 {
444 if (space && *space)
445 string (file, " ");
446 string (file, ctrl[id]);
447 if (space)
448 *space = 1;
449 }
450 return 0;
451 }
452
453 static int print_opcode (FILE *file, int id)
454 {
455 if (!opcode[id].name) {
456 format (file, "*** invalid opcode value %d ", id);
457 return 1;
458 }
459 string (file, opcode[id].name);
460 return 0;
461 }
462
463 static int reg (FILE *file, GLuint _reg_file, GLuint _reg_nr)
464 {
465 int err = 0;
466
467 /* Clear the Compr4 instruction compression bit. */
468 if (_reg_file == BRW_MESSAGE_REGISTER_FILE)
469 _reg_nr &= ~(1 << 7);
470
471 if (_reg_file == BRW_ARCHITECTURE_REGISTER_FILE) {
472 switch (_reg_nr & 0xf0) {
473 case BRW_ARF_NULL:
474 string (file, "null");
475 return -1;
476 case BRW_ARF_ADDRESS:
477 format (file, "a%d", _reg_nr & 0x0f);
478 break;
479 case BRW_ARF_ACCUMULATOR:
480 format (file, "acc%d", _reg_nr & 0x0f);
481 break;
482 case BRW_ARF_FLAG:
483 format (file, "f%d", _reg_nr & 0x0f);
484 break;
485 case BRW_ARF_MASK:
486 format (file, "mask%d", _reg_nr & 0x0f);
487 break;
488 case BRW_ARF_MASK_STACK:
489 format (file, "msd%d", _reg_nr & 0x0f);
490 break;
491 case BRW_ARF_STATE:
492 format (file, "sr%d", _reg_nr & 0x0f);
493 break;
494 case BRW_ARF_CONTROL:
495 format (file, "cr%d", _reg_nr & 0x0f);
496 break;
497 case BRW_ARF_NOTIFICATION_COUNT:
498 format (file, "n%d", _reg_nr & 0x0f);
499 break;
500 case BRW_ARF_IP:
501 string (file, "ip");
502 return -1;
503 break;
504 default:
505 format (file, "ARF%d", _reg_nr);
506 break;
507 }
508 } else {
509 err |= control (file, "src reg file", reg_file, _reg_file, NULL);
510 format (file, "%d", _reg_nr);
511 }
512 return err;
513 }
514
515 static int dest (FILE *file, struct brw_instruction *inst)
516 {
517 int err = 0;
518
519 if (inst->header.access_mode == BRW_ALIGN_1)
520 {
521 if (inst->bits1.da1.dest_address_mode == BRW_ADDRESS_DIRECT)
522 {
523 err |= reg (file, inst->bits1.da1.dest_reg_file, inst->bits1.da1.dest_reg_nr);
524 if (err == -1)
525 return 0;
526 if (inst->bits1.da1.dest_subreg_nr)
527 format (file, ".%d", inst->bits1.da1.dest_subreg_nr /
528 reg_type_size[inst->bits1.da1.dest_reg_type]);
529 string (file, "<");
530 err |= control (file, "horiz stride", horiz_stride, inst->bits1.da1.dest_horiz_stride, NULL);
531 string (file, ">");
532 err |= control (file, "dest reg encoding", reg_encoding, inst->bits1.da1.dest_reg_type, NULL);
533 }
534 else
535 {
536 string (file, "g[a0");
537 if (inst->bits1.ia1.dest_subreg_nr)
538 format (file, ".%d", inst->bits1.ia1.dest_subreg_nr /
539 reg_type_size[inst->bits1.ia1.dest_reg_type]);
540 if (inst->bits1.ia1.dest_indirect_offset)
541 format (file, " %d", inst->bits1.ia1.dest_indirect_offset);
542 string (file, "]<");
543 err |= control (file, "horiz stride", horiz_stride, inst->bits1.ia1.dest_horiz_stride, NULL);
544 string (file, ">");
545 err |= control (file, "dest reg encoding", reg_encoding, inst->bits1.ia1.dest_reg_type, NULL);
546 }
547 }
548 else
549 {
550 if (inst->bits1.da16.dest_address_mode == BRW_ADDRESS_DIRECT)
551 {
552 err |= reg (file, inst->bits1.da16.dest_reg_file, inst->bits1.da16.dest_reg_nr);
553 if (err == -1)
554 return 0;
555 if (inst->bits1.da16.dest_subreg_nr)
556 format (file, ".%d", inst->bits1.da16.dest_subreg_nr /
557 reg_type_size[inst->bits1.da16.dest_reg_type]);
558 string (file, "<1>");
559 err |= control (file, "writemask", writemask, inst->bits1.da16.dest_writemask, NULL);
560 err |= control (file, "dest reg encoding", reg_encoding, inst->bits1.da16.dest_reg_type, NULL);
561 }
562 else
563 {
564 err = 1;
565 string (file, "Indirect align16 address mode not supported");
566 }
567 }
568
569 return 0;
570 }
571
572 static int dest_3src (FILE *file, struct brw_instruction *inst)
573 {
574 int err = 0;
575 uint32_t reg_file;
576
577 if (inst->bits1.da3src.dest_reg_file)
578 reg_file = BRW_MESSAGE_REGISTER_FILE;
579 else
580 reg_file = BRW_GENERAL_REGISTER_FILE;
581
582 err |= reg (file, reg_file, inst->bits1.da3src.dest_reg_nr);
583 if (err == -1)
584 return 0;
585 if (inst->bits1.da3src.dest_subreg_nr)
586 format (file, ".%d", inst->bits1.da3src.dest_subreg_nr);
587 string (file, "<1>");
588 err |= control (file, "writemask", writemask, inst->bits1.da3src.dest_writemask, NULL);
589 err |= control (file, "dest reg encoding", reg_encoding, BRW_REGISTER_TYPE_F, NULL);
590
591 return 0;
592 }
593
594 static int src_align1_region (FILE *file,
595 GLuint _vert_stride, GLuint _width, GLuint _horiz_stride)
596 {
597 int err = 0;
598 string (file, "<");
599 err |= control (file, "vert stride", vert_stride, _vert_stride, NULL);
600 string (file, ",");
601 err |= control (file, "width", width, _width, NULL);
602 string (file, ",");
603 err |= control (file, "horiz_stride", horiz_stride, _horiz_stride, NULL);
604 string (file, ">");
605 return err;
606 }
607
608 static int src_da1 (FILE *file, GLuint type, GLuint _reg_file,
609 GLuint _vert_stride, GLuint _width, GLuint _horiz_stride,
610 GLuint reg_num, GLuint sub_reg_num, GLuint __abs, GLuint _negate)
611 {
612 int err = 0;
613 err |= control (file, "negate", negate, _negate, NULL);
614 err |= control (file, "abs", _abs, __abs, NULL);
615
616 err |= reg (file, _reg_file, reg_num);
617 if (err == -1)
618 return 0;
619 if (sub_reg_num)
620 format (file, ".%d", sub_reg_num / reg_type_size[type]); /* use formal style like spec */
621 src_align1_region (file, _vert_stride, _width, _horiz_stride);
622 err |= control (file, "src reg encoding", reg_encoding, type, NULL);
623 return err;
624 }
625
626 static int src_ia1 (FILE *file,
627 GLuint type,
628 GLuint _reg_file,
629 GLint _addr_imm,
630 GLuint _addr_subreg_nr,
631 GLuint _negate,
632 GLuint __abs,
633 GLuint _addr_mode,
634 GLuint _horiz_stride,
635 GLuint _width,
636 GLuint _vert_stride)
637 {
638 int err = 0;
639 err |= control (file, "negate", negate, _negate, NULL);
640 err |= control (file, "abs", _abs, __abs, NULL);
641
642 string (file, "g[a0");
643 if (_addr_subreg_nr)
644 format (file, ".%d", _addr_subreg_nr);
645 if (_addr_imm)
646 format (file, " %d", _addr_imm);
647 string (file, "]");
648 src_align1_region (file, _vert_stride, _width, _horiz_stride);
649 err |= control (file, "src reg encoding", reg_encoding, type, NULL);
650 return err;
651 }
652
653 static int src_da16 (FILE *file,
654 GLuint _reg_type,
655 GLuint _reg_file,
656 GLuint _vert_stride,
657 GLuint _reg_nr,
658 GLuint _subreg_nr,
659 GLuint __abs,
660 GLuint _negate,
661 GLuint swz_x,
662 GLuint swz_y,
663 GLuint swz_z,
664 GLuint swz_w)
665 {
666 int err = 0;
667 err |= control (file, "negate", negate, _negate, NULL);
668 err |= control (file, "abs", _abs, __abs, NULL);
669
670 err |= reg (file, _reg_file, _reg_nr);
671 if (err == -1)
672 return 0;
673 if (_subreg_nr)
674 /* bit4 for subreg number byte addressing. Make this same meaning as
675 in da1 case, so output looks consistent. */
676 format (file, ".%d", 16 / reg_type_size[_reg_type]);
677 string (file, "<");
678 err |= control (file, "vert stride", vert_stride, _vert_stride, NULL);
679 string (file, ",4,1>");
680 /*
681 * Three kinds of swizzle display:
682 * identity - nothing printed
683 * 1->all - print the single channel
684 * 1->1 - print the mapping
685 */
686 if (swz_x == BRW_CHANNEL_X &&
687 swz_y == BRW_CHANNEL_Y &&
688 swz_z == BRW_CHANNEL_Z &&
689 swz_w == BRW_CHANNEL_W)
690 {
691 ;
692 }
693 else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w)
694 {
695 string (file, ".");
696 err |= control (file, "channel select", chan_sel, swz_x, NULL);
697 }
698 else
699 {
700 string (file, ".");
701 err |= control (file, "channel select", chan_sel, swz_x, NULL);
702 err |= control (file, "channel select", chan_sel, swz_y, NULL);
703 err |= control (file, "channel select", chan_sel, swz_z, NULL);
704 err |= control (file, "channel select", chan_sel, swz_w, NULL);
705 }
706 err |= control (file, "src da16 reg type", reg_encoding, _reg_type, NULL);
707 return err;
708 }
709
710 static int src0_3src (FILE *file, struct brw_instruction *inst)
711 {
712 int err = 0;
713 GLuint swz_x = (inst->bits2.da3src.src0_swizzle >> 0) & 0x3;
714 GLuint swz_y = (inst->bits2.da3src.src0_swizzle >> 2) & 0x3;
715 GLuint swz_z = (inst->bits2.da3src.src0_swizzle >> 4) & 0x3;
716 GLuint swz_w = (inst->bits2.da3src.src0_swizzle >> 6) & 0x3;
717
718 err |= control (file, "negate", negate, inst->bits1.da3src.src0_negate, NULL);
719 err |= control (file, "abs", _abs, inst->bits1.da3src.src0_abs, NULL);
720
721 err |= reg (file, BRW_GENERAL_REGISTER_FILE, inst->bits2.da3src.src0_reg_nr);
722 if (err == -1)
723 return 0;
724 if (inst->bits2.da3src.src0_subreg_nr)
725 format (file, ".%d", inst->bits2.da3src.src0_subreg_nr);
726 string (file, "<4,1,1>");
727 err |= control (file, "src da16 reg type", reg_encoding,
728 BRW_REGISTER_TYPE_F, NULL);
729 /*
730 * Three kinds of swizzle display:
731 * identity - nothing printed
732 * 1->all - print the single channel
733 * 1->1 - print the mapping
734 */
735 if (swz_x == BRW_CHANNEL_X &&
736 swz_y == BRW_CHANNEL_Y &&
737 swz_z == BRW_CHANNEL_Z &&
738 swz_w == BRW_CHANNEL_W)
739 {
740 ;
741 }
742 else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w)
743 {
744 string (file, ".");
745 err |= control (file, "channel select", chan_sel, swz_x, NULL);
746 }
747 else
748 {
749 string (file, ".");
750 err |= control (file, "channel select", chan_sel, swz_x, NULL);
751 err |= control (file, "channel select", chan_sel, swz_y, NULL);
752 err |= control (file, "channel select", chan_sel, swz_z, NULL);
753 err |= control (file, "channel select", chan_sel, swz_w, NULL);
754 }
755 return err;
756 }
757
758 static int src1_3src (FILE *file, struct brw_instruction *inst)
759 {
760 int err = 0;
761 GLuint swz_x = (inst->bits2.da3src.src1_swizzle >> 0) & 0x3;
762 GLuint swz_y = (inst->bits2.da3src.src1_swizzle >> 2) & 0x3;
763 GLuint swz_z = (inst->bits2.da3src.src1_swizzle >> 4) & 0x3;
764 GLuint swz_w = (inst->bits2.da3src.src1_swizzle >> 6) & 0x3;
765 GLuint src1_subreg_nr = (inst->bits2.da3src.src1_subreg_nr_low |
766 (inst->bits3.da3src.src1_subreg_nr_high << 2));
767
768 err |= control (file, "negate", negate, inst->bits1.da3src.src1_negate,
769 NULL);
770 err |= control (file, "abs", _abs, inst->bits1.da3src.src1_abs, NULL);
771
772 err |= reg (file, BRW_GENERAL_REGISTER_FILE,
773 inst->bits3.da3src.src1_reg_nr);
774 if (err == -1)
775 return 0;
776 if (src1_subreg_nr)
777 format (file, ".%d", src1_subreg_nr);
778 string (file, "<4,1,1>");
779 err |= control (file, "src da16 reg type", reg_encoding,
780 BRW_REGISTER_TYPE_F, NULL);
781 /*
782 * Three kinds of swizzle display:
783 * identity - nothing printed
784 * 1->all - print the single channel
785 * 1->1 - print the mapping
786 */
787 if (swz_x == BRW_CHANNEL_X &&
788 swz_y == BRW_CHANNEL_Y &&
789 swz_z == BRW_CHANNEL_Z &&
790 swz_w == BRW_CHANNEL_W)
791 {
792 ;
793 }
794 else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w)
795 {
796 string (file, ".");
797 err |= control (file, "channel select", chan_sel, swz_x, NULL);
798 }
799 else
800 {
801 string (file, ".");
802 err |= control (file, "channel select", chan_sel, swz_x, NULL);
803 err |= control (file, "channel select", chan_sel, swz_y, NULL);
804 err |= control (file, "channel select", chan_sel, swz_z, NULL);
805 err |= control (file, "channel select", chan_sel, swz_w, NULL);
806 }
807 return err;
808 }
809
810
811 static int src2_3src (FILE *file, struct brw_instruction *inst)
812 {
813 int err = 0;
814 GLuint swz_x = (inst->bits3.da3src.src2_swizzle >> 0) & 0x3;
815 GLuint swz_y = (inst->bits3.da3src.src2_swizzle >> 2) & 0x3;
816 GLuint swz_z = (inst->bits3.da3src.src2_swizzle >> 4) & 0x3;
817 GLuint swz_w = (inst->bits3.da3src.src2_swizzle >> 6) & 0x3;
818
819 err |= control (file, "negate", negate, inst->bits1.da3src.src2_negate,
820 NULL);
821 err |= control (file, "abs", _abs, inst->bits1.da3src.src2_abs, NULL);
822
823 err |= reg (file, BRW_GENERAL_REGISTER_FILE,
824 inst->bits3.da3src.src2_reg_nr);
825 if (err == -1)
826 return 0;
827 if (inst->bits3.da3src.src2_subreg_nr)
828 format (file, ".%d", inst->bits3.da3src.src2_subreg_nr);
829 string (file, "<4,1,1>");
830 err |= control (file, "src da16 reg type", reg_encoding,
831 BRW_REGISTER_TYPE_F, NULL);
832 /*
833 * Three kinds of swizzle display:
834 * identity - nothing printed
835 * 1->all - print the single channel
836 * 1->1 - print the mapping
837 */
838 if (swz_x == BRW_CHANNEL_X &&
839 swz_y == BRW_CHANNEL_Y &&
840 swz_z == BRW_CHANNEL_Z &&
841 swz_w == BRW_CHANNEL_W)
842 {
843 ;
844 }
845 else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w)
846 {
847 string (file, ".");
848 err |= control (file, "channel select", chan_sel, swz_x, NULL);
849 }
850 else
851 {
852 string (file, ".");
853 err |= control (file, "channel select", chan_sel, swz_x, NULL);
854 err |= control (file, "channel select", chan_sel, swz_y, NULL);
855 err |= control (file, "channel select", chan_sel, swz_z, NULL);
856 err |= control (file, "channel select", chan_sel, swz_w, NULL);
857 }
858 return err;
859 }
860
861 static int imm (FILE *file, GLuint type, struct brw_instruction *inst) {
862 switch (type) {
863 case BRW_REGISTER_TYPE_UD:
864 format (file, "0x%08xUD", inst->bits3.ud);
865 break;
866 case BRW_REGISTER_TYPE_D:
867 format (file, "%dD", inst->bits3.d);
868 break;
869 case BRW_REGISTER_TYPE_UW:
870 format (file, "0x%04xUW", (uint16_t) inst->bits3.ud);
871 break;
872 case BRW_REGISTER_TYPE_W:
873 format (file, "%dW", (int16_t) inst->bits3.d);
874 break;
875 case BRW_REGISTER_TYPE_UB:
876 format (file, "0x%02xUB", (int8_t) inst->bits3.ud);
877 break;
878 case BRW_REGISTER_TYPE_VF:
879 format (file, "Vector Float");
880 break;
881 case BRW_REGISTER_TYPE_V:
882 format (file, "0x%08xV", inst->bits3.ud);
883 break;
884 case BRW_REGISTER_TYPE_F:
885 format (file, "%-gF", inst->bits3.f);
886 }
887 return 0;
888 }
889
890 static int src0 (FILE *file, struct brw_instruction *inst)
891 {
892 if (inst->bits1.da1.src0_reg_file == BRW_IMMEDIATE_VALUE)
893 return imm (file, inst->bits1.da1.src0_reg_type,
894 inst);
895 else if (inst->header.access_mode == BRW_ALIGN_1)
896 {
897 if (inst->bits2.da1.src0_address_mode == BRW_ADDRESS_DIRECT)
898 {
899 return src_da1 (file,
900 inst->bits1.da1.src0_reg_type,
901 inst->bits1.da1.src0_reg_file,
902 inst->bits2.da1.src0_vert_stride,
903 inst->bits2.da1.src0_width,
904 inst->bits2.da1.src0_horiz_stride,
905 inst->bits2.da1.src0_reg_nr,
906 inst->bits2.da1.src0_subreg_nr,
907 inst->bits2.da1.src0_abs,
908 inst->bits2.da1.src0_negate);
909 }
910 else
911 {
912 return src_ia1 (file,
913 inst->bits1.ia1.src0_reg_type,
914 inst->bits1.ia1.src0_reg_file,
915 inst->bits2.ia1.src0_indirect_offset,
916 inst->bits2.ia1.src0_subreg_nr,
917 inst->bits2.ia1.src0_negate,
918 inst->bits2.ia1.src0_abs,
919 inst->bits2.ia1.src0_address_mode,
920 inst->bits2.ia1.src0_horiz_stride,
921 inst->bits2.ia1.src0_width,
922 inst->bits2.ia1.src0_vert_stride);
923 }
924 }
925 else
926 {
927 if (inst->bits2.da16.src0_address_mode == BRW_ADDRESS_DIRECT)
928 {
929 return src_da16 (file,
930 inst->bits1.da16.src0_reg_type,
931 inst->bits1.da16.src0_reg_file,
932 inst->bits2.da16.src0_vert_stride,
933 inst->bits2.da16.src0_reg_nr,
934 inst->bits2.da16.src0_subreg_nr,
935 inst->bits2.da16.src0_abs,
936 inst->bits2.da16.src0_negate,
937 inst->bits2.da16.src0_swz_x,
938 inst->bits2.da16.src0_swz_y,
939 inst->bits2.da16.src0_swz_z,
940 inst->bits2.da16.src0_swz_w);
941 }
942 else
943 {
944 string (file, "Indirect align16 address mode not supported");
945 return 1;
946 }
947 }
948 }
949
950 static int src1 (FILE *file, struct brw_instruction *inst)
951 {
952 if (inst->bits1.da1.src1_reg_file == BRW_IMMEDIATE_VALUE)
953 return imm (file, inst->bits1.da1.src1_reg_type,
954 inst);
955 else if (inst->header.access_mode == BRW_ALIGN_1)
956 {
957 if (inst->bits3.da1.src1_address_mode == BRW_ADDRESS_DIRECT)
958 {
959 return src_da1 (file,
960 inst->bits1.da1.src1_reg_type,
961 inst->bits1.da1.src1_reg_file,
962 inst->bits3.da1.src1_vert_stride,
963 inst->bits3.da1.src1_width,
964 inst->bits3.da1.src1_horiz_stride,
965 inst->bits3.da1.src1_reg_nr,
966 inst->bits3.da1.src1_subreg_nr,
967 inst->bits3.da1.src1_abs,
968 inst->bits3.da1.src1_negate);
969 }
970 else
971 {
972 return src_ia1 (file,
973 inst->bits1.ia1.src1_reg_type,
974 inst->bits1.ia1.src1_reg_file,
975 inst->bits3.ia1.src1_indirect_offset,
976 inst->bits3.ia1.src1_subreg_nr,
977 inst->bits3.ia1.src1_negate,
978 inst->bits3.ia1.src1_abs,
979 inst->bits3.ia1.src1_address_mode,
980 inst->bits3.ia1.src1_horiz_stride,
981 inst->bits3.ia1.src1_width,
982 inst->bits3.ia1.src1_vert_stride);
983 }
984 }
985 else
986 {
987 if (inst->bits3.da16.src1_address_mode == BRW_ADDRESS_DIRECT)
988 {
989 return src_da16 (file,
990 inst->bits1.da16.src1_reg_type,
991 inst->bits1.da16.src1_reg_file,
992 inst->bits3.da16.src1_vert_stride,
993 inst->bits3.da16.src1_reg_nr,
994 inst->bits3.da16.src1_subreg_nr,
995 inst->bits3.da16.src1_abs,
996 inst->bits3.da16.src1_negate,
997 inst->bits3.da16.src1_swz_x,
998 inst->bits3.da16.src1_swz_y,
999 inst->bits3.da16.src1_swz_z,
1000 inst->bits3.da16.src1_swz_w);
1001 }
1002 else
1003 {
1004 string (file, "Indirect align16 address mode not supported");
1005 return 1;
1006 }
1007 }
1008 }
1009
1010 int esize[6] = {
1011 [0] = 1,
1012 [1] = 2,
1013 [2] = 4,
1014 [3] = 8,
1015 [4] = 16,
1016 [5] = 32,
1017 };
1018
1019 static int qtr_ctrl(FILE *file, struct brw_instruction *inst)
1020 {
1021 int qtr_ctl = inst->header.compression_control;
1022 int exec_size = esize[inst->header.execution_size];
1023
1024 if (exec_size == 8) {
1025 switch (qtr_ctl) {
1026 case 0:
1027 string (file, " 1Q");
1028 break;
1029 case 1:
1030 string (file, " 2Q");
1031 break;
1032 case 2:
1033 string (file, " 3Q");
1034 break;
1035 case 3:
1036 string (file, " 4Q");
1037 break;
1038 }
1039 } else if (exec_size == 16){
1040 if (qtr_ctl < 2)
1041 string (file, " 1H");
1042 else
1043 string (file, " 2H");
1044 }
1045 return 0;
1046 }
1047
1048 int brw_disasm (FILE *file, struct brw_instruction *inst, int gen)
1049 {
1050 int err = 0;
1051 int space = 0;
1052
1053 if (inst->header.predicate_control) {
1054 string (file, "(");
1055 err |= control (file, "predicate inverse", pred_inv, inst->header.predicate_inverse, NULL);
1056 format (file, "f%d", gen >= 7 ? inst->bits2.da1.flag_reg_nr : 0);
1057 if (inst->bits2.da1.flag_subreg_nr)
1058 format (file, ".%d", inst->bits2.da1.flag_subreg_nr);
1059 if (inst->header.access_mode == BRW_ALIGN_1)
1060 err |= control (file, "predicate control align1", pred_ctrl_align1,
1061 inst->header.predicate_control, NULL);
1062 else
1063 err |= control (file, "predicate control align16", pred_ctrl_align16,
1064 inst->header.predicate_control, NULL);
1065 string (file, ") ");
1066 }
1067
1068 err |= print_opcode (file, inst->header.opcode);
1069 err |= control (file, "saturate", saturate, inst->header.saturate, NULL);
1070 err |= control (file, "debug control", debug_ctrl, inst->header.debug_control, NULL);
1071
1072 if (inst->header.opcode == BRW_OPCODE_MATH) {
1073 string (file, " ");
1074 err |= control (file, "function", math_function,
1075 inst->header.destreg__conditionalmod, NULL);
1076 } else if (inst->header.opcode != BRW_OPCODE_SEND &&
1077 inst->header.opcode != BRW_OPCODE_SENDC) {
1078 err |= control (file, "conditional modifier", conditional_modifier,
1079 inst->header.destreg__conditionalmod, NULL);
1080
1081 /* If we're using the conditional modifier, print which flags reg is
1082 * used for it. Note that on gen6+, the embedded-condition SEL and
1083 * control flow doesn't update flags.
1084 */
1085 if (inst->header.destreg__conditionalmod &&
1086 (gen < 6 || (inst->header.opcode != BRW_OPCODE_SEL &&
1087 inst->header.opcode != BRW_OPCODE_IF &&
1088 inst->header.opcode != BRW_OPCODE_WHILE))) {
1089 format (file, ".f%d", gen >= 7 ? inst->bits2.da1.flag_reg_nr : 0);
1090 if (inst->bits2.da1.flag_subreg_nr)
1091 format (file, ".%d", inst->bits2.da1.flag_subreg_nr);
1092 }
1093 }
1094
1095 if (inst->header.opcode != BRW_OPCODE_NOP) {
1096 string (file, "(");
1097 err |= control (file, "execution size", exec_size, inst->header.execution_size, NULL);
1098 string (file, ")");
1099 }
1100
1101 if (inst->header.opcode == BRW_OPCODE_SEND && gen < 6)
1102 format (file, " %d", inst->header.destreg__conditionalmod);
1103
1104 if (opcode[inst->header.opcode].nsrc == 3) {
1105 pad (file, 16);
1106 err |= dest_3src (file, inst);
1107
1108 pad (file, 32);
1109 err |= src0_3src (file, inst);
1110
1111 pad (file, 48);
1112 err |= src1_3src (file, inst);
1113
1114 pad (file, 64);
1115 err |= src2_3src (file, inst);
1116 } else {
1117 if (opcode[inst->header.opcode].ndst > 0) {
1118 pad (file, 16);
1119 err |= dest (file, inst);
1120 } else if (gen == 7 && (inst->header.opcode == BRW_OPCODE_ELSE ||
1121 inst->header.opcode == BRW_OPCODE_ENDIF ||
1122 inst->header.opcode == BRW_OPCODE_WHILE)) {
1123 format (file, " %d", inst->bits3.break_cont.jip);
1124 } else if (gen == 6 && (inst->header.opcode == BRW_OPCODE_IF ||
1125 inst->header.opcode == BRW_OPCODE_ELSE ||
1126 inst->header.opcode == BRW_OPCODE_ENDIF ||
1127 inst->header.opcode == BRW_OPCODE_WHILE)) {
1128 format (file, " %d", inst->bits1.branch_gen6.jump_count);
1129 } else if ((gen >= 6 && (inst->header.opcode == BRW_OPCODE_BREAK ||
1130 inst->header.opcode == BRW_OPCODE_CONTINUE ||
1131 inst->header.opcode == BRW_OPCODE_HALT)) ||
1132 (gen == 7 && inst->header.opcode == BRW_OPCODE_IF)) {
1133 format (file, " %d %d", inst->bits3.break_cont.uip, inst->bits3.break_cont.jip);
1134 } else if (inst->header.opcode == BRW_OPCODE_JMPI) {
1135 format (file, " %d", inst->bits3.d);
1136 }
1137
1138 if (opcode[inst->header.opcode].nsrc > 0) {
1139 pad (file, 32);
1140 err |= src0 (file, inst);
1141 }
1142 if (opcode[inst->header.opcode].nsrc > 1) {
1143 pad (file, 48);
1144 err |= src1 (file, inst);
1145 }
1146 }
1147
1148 if (inst->header.opcode == BRW_OPCODE_SEND ||
1149 inst->header.opcode == BRW_OPCODE_SENDC) {
1150 enum brw_message_target target;
1151
1152 if (gen >= 6)
1153 target = inst->header.destreg__conditionalmod;
1154 else if (gen == 5)
1155 target = inst->bits2.send_gen5.sfid;
1156 else
1157 target = inst->bits3.generic.msg_target;
1158
1159 newline (file);
1160 pad (file, 16);
1161 space = 0;
1162
1163 if (gen >= 6) {
1164 err |= control (file, "target function", target_function_gen6,
1165 target, &space);
1166 } else {
1167 err |= control (file, "target function", target_function,
1168 target, &space);
1169 }
1170
1171 switch (target) {
1172 case BRW_SFID_MATH:
1173 err |= control (file, "math function", math_function,
1174 inst->bits3.math.function, &space);
1175 err |= control (file, "math saturate", math_saturate,
1176 inst->bits3.math.saturate, &space);
1177 err |= control (file, "math signed", math_signed,
1178 inst->bits3.math.int_type, &space);
1179 err |= control (file, "math scalar", math_scalar,
1180 inst->bits3.math.data_type, &space);
1181 err |= control (file, "math precision", math_precision,
1182 inst->bits3.math.precision, &space);
1183 break;
1184 case BRW_SFID_SAMPLER:
1185 if (gen >= 7) {
1186 format (file, " (%d, %d, %d, %d)",
1187 inst->bits3.sampler_gen7.binding_table_index,
1188 inst->bits3.sampler_gen7.sampler,
1189 inst->bits3.sampler_gen7.msg_type,
1190 inst->bits3.sampler_gen7.simd_mode);
1191 } else if (gen >= 5) {
1192 format (file, " (%d, %d, %d, %d)",
1193 inst->bits3.sampler_gen5.binding_table_index,
1194 inst->bits3.sampler_gen5.sampler,
1195 inst->bits3.sampler_gen5.msg_type,
1196 inst->bits3.sampler_gen5.simd_mode);
1197 } else if (0 /* FINISHME: is_g4x */) {
1198 format (file, " (%d, %d)",
1199 inst->bits3.sampler_g4x.binding_table_index,
1200 inst->bits3.sampler_g4x.sampler);
1201 } else {
1202 format (file, " (%d, %d, ",
1203 inst->bits3.sampler.binding_table_index,
1204 inst->bits3.sampler.sampler);
1205 err |= control (file, "sampler target format",
1206 sampler_target_format,
1207 inst->bits3.sampler.return_format, NULL);
1208 string (file, ")");
1209 }
1210 break;
1211 case BRW_SFID_DATAPORT_READ:
1212 if (gen >= 6) {
1213 format (file, " (%d, %d, %d, %d)",
1214 inst->bits3.gen6_dp.binding_table_index,
1215 inst->bits3.gen6_dp.msg_control,
1216 inst->bits3.gen6_dp.msg_type,
1217 inst->bits3.gen6_dp.send_commit_msg);
1218 } else if (gen >= 5 /* FINISHME: || is_g4x */) {
1219 format (file, " (%d, %d, %d)",
1220 inst->bits3.dp_read_gen5.binding_table_index,
1221 inst->bits3.dp_read_gen5.msg_control,
1222 inst->bits3.dp_read_gen5.msg_type);
1223 } else {
1224 format (file, " (%d, %d, %d)",
1225 inst->bits3.dp_read.binding_table_index,
1226 inst->bits3.dp_read.msg_control,
1227 inst->bits3.dp_read.msg_type);
1228 }
1229 break;
1230
1231 case BRW_SFID_DATAPORT_WRITE:
1232 if (gen >= 7) {
1233 format (file, " (");
1234
1235 err |= control (file, "DP rc message type",
1236 dp_rc_msg_type_gen6,
1237 inst->bits3.gen7_dp.msg_type, &space);
1238
1239 format (file, ", %d, %d, %d)",
1240 inst->bits3.gen7_dp.binding_table_index,
1241 inst->bits3.gen7_dp.msg_control,
1242 inst->bits3.gen7_dp.msg_type);
1243 } else if (gen == 6) {
1244 format (file, " (");
1245
1246 err |= control (file, "DP rc message type",
1247 dp_rc_msg_type_gen6,
1248 inst->bits3.gen6_dp.msg_type, &space);
1249
1250 format (file, ", %d, %d, %d, %d)",
1251 inst->bits3.gen6_dp.binding_table_index,
1252 inst->bits3.gen6_dp.msg_control,
1253 inst->bits3.gen6_dp.msg_type,
1254 inst->bits3.gen6_dp.send_commit_msg);
1255 } else {
1256 format (file, " (%d, %d, %d, %d)",
1257 inst->bits3.dp_write.binding_table_index,
1258 (inst->bits3.dp_write.last_render_target << 3) |
1259 inst->bits3.dp_write.msg_control,
1260 inst->bits3.dp_write.msg_type,
1261 inst->bits3.dp_write.send_commit_msg);
1262 }
1263 break;
1264
1265 case BRW_SFID_URB:
1266 if (gen >= 5) {
1267 format (file, " %d", inst->bits3.urb_gen5.offset);
1268 } else {
1269 format (file, " %d", inst->bits3.urb.offset);
1270 }
1271
1272 space = 1;
1273 if (gen >= 5) {
1274 err |= control (file, "urb opcode", urb_opcode,
1275 inst->bits3.urb_gen5.opcode, &space);
1276 }
1277 err |= control (file, "urb swizzle", urb_swizzle,
1278 inst->bits3.urb.swizzle_control, &space);
1279 err |= control (file, "urb allocate", urb_allocate,
1280 inst->bits3.urb.allocate, &space);
1281 err |= control (file, "urb used", urb_used,
1282 inst->bits3.urb.used, &space);
1283 err |= control (file, "urb complete", urb_complete,
1284 inst->bits3.urb.complete, &space);
1285 break;
1286 case BRW_SFID_THREAD_SPAWNER:
1287 break;
1288 case GEN7_SFID_DATAPORT_DATA_CACHE:
1289 format (file, " (%d, %d, %d)",
1290 inst->bits3.gen7_dp.binding_table_index,
1291 inst->bits3.gen7_dp.msg_control,
1292 inst->bits3.gen7_dp.msg_type);
1293 break;
1294
1295
1296 default:
1297 format (file, "unsupported target %d", target);
1298 break;
1299 }
1300 if (space)
1301 string (file, " ");
1302 if (gen >= 5) {
1303 format (file, "mlen %d",
1304 inst->bits3.generic_gen5.msg_length);
1305 format (file, " rlen %d",
1306 inst->bits3.generic_gen5.response_length);
1307 } else {
1308 format (file, "mlen %d",
1309 inst->bits3.generic.msg_length);
1310 format (file, " rlen %d",
1311 inst->bits3.generic.response_length);
1312 }
1313 }
1314 pad (file, 64);
1315 if (inst->header.opcode != BRW_OPCODE_NOP) {
1316 string (file, "{");
1317 space = 1;
1318 err |= control(file, "access mode", access_mode, inst->header.access_mode, &space);
1319 if (gen >= 6)
1320 err |= control (file, "write enable control", wectrl, inst->header.mask_control, &space);
1321 else
1322 err |= control (file, "mask control", mask_ctrl, inst->header.mask_control, &space);
1323 err |= control (file, "dependency control", dep_ctrl, inst->header.dependency_control, &space);
1324
1325 if (gen >= 6)
1326 err |= qtr_ctrl (file, inst);
1327 else {
1328 if (inst->header.compression_control == BRW_COMPRESSION_COMPRESSED &&
1329 opcode[inst->header.opcode].ndst > 0 &&
1330 inst->bits1.da1.dest_reg_file == BRW_MESSAGE_REGISTER_FILE &&
1331 inst->bits1.da1.dest_reg_nr & (1 << 7)) {
1332 format (file, " compr4");
1333 } else {
1334 err |= control (file, "compression control", compr_ctrl,
1335 inst->header.compression_control, &space);
1336 }
1337 }
1338
1339 err |= control (file, "thread control", thread_ctrl, inst->header.thread_control, &space);
1340 if (gen >= 6)
1341 err |= control (file, "acc write control", accwr, inst->header.acc_wr_control, &space);
1342 if (inst->header.opcode == BRW_OPCODE_SEND ||
1343 inst->header.opcode == BRW_OPCODE_SENDC)
1344 err |= control (file, "end of thread", end_of_thread,
1345 inst->bits3.generic.end_of_thread, &space);
1346 if (space)
1347 string (file, " ");
1348 string (file, "}");
1349 }
1350 string (file, ";");
1351 newline (file);
1352 return err;
1353 }