i965/disasm: fix disasm of 3-src doubles
[mesa.git] / src / mesa / drivers / dri / i965 / brw_disasm.c
1 /*
2 * Copyright © 2008 Keith Packard
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
13 *
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20 * OF THIS SOFTWARE.
21 */
22
23 #include <stdio.h>
24 #include <string.h>
25 #include <stdarg.h>
26
27 #include "brw_context.h"
28 #include "brw_defines.h"
29 #include "brw_reg.h"
30 #include "brw_inst.h"
31 #include "brw_eu.h"
32
33 static bool
34 has_jip(const struct brw_device_info *devinfo, enum opcode opcode)
35 {
36 if (devinfo->gen < 6)
37 return false;
38
39 return opcode == BRW_OPCODE_IF ||
40 opcode == BRW_OPCODE_ELSE ||
41 opcode == BRW_OPCODE_ENDIF ||
42 opcode == BRW_OPCODE_WHILE ||
43 opcode == BRW_OPCODE_BREAK ||
44 opcode == BRW_OPCODE_CONTINUE ||
45 opcode == BRW_OPCODE_HALT;
46 }
47
48 static bool
49 has_uip(const struct brw_device_info *devinfo, enum opcode opcode)
50 {
51 if (devinfo->gen < 6)
52 return false;
53
54 return (devinfo->gen >= 7 && opcode == BRW_OPCODE_IF) ||
55 (devinfo->gen >= 8 && opcode == BRW_OPCODE_ELSE) ||
56 opcode == BRW_OPCODE_BREAK ||
57 opcode == BRW_OPCODE_CONTINUE ||
58 opcode == BRW_OPCODE_HALT;
59 }
60
61 static bool
62 has_branch_ctrl(const struct brw_device_info *devinfo, enum opcode opcode)
63 {
64 if (devinfo->gen < 8)
65 return false;
66
67 return opcode == BRW_OPCODE_IF ||
68 opcode == BRW_OPCODE_ELSE;
69 /* opcode == BRW_OPCODE_GOTO; */
70 }
71
72 static bool
73 is_logic_instruction(unsigned opcode)
74 {
75 return opcode == BRW_OPCODE_AND ||
76 opcode == BRW_OPCODE_NOT ||
77 opcode == BRW_OPCODE_OR ||
78 opcode == BRW_OPCODE_XOR;
79 }
80
81 const char *const conditional_modifier[16] = {
82 [BRW_CONDITIONAL_NONE] = "",
83 [BRW_CONDITIONAL_Z] = ".z",
84 [BRW_CONDITIONAL_NZ] = ".nz",
85 [BRW_CONDITIONAL_G] = ".g",
86 [BRW_CONDITIONAL_GE] = ".ge",
87 [BRW_CONDITIONAL_L] = ".l",
88 [BRW_CONDITIONAL_LE] = ".le",
89 [BRW_CONDITIONAL_R] = ".r",
90 [BRW_CONDITIONAL_O] = ".o",
91 [BRW_CONDITIONAL_U] = ".u",
92 };
93
94 static const char *const m_negate[2] = {
95 [0] = "",
96 [1] = "-",
97 };
98
99 static const char *const _abs[2] = {
100 [0] = "",
101 [1] = "(abs)",
102 };
103
104 static const char *const m_bitnot[2] = { "", "~" };
105
106 static const char *const vert_stride[16] = {
107 [0] = "0",
108 [1] = "1",
109 [2] = "2",
110 [3] = "4",
111 [4] = "8",
112 [5] = "16",
113 [6] = "32",
114 [15] = "VxH",
115 };
116
117 static const char *const width[8] = {
118 [0] = "1",
119 [1] = "2",
120 [2] = "4",
121 [3] = "8",
122 [4] = "16",
123 };
124
125 static const char *const horiz_stride[4] = {
126 [0] = "0",
127 [1] = "1",
128 [2] = "2",
129 [3] = "4"
130 };
131
132 static const char *const chan_sel[4] = {
133 [0] = "x",
134 [1] = "y",
135 [2] = "z",
136 [3] = "w",
137 };
138
139 static const char *const debug_ctrl[2] = {
140 [0] = "",
141 [1] = ".breakpoint"
142 };
143
144 static const char *const saturate[2] = {
145 [0] = "",
146 [1] = ".sat"
147 };
148
149 static const char *const cmpt_ctrl[2] = {
150 [0] = "",
151 [1] = "compacted"
152 };
153
154 static const char *const accwr[2] = {
155 [0] = "",
156 [1] = "AccWrEnable"
157 };
158
159 static const char *const branch_ctrl[2] = {
160 [0] = "",
161 [1] = "BranchCtrl"
162 };
163
164 static const char *const wectrl[2] = {
165 [0] = "",
166 [1] = "WE_all"
167 };
168
169 static const char *const exec_size[8] = {
170 [0] = "1",
171 [1] = "2",
172 [2] = "4",
173 [3] = "8",
174 [4] = "16",
175 [5] = "32"
176 };
177
178 static const char *const pred_inv[2] = {
179 [0] = "+",
180 [1] = "-"
181 };
182
183 const char *const pred_ctrl_align16[16] = {
184 [1] = "",
185 [2] = ".x",
186 [3] = ".y",
187 [4] = ".z",
188 [5] = ".w",
189 [6] = ".any4h",
190 [7] = ".all4h",
191 };
192
193 static const char *const pred_ctrl_align1[16] = {
194 [BRW_PREDICATE_NORMAL] = "",
195 [BRW_PREDICATE_ALIGN1_ANYV] = ".anyv",
196 [BRW_PREDICATE_ALIGN1_ALLV] = ".allv",
197 [BRW_PREDICATE_ALIGN1_ANY2H] = ".any2h",
198 [BRW_PREDICATE_ALIGN1_ALL2H] = ".all2h",
199 [BRW_PREDICATE_ALIGN1_ANY4H] = ".any4h",
200 [BRW_PREDICATE_ALIGN1_ALL4H] = ".all4h",
201 [BRW_PREDICATE_ALIGN1_ANY8H] = ".any8h",
202 [BRW_PREDICATE_ALIGN1_ALL8H] = ".all8h",
203 [BRW_PREDICATE_ALIGN1_ANY16H] = ".any16h",
204 [BRW_PREDICATE_ALIGN1_ALL16H] = ".all16h",
205 [BRW_PREDICATE_ALIGN1_ANY32H] = ".any32h",
206 [BRW_PREDICATE_ALIGN1_ALL32H] = ".all32h",
207 };
208
209 static const char *const thread_ctrl[4] = {
210 [BRW_THREAD_NORMAL] = "",
211 [BRW_THREAD_ATOMIC] = "atomic",
212 [BRW_THREAD_SWITCH] = "switch",
213 };
214
215 static const char *const compr_ctrl[4] = {
216 [0] = "",
217 [1] = "sechalf",
218 [2] = "compr",
219 [3] = "compr4",
220 };
221
222 static const char *const dep_ctrl[4] = {
223 [0] = "",
224 [1] = "NoDDClr",
225 [2] = "NoDDChk",
226 [3] = "NoDDClr,NoDDChk",
227 };
228
229 static const char *const mask_ctrl[4] = {
230 [0] = "",
231 [1] = "nomask",
232 };
233
234 static const char *const access_mode[2] = {
235 [0] = "align1",
236 [1] = "align16",
237 };
238
239 static const char * const reg_encoding[] = {
240 [BRW_HW_REG_TYPE_UD] = "UD",
241 [BRW_HW_REG_TYPE_D] = "D",
242 [BRW_HW_REG_TYPE_UW] = "UW",
243 [BRW_HW_REG_TYPE_W] = "W",
244 [BRW_HW_REG_NON_IMM_TYPE_UB] = "UB",
245 [BRW_HW_REG_NON_IMM_TYPE_B] = "B",
246 [GEN7_HW_REG_NON_IMM_TYPE_DF] = "DF",
247 [BRW_HW_REG_TYPE_F] = "F",
248 [GEN8_HW_REG_TYPE_UQ] = "UQ",
249 [GEN8_HW_REG_TYPE_Q] = "Q",
250 [GEN8_HW_REG_NON_IMM_TYPE_HF] = "HF",
251 };
252
253 static const char *const three_source_reg_encoding[] = {
254 [BRW_3SRC_TYPE_F] = "F",
255 [BRW_3SRC_TYPE_D] = "D",
256 [BRW_3SRC_TYPE_UD] = "UD",
257 [BRW_3SRC_TYPE_DF] = "DF",
258 };
259
260 const int reg_type_size[] = {
261 [BRW_HW_REG_TYPE_UD] = 4,
262 [BRW_HW_REG_TYPE_D] = 4,
263 [BRW_HW_REG_TYPE_UW] = 2,
264 [BRW_HW_REG_TYPE_W] = 2,
265 [BRW_HW_REG_NON_IMM_TYPE_UB] = 1,
266 [BRW_HW_REG_NON_IMM_TYPE_B] = 1,
267 [GEN7_HW_REG_NON_IMM_TYPE_DF] = 8,
268 [BRW_HW_REG_TYPE_F] = 4,
269 [GEN8_HW_REG_TYPE_UQ] = 8,
270 [GEN8_HW_REG_TYPE_Q] = 8,
271 [GEN8_HW_REG_NON_IMM_TYPE_HF] = 2,
272 };
273
274 static const char *const reg_file[4] = {
275 [0] = "A",
276 [1] = "g",
277 [2] = "m",
278 [3] = "imm",
279 };
280
281 static const char *const writemask[16] = {
282 [0x0] = ".",
283 [0x1] = ".x",
284 [0x2] = ".y",
285 [0x3] = ".xy",
286 [0x4] = ".z",
287 [0x5] = ".xz",
288 [0x6] = ".yz",
289 [0x7] = ".xyz",
290 [0x8] = ".w",
291 [0x9] = ".xw",
292 [0xa] = ".yw",
293 [0xb] = ".xyw",
294 [0xc] = ".zw",
295 [0xd] = ".xzw",
296 [0xe] = ".yzw",
297 [0xf] = "",
298 };
299
300 static const char *const end_of_thread[2] = {
301 [0] = "",
302 [1] = "EOT"
303 };
304
305 /* SFIDs on Gen4-5 */
306 static const char *const gen4_sfid[16] = {
307 [BRW_SFID_NULL] = "null",
308 [BRW_SFID_MATH] = "math",
309 [BRW_SFID_SAMPLER] = "sampler",
310 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
311 [BRW_SFID_DATAPORT_READ] = "read",
312 [BRW_SFID_DATAPORT_WRITE] = "write",
313 [BRW_SFID_URB] = "urb",
314 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
315 [BRW_SFID_VME] = "vme",
316 };
317
318 static const char *const gen6_sfid[16] = {
319 [BRW_SFID_NULL] = "null",
320 [BRW_SFID_MATH] = "math",
321 [BRW_SFID_SAMPLER] = "sampler",
322 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
323 [BRW_SFID_URB] = "urb",
324 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
325 [GEN6_SFID_DATAPORT_SAMPLER_CACHE] = "sampler",
326 [GEN6_SFID_DATAPORT_RENDER_CACHE] = "render",
327 [GEN6_SFID_DATAPORT_CONSTANT_CACHE] = "const",
328 [GEN7_SFID_DATAPORT_DATA_CACHE] = "data",
329 [GEN7_SFID_PIXEL_INTERPOLATOR] = "pixel interp",
330 [HSW_SFID_DATAPORT_DATA_CACHE_1] = "dp data 1",
331 [HSW_SFID_CRE] = "cre",
332 };
333
334 static const char *const gen7_gateway_subfuncid[8] = {
335 [BRW_MESSAGE_GATEWAY_SFID_OPEN_GATEWAY] = "open",
336 [BRW_MESSAGE_GATEWAY_SFID_CLOSE_GATEWAY] = "close",
337 [BRW_MESSAGE_GATEWAY_SFID_FORWARD_MSG] = "forward msg",
338 [BRW_MESSAGE_GATEWAY_SFID_GET_TIMESTAMP] = "get timestamp",
339 [BRW_MESSAGE_GATEWAY_SFID_BARRIER_MSG] = "barrier msg",
340 [BRW_MESSAGE_GATEWAY_SFID_UPDATE_GATEWAY_STATE] = "update state",
341 [BRW_MESSAGE_GATEWAY_SFID_MMIO_READ_WRITE] = "mmio read/write",
342 };
343
344 static const char *const gen4_dp_read_port_msg_type[4] = {
345 [0b00] = "OWord Block Read",
346 [0b01] = "OWord Dual Block Read",
347 [0b10] = "Media Block Read",
348 [0b11] = "DWord Scattered Read",
349 };
350
351 static const char *const g45_dp_read_port_msg_type[8] = {
352 [0b000] = "OWord Block Read",
353 [0b010] = "OWord Dual Block Read",
354 [0b100] = "Media Block Read",
355 [0b110] = "DWord Scattered Read",
356 [0b001] = "Render Target UNORM Read",
357 [0b011] = "AVC Loop Filter Read",
358 };
359
360 static const char *const dp_write_port_msg_type[8] = {
361 [0b000] = "OWord block write",
362 [0b001] = "OWord dual block write",
363 [0b010] = "media block write",
364 [0b011] = "DWord scattered write",
365 [0b100] = "RT write",
366 [0b101] = "streamed VB write",
367 [0b110] = "RT UNORM write", /* G45+ */
368 [0b111] = "flush render cache",
369 };
370
371 static const char *const dp_rc_msg_type_gen6[16] = {
372 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read",
373 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read",
374 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read",
375 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read",
376 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] =
377 "OWORD unaligned block read",
378 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read",
379 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write",
380 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write",
381 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] =
382 "OWORD dual block write",
383 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write",
384 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] =
385 "DWORD scattered write",
386 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write",
387 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write",
388 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORM write",
389 };
390
391 static const char *const m_rt_write_subtype[] = {
392 [0b000] = "SIMD16",
393 [0b001] = "SIMD16/RepData",
394 [0b010] = "SIMD8/DualSrcLow",
395 [0b011] = "SIMD8/DualSrcHigh",
396 [0b100] = "SIMD8",
397 [0b101] = "SIMD8/ImageWrite", /* Gen6+ */
398 [0b111] = "SIMD16/RepData-111", /* no idea how this is different than 1 */
399 };
400
401 static const char *const dp_dc0_msg_type_gen7[16] = {
402 [GEN7_DATAPORT_DC_OWORD_BLOCK_READ] = "DC OWORD block read",
403 [GEN7_DATAPORT_DC_UNALIGNED_OWORD_BLOCK_READ] =
404 "DC unaligned OWORD block read",
405 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_READ] = "DC OWORD dual block read",
406 [GEN7_DATAPORT_DC_DWORD_SCATTERED_READ] = "DC DWORD scattered read",
407 [GEN7_DATAPORT_DC_BYTE_SCATTERED_READ] = "DC byte scattered read",
408 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_READ] = "DC untyped surface read",
409 [GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP] = "DC untyped atomic",
410 [GEN7_DATAPORT_DC_MEMORY_FENCE] = "DC mfence",
411 [GEN7_DATAPORT_DC_OWORD_BLOCK_WRITE] = "DC OWORD block write",
412 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_WRITE] = "DC OWORD dual block write",
413 [GEN7_DATAPORT_DC_DWORD_SCATTERED_WRITE] = "DC DWORD scatterd write",
414 [GEN7_DATAPORT_DC_BYTE_SCATTERED_WRITE] = "DC byte scattered write",
415 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
416 };
417
418 static const char *const dp_dc1_msg_type_hsw[16] = {
419 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ] = "untyped surface read",
420 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP] = "DC untyped atomic op",
421 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2] =
422 "DC untyped 4x2 atomic op",
423 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_READ] = "DC media block read",
424 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ] = "DC typed surface read",
425 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP] = "DC typed atomic",
426 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2] = "DC typed 4x2 atomic op",
427 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
428 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_WRITE] = "DC media block write",
429 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP] = "DC atomic counter op",
430 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2] =
431 "DC 4x2 atomic counter op",
432 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE] = "DC typed surface write",
433 };
434
435 static const char *const aop[16] = {
436 [BRW_AOP_AND] = "and",
437 [BRW_AOP_OR] = "or",
438 [BRW_AOP_XOR] = "xor",
439 [BRW_AOP_MOV] = "mov",
440 [BRW_AOP_INC] = "inc",
441 [BRW_AOP_DEC] = "dec",
442 [BRW_AOP_ADD] = "add",
443 [BRW_AOP_SUB] = "sub",
444 [BRW_AOP_REVSUB] = "revsub",
445 [BRW_AOP_IMAX] = "imax",
446 [BRW_AOP_IMIN] = "imin",
447 [BRW_AOP_UMAX] = "umax",
448 [BRW_AOP_UMIN] = "umin",
449 [BRW_AOP_CMPWR] = "cmpwr",
450 [BRW_AOP_PREDEC] = "predec",
451 };
452
453 static const char * const pixel_interpolator_msg_types[4] = {
454 [GEN7_PIXEL_INTERPOLATOR_LOC_SHARED_OFFSET] = "per_message_offset",
455 [GEN7_PIXEL_INTERPOLATOR_LOC_SAMPLE] = "sample_position",
456 [GEN7_PIXEL_INTERPOLATOR_LOC_CENTROID] = "centroid",
457 [GEN7_PIXEL_INTERPOLATOR_LOC_PER_SLOT_OFFSET] = "per_slot_offset",
458 };
459
460 static const char *const math_function[16] = {
461 [BRW_MATH_FUNCTION_INV] = "inv",
462 [BRW_MATH_FUNCTION_LOG] = "log",
463 [BRW_MATH_FUNCTION_EXP] = "exp",
464 [BRW_MATH_FUNCTION_SQRT] = "sqrt",
465 [BRW_MATH_FUNCTION_RSQ] = "rsq",
466 [BRW_MATH_FUNCTION_SIN] = "sin",
467 [BRW_MATH_FUNCTION_COS] = "cos",
468 [BRW_MATH_FUNCTION_SINCOS] = "sincos",
469 [BRW_MATH_FUNCTION_FDIV] = "fdiv",
470 [BRW_MATH_FUNCTION_POW] = "pow",
471 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] = "intdivmod",
472 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] = "intdiv",
473 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER] = "intmod",
474 [GEN8_MATH_FUNCTION_INVM] = "invm",
475 [GEN8_MATH_FUNCTION_RSQRTM] = "rsqrtm",
476 };
477
478 static const char *const math_saturate[2] = {
479 [0] = "",
480 [1] = "sat"
481 };
482
483 static const char *const math_signed[2] = {
484 [0] = "",
485 [1] = "signed"
486 };
487
488 static const char *const math_scalar[2] = {
489 [0] = "",
490 [1] = "scalar"
491 };
492
493 static const char *const math_precision[2] = {
494 [0] = "",
495 [1] = "partial_precision"
496 };
497
498 static const char *const gen5_urb_opcode[] = {
499 [0] = "urb_write",
500 [1] = "ff_sync",
501 };
502
503 static const char *const gen7_urb_opcode[] = {
504 [BRW_URB_OPCODE_WRITE_HWORD] = "write HWord",
505 [BRW_URB_OPCODE_WRITE_OWORD] = "write OWord",
506 [BRW_URB_OPCODE_READ_HWORD] = "read HWord",
507 [BRW_URB_OPCODE_READ_OWORD] = "read OWord",
508 [GEN7_URB_OPCODE_ATOMIC_MOV] = "atomic mov", /* Gen7+ */
509 [GEN7_URB_OPCODE_ATOMIC_INC] = "atomic inc", /* Gen7+ */
510 [GEN8_URB_OPCODE_ATOMIC_ADD] = "atomic add", /* Gen8+ */
511 [GEN8_URB_OPCODE_SIMD8_WRITE] = "SIMD8 write", /* Gen8+ */
512 [GEN8_URB_OPCODE_SIMD8_READ] = "SIMD8 read", /* Gen8+ */
513 /* [9-15] - reserved */
514 };
515
516 static const char *const urb_swizzle[4] = {
517 [BRW_URB_SWIZZLE_NONE] = "",
518 [BRW_URB_SWIZZLE_INTERLEAVE] = "interleave",
519 [BRW_URB_SWIZZLE_TRANSPOSE] = "transpose",
520 };
521
522 static const char *const urb_allocate[2] = {
523 [0] = "",
524 [1] = "allocate"
525 };
526
527 static const char *const urb_used[2] = {
528 [0] = "",
529 [1] = "used"
530 };
531
532 static const char *const urb_complete[2] = {
533 [0] = "",
534 [1] = "complete"
535 };
536
537 static const char *const gen5_sampler_msg_type[] = {
538 [GEN5_SAMPLER_MESSAGE_SAMPLE] = "sample",
539 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS] = "sample_b",
540 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD] = "sample_l",
541 [GEN5_SAMPLER_MESSAGE_SAMPLE_COMPARE] = "sample_c",
542 [GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS] = "sample_d",
543 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS_COMPARE] = "sample_b_c",
544 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE] = "sample_l_c",
545 [GEN5_SAMPLER_MESSAGE_SAMPLE_LD] = "ld",
546 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4] = "gather4",
547 [GEN5_SAMPLER_MESSAGE_LOD] = "lod",
548 [GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO] = "resinfo",
549 [GEN6_SAMPLER_MESSAGE_SAMPLE_SAMPLEINFO] = "sampleinfo",
550 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_C] = "gather4_c",
551 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO] = "gather4_po",
552 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO_C] = "gather4_po_c",
553 [HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE] = "sample_d_c",
554 [GEN9_SAMPLER_MESSAGE_SAMPLE_LD2DMS_W] = "ld2dms_w",
555 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS] = "ld_mcs",
556 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DMS] = "ld2dms",
557 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS] = "ld2dss",
558 };
559
560 static const char *const gen5_sampler_simd_mode[4] = {
561 [BRW_SAMPLER_SIMD_MODE_SIMD4X2] = "SIMD4x2",
562 [BRW_SAMPLER_SIMD_MODE_SIMD8] = "SIMD8",
563 [BRW_SAMPLER_SIMD_MODE_SIMD16] = "SIMD16",
564 [BRW_SAMPLER_SIMD_MODE_SIMD32_64] = "SIMD32/64",
565 };
566
567 static const char *const sampler_target_format[4] = {
568 [0] = "F",
569 [2] = "UD",
570 [3] = "D"
571 };
572
573
574 static int column;
575
576 static int
577 string(FILE *file, const char *string)
578 {
579 fputs(string, file);
580 column += strlen(string);
581 return 0;
582 }
583
584 static int
585 format(FILE *f, const char *format, ...) PRINTFLIKE(2, 3);
586
587 static int
588 format(FILE *f, const char *format, ...)
589 {
590 char buf[1024];
591 va_list args;
592 va_start(args, format);
593
594 vsnprintf(buf, sizeof(buf) - 1, format, args);
595 va_end(args);
596 string(f, buf);
597 return 0;
598 }
599
600 static int
601 newline(FILE *f)
602 {
603 putc('\n', f);
604 column = 0;
605 return 0;
606 }
607
608 static int
609 pad(FILE *f, int c)
610 {
611 do
612 string(f, " ");
613 while (column < c);
614 return 0;
615 }
616
617 static int
618 control(FILE *file, const char *name, const char *const ctrl[],
619 unsigned id, int *space)
620 {
621 if (!ctrl[id]) {
622 fprintf(file, "*** invalid %s value %d ", name, id);
623 return 1;
624 }
625 if (ctrl[id][0]) {
626 if (space && *space)
627 string(file, " ");
628 string(file, ctrl[id]);
629 if (space)
630 *space = 1;
631 }
632 return 0;
633 }
634
635 static int
636 print_opcode(FILE *file, const struct brw_device_info *devinfo,
637 enum opcode id)
638 {
639 const struct opcode_desc *desc = brw_opcode_desc(devinfo, id);
640 if (!desc) {
641 format(file, "*** invalid opcode value %d ", id);
642 return 1;
643 }
644 string(file, desc->name);
645 return 0;
646 }
647
648 static int
649 reg(FILE *file, unsigned _reg_file, unsigned _reg_nr)
650 {
651 int err = 0;
652
653 /* Clear the Compr4 instruction compression bit. */
654 if (_reg_file == BRW_MESSAGE_REGISTER_FILE)
655 _reg_nr &= ~BRW_MRF_COMPR4;
656
657 if (_reg_file == BRW_ARCHITECTURE_REGISTER_FILE) {
658 switch (_reg_nr & 0xf0) {
659 case BRW_ARF_NULL:
660 string(file, "null");
661 break;
662 case BRW_ARF_ADDRESS:
663 format(file, "a%d", _reg_nr & 0x0f);
664 break;
665 case BRW_ARF_ACCUMULATOR:
666 format(file, "acc%d", _reg_nr & 0x0f);
667 break;
668 case BRW_ARF_FLAG:
669 format(file, "f%d", _reg_nr & 0x0f);
670 break;
671 case BRW_ARF_MASK:
672 format(file, "mask%d", _reg_nr & 0x0f);
673 break;
674 case BRW_ARF_MASK_STACK:
675 format(file, "msd%d", _reg_nr & 0x0f);
676 break;
677 case BRW_ARF_STATE:
678 format(file, "sr%d", _reg_nr & 0x0f);
679 break;
680 case BRW_ARF_CONTROL:
681 format(file, "cr%d", _reg_nr & 0x0f);
682 break;
683 case BRW_ARF_NOTIFICATION_COUNT:
684 format(file, "n%d", _reg_nr & 0x0f);
685 break;
686 case BRW_ARF_IP:
687 string(file, "ip");
688 return -1;
689 break;
690 case BRW_ARF_TDR:
691 format(file, "tdr0");
692 return -1;
693 case BRW_ARF_TIMESTAMP:
694 format(file, "tm%d", _reg_nr & 0x0f);
695 break;
696 default:
697 format(file, "ARF%d", _reg_nr);
698 break;
699 }
700 } else {
701 err |= control(file, "src reg file", reg_file, _reg_file, NULL);
702 format(file, "%d", _reg_nr);
703 }
704 return err;
705 }
706
707 static int
708 dest(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
709 {
710 int err = 0;
711
712 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
713 if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
714 err |= reg(file, brw_inst_dst_reg_file(devinfo, inst),
715 brw_inst_dst_da_reg_nr(devinfo, inst));
716 if (err == -1)
717 return 0;
718 if (brw_inst_dst_da1_subreg_nr(devinfo, inst))
719 format(file, ".%ld", brw_inst_dst_da1_subreg_nr(devinfo, inst) /
720 reg_type_size[brw_inst_dst_reg_type(devinfo, inst)]);
721 string(file, "<");
722 err |= control(file, "horiz stride", horiz_stride,
723 brw_inst_dst_hstride(devinfo, inst), NULL);
724 string(file, ">");
725 err |= control(file, "dest reg encoding", reg_encoding,
726 brw_inst_dst_reg_type(devinfo, inst), NULL);
727 } else {
728 string(file, "g[a0");
729 if (brw_inst_dst_ia_subreg_nr(devinfo, inst))
730 format(file, ".%ld", brw_inst_dst_ia_subreg_nr(devinfo, inst) /
731 reg_type_size[brw_inst_dst_reg_type(devinfo, inst)]);
732 if (brw_inst_dst_ia1_addr_imm(devinfo, inst))
733 format(file, " %d", brw_inst_dst_ia1_addr_imm(devinfo, inst));
734 string(file, "]<");
735 err |= control(file, "horiz stride", horiz_stride,
736 brw_inst_dst_hstride(devinfo, inst), NULL);
737 string(file, ">");
738 err |= control(file, "dest reg encoding", reg_encoding,
739 brw_inst_dst_reg_type(devinfo, inst), NULL);
740 }
741 } else {
742 if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
743 err |= reg(file, brw_inst_dst_reg_file(devinfo, inst),
744 brw_inst_dst_da_reg_nr(devinfo, inst));
745 if (err == -1)
746 return 0;
747 if (brw_inst_dst_da16_subreg_nr(devinfo, inst))
748 format(file, ".%ld", brw_inst_dst_da16_subreg_nr(devinfo, inst) /
749 reg_type_size[brw_inst_dst_reg_type(devinfo, inst)]);
750 string(file, "<1>");
751 err |= control(file, "writemask", writemask,
752 brw_inst_da16_writemask(devinfo, inst), NULL);
753 err |= control(file, "dest reg encoding", reg_encoding,
754 brw_inst_dst_reg_type(devinfo, inst), NULL);
755 } else {
756 err = 1;
757 string(file, "Indirect align16 address mode not supported");
758 }
759 }
760
761 return 0;
762 }
763
764 static int
765 dest_3src(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
766 {
767 int err = 0;
768 uint32_t reg_file;
769
770 if (devinfo->gen == 6 && brw_inst_3src_dst_reg_file(devinfo, inst))
771 reg_file = BRW_MESSAGE_REGISTER_FILE;
772 else
773 reg_file = BRW_GENERAL_REGISTER_FILE;
774
775 err |= reg(file, reg_file, brw_inst_3src_dst_reg_nr(devinfo, inst));
776 if (err == -1)
777 return 0;
778 if (brw_inst_3src_dst_subreg_nr(devinfo, inst))
779 format(file, ".%ld", brw_inst_3src_dst_subreg_nr(devinfo, inst));
780 string(file, "<1>");
781 err |= control(file, "writemask", writemask,
782 brw_inst_3src_dst_writemask(devinfo, inst), NULL);
783 err |= control(file, "dest reg encoding", three_source_reg_encoding,
784 brw_inst_3src_dst_type(devinfo, inst), NULL);
785
786 return 0;
787 }
788
789 static int
790 src_align1_region(FILE *file,
791 unsigned _vert_stride, unsigned _width,
792 unsigned _horiz_stride)
793 {
794 int err = 0;
795 string(file, "<");
796 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
797 string(file, ",");
798 err |= control(file, "width", width, _width, NULL);
799 string(file, ",");
800 err |= control(file, "horiz_stride", horiz_stride, _horiz_stride, NULL);
801 string(file, ">");
802 return err;
803 }
804
805 static int
806 src_da1(FILE *file,
807 const struct brw_device_info *devinfo,
808 unsigned opcode,
809 unsigned type, unsigned _reg_file,
810 unsigned _vert_stride, unsigned _width, unsigned _horiz_stride,
811 unsigned reg_num, unsigned sub_reg_num, unsigned __abs,
812 unsigned _negate)
813 {
814 int err = 0;
815
816 if (devinfo->gen >= 8 && is_logic_instruction(opcode))
817 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
818 else
819 err |= control(file, "negate", m_negate, _negate, NULL);
820
821 err |= control(file, "abs", _abs, __abs, NULL);
822
823 err |= reg(file, _reg_file, reg_num);
824 if (err == -1)
825 return 0;
826 if (sub_reg_num)
827 format(file, ".%d", sub_reg_num / reg_type_size[type]); /* use formal style like spec */
828 src_align1_region(file, _vert_stride, _width, _horiz_stride);
829 err |= control(file, "src reg encoding", reg_encoding, type, NULL);
830 return err;
831 }
832
833 static int
834 src_ia1(FILE *file,
835 const struct brw_device_info *devinfo,
836 unsigned opcode,
837 unsigned type,
838 unsigned _reg_file,
839 int _addr_imm,
840 unsigned _addr_subreg_nr,
841 unsigned _negate,
842 unsigned __abs,
843 unsigned _horiz_stride, unsigned _width, unsigned _vert_stride)
844 {
845 int err = 0;
846
847 if (devinfo->gen >= 8 && is_logic_instruction(opcode))
848 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
849 else
850 err |= control(file, "negate", m_negate, _negate, NULL);
851
852 err |= control(file, "abs", _abs, __abs, NULL);
853
854 string(file, "g[a0");
855 if (_addr_subreg_nr)
856 format(file, ".%d", _addr_subreg_nr);
857 if (_addr_imm)
858 format(file, " %d", _addr_imm);
859 string(file, "]");
860 src_align1_region(file, _vert_stride, _width, _horiz_stride);
861 err |= control(file, "src reg encoding", reg_encoding, type, NULL);
862 return err;
863 }
864
865 static int
866 src_swizzle(FILE *file, unsigned swiz)
867 {
868 unsigned x = BRW_GET_SWZ(swiz, BRW_CHANNEL_X);
869 unsigned y = BRW_GET_SWZ(swiz, BRW_CHANNEL_Y);
870 unsigned z = BRW_GET_SWZ(swiz, BRW_CHANNEL_Z);
871 unsigned w = BRW_GET_SWZ(swiz, BRW_CHANNEL_W);
872 int err = 0;
873
874 if (x == y && x == z && x == w) {
875 string(file, ".");
876 err |= control(file, "channel select", chan_sel, x, NULL);
877 } else if (swiz != BRW_SWIZZLE_XYZW) {
878 string(file, ".");
879 err |= control(file, "channel select", chan_sel, x, NULL);
880 err |= control(file, "channel select", chan_sel, y, NULL);
881 err |= control(file, "channel select", chan_sel, z, NULL);
882 err |= control(file, "channel select", chan_sel, w, NULL);
883 }
884 return err;
885 }
886
887 static int
888 src_da16(FILE *file,
889 const struct brw_device_info *devinfo,
890 unsigned opcode,
891 unsigned _reg_type,
892 unsigned _reg_file,
893 unsigned _vert_stride,
894 unsigned _reg_nr,
895 unsigned _subreg_nr,
896 unsigned __abs,
897 unsigned _negate,
898 unsigned swz_x, unsigned swz_y, unsigned swz_z, unsigned swz_w)
899 {
900 int err = 0;
901
902 if (devinfo->gen >= 8 && is_logic_instruction(opcode))
903 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
904 else
905 err |= control(file, "negate", m_negate, _negate, NULL);
906
907 err |= control(file, "abs", _abs, __abs, NULL);
908
909 err |= reg(file, _reg_file, _reg_nr);
910 if (err == -1)
911 return 0;
912 if (_subreg_nr)
913 /* bit4 for subreg number byte addressing. Make this same meaning as
914 in da1 case, so output looks consistent. */
915 format(file, ".%d", 16 / reg_type_size[_reg_type]);
916 string(file, "<");
917 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
918 string(file, ",4,1>");
919 err |= src_swizzle(file, BRW_SWIZZLE4(swz_x, swz_y, swz_z, swz_w));
920 err |= control(file, "src da16 reg type", reg_encoding, _reg_type, NULL);
921 return err;
922 }
923
924 static int
925 src0_3src(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
926 {
927 int err = 0;
928 unsigned src0_subreg_nr = brw_inst_3src_src0_subreg_nr(devinfo, inst);
929
930 err |= control(file, "negate", m_negate,
931 brw_inst_3src_src0_negate(devinfo, inst), NULL);
932 err |= control(file, "abs", _abs, brw_inst_3src_src0_abs(devinfo, inst), NULL);
933
934 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
935 brw_inst_3src_src0_reg_nr(devinfo, inst));
936 if (err == -1)
937 return 0;
938 if (src0_subreg_nr || brw_inst_3src_src0_rep_ctrl(devinfo, inst))
939 format(file, ".%d", src0_subreg_nr);
940 if (brw_inst_3src_src0_rep_ctrl(devinfo, inst))
941 string(file, "<0,1,0>");
942 else {
943 string(file, "<4,4,1>");
944 err |= src_swizzle(file, brw_inst_3src_src0_swizzle(devinfo, inst));
945 }
946 err |= control(file, "src da16 reg type", three_source_reg_encoding,
947 brw_inst_3src_src_type(devinfo, inst), NULL);
948 return err;
949 }
950
951 static int
952 src1_3src(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
953 {
954 int err = 0;
955 unsigned src1_subreg_nr = brw_inst_3src_src1_subreg_nr(devinfo, inst);
956
957 err |= control(file, "negate", m_negate,
958 brw_inst_3src_src1_negate(devinfo, inst), NULL);
959 err |= control(file, "abs", _abs, brw_inst_3src_src1_abs(devinfo, inst), NULL);
960
961 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
962 brw_inst_3src_src1_reg_nr(devinfo, inst));
963 if (err == -1)
964 return 0;
965 if (src1_subreg_nr || brw_inst_3src_src1_rep_ctrl(devinfo, inst))
966 format(file, ".%d", src1_subreg_nr);
967 if (brw_inst_3src_src1_rep_ctrl(devinfo, inst))
968 string(file, "<0,1,0>");
969 else {
970 string(file, "<4,4,1>");
971 err |= src_swizzle(file, brw_inst_3src_src1_swizzle(devinfo, inst));
972 }
973 err |= control(file, "src da16 reg type", three_source_reg_encoding,
974 brw_inst_3src_src_type(devinfo, inst), NULL);
975 return err;
976 }
977
978
979 static int
980 src2_3src(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
981 {
982 int err = 0;
983 unsigned src2_subreg_nr = brw_inst_3src_src2_subreg_nr(devinfo, inst);
984
985 err |= control(file, "negate", m_negate,
986 brw_inst_3src_src2_negate(devinfo, inst), NULL);
987 err |= control(file, "abs", _abs, brw_inst_3src_src2_abs(devinfo, inst), NULL);
988
989 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
990 brw_inst_3src_src2_reg_nr(devinfo, inst));
991 if (err == -1)
992 return 0;
993 if (src2_subreg_nr || brw_inst_3src_src2_rep_ctrl(devinfo, inst))
994 format(file, ".%d", src2_subreg_nr);
995 if (brw_inst_3src_src2_rep_ctrl(devinfo, inst))
996 string(file, "<0,1,0>");
997 else {
998 string(file, "<4,4,1>");
999 err |= src_swizzle(file, brw_inst_3src_src2_swizzle(devinfo, inst));
1000 }
1001 err |= control(file, "src da16 reg type", three_source_reg_encoding,
1002 brw_inst_3src_src_type(devinfo, inst), NULL);
1003 return err;
1004 }
1005
1006 static int
1007 imm(FILE *file, const struct brw_device_info *devinfo, unsigned type, brw_inst *inst)
1008 {
1009 switch (type) {
1010 case BRW_HW_REG_TYPE_UD:
1011 format(file, "0x%08xUD", brw_inst_imm_ud(devinfo, inst));
1012 break;
1013 case BRW_HW_REG_TYPE_D:
1014 format(file, "%dD", brw_inst_imm_d(devinfo, inst));
1015 break;
1016 case BRW_HW_REG_TYPE_UW:
1017 format(file, "0x%04xUW", (uint16_t) brw_inst_imm_ud(devinfo, inst));
1018 break;
1019 case BRW_HW_REG_TYPE_W:
1020 format(file, "%dW", (int16_t) brw_inst_imm_d(devinfo, inst));
1021 break;
1022 case BRW_HW_REG_IMM_TYPE_UV:
1023 format(file, "0x%08xUV", brw_inst_imm_ud(devinfo, inst));
1024 break;
1025 case BRW_HW_REG_IMM_TYPE_VF:
1026 format(file, "[%-gF, %-gF, %-gF, %-gF]VF",
1027 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst)),
1028 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 8),
1029 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 16),
1030 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 24));
1031 break;
1032 case BRW_HW_REG_IMM_TYPE_V:
1033 format(file, "0x%08xV", brw_inst_imm_ud(devinfo, inst));
1034 break;
1035 case BRW_HW_REG_TYPE_F:
1036 format(file, "%-gF", brw_inst_imm_f(devinfo, inst));
1037 break;
1038 case GEN8_HW_REG_IMM_TYPE_DF:
1039 string(file, "Double IMM");
1040 break;
1041 case GEN8_HW_REG_IMM_TYPE_HF:
1042 string(file, "Half Float IMM");
1043 break;
1044 }
1045 return 0;
1046 }
1047
1048 static int
1049 src0(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
1050 {
1051 if (brw_inst_src0_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) {
1052 return imm(file, devinfo, brw_inst_src0_reg_type(devinfo, inst), inst);
1053 } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
1054 if (brw_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1055 return src_da1(file,
1056 devinfo,
1057 brw_inst_opcode(devinfo, inst),
1058 brw_inst_src0_reg_type(devinfo, inst),
1059 brw_inst_src0_reg_file(devinfo, inst),
1060 brw_inst_src0_vstride(devinfo, inst),
1061 brw_inst_src0_width(devinfo, inst),
1062 brw_inst_src0_hstride(devinfo, inst),
1063 brw_inst_src0_da_reg_nr(devinfo, inst),
1064 brw_inst_src0_da1_subreg_nr(devinfo, inst),
1065 brw_inst_src0_abs(devinfo, inst),
1066 brw_inst_src0_negate(devinfo, inst));
1067 } else {
1068 return src_ia1(file,
1069 devinfo,
1070 brw_inst_opcode(devinfo, inst),
1071 brw_inst_src0_reg_type(devinfo, inst),
1072 brw_inst_src0_reg_file(devinfo, inst),
1073 brw_inst_src0_ia1_addr_imm(devinfo, inst),
1074 brw_inst_src0_ia_subreg_nr(devinfo, inst),
1075 brw_inst_src0_negate(devinfo, inst),
1076 brw_inst_src0_abs(devinfo, inst),
1077 brw_inst_src0_hstride(devinfo, inst),
1078 brw_inst_src0_width(devinfo, inst),
1079 brw_inst_src0_vstride(devinfo, inst));
1080 }
1081 } else {
1082 if (brw_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1083 return src_da16(file,
1084 devinfo,
1085 brw_inst_opcode(devinfo, inst),
1086 brw_inst_src0_reg_type(devinfo, inst),
1087 brw_inst_src0_reg_file(devinfo, inst),
1088 brw_inst_src0_vstride(devinfo, inst),
1089 brw_inst_src0_da_reg_nr(devinfo, inst),
1090 brw_inst_src0_da16_subreg_nr(devinfo, inst),
1091 brw_inst_src0_abs(devinfo, inst),
1092 brw_inst_src0_negate(devinfo, inst),
1093 brw_inst_src0_da16_swiz_x(devinfo, inst),
1094 brw_inst_src0_da16_swiz_y(devinfo, inst),
1095 brw_inst_src0_da16_swiz_z(devinfo, inst),
1096 brw_inst_src0_da16_swiz_w(devinfo, inst));
1097 } else {
1098 string(file, "Indirect align16 address mode not supported");
1099 return 1;
1100 }
1101 }
1102 }
1103
1104 static int
1105 src1(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
1106 {
1107 if (brw_inst_src1_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) {
1108 return imm(file, devinfo, brw_inst_src1_reg_type(devinfo, inst), inst);
1109 } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
1110 if (brw_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1111 return src_da1(file,
1112 devinfo,
1113 brw_inst_opcode(devinfo, inst),
1114 brw_inst_src1_reg_type(devinfo, inst),
1115 brw_inst_src1_reg_file(devinfo, inst),
1116 brw_inst_src1_vstride(devinfo, inst),
1117 brw_inst_src1_width(devinfo, inst),
1118 brw_inst_src1_hstride(devinfo, inst),
1119 brw_inst_src1_da_reg_nr(devinfo, inst),
1120 brw_inst_src1_da1_subreg_nr(devinfo, inst),
1121 brw_inst_src1_abs(devinfo, inst),
1122 brw_inst_src1_negate(devinfo, inst));
1123 } else {
1124 return src_ia1(file,
1125 devinfo,
1126 brw_inst_opcode(devinfo, inst),
1127 brw_inst_src1_reg_type(devinfo, inst),
1128 brw_inst_src1_reg_file(devinfo, inst),
1129 brw_inst_src1_ia1_addr_imm(devinfo, inst),
1130 brw_inst_src1_ia_subreg_nr(devinfo, inst),
1131 brw_inst_src1_negate(devinfo, inst),
1132 brw_inst_src1_abs(devinfo, inst),
1133 brw_inst_src1_hstride(devinfo, inst),
1134 brw_inst_src1_width(devinfo, inst),
1135 brw_inst_src1_vstride(devinfo, inst));
1136 }
1137 } else {
1138 if (brw_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1139 return src_da16(file,
1140 devinfo,
1141 brw_inst_opcode(devinfo, inst),
1142 brw_inst_src1_reg_type(devinfo, inst),
1143 brw_inst_src1_reg_file(devinfo, inst),
1144 brw_inst_src1_vstride(devinfo, inst),
1145 brw_inst_src1_da_reg_nr(devinfo, inst),
1146 brw_inst_src1_da16_subreg_nr(devinfo, inst),
1147 brw_inst_src1_abs(devinfo, inst),
1148 brw_inst_src1_negate(devinfo, inst),
1149 brw_inst_src1_da16_swiz_x(devinfo, inst),
1150 brw_inst_src1_da16_swiz_y(devinfo, inst),
1151 brw_inst_src1_da16_swiz_z(devinfo, inst),
1152 brw_inst_src1_da16_swiz_w(devinfo, inst));
1153 } else {
1154 string(file, "Indirect align16 address mode not supported");
1155 return 1;
1156 }
1157 }
1158 }
1159
1160 static int
1161 qtr_ctrl(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
1162 {
1163 int qtr_ctl = brw_inst_qtr_control(devinfo, inst);
1164 int exec_size = 1 << brw_inst_exec_size(devinfo, inst);
1165
1166 if (exec_size == 8) {
1167 switch (qtr_ctl) {
1168 case 0:
1169 string(file, " 1Q");
1170 break;
1171 case 1:
1172 string(file, " 2Q");
1173 break;
1174 case 2:
1175 string(file, " 3Q");
1176 break;
1177 case 3:
1178 string(file, " 4Q");
1179 break;
1180 }
1181 } else if (exec_size == 16) {
1182 if (qtr_ctl < 2)
1183 string(file, " 1H");
1184 else
1185 string(file, " 2H");
1186 }
1187 return 0;
1188 }
1189
1190 #ifdef DEBUG
1191 static __attribute__((__unused__)) int
1192 brw_disassemble_imm(const struct brw_device_info *devinfo,
1193 uint32_t dw3, uint32_t dw2, uint32_t dw1, uint32_t dw0)
1194 {
1195 brw_inst inst;
1196 inst.data[0] = (((uint64_t) dw1) << 32) | ((uint64_t) dw0);
1197 inst.data[1] = (((uint64_t) dw3) << 32) | ((uint64_t) dw2);
1198 return brw_disassemble_inst(stderr, devinfo, &inst, false);
1199 }
1200 #endif
1201
1202 int
1203 brw_disassemble_inst(FILE *file, const struct brw_device_info *devinfo,
1204 brw_inst *inst, bool is_compacted)
1205 {
1206 int err = 0;
1207 int space = 0;
1208
1209 const enum opcode opcode = brw_inst_opcode(devinfo, inst);
1210 const struct opcode_desc *desc = brw_opcode_desc(devinfo, opcode);
1211
1212 if (brw_inst_pred_control(devinfo, inst)) {
1213 string(file, "(");
1214 err |= control(file, "predicate inverse", pred_inv,
1215 brw_inst_pred_inv(devinfo, inst), NULL);
1216 format(file, "f%ld", devinfo->gen >= 7 ? brw_inst_flag_reg_nr(devinfo, inst) : 0);
1217 if (brw_inst_flag_subreg_nr(devinfo, inst))
1218 format(file, ".%ld", brw_inst_flag_subreg_nr(devinfo, inst));
1219 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
1220 err |= control(file, "predicate control align1", pred_ctrl_align1,
1221 brw_inst_pred_control(devinfo, inst), NULL);
1222 } else {
1223 err |= control(file, "predicate control align16", pred_ctrl_align16,
1224 brw_inst_pred_control(devinfo, inst), NULL);
1225 }
1226 string(file, ") ");
1227 }
1228
1229 err |= print_opcode(file, devinfo, opcode);
1230 err |= control(file, "saturate", saturate, brw_inst_saturate(devinfo, inst),
1231 NULL);
1232
1233 err |= control(file, "debug control", debug_ctrl,
1234 brw_inst_debug_control(devinfo, inst), NULL);
1235
1236 if (opcode == BRW_OPCODE_MATH) {
1237 string(file, " ");
1238 err |= control(file, "function", math_function,
1239 brw_inst_math_function(devinfo, inst), NULL);
1240 } else if (opcode != BRW_OPCODE_SEND && opcode != BRW_OPCODE_SENDC) {
1241 err |= control(file, "conditional modifier", conditional_modifier,
1242 brw_inst_cond_modifier(devinfo, inst), NULL);
1243
1244 /* If we're using the conditional modifier, print which flags reg is
1245 * used for it. Note that on gen6+, the embedded-condition SEL and
1246 * control flow doesn't update flags.
1247 */
1248 if (brw_inst_cond_modifier(devinfo, inst) &&
1249 (devinfo->gen < 6 || (opcode != BRW_OPCODE_SEL &&
1250 opcode != BRW_OPCODE_IF &&
1251 opcode != BRW_OPCODE_WHILE))) {
1252 format(file, ".f%ld",
1253 devinfo->gen >= 7 ? brw_inst_flag_reg_nr(devinfo, inst) : 0);
1254 if (brw_inst_flag_subreg_nr(devinfo, inst))
1255 format(file, ".%ld", brw_inst_flag_subreg_nr(devinfo, inst));
1256 }
1257 }
1258
1259 if (opcode != BRW_OPCODE_NOP && opcode != BRW_OPCODE_NENOP) {
1260 string(file, "(");
1261 err |= control(file, "execution size", exec_size,
1262 brw_inst_exec_size(devinfo, inst), NULL);
1263 string(file, ")");
1264 }
1265
1266 if (opcode == BRW_OPCODE_SEND && devinfo->gen < 6)
1267 format(file, " %ld", brw_inst_base_mrf(devinfo, inst));
1268
1269 if (has_uip(devinfo, opcode)) {
1270 /* Instructions that have UIP also have JIP. */
1271 pad(file, 16);
1272 format(file, "JIP: %d", brw_inst_jip(devinfo, inst));
1273 pad(file, 32);
1274 format(file, "UIP: %d", brw_inst_uip(devinfo, inst));
1275 } else if (has_jip(devinfo, opcode)) {
1276 pad(file, 16);
1277 if (devinfo->gen >= 7) {
1278 format(file, "JIP: %d", brw_inst_jip(devinfo, inst));
1279 } else {
1280 format(file, "JIP: %d", brw_inst_gen6_jump_count(devinfo, inst));
1281 }
1282 } else if (devinfo->gen < 6 && (opcode == BRW_OPCODE_BREAK ||
1283 opcode == BRW_OPCODE_CONTINUE ||
1284 opcode == BRW_OPCODE_ELSE)) {
1285 pad(file, 16);
1286 format(file, "Jump: %d", brw_inst_gen4_jump_count(devinfo, inst));
1287 pad(file, 32);
1288 format(file, "Pop: %ld", brw_inst_gen4_pop_count(devinfo, inst));
1289 } else if (devinfo->gen < 6 && (opcode == BRW_OPCODE_IF ||
1290 opcode == BRW_OPCODE_IFF ||
1291 opcode == BRW_OPCODE_HALT)) {
1292 pad(file, 16);
1293 format(file, "Jump: %d", brw_inst_gen4_jump_count(devinfo, inst));
1294 } else if (devinfo->gen < 6 && opcode == BRW_OPCODE_ENDIF) {
1295 pad(file, 16);
1296 format(file, "Pop: %ld", brw_inst_gen4_pop_count(devinfo, inst));
1297 } else if (opcode == BRW_OPCODE_JMPI) {
1298 pad(file, 16);
1299 err |= src1(file, devinfo, inst);
1300 } else if (desc && desc->nsrc == 3) {
1301 pad(file, 16);
1302 err |= dest_3src(file, devinfo, inst);
1303
1304 pad(file, 32);
1305 err |= src0_3src(file, devinfo, inst);
1306
1307 pad(file, 48);
1308 err |= src1_3src(file, devinfo, inst);
1309
1310 pad(file, 64);
1311 err |= src2_3src(file, devinfo, inst);
1312 } else if (desc) {
1313 if (desc->ndst > 0) {
1314 pad(file, 16);
1315 err |= dest(file, devinfo, inst);
1316 }
1317
1318 if (desc->nsrc > 0) {
1319 pad(file, 32);
1320 err |= src0(file, devinfo, inst);
1321 }
1322
1323 if (desc->nsrc > 1) {
1324 pad(file, 48);
1325 err |= src1(file, devinfo, inst);
1326 }
1327 }
1328
1329 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) {
1330 enum brw_message_target sfid = brw_inst_sfid(devinfo, inst);
1331
1332 if (brw_inst_src1_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE) {
1333 /* show the indirect descriptor source */
1334 pad(file, 48);
1335 err |= src1(file, devinfo, inst);
1336 }
1337
1338 newline(file);
1339 pad(file, 16);
1340 space = 0;
1341
1342 fprintf(file, " ");
1343 err |= control(file, "SFID", devinfo->gen >= 6 ? gen6_sfid : gen4_sfid,
1344 sfid, &space);
1345
1346
1347 if (brw_inst_src1_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE) {
1348 format(file, " indirect");
1349 } else {
1350 switch (sfid) {
1351 case BRW_SFID_MATH:
1352 err |= control(file, "math function", math_function,
1353 brw_inst_math_msg_function(devinfo, inst), &space);
1354 err |= control(file, "math saturate", math_saturate,
1355 brw_inst_math_msg_saturate(devinfo, inst), &space);
1356 err |= control(file, "math signed", math_signed,
1357 brw_inst_math_msg_signed_int(devinfo, inst), &space);
1358 err |= control(file, "math scalar", math_scalar,
1359 brw_inst_math_msg_data_type(devinfo, inst), &space);
1360 err |= control(file, "math precision", math_precision,
1361 brw_inst_math_msg_precision(devinfo, inst), &space);
1362 break;
1363 case BRW_SFID_SAMPLER:
1364 if (devinfo->gen >= 5) {
1365 err |= control(file, "sampler message", gen5_sampler_msg_type,
1366 brw_inst_sampler_msg_type(devinfo, inst), &space);
1367 err |= control(file, "sampler simd mode", gen5_sampler_simd_mode,
1368 brw_inst_sampler_simd_mode(devinfo, inst), &space);
1369 format(file, " Surface = %ld Sampler = %ld",
1370 brw_inst_binding_table_index(devinfo, inst),
1371 brw_inst_sampler(devinfo, inst));
1372 } else {
1373 format(file, " (%ld, %ld, %ld, ",
1374 brw_inst_binding_table_index(devinfo, inst),
1375 brw_inst_sampler(devinfo, inst),
1376 brw_inst_sampler_msg_type(devinfo, inst));
1377 if (!devinfo->is_g4x) {
1378 err |= control(file, "sampler target format",
1379 sampler_target_format,
1380 brw_inst_sampler_return_format(devinfo, inst), NULL);
1381 }
1382 string(file, ")");
1383 }
1384 break;
1385 case GEN6_SFID_DATAPORT_SAMPLER_CACHE:
1386 /* aka BRW_SFID_DATAPORT_READ on Gen4-5 */
1387 if (devinfo->gen >= 6) {
1388 format(file, " (%ld, %ld, %ld, %ld)",
1389 brw_inst_binding_table_index(devinfo, inst),
1390 brw_inst_dp_msg_control(devinfo, inst),
1391 brw_inst_dp_msg_type(devinfo, inst),
1392 devinfo->gen >= 7 ? 0 : brw_inst_dp_write_commit(devinfo, inst));
1393 } else {
1394 bool is_965 = devinfo->gen == 4 && !devinfo->is_g4x;
1395 err |= control(file, "DP read message type",
1396 is_965 ? gen4_dp_read_port_msg_type :
1397 g45_dp_read_port_msg_type,
1398 brw_inst_dp_read_msg_type(devinfo, inst),
1399 &space);
1400
1401 format(file, " MsgCtrl = 0x%lx",
1402 brw_inst_dp_read_msg_control(devinfo, inst));
1403
1404 format(file, " Surface = %ld", brw_inst_binding_table_index(devinfo, inst));
1405 }
1406 break;
1407
1408 case GEN6_SFID_DATAPORT_RENDER_CACHE: {
1409 /* aka BRW_SFID_DATAPORT_WRITE on Gen4-5 */
1410 unsigned msg_type = brw_inst_dp_write_msg_type(devinfo, inst);
1411
1412 err |= control(file, "DP rc message type",
1413 devinfo->gen >= 6 ? dp_rc_msg_type_gen6
1414 : dp_write_port_msg_type,
1415 msg_type, &space);
1416
1417 bool is_rt_write = msg_type ==
1418 (devinfo->gen >= 6 ? GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
1419 : BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE);
1420
1421 if (is_rt_write) {
1422 err |= control(file, "RT message type", m_rt_write_subtype,
1423 brw_inst_rt_message_type(devinfo, inst), &space);
1424 if (devinfo->gen >= 6 && brw_inst_rt_slot_group(devinfo, inst))
1425 string(file, " Hi");
1426 if (brw_inst_rt_last(devinfo, inst))
1427 string(file, " LastRT");
1428 if (devinfo->gen < 7 && brw_inst_dp_write_commit(devinfo, inst))
1429 string(file, " WriteCommit");
1430 } else {
1431 format(file, " MsgCtrl = 0x%lx",
1432 brw_inst_dp_write_msg_control(devinfo, inst));
1433 }
1434
1435 format(file, " Surface = %ld", brw_inst_binding_table_index(devinfo, inst));
1436 break;
1437 }
1438
1439 case BRW_SFID_URB: {
1440 unsigned opcode = brw_inst_urb_opcode(devinfo, inst);
1441
1442 format(file, " %ld", brw_inst_urb_global_offset(devinfo, inst));
1443
1444 space = 1;
1445
1446 err |= control(file, "urb opcode",
1447 devinfo->gen >= 7 ? gen7_urb_opcode
1448 : gen5_urb_opcode,
1449 opcode, &space);
1450
1451 if (devinfo->gen >= 7 &&
1452 brw_inst_urb_per_slot_offset(devinfo, inst)) {
1453 string(file, " per-slot");
1454 }
1455
1456 if (opcode == GEN8_URB_OPCODE_SIMD8_WRITE ||
1457 opcode == GEN8_URB_OPCODE_SIMD8_READ) {
1458 if (brw_inst_urb_channel_mask_present(devinfo, inst))
1459 string(file, " masked");
1460 } else {
1461 err |= control(file, "urb swizzle", urb_swizzle,
1462 brw_inst_urb_swizzle_control(devinfo, inst),
1463 &space);
1464 }
1465
1466 if (devinfo->gen < 7) {
1467 err |= control(file, "urb allocate", urb_allocate,
1468 brw_inst_urb_allocate(devinfo, inst), &space);
1469 err |= control(file, "urb used", urb_used,
1470 brw_inst_urb_used(devinfo, inst), &space);
1471 }
1472 if (devinfo->gen < 8) {
1473 err |= control(file, "urb complete", urb_complete,
1474 brw_inst_urb_complete(devinfo, inst), &space);
1475 }
1476 break;
1477 }
1478 case BRW_SFID_THREAD_SPAWNER:
1479 break;
1480
1481 case BRW_SFID_MESSAGE_GATEWAY:
1482 format(file, " (%s)",
1483 gen7_gateway_subfuncid[brw_inst_gateway_subfuncid(devinfo, inst)]);
1484 break;
1485
1486 case GEN7_SFID_DATAPORT_DATA_CACHE:
1487 if (devinfo->gen >= 7) {
1488 format(file, " (");
1489
1490 err |= control(file, "DP DC0 message type",
1491 dp_dc0_msg_type_gen7,
1492 brw_inst_dp_msg_type(devinfo, inst), &space);
1493
1494 format(file, ", %ld, ", brw_inst_binding_table_index(devinfo, inst));
1495
1496 switch (brw_inst_dp_msg_type(devinfo, inst)) {
1497 case GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP:
1498 control(file, "atomic op", aop,
1499 brw_inst_imm_ud(devinfo, inst) >> 8 & 0xf, &space);
1500 break;
1501 default:
1502 format(file, "%ld", brw_inst_dp_msg_control(devinfo, inst));
1503 }
1504 format(file, ")");
1505 break;
1506 }
1507 /* FALLTHROUGH */
1508
1509 case HSW_SFID_DATAPORT_DATA_CACHE_1: {
1510 if (devinfo->gen >= 7) {
1511 format(file, " (");
1512
1513 unsigned msg_ctrl = brw_inst_dp_msg_control(devinfo, inst);
1514
1515 err |= control(file, "DP DC1 message type",
1516 dp_dc1_msg_type_hsw,
1517 brw_inst_dp_msg_type(devinfo, inst), &space);
1518
1519 format(file, ", Surface = %ld, ",
1520 brw_inst_binding_table_index(devinfo, inst));
1521
1522 switch (brw_inst_dp_msg_type(devinfo, inst)) {
1523 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP:
1524 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP:
1525 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP:
1526 format(file, "SIMD%d,", (msg_ctrl & (1 << 4)) ? 8 : 16);
1527 /* fallthrough */
1528 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2:
1529 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2:
1530 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2:
1531 control(file, "atomic op", aop, msg_ctrl & 0xf, &space);
1532 break;
1533 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ:
1534 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE:
1535 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ:
1536 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE: {
1537 static const char *simd_modes[] = { "4x2", "16", "8" };
1538 format(file, "SIMD%s, Mask = 0x%x",
1539 simd_modes[msg_ctrl >> 4], msg_ctrl & 0xf);
1540 break;
1541 }
1542 default:
1543 format(file, "0x%x", msg_ctrl);
1544 }
1545 format(file, ")");
1546 break;
1547 }
1548 /* FALLTHROUGH */
1549 }
1550
1551 case GEN7_SFID_PIXEL_INTERPOLATOR:
1552 if (devinfo->gen >= 7) {
1553 format(file, " (%s, %s, 0x%02lx)",
1554 brw_inst_pi_nopersp(devinfo, inst) ? "linear" : "persp",
1555 pixel_interpolator_msg_types[brw_inst_pi_message_type(devinfo, inst)],
1556 brw_inst_pi_message_data(devinfo, inst));
1557 break;
1558 }
1559 /* FALLTHROUGH */
1560
1561 default:
1562 format(file, "unsupported shared function ID %d", sfid);
1563 break;
1564 }
1565
1566 if (space)
1567 string(file, " ");
1568 format(file, "mlen %ld", brw_inst_mlen(devinfo, inst));
1569 format(file, " rlen %ld", brw_inst_rlen(devinfo, inst));
1570 }
1571 }
1572 pad(file, 64);
1573 if (opcode != BRW_OPCODE_NOP && opcode != BRW_OPCODE_NENOP) {
1574 string(file, "{");
1575 space = 1;
1576 err |= control(file, "access mode", access_mode,
1577 brw_inst_access_mode(devinfo, inst), &space);
1578 if (devinfo->gen >= 6) {
1579 err |= control(file, "write enable control", wectrl,
1580 brw_inst_mask_control(devinfo, inst), &space);
1581 } else {
1582 err |= control(file, "mask control", mask_ctrl,
1583 brw_inst_mask_control(devinfo, inst), &space);
1584 }
1585 err |= control(file, "dependency control", dep_ctrl,
1586 ((brw_inst_no_dd_check(devinfo, inst) << 1) |
1587 brw_inst_no_dd_clear(devinfo, inst)), &space);
1588
1589 if (devinfo->gen >= 6)
1590 err |= qtr_ctrl(file, devinfo, inst);
1591 else {
1592 if (brw_inst_qtr_control(devinfo, inst) == BRW_COMPRESSION_COMPRESSED &&
1593 desc && desc->ndst > 0 &&
1594 brw_inst_dst_reg_file(devinfo, inst) == BRW_MESSAGE_REGISTER_FILE &&
1595 brw_inst_dst_da_reg_nr(devinfo, inst) & BRW_MRF_COMPR4) {
1596 format(file, " compr4");
1597 } else {
1598 err |= control(file, "compression control", compr_ctrl,
1599 brw_inst_qtr_control(devinfo, inst), &space);
1600 }
1601 }
1602
1603 err |= control(file, "compaction", cmpt_ctrl, is_compacted, &space);
1604 err |= control(file, "thread control", thread_ctrl,
1605 brw_inst_thread_control(devinfo, inst), &space);
1606 if (has_branch_ctrl(devinfo, opcode)) {
1607 err |= control(file, "branch ctrl", branch_ctrl,
1608 brw_inst_branch_control(devinfo, inst), &space);
1609 } else if (devinfo->gen >= 6) {
1610 err |= control(file, "acc write control", accwr,
1611 brw_inst_acc_wr_control(devinfo, inst), &space);
1612 }
1613 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC)
1614 err |= control(file, "end of thread", end_of_thread,
1615 brw_inst_eot(devinfo, inst), &space);
1616 if (space)
1617 string(file, " ");
1618 string(file, "}");
1619 }
1620 string(file, ";");
1621 newline(file);
1622 return err;
1623 }