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5f6cd40765b970e73f2a8e6299db1f43aaaec261
[mesa.git] / src / mesa / drivers / dri / i965 / brw_disasm.c
1 /*
2 * Copyright © 2008 Keith Packard
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
13 *
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20 * OF THIS SOFTWARE.
21 */
22
23 #include <stdio.h>
24 #include <stdlib.h>
25 #include <string.h>
26 #include <getopt.h>
27 #include <unistd.h>
28 #include <stdarg.h>
29
30 #include "main/mtypes.h"
31
32 #include "brw_context.h"
33 #include "brw_defines.h"
34
35 const struct opcode_desc opcode_descs[128] = {
36 [BRW_OPCODE_MOV] = { .name = "mov", .nsrc = 1, .ndst = 1 },
37 [BRW_OPCODE_FRC] = { .name = "frc", .nsrc = 1, .ndst = 1 },
38 [BRW_OPCODE_RNDU] = { .name = "rndu", .nsrc = 1, .ndst = 1 },
39 [BRW_OPCODE_RNDD] = { .name = "rndd", .nsrc = 1, .ndst = 1 },
40 [BRW_OPCODE_RNDE] = { .name = "rnde", .nsrc = 1, .ndst = 1 },
41 [BRW_OPCODE_RNDZ] = { .name = "rndz", .nsrc = 1, .ndst = 1 },
42 [BRW_OPCODE_NOT] = { .name = "not", .nsrc = 1, .ndst = 1 },
43 [BRW_OPCODE_LZD] = { .name = "lzd", .nsrc = 1, .ndst = 1 },
44 [BRW_OPCODE_F32TO16] = { .name = "f32to16", .nsrc = 1, .ndst = 1 },
45 [BRW_OPCODE_F16TO32] = { .name = "f16to32", .nsrc = 1, .ndst = 1 },
46 [BRW_OPCODE_BFREV] = { .name = "bfrev", .nsrc = 1, .ndst = 1},
47 [BRW_OPCODE_FBH] = { .name = "fbh", .nsrc = 1, .ndst = 1},
48 [BRW_OPCODE_FBL] = { .name = "fbl", .nsrc = 1, .ndst = 1},
49 [BRW_OPCODE_CBIT] = { .name = "cbit", .nsrc = 1, .ndst = 1},
50
51 [BRW_OPCODE_MUL] = { .name = "mul", .nsrc = 2, .ndst = 1 },
52 [BRW_OPCODE_MAC] = { .name = "mac", .nsrc = 2, .ndst = 1 },
53 [BRW_OPCODE_MACH] = { .name = "mach", .nsrc = 2, .ndst = 1 },
54 [BRW_OPCODE_LINE] = { .name = "line", .nsrc = 2, .ndst = 1 },
55 [BRW_OPCODE_PLN] = { .name = "pln", .nsrc = 2, .ndst = 1 },
56 [BRW_OPCODE_MAD] = { .name = "mad", .nsrc = 3, .ndst = 1 },
57 [BRW_OPCODE_LRP] = { .name = "lrp", .nsrc = 3, .ndst = 1 },
58 [BRW_OPCODE_SAD2] = { .name = "sad2", .nsrc = 2, .ndst = 1 },
59 [BRW_OPCODE_SADA2] = { .name = "sada2", .nsrc = 2, .ndst = 1 },
60 [BRW_OPCODE_DP4] = { .name = "dp4", .nsrc = 2, .ndst = 1 },
61 [BRW_OPCODE_DPH] = { .name = "dph", .nsrc = 2, .ndst = 1 },
62 [BRW_OPCODE_DP3] = { .name = "dp3", .nsrc = 2, .ndst = 1 },
63 [BRW_OPCODE_DP2] = { .name = "dp2", .nsrc = 2, .ndst = 1 },
64 [BRW_OPCODE_MATH] = { .name = "math", .nsrc = 2, .ndst = 1 },
65
66 [BRW_OPCODE_AVG] = { .name = "avg", .nsrc = 2, .ndst = 1 },
67 [BRW_OPCODE_ADD] = { .name = "add", .nsrc = 2, .ndst = 1 },
68 [BRW_OPCODE_SEL] = { .name = "sel", .nsrc = 2, .ndst = 1 },
69 [BRW_OPCODE_AND] = { .name = "and", .nsrc = 2, .ndst = 1 },
70 [BRW_OPCODE_OR] = { .name = "or", .nsrc = 2, .ndst = 1 },
71 [BRW_OPCODE_XOR] = { .name = "xor", .nsrc = 2, .ndst = 1 },
72 [BRW_OPCODE_SHR] = { .name = "shr", .nsrc = 2, .ndst = 1 },
73 [BRW_OPCODE_SHL] = { .name = "shl", .nsrc = 2, .ndst = 1 },
74 [BRW_OPCODE_ASR] = { .name = "asr", .nsrc = 2, .ndst = 1 },
75 [BRW_OPCODE_CMP] = { .name = "cmp", .nsrc = 2, .ndst = 1 },
76 [BRW_OPCODE_CMPN] = { .name = "cmpn", .nsrc = 2, .ndst = 1 },
77 [BRW_OPCODE_BFE] = { .name = "bfe", .nsrc = 3, .ndst = 1},
78 [BRW_OPCODE_BFI1] = { .name = "bfi1", .nsrc = 2, .ndst = 1},
79 [BRW_OPCODE_BFI2] = { .name = "bfi2", .nsrc = 3, .ndst = 1},
80 [BRW_OPCODE_ADDC] = { .name = "addc", .nsrc = 2, .ndst = 1},
81 [BRW_OPCODE_SUBB] = { .name = "subb", .nsrc = 2, .ndst = 1},
82
83 [BRW_OPCODE_SEND] = { .name = "send", .nsrc = 1, .ndst = 1 },
84 [BRW_OPCODE_SENDC] = { .name = "sendc", .nsrc = 1, .ndst = 1 },
85 [BRW_OPCODE_NOP] = { .name = "nop", .nsrc = 0, .ndst = 0 },
86 [BRW_OPCODE_JMPI] = { .name = "jmpi", .nsrc = 0, .ndst = 0 },
87 [BRW_OPCODE_IF] = { .name = "if", .nsrc = 2, .ndst = 0 },
88 [BRW_OPCODE_IFF] = { .name = "iff", .nsrc = 2, .ndst = 1 },
89 [BRW_OPCODE_WHILE] = { .name = "while", .nsrc = 2, .ndst = 0 },
90 [BRW_OPCODE_ELSE] = { .name = "else", .nsrc = 2, .ndst = 0 },
91 [BRW_OPCODE_BREAK] = { .name = "break", .nsrc = 2, .ndst = 0 },
92 [BRW_OPCODE_CONTINUE] = { .name = "cont", .nsrc = 1, .ndst = 0 },
93 [BRW_OPCODE_HALT] = { .name = "halt", .nsrc = 1, .ndst = 0 },
94 [BRW_OPCODE_MSAVE] = { .name = "msave", .nsrc = 1, .ndst = 1 },
95 [BRW_OPCODE_PUSH] = { .name = "push", .nsrc = 1, .ndst = 1 },
96 [BRW_OPCODE_MRESTORE] = { .name = "mrest", .nsrc = 1, .ndst = 1 },
97 [BRW_OPCODE_POP] = { .name = "pop", .nsrc = 2, .ndst = 0 },
98 [BRW_OPCODE_WAIT] = { .name = "wait", .nsrc = 1, .ndst = 0 },
99 [BRW_OPCODE_DO] = { .name = "do", .nsrc = 0, .ndst = 0 },
100 [BRW_OPCODE_ENDIF] = { .name = "endif", .nsrc = 2, .ndst = 0 },
101 };
102 static const struct opcode_desc *opcode = opcode_descs;
103
104 const char * const conditional_modifier[16] = {
105 [BRW_CONDITIONAL_NONE] = "",
106 [BRW_CONDITIONAL_Z] = ".e",
107 [BRW_CONDITIONAL_NZ] = ".ne",
108 [BRW_CONDITIONAL_G] = ".g",
109 [BRW_CONDITIONAL_GE] = ".ge",
110 [BRW_CONDITIONAL_L] = ".l",
111 [BRW_CONDITIONAL_LE] = ".le",
112 [BRW_CONDITIONAL_R] = ".r",
113 [BRW_CONDITIONAL_O] = ".o",
114 [BRW_CONDITIONAL_U] = ".u",
115 };
116
117 static const char * const negate[2] = {
118 [0] = "",
119 [1] = "-",
120 };
121
122 static const char * const _abs[2] = {
123 [0] = "",
124 [1] = "(abs)",
125 };
126
127 static const char * const vert_stride[16] = {
128 [0] = "0",
129 [1] = "1",
130 [2] = "2",
131 [3] = "4",
132 [4] = "8",
133 [5] = "16",
134 [6] = "32",
135 [15] = "VxH",
136 };
137
138 static const char * const width[8] = {
139 [0] = "1",
140 [1] = "2",
141 [2] = "4",
142 [3] = "8",
143 [4] = "16",
144 };
145
146 static const char * const horiz_stride[4] = {
147 [0] = "0",
148 [1] = "1",
149 [2] = "2",
150 [3] = "4"
151 };
152
153 static const char * const chan_sel[4] = {
154 [0] = "x",
155 [1] = "y",
156 [2] = "z",
157 [3] = "w",
158 };
159
160 static const char * const debug_ctrl[2] = {
161 [0] = "",
162 [1] = ".breakpoint"
163 };
164
165 static const char * const saturate[2] = {
166 [0] = "",
167 [1] = ".sat"
168 };
169
170 static const char * const accwr[2] = {
171 [0] = "",
172 [1] = "AccWrEnable"
173 };
174
175 static const char * const wectrl[2] = {
176 [0] = "WE_normal",
177 [1] = "WE_all"
178 };
179
180 static const char * const exec_size[8] = {
181 [0] = "1",
182 [1] = "2",
183 [2] = "4",
184 [3] = "8",
185 [4] = "16",
186 [5] = "32"
187 };
188
189 static const char * const pred_inv[2] = {
190 [0] = "+",
191 [1] = "-"
192 };
193
194 static const char * const pred_ctrl_align16[16] = {
195 [1] = "",
196 [2] = ".x",
197 [3] = ".y",
198 [4] = ".z",
199 [5] = ".w",
200 [6] = ".any4h",
201 [7] = ".all4h",
202 };
203
204 static const char * const pred_ctrl_align1[16] = {
205 [1] = "",
206 [2] = ".anyv",
207 [3] = ".allv",
208 [4] = ".any2h",
209 [5] = ".all2h",
210 [6] = ".any4h",
211 [7] = ".all4h",
212 [8] = ".any8h",
213 [9] = ".all8h",
214 [10] = ".any16h",
215 [11] = ".all16h",
216 };
217
218 static const char * const thread_ctrl[4] = {
219 [0] = "",
220 [2] = "switch"
221 };
222
223 static const char * const compr_ctrl[4] = {
224 [0] = "",
225 [1] = "sechalf",
226 [2] = "compr",
227 [3] = "compr4",
228 };
229
230 static const char * const dep_ctrl[4] = {
231 [0] = "",
232 [1] = "NoDDClr",
233 [2] = "NoDDChk",
234 [3] = "NoDDClr,NoDDChk",
235 };
236
237 static const char * const mask_ctrl[4] = {
238 [0] = "",
239 [1] = "nomask",
240 };
241
242 static const char * const access_mode[2] = {
243 [0] = "align1",
244 [1] = "align16",
245 };
246
247 const char * const reg_encoding[8] = {
248 [0] = "UD",
249 [1] = "D",
250 [2] = "UW",
251 [3] = "W",
252 [4] = "UB",
253 [5] = "B",
254 [7] = "F"
255 };
256
257 const int reg_type_size[8] = {
258 [0] = 4,
259 [1] = 4,
260 [2] = 2,
261 [3] = 2,
262 [4] = 1,
263 [5] = 1,
264 [7] = 4
265 };
266
267 static const char * const reg_file[4] = {
268 [0] = "A",
269 [1] = "g",
270 [2] = "m",
271 [3] = "imm",
272 };
273
274 static const char * const writemask[16] = {
275 [0x0] = ".",
276 [0x1] = ".x",
277 [0x2] = ".y",
278 [0x3] = ".xy",
279 [0x4] = ".z",
280 [0x5] = ".xz",
281 [0x6] = ".yz",
282 [0x7] = ".xyz",
283 [0x8] = ".w",
284 [0x9] = ".xw",
285 [0xa] = ".yw",
286 [0xb] = ".xyw",
287 [0xc] = ".zw",
288 [0xd] = ".xzw",
289 [0xe] = ".yzw",
290 [0xf] = "",
291 };
292
293 static const char * const end_of_thread[2] = {
294 [0] = "",
295 [1] = "EOT"
296 };
297
298 static const char * const target_function[16] = {
299 [BRW_SFID_NULL] = "null",
300 [BRW_SFID_MATH] = "math",
301 [BRW_SFID_SAMPLER] = "sampler",
302 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
303 [BRW_SFID_DATAPORT_READ] = "read",
304 [BRW_SFID_DATAPORT_WRITE] = "write",
305 [BRW_SFID_URB] = "urb",
306 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner"
307 };
308
309 static const char * const target_function_gen6[16] = {
310 [BRW_SFID_NULL] = "null",
311 [BRW_SFID_MATH] = "math",
312 [BRW_SFID_SAMPLER] = "sampler",
313 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
314 [BRW_SFID_URB] = "urb",
315 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
316 [GEN6_SFID_DATAPORT_SAMPLER_CACHE] = "sampler",
317 [GEN6_SFID_DATAPORT_RENDER_CACHE] = "render",
318 [GEN6_SFID_DATAPORT_CONSTANT_CACHE] = "const",
319 [GEN7_SFID_DATAPORT_DATA_CACHE] = "data"
320 };
321
322 static const char * const dp_rc_msg_type_gen6[16] = {
323 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read",
324 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read",
325 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read",
326 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read",
327 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] = "OWORD unaligned block read",
328 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read",
329 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write",
330 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write",
331 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] = "OWORD dual block write",
332 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write",
333 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] = "DWORD scattered write",
334 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write",
335 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write",
336 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORMc write",
337 };
338
339 static const char * const math_function[16] = {
340 [BRW_MATH_FUNCTION_INV] = "inv",
341 [BRW_MATH_FUNCTION_LOG] = "log",
342 [BRW_MATH_FUNCTION_EXP] = "exp",
343 [BRW_MATH_FUNCTION_SQRT] = "sqrt",
344 [BRW_MATH_FUNCTION_RSQ] = "rsq",
345 [BRW_MATH_FUNCTION_SIN] = "sin",
346 [BRW_MATH_FUNCTION_COS] = "cos",
347 [BRW_MATH_FUNCTION_SINCOS] = "sincos",
348 [BRW_MATH_FUNCTION_FDIV] = "fdiv",
349 [BRW_MATH_FUNCTION_POW] = "pow",
350 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] = "intdivmod",
351 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] = "intdiv",
352 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER] = "intmod",
353 };
354
355 static const char * const math_saturate[2] = {
356 [0] = "",
357 [1] = "sat"
358 };
359
360 static const char * const math_signed[2] = {
361 [0] = "",
362 [1] = "signed"
363 };
364
365 static const char * const math_scalar[2] = {
366 [0] = "",
367 [1] = "scalar"
368 };
369
370 static const char * const math_precision[2] = {
371 [0] = "",
372 [1] = "partial_precision"
373 };
374
375 static const char * const urb_opcode[2] = {
376 [0] = "urb_write",
377 [1] = "ff_sync",
378 };
379
380 static const char * const urb_swizzle[4] = {
381 [BRW_URB_SWIZZLE_NONE] = "",
382 [BRW_URB_SWIZZLE_INTERLEAVE] = "interleave",
383 [BRW_URB_SWIZZLE_TRANSPOSE] = "transpose",
384 };
385
386 static const char * const urb_allocate[2] = {
387 [0] = "",
388 [1] = "allocate"
389 };
390
391 static const char * const urb_used[2] = {
392 [0] = "",
393 [1] = "used"
394 };
395
396 static const char * const urb_complete[2] = {
397 [0] = "",
398 [1] = "complete"
399 };
400
401 static const char * const sampler_target_format[4] = {
402 [0] = "F",
403 [2] = "UD",
404 [3] = "D"
405 };
406
407
408 static int column;
409
410 static int string (FILE *file, const char *string)
411 {
412 fputs (string, file);
413 column += strlen (string);
414 return 0;
415 }
416
417 static int format (FILE *f, const char *format, ...)
418 {
419 char buf[1024];
420 va_list args;
421 va_start (args, format);
422
423 vsnprintf (buf, sizeof (buf) - 1, format, args);
424 va_end (args);
425 string (f, buf);
426 return 0;
427 }
428
429 static int newline (FILE *f)
430 {
431 putc ('\n', f);
432 column = 0;
433 return 0;
434 }
435
436 static int pad (FILE *f, int c)
437 {
438 do
439 string (f, " ");
440 while (column < c);
441 return 0;
442 }
443
444 static int control (FILE *file, const char *name, const char * const ctrl[],
445 GLuint id, int *space)
446 {
447 if (!ctrl[id]) {
448 fprintf (file, "*** invalid %s value %d ",
449 name, id);
450 return 1;
451 }
452 if (ctrl[id][0])
453 {
454 if (space && *space)
455 string (file, " ");
456 string (file, ctrl[id]);
457 if (space)
458 *space = 1;
459 }
460 return 0;
461 }
462
463 static int print_opcode (FILE *file, int id)
464 {
465 if (!opcode[id].name) {
466 format (file, "*** invalid opcode value %d ", id);
467 return 1;
468 }
469 string (file, opcode[id].name);
470 return 0;
471 }
472
473 static int three_source_type_to_reg_type(int three_source_type)
474 {
475 switch (three_source_type) {
476 case BRW_3SRC_TYPE_F:
477 return BRW_REGISTER_TYPE_F;
478 case BRW_3SRC_TYPE_D:
479 return BRW_REGISTER_TYPE_D;
480 case BRW_3SRC_TYPE_UD:
481 return BRW_REGISTER_TYPE_UD;
482 }
483 return -1;
484 }
485
486 static int reg (FILE *file, GLuint _reg_file, GLuint _reg_nr)
487 {
488 int err = 0;
489
490 /* Clear the Compr4 instruction compression bit. */
491 if (_reg_file == BRW_MESSAGE_REGISTER_FILE)
492 _reg_nr &= ~(1 << 7);
493
494 if (_reg_file == BRW_ARCHITECTURE_REGISTER_FILE) {
495 switch (_reg_nr & 0xf0) {
496 case BRW_ARF_NULL:
497 string (file, "null");
498 return -1;
499 case BRW_ARF_ADDRESS:
500 format (file, "a%d", _reg_nr & 0x0f);
501 break;
502 case BRW_ARF_ACCUMULATOR:
503 format (file, "acc%d", _reg_nr & 0x0f);
504 break;
505 case BRW_ARF_FLAG:
506 format (file, "f%d", _reg_nr & 0x0f);
507 break;
508 case BRW_ARF_MASK:
509 format (file, "mask%d", _reg_nr & 0x0f);
510 break;
511 case BRW_ARF_MASK_STACK:
512 format (file, "msd%d", _reg_nr & 0x0f);
513 break;
514 case BRW_ARF_STATE:
515 format (file, "sr%d", _reg_nr & 0x0f);
516 break;
517 case BRW_ARF_CONTROL:
518 format (file, "cr%d", _reg_nr & 0x0f);
519 break;
520 case BRW_ARF_NOTIFICATION_COUNT:
521 format (file, "n%d", _reg_nr & 0x0f);
522 break;
523 case BRW_ARF_IP:
524 string (file, "ip");
525 return -1;
526 break;
527 default:
528 format (file, "ARF%d", _reg_nr);
529 break;
530 }
531 } else {
532 err |= control (file, "src reg file", reg_file, _reg_file, NULL);
533 format (file, "%d", _reg_nr);
534 }
535 return err;
536 }
537
538 static int dest (FILE *file, struct brw_instruction *inst)
539 {
540 int err = 0;
541
542 if (inst->header.access_mode == BRW_ALIGN_1)
543 {
544 if (inst->bits1.da1.dest_address_mode == BRW_ADDRESS_DIRECT)
545 {
546 err |= reg (file, inst->bits1.da1.dest_reg_file, inst->bits1.da1.dest_reg_nr);
547 if (err == -1)
548 return 0;
549 if (inst->bits1.da1.dest_subreg_nr)
550 format (file, ".%d", inst->bits1.da1.dest_subreg_nr /
551 reg_type_size[inst->bits1.da1.dest_reg_type]);
552 string (file, "<");
553 err |= control (file, "horiz stride", horiz_stride, inst->bits1.da1.dest_horiz_stride, NULL);
554 string (file, ">");
555 err |= control (file, "dest reg encoding", reg_encoding, inst->bits1.da1.dest_reg_type, NULL);
556 }
557 else
558 {
559 string (file, "g[a0");
560 if (inst->bits1.ia1.dest_subreg_nr)
561 format (file, ".%d", inst->bits1.ia1.dest_subreg_nr /
562 reg_type_size[inst->bits1.ia1.dest_reg_type]);
563 if (inst->bits1.ia1.dest_indirect_offset)
564 format (file, " %d", inst->bits1.ia1.dest_indirect_offset);
565 string (file, "]<");
566 err |= control (file, "horiz stride", horiz_stride, inst->bits1.ia1.dest_horiz_stride, NULL);
567 string (file, ">");
568 err |= control (file, "dest reg encoding", reg_encoding, inst->bits1.ia1.dest_reg_type, NULL);
569 }
570 }
571 else
572 {
573 if (inst->bits1.da16.dest_address_mode == BRW_ADDRESS_DIRECT)
574 {
575 err |= reg (file, inst->bits1.da16.dest_reg_file, inst->bits1.da16.dest_reg_nr);
576 if (err == -1)
577 return 0;
578 if (inst->bits1.da16.dest_subreg_nr)
579 format (file, ".%d", inst->bits1.da16.dest_subreg_nr /
580 reg_type_size[inst->bits1.da16.dest_reg_type]);
581 string (file, "<1>");
582 err |= control (file, "writemask", writemask, inst->bits1.da16.dest_writemask, NULL);
583 err |= control (file, "dest reg encoding", reg_encoding, inst->bits1.da16.dest_reg_type, NULL);
584 }
585 else
586 {
587 err = 1;
588 string (file, "Indirect align16 address mode not supported");
589 }
590 }
591
592 return 0;
593 }
594
595 static int dest_3src (FILE *file, struct brw_instruction *inst)
596 {
597 int err = 0;
598 uint32_t reg_file;
599
600 if (inst->bits1.da3src.dest_reg_file)
601 reg_file = BRW_MESSAGE_REGISTER_FILE;
602 else
603 reg_file = BRW_GENERAL_REGISTER_FILE;
604
605 err |= reg (file, reg_file, inst->bits1.da3src.dest_reg_nr);
606 if (err == -1)
607 return 0;
608 if (inst->bits1.da3src.dest_subreg_nr)
609 format (file, ".%d", inst->bits1.da3src.dest_subreg_nr);
610 string (file, "<1>");
611 err |= control (file, "writemask", writemask, inst->bits1.da3src.dest_writemask, NULL);
612 err |= control (file, "dest reg encoding", reg_encoding,
613 three_source_type_to_reg_type(inst->bits1.da3src.dst_type),
614 NULL);
615
616 return 0;
617 }
618
619 static int src_align1_region (FILE *file,
620 GLuint _vert_stride, GLuint _width, GLuint _horiz_stride)
621 {
622 int err = 0;
623 string (file, "<");
624 err |= control (file, "vert stride", vert_stride, _vert_stride, NULL);
625 string (file, ",");
626 err |= control (file, "width", width, _width, NULL);
627 string (file, ",");
628 err |= control (file, "horiz_stride", horiz_stride, _horiz_stride, NULL);
629 string (file, ">");
630 return err;
631 }
632
633 static int src_da1 (FILE *file, GLuint type, GLuint _reg_file,
634 GLuint _vert_stride, GLuint _width, GLuint _horiz_stride,
635 GLuint reg_num, GLuint sub_reg_num, GLuint __abs, GLuint _negate)
636 {
637 int err = 0;
638 err |= control (file, "negate", negate, _negate, NULL);
639 err |= control (file, "abs", _abs, __abs, NULL);
640
641 err |= reg (file, _reg_file, reg_num);
642 if (err == -1)
643 return 0;
644 if (sub_reg_num)
645 format (file, ".%d", sub_reg_num / reg_type_size[type]); /* use formal style like spec */
646 src_align1_region (file, _vert_stride, _width, _horiz_stride);
647 err |= control (file, "src reg encoding", reg_encoding, type, NULL);
648 return err;
649 }
650
651 static int src_ia1 (FILE *file,
652 GLuint type,
653 GLuint _reg_file,
654 GLint _addr_imm,
655 GLuint _addr_subreg_nr,
656 GLuint _negate,
657 GLuint __abs,
658 GLuint _addr_mode,
659 GLuint _horiz_stride,
660 GLuint _width,
661 GLuint _vert_stride)
662 {
663 int err = 0;
664 err |= control (file, "negate", negate, _negate, NULL);
665 err |= control (file, "abs", _abs, __abs, NULL);
666
667 string (file, "g[a0");
668 if (_addr_subreg_nr)
669 format (file, ".%d", _addr_subreg_nr);
670 if (_addr_imm)
671 format (file, " %d", _addr_imm);
672 string (file, "]");
673 src_align1_region (file, _vert_stride, _width, _horiz_stride);
674 err |= control (file, "src reg encoding", reg_encoding, type, NULL);
675 return err;
676 }
677
678 static int src_da16 (FILE *file,
679 GLuint _reg_type,
680 GLuint _reg_file,
681 GLuint _vert_stride,
682 GLuint _reg_nr,
683 GLuint _subreg_nr,
684 GLuint __abs,
685 GLuint _negate,
686 GLuint swz_x,
687 GLuint swz_y,
688 GLuint swz_z,
689 GLuint swz_w)
690 {
691 int err = 0;
692 err |= control (file, "negate", negate, _negate, NULL);
693 err |= control (file, "abs", _abs, __abs, NULL);
694
695 err |= reg (file, _reg_file, _reg_nr);
696 if (err == -1)
697 return 0;
698 if (_subreg_nr)
699 /* bit4 for subreg number byte addressing. Make this same meaning as
700 in da1 case, so output looks consistent. */
701 format (file, ".%d", 16 / reg_type_size[_reg_type]);
702 string (file, "<");
703 err |= control (file, "vert stride", vert_stride, _vert_stride, NULL);
704 string (file, ",4,1>");
705 /*
706 * Three kinds of swizzle display:
707 * identity - nothing printed
708 * 1->all - print the single channel
709 * 1->1 - print the mapping
710 */
711 if (swz_x == BRW_CHANNEL_X &&
712 swz_y == BRW_CHANNEL_Y &&
713 swz_z == BRW_CHANNEL_Z &&
714 swz_w == BRW_CHANNEL_W)
715 {
716 ;
717 }
718 else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w)
719 {
720 string (file, ".");
721 err |= control (file, "channel select", chan_sel, swz_x, NULL);
722 }
723 else
724 {
725 string (file, ".");
726 err |= control (file, "channel select", chan_sel, swz_x, NULL);
727 err |= control (file, "channel select", chan_sel, swz_y, NULL);
728 err |= control (file, "channel select", chan_sel, swz_z, NULL);
729 err |= control (file, "channel select", chan_sel, swz_w, NULL);
730 }
731 err |= control (file, "src da16 reg type", reg_encoding, _reg_type, NULL);
732 return err;
733 }
734
735 static int src0_3src (FILE *file, struct brw_instruction *inst)
736 {
737 int err = 0;
738 GLuint swz_x = (inst->bits2.da3src.src0_swizzle >> 0) & 0x3;
739 GLuint swz_y = (inst->bits2.da3src.src0_swizzle >> 2) & 0x3;
740 GLuint swz_z = (inst->bits2.da3src.src0_swizzle >> 4) & 0x3;
741 GLuint swz_w = (inst->bits2.da3src.src0_swizzle >> 6) & 0x3;
742
743 err |= control (file, "negate", negate, inst->bits1.da3src.src0_negate, NULL);
744 err |= control (file, "abs", _abs, inst->bits1.da3src.src0_abs, NULL);
745
746 err |= reg (file, BRW_GENERAL_REGISTER_FILE, inst->bits2.da3src.src0_reg_nr);
747 if (err == -1)
748 return 0;
749 if (inst->bits2.da3src.src0_subreg_nr)
750 format (file, ".%d", inst->bits2.da3src.src0_subreg_nr);
751 string (file, "<4,1,1>");
752 err |= control (file, "src da16 reg type", reg_encoding,
753 three_source_type_to_reg_type(inst->bits1.da3src.src_type),
754 NULL);
755 /*
756 * Three kinds of swizzle display:
757 * identity - nothing printed
758 * 1->all - print the single channel
759 * 1->1 - print the mapping
760 */
761 if (swz_x == BRW_CHANNEL_X &&
762 swz_y == BRW_CHANNEL_Y &&
763 swz_z == BRW_CHANNEL_Z &&
764 swz_w == BRW_CHANNEL_W)
765 {
766 ;
767 }
768 else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w)
769 {
770 string (file, ".");
771 err |= control (file, "channel select", chan_sel, swz_x, NULL);
772 }
773 else
774 {
775 string (file, ".");
776 err |= control (file, "channel select", chan_sel, swz_x, NULL);
777 err |= control (file, "channel select", chan_sel, swz_y, NULL);
778 err |= control (file, "channel select", chan_sel, swz_z, NULL);
779 err |= control (file, "channel select", chan_sel, swz_w, NULL);
780 }
781 return err;
782 }
783
784 static int src1_3src (FILE *file, struct brw_instruction *inst)
785 {
786 int err = 0;
787 GLuint swz_x = (inst->bits2.da3src.src1_swizzle >> 0) & 0x3;
788 GLuint swz_y = (inst->bits2.da3src.src1_swizzle >> 2) & 0x3;
789 GLuint swz_z = (inst->bits2.da3src.src1_swizzle >> 4) & 0x3;
790 GLuint swz_w = (inst->bits2.da3src.src1_swizzle >> 6) & 0x3;
791 GLuint src1_subreg_nr = (inst->bits2.da3src.src1_subreg_nr_low |
792 (inst->bits3.da3src.src1_subreg_nr_high << 2));
793
794 err |= control (file, "negate", negate, inst->bits1.da3src.src1_negate,
795 NULL);
796 err |= control (file, "abs", _abs, inst->bits1.da3src.src1_abs, NULL);
797
798 err |= reg (file, BRW_GENERAL_REGISTER_FILE,
799 inst->bits3.da3src.src1_reg_nr);
800 if (err == -1)
801 return 0;
802 if (src1_subreg_nr)
803 format (file, ".%d", src1_subreg_nr);
804 string (file, "<4,1,1>");
805 err |= control (file, "src da16 reg type", reg_encoding,
806 three_source_type_to_reg_type(inst->bits1.da3src.src_type),
807 NULL);
808 /*
809 * Three kinds of swizzle display:
810 * identity - nothing printed
811 * 1->all - print the single channel
812 * 1->1 - print the mapping
813 */
814 if (swz_x == BRW_CHANNEL_X &&
815 swz_y == BRW_CHANNEL_Y &&
816 swz_z == BRW_CHANNEL_Z &&
817 swz_w == BRW_CHANNEL_W)
818 {
819 ;
820 }
821 else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w)
822 {
823 string (file, ".");
824 err |= control (file, "channel select", chan_sel, swz_x, NULL);
825 }
826 else
827 {
828 string (file, ".");
829 err |= control (file, "channel select", chan_sel, swz_x, NULL);
830 err |= control (file, "channel select", chan_sel, swz_y, NULL);
831 err |= control (file, "channel select", chan_sel, swz_z, NULL);
832 err |= control (file, "channel select", chan_sel, swz_w, NULL);
833 }
834 return err;
835 }
836
837
838 static int src2_3src (FILE *file, struct brw_instruction *inst)
839 {
840 int err = 0;
841 GLuint swz_x = (inst->bits3.da3src.src2_swizzle >> 0) & 0x3;
842 GLuint swz_y = (inst->bits3.da3src.src2_swizzle >> 2) & 0x3;
843 GLuint swz_z = (inst->bits3.da3src.src2_swizzle >> 4) & 0x3;
844 GLuint swz_w = (inst->bits3.da3src.src2_swizzle >> 6) & 0x3;
845
846 err |= control (file, "negate", negate, inst->bits1.da3src.src2_negate,
847 NULL);
848 err |= control (file, "abs", _abs, inst->bits1.da3src.src2_abs, NULL);
849
850 err |= reg (file, BRW_GENERAL_REGISTER_FILE,
851 inst->bits3.da3src.src2_reg_nr);
852 if (err == -1)
853 return 0;
854 if (inst->bits3.da3src.src2_subreg_nr)
855 format (file, ".%d", inst->bits3.da3src.src2_subreg_nr);
856 string (file, "<4,1,1>");
857 err |= control (file, "src da16 reg type", reg_encoding,
858 three_source_type_to_reg_type(inst->bits1.da3src.src_type),
859 NULL);
860 /*
861 * Three kinds of swizzle display:
862 * identity - nothing printed
863 * 1->all - print the single channel
864 * 1->1 - print the mapping
865 */
866 if (swz_x == BRW_CHANNEL_X &&
867 swz_y == BRW_CHANNEL_Y &&
868 swz_z == BRW_CHANNEL_Z &&
869 swz_w == BRW_CHANNEL_W)
870 {
871 ;
872 }
873 else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w)
874 {
875 string (file, ".");
876 err |= control (file, "channel select", chan_sel, swz_x, NULL);
877 }
878 else
879 {
880 string (file, ".");
881 err |= control (file, "channel select", chan_sel, swz_x, NULL);
882 err |= control (file, "channel select", chan_sel, swz_y, NULL);
883 err |= control (file, "channel select", chan_sel, swz_z, NULL);
884 err |= control (file, "channel select", chan_sel, swz_w, NULL);
885 }
886 return err;
887 }
888
889 static int imm (FILE *file, GLuint type, struct brw_instruction *inst) {
890 switch (type) {
891 case BRW_REGISTER_TYPE_UD:
892 format (file, "0x%08xUD", inst->bits3.ud);
893 break;
894 case BRW_REGISTER_TYPE_D:
895 format (file, "%dD", inst->bits3.d);
896 break;
897 case BRW_REGISTER_TYPE_UW:
898 format (file, "0x%04xUW", (uint16_t) inst->bits3.ud);
899 break;
900 case BRW_REGISTER_TYPE_W:
901 format (file, "%dW", (int16_t) inst->bits3.d);
902 break;
903 case BRW_REGISTER_TYPE_UB:
904 format (file, "0x%02xUB", (int8_t) inst->bits3.ud);
905 break;
906 case BRW_REGISTER_TYPE_VF:
907 format (file, "Vector Float");
908 break;
909 case BRW_REGISTER_TYPE_V:
910 format (file, "0x%08xV", inst->bits3.ud);
911 break;
912 case BRW_REGISTER_TYPE_F:
913 format (file, "%-gF", inst->bits3.f);
914 }
915 return 0;
916 }
917
918 static int src0 (FILE *file, struct brw_instruction *inst)
919 {
920 if (inst->bits1.da1.src0_reg_file == BRW_IMMEDIATE_VALUE)
921 return imm (file, inst->bits1.da1.src0_reg_type,
922 inst);
923 else if (inst->header.access_mode == BRW_ALIGN_1)
924 {
925 if (inst->bits2.da1.src0_address_mode == BRW_ADDRESS_DIRECT)
926 {
927 return src_da1 (file,
928 inst->bits1.da1.src0_reg_type,
929 inst->bits1.da1.src0_reg_file,
930 inst->bits2.da1.src0_vert_stride,
931 inst->bits2.da1.src0_width,
932 inst->bits2.da1.src0_horiz_stride,
933 inst->bits2.da1.src0_reg_nr,
934 inst->bits2.da1.src0_subreg_nr,
935 inst->bits2.da1.src0_abs,
936 inst->bits2.da1.src0_negate);
937 }
938 else
939 {
940 return src_ia1 (file,
941 inst->bits1.ia1.src0_reg_type,
942 inst->bits1.ia1.src0_reg_file,
943 inst->bits2.ia1.src0_indirect_offset,
944 inst->bits2.ia1.src0_subreg_nr,
945 inst->bits2.ia1.src0_negate,
946 inst->bits2.ia1.src0_abs,
947 inst->bits2.ia1.src0_address_mode,
948 inst->bits2.ia1.src0_horiz_stride,
949 inst->bits2.ia1.src0_width,
950 inst->bits2.ia1.src0_vert_stride);
951 }
952 }
953 else
954 {
955 if (inst->bits2.da16.src0_address_mode == BRW_ADDRESS_DIRECT)
956 {
957 return src_da16 (file,
958 inst->bits1.da16.src0_reg_type,
959 inst->bits1.da16.src0_reg_file,
960 inst->bits2.da16.src0_vert_stride,
961 inst->bits2.da16.src0_reg_nr,
962 inst->bits2.da16.src0_subreg_nr,
963 inst->bits2.da16.src0_abs,
964 inst->bits2.da16.src0_negate,
965 inst->bits2.da16.src0_swz_x,
966 inst->bits2.da16.src0_swz_y,
967 inst->bits2.da16.src0_swz_z,
968 inst->bits2.da16.src0_swz_w);
969 }
970 else
971 {
972 string (file, "Indirect align16 address mode not supported");
973 return 1;
974 }
975 }
976 }
977
978 static int src1 (FILE *file, struct brw_instruction *inst)
979 {
980 if (inst->bits1.da1.src1_reg_file == BRW_IMMEDIATE_VALUE)
981 return imm (file, inst->bits1.da1.src1_reg_type,
982 inst);
983 else if (inst->header.access_mode == BRW_ALIGN_1)
984 {
985 if (inst->bits3.da1.src1_address_mode == BRW_ADDRESS_DIRECT)
986 {
987 return src_da1 (file,
988 inst->bits1.da1.src1_reg_type,
989 inst->bits1.da1.src1_reg_file,
990 inst->bits3.da1.src1_vert_stride,
991 inst->bits3.da1.src1_width,
992 inst->bits3.da1.src1_horiz_stride,
993 inst->bits3.da1.src1_reg_nr,
994 inst->bits3.da1.src1_subreg_nr,
995 inst->bits3.da1.src1_abs,
996 inst->bits3.da1.src1_negate);
997 }
998 else
999 {
1000 return src_ia1 (file,
1001 inst->bits1.ia1.src1_reg_type,
1002 inst->bits1.ia1.src1_reg_file,
1003 inst->bits3.ia1.src1_indirect_offset,
1004 inst->bits3.ia1.src1_subreg_nr,
1005 inst->bits3.ia1.src1_negate,
1006 inst->bits3.ia1.src1_abs,
1007 inst->bits3.ia1.src1_address_mode,
1008 inst->bits3.ia1.src1_horiz_stride,
1009 inst->bits3.ia1.src1_width,
1010 inst->bits3.ia1.src1_vert_stride);
1011 }
1012 }
1013 else
1014 {
1015 if (inst->bits3.da16.src1_address_mode == BRW_ADDRESS_DIRECT)
1016 {
1017 return src_da16 (file,
1018 inst->bits1.da16.src1_reg_type,
1019 inst->bits1.da16.src1_reg_file,
1020 inst->bits3.da16.src1_vert_stride,
1021 inst->bits3.da16.src1_reg_nr,
1022 inst->bits3.da16.src1_subreg_nr,
1023 inst->bits3.da16.src1_abs,
1024 inst->bits3.da16.src1_negate,
1025 inst->bits3.da16.src1_swz_x,
1026 inst->bits3.da16.src1_swz_y,
1027 inst->bits3.da16.src1_swz_z,
1028 inst->bits3.da16.src1_swz_w);
1029 }
1030 else
1031 {
1032 string (file, "Indirect align16 address mode not supported");
1033 return 1;
1034 }
1035 }
1036 }
1037
1038 int esize[6] = {
1039 [0] = 1,
1040 [1] = 2,
1041 [2] = 4,
1042 [3] = 8,
1043 [4] = 16,
1044 [5] = 32,
1045 };
1046
1047 static int qtr_ctrl(FILE *file, struct brw_instruction *inst)
1048 {
1049 int qtr_ctl = inst->header.compression_control;
1050 int exec_size = esize[inst->header.execution_size];
1051
1052 if (exec_size == 8) {
1053 switch (qtr_ctl) {
1054 case 0:
1055 string (file, " 1Q");
1056 break;
1057 case 1:
1058 string (file, " 2Q");
1059 break;
1060 case 2:
1061 string (file, " 3Q");
1062 break;
1063 case 3:
1064 string (file, " 4Q");
1065 break;
1066 }
1067 } else if (exec_size == 16){
1068 if (qtr_ctl < 2)
1069 string (file, " 1H");
1070 else
1071 string (file, " 2H");
1072 }
1073 return 0;
1074 }
1075
1076 int brw_disasm (FILE *file, struct brw_instruction *inst, int gen)
1077 {
1078 int err = 0;
1079 int space = 0;
1080
1081 if (inst->header.predicate_control) {
1082 string (file, "(");
1083 err |= control (file, "predicate inverse", pred_inv, inst->header.predicate_inverse, NULL);
1084 format (file, "f%d", gen >= 7 ? inst->bits2.da1.flag_reg_nr : 0);
1085 if (inst->bits2.da1.flag_subreg_nr)
1086 format (file, ".%d", inst->bits2.da1.flag_subreg_nr);
1087 if (inst->header.access_mode == BRW_ALIGN_1)
1088 err |= control (file, "predicate control align1", pred_ctrl_align1,
1089 inst->header.predicate_control, NULL);
1090 else
1091 err |= control (file, "predicate control align16", pred_ctrl_align16,
1092 inst->header.predicate_control, NULL);
1093 string (file, ") ");
1094 }
1095
1096 err |= print_opcode (file, inst->header.opcode);
1097 err |= control (file, "saturate", saturate, inst->header.saturate, NULL);
1098 err |= control (file, "debug control", debug_ctrl, inst->header.debug_control, NULL);
1099
1100 if (inst->header.opcode == BRW_OPCODE_MATH) {
1101 string (file, " ");
1102 err |= control (file, "function", math_function,
1103 inst->header.destreg__conditionalmod, NULL);
1104 } else if (inst->header.opcode != BRW_OPCODE_SEND &&
1105 inst->header.opcode != BRW_OPCODE_SENDC) {
1106 err |= control (file, "conditional modifier", conditional_modifier,
1107 inst->header.destreg__conditionalmod, NULL);
1108
1109 /* If we're using the conditional modifier, print which flags reg is
1110 * used for it. Note that on gen6+, the embedded-condition SEL and
1111 * control flow doesn't update flags.
1112 */
1113 if (inst->header.destreg__conditionalmod &&
1114 (gen < 6 || (inst->header.opcode != BRW_OPCODE_SEL &&
1115 inst->header.opcode != BRW_OPCODE_IF &&
1116 inst->header.opcode != BRW_OPCODE_WHILE))) {
1117 format (file, ".f%d", gen >= 7 ? inst->bits2.da1.flag_reg_nr : 0);
1118 if (inst->bits2.da1.flag_subreg_nr)
1119 format (file, ".%d", inst->bits2.da1.flag_subreg_nr);
1120 }
1121 }
1122
1123 if (inst->header.opcode != BRW_OPCODE_NOP) {
1124 string (file, "(");
1125 err |= control (file, "execution size", exec_size, inst->header.execution_size, NULL);
1126 string (file, ")");
1127 }
1128
1129 if (inst->header.opcode == BRW_OPCODE_SEND && gen < 6)
1130 format (file, " %d", inst->header.destreg__conditionalmod);
1131
1132 if (opcode[inst->header.opcode].nsrc == 3) {
1133 pad (file, 16);
1134 err |= dest_3src (file, inst);
1135
1136 pad (file, 32);
1137 err |= src0_3src (file, inst);
1138
1139 pad (file, 48);
1140 err |= src1_3src (file, inst);
1141
1142 pad (file, 64);
1143 err |= src2_3src (file, inst);
1144 } else {
1145 if (opcode[inst->header.opcode].ndst > 0) {
1146 pad (file, 16);
1147 err |= dest (file, inst);
1148 } else if (gen == 7 && (inst->header.opcode == BRW_OPCODE_ELSE ||
1149 inst->header.opcode == BRW_OPCODE_ENDIF ||
1150 inst->header.opcode == BRW_OPCODE_WHILE)) {
1151 format (file, " %d", inst->bits3.break_cont.jip);
1152 } else if (gen == 6 && (inst->header.opcode == BRW_OPCODE_IF ||
1153 inst->header.opcode == BRW_OPCODE_ELSE ||
1154 inst->header.opcode == BRW_OPCODE_ENDIF ||
1155 inst->header.opcode == BRW_OPCODE_WHILE)) {
1156 format (file, " %d", inst->bits1.branch_gen6.jump_count);
1157 } else if ((gen >= 6 && (inst->header.opcode == BRW_OPCODE_BREAK ||
1158 inst->header.opcode == BRW_OPCODE_CONTINUE ||
1159 inst->header.opcode == BRW_OPCODE_HALT)) ||
1160 (gen == 7 && inst->header.opcode == BRW_OPCODE_IF)) {
1161 format (file, " %d %d", inst->bits3.break_cont.uip, inst->bits3.break_cont.jip);
1162 } else if (inst->header.opcode == BRW_OPCODE_JMPI) {
1163 format (file, " %d", inst->bits3.d);
1164 }
1165
1166 if (opcode[inst->header.opcode].nsrc > 0) {
1167 pad (file, 32);
1168 err |= src0 (file, inst);
1169 }
1170 if (opcode[inst->header.opcode].nsrc > 1) {
1171 pad (file, 48);
1172 err |= src1 (file, inst);
1173 }
1174 }
1175
1176 if (inst->header.opcode == BRW_OPCODE_SEND ||
1177 inst->header.opcode == BRW_OPCODE_SENDC) {
1178 enum brw_message_target target;
1179
1180 if (gen >= 6)
1181 target = inst->header.destreg__conditionalmod;
1182 else if (gen == 5)
1183 target = inst->bits2.send_gen5.sfid;
1184 else
1185 target = inst->bits3.generic.msg_target;
1186
1187 newline (file);
1188 pad (file, 16);
1189 space = 0;
1190
1191 if (gen >= 6) {
1192 err |= control (file, "target function", target_function_gen6,
1193 target, &space);
1194 } else {
1195 err |= control (file, "target function", target_function,
1196 target, &space);
1197 }
1198
1199 switch (target) {
1200 case BRW_SFID_MATH:
1201 err |= control (file, "math function", math_function,
1202 inst->bits3.math.function, &space);
1203 err |= control (file, "math saturate", math_saturate,
1204 inst->bits3.math.saturate, &space);
1205 err |= control (file, "math signed", math_signed,
1206 inst->bits3.math.int_type, &space);
1207 err |= control (file, "math scalar", math_scalar,
1208 inst->bits3.math.data_type, &space);
1209 err |= control (file, "math precision", math_precision,
1210 inst->bits3.math.precision, &space);
1211 break;
1212 case BRW_SFID_SAMPLER:
1213 if (gen >= 7) {
1214 format (file, " (%d, %d, %d, %d)",
1215 inst->bits3.sampler_gen7.binding_table_index,
1216 inst->bits3.sampler_gen7.sampler,
1217 inst->bits3.sampler_gen7.msg_type,
1218 inst->bits3.sampler_gen7.simd_mode);
1219 } else if (gen >= 5) {
1220 format (file, " (%d, %d, %d, %d)",
1221 inst->bits3.sampler_gen5.binding_table_index,
1222 inst->bits3.sampler_gen5.sampler,
1223 inst->bits3.sampler_gen5.msg_type,
1224 inst->bits3.sampler_gen5.simd_mode);
1225 } else if (0 /* FINISHME: is_g4x */) {
1226 format (file, " (%d, %d)",
1227 inst->bits3.sampler_g4x.binding_table_index,
1228 inst->bits3.sampler_g4x.sampler);
1229 } else {
1230 format (file, " (%d, %d, ",
1231 inst->bits3.sampler.binding_table_index,
1232 inst->bits3.sampler.sampler);
1233 err |= control (file, "sampler target format",
1234 sampler_target_format,
1235 inst->bits3.sampler.return_format, NULL);
1236 string (file, ")");
1237 }
1238 break;
1239 case BRW_SFID_DATAPORT_READ:
1240 if (gen >= 6) {
1241 format (file, " (%d, %d, %d, %d)",
1242 inst->bits3.gen6_dp.binding_table_index,
1243 inst->bits3.gen6_dp.msg_control,
1244 inst->bits3.gen6_dp.msg_type,
1245 inst->bits3.gen6_dp.send_commit_msg);
1246 } else if (gen >= 5 /* FINISHME: || is_g4x */) {
1247 format (file, " (%d, %d, %d)",
1248 inst->bits3.dp_read_gen5.binding_table_index,
1249 inst->bits3.dp_read_gen5.msg_control,
1250 inst->bits3.dp_read_gen5.msg_type);
1251 } else {
1252 format (file, " (%d, %d, %d)",
1253 inst->bits3.dp_read.binding_table_index,
1254 inst->bits3.dp_read.msg_control,
1255 inst->bits3.dp_read.msg_type);
1256 }
1257 break;
1258
1259 case BRW_SFID_DATAPORT_WRITE:
1260 if (gen >= 7) {
1261 format (file, " (");
1262
1263 err |= control (file, "DP rc message type",
1264 dp_rc_msg_type_gen6,
1265 inst->bits3.gen7_dp.msg_type, &space);
1266
1267 format (file, ", %d, %d, %d)",
1268 inst->bits3.gen7_dp.binding_table_index,
1269 inst->bits3.gen7_dp.msg_control,
1270 inst->bits3.gen7_dp.msg_type);
1271 } else if (gen == 6) {
1272 format (file, " (");
1273
1274 err |= control (file, "DP rc message type",
1275 dp_rc_msg_type_gen6,
1276 inst->bits3.gen6_dp.msg_type, &space);
1277
1278 format (file, ", %d, %d, %d, %d)",
1279 inst->bits3.gen6_dp.binding_table_index,
1280 inst->bits3.gen6_dp.msg_control,
1281 inst->bits3.gen6_dp.msg_type,
1282 inst->bits3.gen6_dp.send_commit_msg);
1283 } else {
1284 format (file, " (%d, %d, %d, %d)",
1285 inst->bits3.dp_write.binding_table_index,
1286 (inst->bits3.dp_write.last_render_target << 3) |
1287 inst->bits3.dp_write.msg_control,
1288 inst->bits3.dp_write.msg_type,
1289 inst->bits3.dp_write.send_commit_msg);
1290 }
1291 break;
1292
1293 case BRW_SFID_URB:
1294 if (gen >= 5) {
1295 format (file, " %d", inst->bits3.urb_gen5.offset);
1296 } else {
1297 format (file, " %d", inst->bits3.urb.offset);
1298 }
1299
1300 space = 1;
1301 if (gen >= 5) {
1302 err |= control (file, "urb opcode", urb_opcode,
1303 inst->bits3.urb_gen5.opcode, &space);
1304 }
1305 err |= control (file, "urb swizzle", urb_swizzle,
1306 inst->bits3.urb.swizzle_control, &space);
1307 err |= control (file, "urb allocate", urb_allocate,
1308 inst->bits3.urb.allocate, &space);
1309 err |= control (file, "urb used", urb_used,
1310 inst->bits3.urb.used, &space);
1311 err |= control (file, "urb complete", urb_complete,
1312 inst->bits3.urb.complete, &space);
1313 break;
1314 case BRW_SFID_THREAD_SPAWNER:
1315 break;
1316 case GEN7_SFID_DATAPORT_DATA_CACHE:
1317 format (file, " (%d, %d, %d)",
1318 inst->bits3.gen7_dp.binding_table_index,
1319 inst->bits3.gen7_dp.msg_control,
1320 inst->bits3.gen7_dp.msg_type);
1321 break;
1322
1323
1324 default:
1325 format (file, "unsupported target %d", target);
1326 break;
1327 }
1328 if (space)
1329 string (file, " ");
1330 if (gen >= 5) {
1331 format (file, "mlen %d",
1332 inst->bits3.generic_gen5.msg_length);
1333 format (file, " rlen %d",
1334 inst->bits3.generic_gen5.response_length);
1335 } else {
1336 format (file, "mlen %d",
1337 inst->bits3.generic.msg_length);
1338 format (file, " rlen %d",
1339 inst->bits3.generic.response_length);
1340 }
1341 }
1342 pad (file, 64);
1343 if (inst->header.opcode != BRW_OPCODE_NOP) {
1344 string (file, "{");
1345 space = 1;
1346 err |= control(file, "access mode", access_mode, inst->header.access_mode, &space);
1347 if (gen >= 6)
1348 err |= control (file, "write enable control", wectrl, inst->header.mask_control, &space);
1349 else
1350 err |= control (file, "mask control", mask_ctrl, inst->header.mask_control, &space);
1351 err |= control (file, "dependency control", dep_ctrl, inst->header.dependency_control, &space);
1352
1353 if (gen >= 6)
1354 err |= qtr_ctrl (file, inst);
1355 else {
1356 if (inst->header.compression_control == BRW_COMPRESSION_COMPRESSED &&
1357 opcode[inst->header.opcode].ndst > 0 &&
1358 inst->bits1.da1.dest_reg_file == BRW_MESSAGE_REGISTER_FILE &&
1359 inst->bits1.da1.dest_reg_nr & (1 << 7)) {
1360 format (file, " compr4");
1361 } else {
1362 err |= control (file, "compression control", compr_ctrl,
1363 inst->header.compression_control, &space);
1364 }
1365 }
1366
1367 err |= control (file, "thread control", thread_ctrl, inst->header.thread_control, &space);
1368 if (gen >= 6)
1369 err |= control (file, "acc write control", accwr, inst->header.acc_wr_control, &space);
1370 if (inst->header.opcode == BRW_OPCODE_SEND ||
1371 inst->header.opcode == BRW_OPCODE_SENDC)
1372 err |= control (file, "end of thread", end_of_thread,
1373 inst->bits3.generic.end_of_thread, &space);
1374 if (space)
1375 string (file, " ");
1376 string (file, "}");
1377 }
1378 string (file, ";");
1379 newline (file);
1380 return err;
1381 }