2 * Copyright © 2008 Keith Packard
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
30 #include "brw_context.h"
31 #include "brw_defines.h"
35 const struct opcode_desc opcode_descs
[128] = {
36 [BRW_OPCODE_MOV
] = { .name
= "mov", .nsrc
= 1, .ndst
= 1 },
37 [BRW_OPCODE_FRC
] = { .name
= "frc", .nsrc
= 1, .ndst
= 1 },
38 [BRW_OPCODE_RNDU
] = { .name
= "rndu", .nsrc
= 1, .ndst
= 1 },
39 [BRW_OPCODE_RNDD
] = { .name
= "rndd", .nsrc
= 1, .ndst
= 1 },
40 [BRW_OPCODE_RNDE
] = { .name
= "rnde", .nsrc
= 1, .ndst
= 1 },
41 [BRW_OPCODE_RNDZ
] = { .name
= "rndz", .nsrc
= 1, .ndst
= 1 },
42 [BRW_OPCODE_NOT
] = { .name
= "not", .nsrc
= 1, .ndst
= 1 },
43 [BRW_OPCODE_LZD
] = { .name
= "lzd", .nsrc
= 1, .ndst
= 1 },
44 [BRW_OPCODE_F32TO16
] = { .name
= "f32to16", .nsrc
= 1, .ndst
= 1 },
45 [BRW_OPCODE_F16TO32
] = { .name
= "f16to32", .nsrc
= 1, .ndst
= 1 },
46 [BRW_OPCODE_BFREV
] = { .name
= "bfrev", .nsrc
= 1, .ndst
= 1 },
47 [BRW_OPCODE_FBH
] = { .name
= "fbh", .nsrc
= 1, .ndst
= 1 },
48 [BRW_OPCODE_FBL
] = { .name
= "fbl", .nsrc
= 1, .ndst
= 1 },
49 [BRW_OPCODE_CBIT
] = { .name
= "cbit", .nsrc
= 1, .ndst
= 1 },
51 [BRW_OPCODE_MUL
] = { .name
= "mul", .nsrc
= 2, .ndst
= 1 },
52 [BRW_OPCODE_MAC
] = { .name
= "mac", .nsrc
= 2, .ndst
= 1 },
53 [BRW_OPCODE_MACH
] = { .name
= "mach", .nsrc
= 2, .ndst
= 1 },
54 [BRW_OPCODE_LINE
] = { .name
= "line", .nsrc
= 2, .ndst
= 1 },
55 [BRW_OPCODE_PLN
] = { .name
= "pln", .nsrc
= 2, .ndst
= 1 },
56 [BRW_OPCODE_MAD
] = { .name
= "mad", .nsrc
= 3, .ndst
= 1 },
57 [BRW_OPCODE_LRP
] = { .name
= "lrp", .nsrc
= 3, .ndst
= 1 },
58 [BRW_OPCODE_SAD2
] = { .name
= "sad2", .nsrc
= 2, .ndst
= 1 },
59 [BRW_OPCODE_SADA2
] = { .name
= "sada2", .nsrc
= 2, .ndst
= 1 },
60 [BRW_OPCODE_DP4
] = { .name
= "dp4", .nsrc
= 2, .ndst
= 1 },
61 [BRW_OPCODE_DPH
] = { .name
= "dph", .nsrc
= 2, .ndst
= 1 },
62 [BRW_OPCODE_DP3
] = { .name
= "dp3", .nsrc
= 2, .ndst
= 1 },
63 [BRW_OPCODE_DP2
] = { .name
= "dp2", .nsrc
= 2, .ndst
= 1 },
64 [BRW_OPCODE_MATH
] = { .name
= "math", .nsrc
= 2, .ndst
= 1 },
66 [BRW_OPCODE_AVG
] = { .name
= "avg", .nsrc
= 2, .ndst
= 1 },
67 [BRW_OPCODE_ADD
] = { .name
= "add", .nsrc
= 2, .ndst
= 1 },
68 [BRW_OPCODE_SEL
] = { .name
= "sel", .nsrc
= 2, .ndst
= 1 },
69 [BRW_OPCODE_AND
] = { .name
= "and", .nsrc
= 2, .ndst
= 1 },
70 [BRW_OPCODE_OR
] = { .name
= "or", .nsrc
= 2, .ndst
= 1 },
71 [BRW_OPCODE_XOR
] = { .name
= "xor", .nsrc
= 2, .ndst
= 1 },
72 [BRW_OPCODE_SHR
] = { .name
= "shr", .nsrc
= 2, .ndst
= 1 },
73 [BRW_OPCODE_SHL
] = { .name
= "shl", .nsrc
= 2, .ndst
= 1 },
74 [BRW_OPCODE_ASR
] = { .name
= "asr", .nsrc
= 2, .ndst
= 1 },
75 [BRW_OPCODE_CMP
] = { .name
= "cmp", .nsrc
= 2, .ndst
= 1 },
76 [BRW_OPCODE_CMPN
] = { .name
= "cmpn", .nsrc
= 2, .ndst
= 1 },
77 [BRW_OPCODE_CSEL
] = { .name
= "csel", .nsrc
= 3, .ndst
= 1 },
78 [BRW_OPCODE_BFE
] = { .name
= "bfe", .nsrc
= 3, .ndst
= 1 },
79 [BRW_OPCODE_BFI1
] = { .name
= "bfi1", .nsrc
= 2, .ndst
= 1 },
80 [BRW_OPCODE_BFI2
] = { .name
= "bfi2", .nsrc
= 3, .ndst
= 1 },
81 [BRW_OPCODE_ADDC
] = { .name
= "addc", .nsrc
= 2, .ndst
= 1 },
82 [BRW_OPCODE_SUBB
] = { .name
= "subb", .nsrc
= 2, .ndst
= 1 },
84 [BRW_OPCODE_SEND
] = { .name
= "send", .nsrc
= 1, .ndst
= 1 },
85 [BRW_OPCODE_SENDC
] = { .name
= "sendc", .nsrc
= 1, .ndst
= 1 },
86 [BRW_OPCODE_NOP
] = { .name
= "nop", .nsrc
= 0, .ndst
= 0 },
87 [BRW_OPCODE_NENOP
] = { .name
= "nenop", .nsrc
= 0, .ndst
= 0 },
88 [BRW_OPCODE_JMPI
] = { .name
= "jmpi", .nsrc
= 0, .ndst
= 0 },
89 [BRW_OPCODE_IF
] = { .name
= "if", .nsrc
= 2, .ndst
= 0 },
90 [BRW_OPCODE_IFF
] = { .name
= "iff", .nsrc
= 2, .ndst
= 1 },
91 [BRW_OPCODE_WHILE
] = { .name
= "while", .nsrc
= 2, .ndst
= 0 },
92 [BRW_OPCODE_ELSE
] = { .name
= "else", .nsrc
= 2, .ndst
= 0 },
93 [BRW_OPCODE_BREAK
] = { .name
= "break", .nsrc
= 2, .ndst
= 0 },
94 [BRW_OPCODE_CONTINUE
] = { .name
= "cont", .nsrc
= 1, .ndst
= 0 },
95 [BRW_OPCODE_HALT
] = { .name
= "halt", .nsrc
= 1, .ndst
= 0 },
96 [BRW_OPCODE_MSAVE
] = { .name
= "msave", .nsrc
= 1, .ndst
= 1 },
97 [BRW_OPCODE_PUSH
] = { .name
= "push", .nsrc
= 1, .ndst
= 1 },
98 [BRW_OPCODE_MRESTORE
] = { .name
= "mrest", .nsrc
= 1, .ndst
= 1 },
99 [BRW_OPCODE_POP
] = { .name
= "pop", .nsrc
= 2, .ndst
= 0 },
100 [BRW_OPCODE_WAIT
] = { .name
= "wait", .nsrc
= 1, .ndst
= 0 },
101 [BRW_OPCODE_DO
] = { .name
= "do", .nsrc
= 0, .ndst
= 0 },
102 [BRW_OPCODE_ENDIF
] = { .name
= "endif", .nsrc
= 2, .ndst
= 0 },
106 has_jip(const struct brw_device_info
*devinfo
, enum opcode opcode
)
108 if (devinfo
->gen
< 6)
111 return opcode
== BRW_OPCODE_IF
||
112 opcode
== BRW_OPCODE_ELSE
||
113 opcode
== BRW_OPCODE_ENDIF
||
114 opcode
== BRW_OPCODE_WHILE
||
115 opcode
== BRW_OPCODE_BREAK
||
116 opcode
== BRW_OPCODE_CONTINUE
||
117 opcode
== BRW_OPCODE_HALT
;
121 has_uip(const struct brw_device_info
*devinfo
, enum opcode opcode
)
123 if (devinfo
->gen
< 6)
126 return (devinfo
->gen
>= 7 && opcode
== BRW_OPCODE_IF
) ||
127 (devinfo
->gen
>= 8 && opcode
== BRW_OPCODE_ELSE
) ||
128 opcode
== BRW_OPCODE_BREAK
||
129 opcode
== BRW_OPCODE_CONTINUE
||
130 opcode
== BRW_OPCODE_HALT
;
134 has_branch_ctrl(const struct brw_device_info
*devinfo
, enum opcode opcode
)
136 if (devinfo
->gen
< 8)
139 return opcode
== BRW_OPCODE_IF
||
140 opcode
== BRW_OPCODE_ELSE
||
141 opcode
== BRW_OPCODE_GOTO
;
145 is_logic_instruction(unsigned opcode
)
147 return opcode
== BRW_OPCODE_AND
||
148 opcode
== BRW_OPCODE_NOT
||
149 opcode
== BRW_OPCODE_OR
||
150 opcode
== BRW_OPCODE_XOR
;
153 const char *const conditional_modifier
[16] = {
154 [BRW_CONDITIONAL_NONE
] = "",
155 [BRW_CONDITIONAL_Z
] = ".z",
156 [BRW_CONDITIONAL_NZ
] = ".nz",
157 [BRW_CONDITIONAL_G
] = ".g",
158 [BRW_CONDITIONAL_GE
] = ".ge",
159 [BRW_CONDITIONAL_L
] = ".l",
160 [BRW_CONDITIONAL_LE
] = ".le",
161 [BRW_CONDITIONAL_R
] = ".r",
162 [BRW_CONDITIONAL_O
] = ".o",
163 [BRW_CONDITIONAL_U
] = ".u",
166 static const char *const m_negate
[2] = {
171 static const char *const _abs
[2] = {
176 static const char *const m_bitnot
[2] = { "", "~" };
178 static const char *const vert_stride
[16] = {
189 static const char *const width
[8] = {
197 static const char *const horiz_stride
[4] = {
204 static const char *const chan_sel
[4] = {
211 static const char *const debug_ctrl
[2] = {
216 static const char *const saturate
[2] = {
221 static const char *const cmpt_ctrl
[2] = {
226 static const char *const accwr
[2] = {
231 static const char *const branch_ctrl
[2] = {
236 static const char *const wectrl
[2] = {
241 static const char *const exec_size
[8] = {
250 static const char *const pred_inv
[2] = {
255 static const char *const pred_ctrl_align16
[16] = {
265 static const char *const pred_ctrl_align1
[16] = {
266 [BRW_PREDICATE_NORMAL
] = "",
267 [BRW_PREDICATE_ALIGN1_ANYV
] = ".anyv",
268 [BRW_PREDICATE_ALIGN1_ALLV
] = ".allv",
269 [BRW_PREDICATE_ALIGN1_ANY2H
] = ".any2h",
270 [BRW_PREDICATE_ALIGN1_ALL2H
] = ".all2h",
271 [BRW_PREDICATE_ALIGN1_ANY4H
] = ".any4h",
272 [BRW_PREDICATE_ALIGN1_ALL4H
] = ".all4h",
273 [BRW_PREDICATE_ALIGN1_ANY8H
] = ".any8h",
274 [BRW_PREDICATE_ALIGN1_ALL8H
] = ".all8h",
275 [BRW_PREDICATE_ALIGN1_ANY16H
] = ".any16h",
276 [BRW_PREDICATE_ALIGN1_ALL16H
] = ".all16h",
277 [BRW_PREDICATE_ALIGN1_ANY32H
] = ".any32h",
278 [BRW_PREDICATE_ALIGN1_ALL32H
] = ".all32h",
281 static const char *const thread_ctrl
[4] = {
282 [BRW_THREAD_NORMAL
] = "",
283 [BRW_THREAD_ATOMIC
] = "atomic",
284 [BRW_THREAD_SWITCH
] = "switch",
287 static const char *const compr_ctrl
[4] = {
294 static const char *const dep_ctrl
[4] = {
298 [3] = "NoDDClr,NoDDChk",
301 static const char *const mask_ctrl
[4] = {
306 static const char *const access_mode
[2] = {
311 static const char * const reg_encoding
[] = {
312 [BRW_HW_REG_TYPE_UD
] = "UD",
313 [BRW_HW_REG_TYPE_D
] = "D",
314 [BRW_HW_REG_TYPE_UW
] = "UW",
315 [BRW_HW_REG_TYPE_W
] = "W",
316 [BRW_HW_REG_NON_IMM_TYPE_UB
] = "UB",
317 [BRW_HW_REG_NON_IMM_TYPE_B
] = "B",
318 [GEN7_HW_REG_NON_IMM_TYPE_DF
] = "DF",
319 [BRW_HW_REG_TYPE_F
] = "F",
320 [GEN8_HW_REG_TYPE_UQ
] = "UQ",
321 [GEN8_HW_REG_TYPE_Q
] = "Q",
322 [GEN8_HW_REG_NON_IMM_TYPE_HF
] = "HF",
325 static const char *const three_source_reg_encoding
[] = {
326 [BRW_3SRC_TYPE_F
] = "F",
327 [BRW_3SRC_TYPE_D
] = "D",
328 [BRW_3SRC_TYPE_UD
] = "UD",
331 const int reg_type_size
[] = {
332 [BRW_HW_REG_TYPE_UD
] = 4,
333 [BRW_HW_REG_TYPE_D
] = 4,
334 [BRW_HW_REG_TYPE_UW
] = 2,
335 [BRW_HW_REG_TYPE_W
] = 2,
336 [BRW_HW_REG_NON_IMM_TYPE_UB
] = 1,
337 [BRW_HW_REG_NON_IMM_TYPE_B
] = 1,
338 [GEN7_HW_REG_NON_IMM_TYPE_DF
] = 8,
339 [BRW_HW_REG_TYPE_F
] = 4,
340 [GEN8_HW_REG_TYPE_UQ
] = 8,
341 [GEN8_HW_REG_TYPE_Q
] = 8,
342 [GEN8_HW_REG_NON_IMM_TYPE_HF
] = 2,
345 static const char *const reg_file
[4] = {
352 static const char *const writemask
[16] = {
371 static const char *const end_of_thread
[2] = {
376 /* SFIDs on Gen4-5 */
377 static const char *const gen4_sfid
[16] = {
378 [BRW_SFID_NULL
] = "null",
379 [BRW_SFID_MATH
] = "math",
380 [BRW_SFID_SAMPLER
] = "sampler",
381 [BRW_SFID_MESSAGE_GATEWAY
] = "gateway",
382 [BRW_SFID_DATAPORT_READ
] = "read",
383 [BRW_SFID_DATAPORT_WRITE
] = "write",
384 [BRW_SFID_URB
] = "urb",
385 [BRW_SFID_THREAD_SPAWNER
] = "thread_spawner",
386 [BRW_SFID_VME
] = "vme",
389 static const char *const gen6_sfid
[16] = {
390 [BRW_SFID_NULL
] = "null",
391 [BRW_SFID_MATH
] = "math",
392 [BRW_SFID_SAMPLER
] = "sampler",
393 [BRW_SFID_MESSAGE_GATEWAY
] = "gateway",
394 [BRW_SFID_URB
] = "urb",
395 [BRW_SFID_THREAD_SPAWNER
] = "thread_spawner",
396 [GEN6_SFID_DATAPORT_SAMPLER_CACHE
] = "sampler",
397 [GEN6_SFID_DATAPORT_RENDER_CACHE
] = "render",
398 [GEN6_SFID_DATAPORT_CONSTANT_CACHE
] = "const",
399 [GEN7_SFID_DATAPORT_DATA_CACHE
] = "data",
400 [GEN7_SFID_PIXEL_INTERPOLATOR
] = "pixel interp",
401 [HSW_SFID_DATAPORT_DATA_CACHE_1
] = "dp data 1",
402 [HSW_SFID_CRE
] = "cre",
405 static const char *const gen7_gateway_subfuncid
[8] = {
406 [BRW_MESSAGE_GATEWAY_SFID_OPEN_GATEWAY
] = "open",
407 [BRW_MESSAGE_GATEWAY_SFID_CLOSE_GATEWAY
] = "close",
408 [BRW_MESSAGE_GATEWAY_SFID_FORWARD_MSG
] = "forward msg",
409 [BRW_MESSAGE_GATEWAY_SFID_GET_TIMESTAMP
] = "get timestamp",
410 [BRW_MESSAGE_GATEWAY_SFID_BARRIER_MSG
] = "barrier msg",
411 [BRW_MESSAGE_GATEWAY_SFID_UPDATE_GATEWAY_STATE
] = "update state",
412 [BRW_MESSAGE_GATEWAY_SFID_MMIO_READ_WRITE
] = "mmio read/write",
415 static const char *const gen4_dp_read_port_msg_type
[4] = {
416 [0b00] = "OWord Block Read",
417 [0b01] = "OWord Dual Block Read",
418 [0b10] = "Media Block Read",
419 [0b11] = "DWord Scattered Read",
422 static const char *const g45_dp_read_port_msg_type
[8] = {
423 [0b000] = "OWord Block Read",
424 [0b010] = "OWord Dual Block Read",
425 [0b100] = "Media Block Read",
426 [0b110] = "DWord Scattered Read",
427 [0b001] = "Render Target UNORM Read",
428 [0b011] = "AVC Loop Filter Read",
431 static const char *const dp_write_port_msg_type
[8] = {
432 [0b000] = "OWord block write",
433 [0b001] = "OWord dual block write",
434 [0b010] = "media block write",
435 [0b011] = "DWord scattered write",
436 [0b100] = "RT write",
437 [0b101] = "streamed VB write",
438 [0b110] = "RT UNORM write", /* G45+ */
439 [0b111] = "flush render cache",
442 static const char *const dp_rc_msg_type_gen6
[16] = {
443 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ
] = "OWORD block read",
444 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ
] = "RT UNORM read",
445 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ
] = "OWORD dual block read",
446 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ
] = "media block read",
447 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ
] =
448 "OWORD unaligned block read",
449 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ
] = "DWORD scattered read",
450 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE
] = "DWORD atomic write",
451 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE
] = "OWORD block write",
452 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE
] =
453 "OWORD dual block write",
454 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE
] = "media block write",
455 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE
] =
456 "DWORD scattered write",
457 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
] = "RT write",
458 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE
] = "streamed VB write",
459 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE
] = "RT UNORM write",
462 static const char *const m_rt_write_subtype
[] = {
464 [0b001] = "SIMD16/RepData",
465 [0b010] = "SIMD8/DualSrcLow",
466 [0b011] = "SIMD8/DualSrcHigh",
468 [0b101] = "SIMD8/ImageWrite", /* Gen6+ */
469 [0b111] = "SIMD16/RepData-111", /* no idea how this is different than 1 */
472 static const char *const dp_dc0_msg_type_gen7
[16] = {
473 [GEN7_DATAPORT_DC_OWORD_BLOCK_READ
] = "DC OWORD block read",
474 [GEN7_DATAPORT_DC_UNALIGNED_OWORD_BLOCK_READ
] =
475 "DC unaligned OWORD block read",
476 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_READ
] = "DC OWORD dual block read",
477 [GEN7_DATAPORT_DC_DWORD_SCATTERED_READ
] = "DC DWORD scattered read",
478 [GEN7_DATAPORT_DC_BYTE_SCATTERED_READ
] = "DC byte scattered read",
479 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_READ
] = "DC untyped surface read",
480 [GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP
] = "DC untyped atomic",
481 [GEN7_DATAPORT_DC_MEMORY_FENCE
] = "DC mfence",
482 [GEN7_DATAPORT_DC_OWORD_BLOCK_WRITE
] = "DC OWORD block write",
483 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_WRITE
] = "DC OWORD dual block write",
484 [GEN7_DATAPORT_DC_DWORD_SCATTERED_WRITE
] = "DC DWORD scatterd write",
485 [GEN7_DATAPORT_DC_BYTE_SCATTERED_WRITE
] = "DC byte scattered write",
486 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_WRITE
] = "DC untyped surface write",
489 static const char *const dp_dc1_msg_type_hsw
[16] = {
490 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ
] = "untyped surface read",
491 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP
] = "DC untyped atomic op",
492 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2
] =
493 "DC untyped 4x2 atomic op",
494 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_READ
] = "DC media block read",
495 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ
] = "DC typed surface read",
496 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP
] = "DC typed atomic",
497 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2
] = "DC typed 4x2 atomic op",
498 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE
] = "DC untyped surface write",
499 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_WRITE
] = "DC media block write",
500 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP
] = "DC atomic counter op",
501 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2
] =
502 "DC 4x2 atomic counter op",
503 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE
] = "DC typed surface write",
506 static const char *const aop
[16] = {
507 [BRW_AOP_AND
] = "and",
509 [BRW_AOP_XOR
] = "xor",
510 [BRW_AOP_MOV
] = "mov",
511 [BRW_AOP_INC
] = "inc",
512 [BRW_AOP_DEC
] = "dec",
513 [BRW_AOP_ADD
] = "add",
514 [BRW_AOP_SUB
] = "sub",
515 [BRW_AOP_REVSUB
] = "revsub",
516 [BRW_AOP_IMAX
] = "imax",
517 [BRW_AOP_IMIN
] = "imin",
518 [BRW_AOP_UMAX
] = "umax",
519 [BRW_AOP_UMIN
] = "umin",
520 [BRW_AOP_CMPWR
] = "cmpwr",
521 [BRW_AOP_PREDEC
] = "predec",
524 static const char * const pixel_interpolator_msg_types
[4] = {
525 [GEN7_PIXEL_INTERPOLATOR_LOC_SHARED_OFFSET
] = "per_message_offset",
526 [GEN7_PIXEL_INTERPOLATOR_LOC_SAMPLE
] = "sample_position",
527 [GEN7_PIXEL_INTERPOLATOR_LOC_CENTROID
] = "centroid",
528 [GEN7_PIXEL_INTERPOLATOR_LOC_PER_SLOT_OFFSET
] = "per_slot_offset",
531 static const char *const math_function
[16] = {
532 [BRW_MATH_FUNCTION_INV
] = "inv",
533 [BRW_MATH_FUNCTION_LOG
] = "log",
534 [BRW_MATH_FUNCTION_EXP
] = "exp",
535 [BRW_MATH_FUNCTION_SQRT
] = "sqrt",
536 [BRW_MATH_FUNCTION_RSQ
] = "rsq",
537 [BRW_MATH_FUNCTION_SIN
] = "sin",
538 [BRW_MATH_FUNCTION_COS
] = "cos",
539 [BRW_MATH_FUNCTION_SINCOS
] = "sincos",
540 [BRW_MATH_FUNCTION_FDIV
] = "fdiv",
541 [BRW_MATH_FUNCTION_POW
] = "pow",
542 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER
] = "intdivmod",
543 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT
] = "intdiv",
544 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER
] = "intmod",
545 [GEN8_MATH_FUNCTION_INVM
] = "invm",
546 [GEN8_MATH_FUNCTION_RSQRTM
] = "rsqrtm",
549 static const char *const math_saturate
[2] = {
554 static const char *const math_signed
[2] = {
559 static const char *const math_scalar
[2] = {
564 static const char *const math_precision
[2] = {
566 [1] = "partial_precision"
569 static const char *const gen5_urb_opcode
[] = {
574 static const char *const gen7_urb_opcode
[] = {
579 [4] = "atomic mov", /* Gen7+ */
580 [5] = "atomic inc", /* Gen7+ */
581 [6] = "atomic add", /* Gen8+ */
582 [7] = "SIMD8 write", /* Gen8+ */
583 [8] = "SIMD8 read", /* Gen8+ */
584 /* [9-15] - reserved */
587 static const char *const urb_swizzle
[4] = {
588 [BRW_URB_SWIZZLE_NONE
] = "",
589 [BRW_URB_SWIZZLE_INTERLEAVE
] = "interleave",
590 [BRW_URB_SWIZZLE_TRANSPOSE
] = "transpose",
593 static const char *const urb_allocate
[2] = {
598 static const char *const urb_used
[2] = {
603 static const char *const urb_complete
[2] = {
608 static const char *const gen5_sampler_msg_type
[] = {
609 [GEN5_SAMPLER_MESSAGE_SAMPLE
] = "sample",
610 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS
] = "sample_b",
611 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD
] = "sample_l",
612 [GEN5_SAMPLER_MESSAGE_SAMPLE_COMPARE
] = "sample_c",
613 [GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS
] = "sample_d",
614 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS_COMPARE
] = "sample_b_c",
615 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE
] = "sample_l_c",
616 [GEN5_SAMPLER_MESSAGE_SAMPLE_LD
] = "ld",
617 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4
] = "gather4",
618 [GEN5_SAMPLER_MESSAGE_LOD
] = "lod",
619 [GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO
] = "resinfo",
620 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_C
] = "gather4_c",
621 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO
] = "gather4_po",
622 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO_C
] = "gather4_po_c",
623 [HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE
] = "sample_d_c",
624 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS
] = "ld_mcs",
625 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DMS
] = "ld2dms",
626 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS
] = "ld2dss",
629 static const char *const gen5_sampler_simd_mode
[4] = {
630 [BRW_SAMPLER_SIMD_MODE_SIMD4X2
] = "SIMD4x2",
631 [BRW_SAMPLER_SIMD_MODE_SIMD8
] = "SIMD8",
632 [BRW_SAMPLER_SIMD_MODE_SIMD16
] = "SIMD16",
633 [BRW_SAMPLER_SIMD_MODE_SIMD32_64
] = "SIMD32/64",
636 static const char *const sampler_target_format
[4] = {
646 string(FILE *file
, const char *string
)
649 column
+= strlen(string
);
654 format(FILE *f
, const char *format
, ...) PRINTFLIKE(2, 3);
657 format(FILE *f
, const char *format
, ...)
661 va_start(args
, format
);
663 vsnprintf(buf
, sizeof(buf
) - 1, format
, args
);
687 control(FILE *file
, const char *name
, const char *const ctrl
[],
688 unsigned id
, int *space
)
691 fprintf(file
, "*** invalid %s value %d ", name
, id
);
697 string(file
, ctrl
[id
]);
705 print_opcode(FILE *file
, int id
)
707 if (!opcode_descs
[id
].name
) {
708 format(file
, "*** invalid opcode value %d ", id
);
711 string(file
, opcode_descs
[id
].name
);
716 reg(FILE *file
, unsigned _reg_file
, unsigned _reg_nr
)
720 /* Clear the Compr4 instruction compression bit. */
721 if (_reg_file
== BRW_MESSAGE_REGISTER_FILE
)
722 _reg_nr
&= ~(1 << 7);
724 if (_reg_file
== BRW_ARCHITECTURE_REGISTER_FILE
) {
725 switch (_reg_nr
& 0xf0) {
727 string(file
, "null");
729 case BRW_ARF_ADDRESS
:
730 format(file
, "a%d", _reg_nr
& 0x0f);
732 case BRW_ARF_ACCUMULATOR
:
733 format(file
, "acc%d", _reg_nr
& 0x0f);
736 format(file
, "f%d", _reg_nr
& 0x0f);
739 format(file
, "mask%d", _reg_nr
& 0x0f);
741 case BRW_ARF_MASK_STACK
:
742 format(file
, "msd%d", _reg_nr
& 0x0f);
745 format(file
, "sr%d", _reg_nr
& 0x0f);
747 case BRW_ARF_CONTROL
:
748 format(file
, "cr%d", _reg_nr
& 0x0f);
750 case BRW_ARF_NOTIFICATION_COUNT
:
751 format(file
, "n%d", _reg_nr
& 0x0f);
758 format(file
, "tdr0");
760 case BRW_ARF_TIMESTAMP
:
761 format(file
, "tm%d", _reg_nr
& 0x0f);
764 format(file
, "ARF%d", _reg_nr
);
768 err
|= control(file
, "src reg file", reg_file
, _reg_file
, NULL
);
769 format(file
, "%d", _reg_nr
);
775 dest(FILE *file
, const struct brw_device_info
*devinfo
, brw_inst
*inst
)
779 if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
780 if (brw_inst_dst_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
781 err
|= reg(file
, brw_inst_dst_reg_file(devinfo
, inst
),
782 brw_inst_dst_da_reg_nr(devinfo
, inst
));
785 if (brw_inst_dst_da1_subreg_nr(devinfo
, inst
))
786 format(file
, ".%ld", brw_inst_dst_da1_subreg_nr(devinfo
, inst
) /
787 reg_type_size
[brw_inst_dst_reg_type(devinfo
, inst
)]);
789 err
|= control(file
, "horiz stride", horiz_stride
,
790 brw_inst_dst_hstride(devinfo
, inst
), NULL
);
792 err
|= control(file
, "dest reg encoding", reg_encoding
,
793 brw_inst_dst_reg_type(devinfo
, inst
), NULL
);
795 string(file
, "g[a0");
796 if (brw_inst_dst_ia_subreg_nr(devinfo
, inst
))
797 format(file
, ".%ld", brw_inst_dst_ia_subreg_nr(devinfo
, inst
) /
798 reg_type_size
[brw_inst_dst_reg_type(devinfo
, inst
)]);
799 if (brw_inst_dst_ia1_addr_imm(devinfo
, inst
))
800 format(file
, " %d", brw_inst_dst_ia1_addr_imm(devinfo
, inst
));
802 err
|= control(file
, "horiz stride", horiz_stride
,
803 brw_inst_dst_hstride(devinfo
, inst
), NULL
);
805 err
|= control(file
, "dest reg encoding", reg_encoding
,
806 brw_inst_dst_reg_type(devinfo
, inst
), NULL
);
809 if (brw_inst_dst_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
810 err
|= reg(file
, brw_inst_dst_reg_file(devinfo
, inst
),
811 brw_inst_dst_da_reg_nr(devinfo
, inst
));
814 if (brw_inst_dst_da16_subreg_nr(devinfo
, inst
))
815 format(file
, ".%ld", brw_inst_dst_da16_subreg_nr(devinfo
, inst
) /
816 reg_type_size
[brw_inst_dst_reg_type(devinfo
, inst
)]);
818 err
|= control(file
, "writemask", writemask
,
819 brw_inst_da16_writemask(devinfo
, inst
), NULL
);
820 err
|= control(file
, "dest reg encoding", reg_encoding
,
821 brw_inst_dst_reg_type(devinfo
, inst
), NULL
);
824 string(file
, "Indirect align16 address mode not supported");
832 dest_3src(FILE *file
, const struct brw_device_info
*devinfo
, brw_inst
*inst
)
837 if (devinfo
->gen
== 6 && brw_inst_3src_dst_reg_file(devinfo
, inst
))
838 reg_file
= BRW_MESSAGE_REGISTER_FILE
;
840 reg_file
= BRW_GENERAL_REGISTER_FILE
;
842 err
|= reg(file
, reg_file
, brw_inst_3src_dst_reg_nr(devinfo
, inst
));
845 if (brw_inst_3src_dst_subreg_nr(devinfo
, inst
))
846 format(file
, ".%ld", brw_inst_3src_dst_subreg_nr(devinfo
, inst
));
848 err
|= control(file
, "writemask", writemask
,
849 brw_inst_3src_dst_writemask(devinfo
, inst
), NULL
);
850 err
|= control(file
, "dest reg encoding", three_source_reg_encoding
,
851 brw_inst_3src_dst_type(devinfo
, inst
), NULL
);
857 src_align1_region(FILE *file
,
858 unsigned _vert_stride
, unsigned _width
,
859 unsigned _horiz_stride
)
863 err
|= control(file
, "vert stride", vert_stride
, _vert_stride
, NULL
);
865 err
|= control(file
, "width", width
, _width
, NULL
);
867 err
|= control(file
, "horiz_stride", horiz_stride
, _horiz_stride
, NULL
);
874 const struct brw_device_info
*devinfo
,
876 unsigned type
, unsigned _reg_file
,
877 unsigned _vert_stride
, unsigned _width
, unsigned _horiz_stride
,
878 unsigned reg_num
, unsigned sub_reg_num
, unsigned __abs
,
883 if (devinfo
->gen
>= 8 && is_logic_instruction(opcode
))
884 err
|= control(file
, "bitnot", m_bitnot
, _negate
, NULL
);
886 err
|= control(file
, "negate", m_negate
, _negate
, NULL
);
888 err
|= control(file
, "abs", _abs
, __abs
, NULL
);
890 err
|= reg(file
, _reg_file
, reg_num
);
894 format(file
, ".%d", sub_reg_num
/ reg_type_size
[type
]); /* use formal style like spec */
895 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
896 err
|= control(file
, "src reg encoding", reg_encoding
, type
, NULL
);
902 const struct brw_device_info
*devinfo
,
907 unsigned _addr_subreg_nr
,
911 unsigned _horiz_stride
, unsigned _width
, unsigned _vert_stride
)
915 if (devinfo
->gen
>= 8 && is_logic_instruction(opcode
))
916 err
|= control(file
, "bitnot", m_bitnot
, _negate
, NULL
);
918 err
|= control(file
, "negate", m_negate
, _negate
, NULL
);
920 err
|= control(file
, "abs", _abs
, __abs
, NULL
);
922 string(file
, "g[a0");
924 format(file
, ".%d", _addr_subreg_nr
);
926 format(file
, " %d", _addr_imm
);
928 src_align1_region(file
, _vert_stride
, _width
, _horiz_stride
);
929 err
|= control(file
, "src reg encoding", reg_encoding
, type
, NULL
);
934 src_swizzle(FILE *file
, unsigned swiz
)
936 unsigned x
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_X
);
937 unsigned y
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_Y
);
938 unsigned z
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_Z
);
939 unsigned w
= BRW_GET_SWZ(swiz
, BRW_CHANNEL_W
);
942 if (x
== y
&& x
== z
&& x
== w
) {
944 err
|= control(file
, "channel select", chan_sel
, x
, NULL
);
945 } else if (swiz
!= BRW_SWIZZLE_XYZW
) {
947 err
|= control(file
, "channel select", chan_sel
, x
, NULL
);
948 err
|= control(file
, "channel select", chan_sel
, y
, NULL
);
949 err
|= control(file
, "channel select", chan_sel
, z
, NULL
);
950 err
|= control(file
, "channel select", chan_sel
, w
, NULL
);
957 const struct brw_device_info
*devinfo
,
961 unsigned _vert_stride
,
966 unsigned swz_x
, unsigned swz_y
, unsigned swz_z
, unsigned swz_w
)
970 if (devinfo
->gen
>= 8 && is_logic_instruction(opcode
))
971 err
|= control(file
, "bitnot", m_bitnot
, _negate
, NULL
);
973 err
|= control(file
, "negate", m_negate
, _negate
, NULL
);
975 err
|= control(file
, "abs", _abs
, __abs
, NULL
);
977 err
|= reg(file
, _reg_file
, _reg_nr
);
981 /* bit4 for subreg number byte addressing. Make this same meaning as
982 in da1 case, so output looks consistent. */
983 format(file
, ".%d", 16 / reg_type_size
[_reg_type
]);
985 err
|= control(file
, "vert stride", vert_stride
, _vert_stride
, NULL
);
986 string(file
, ",4,1>");
987 err
|= src_swizzle(file
, BRW_SWIZZLE4(swz_x
, swz_y
, swz_z
, swz_w
));
988 err
|= control(file
, "src da16 reg type", reg_encoding
, _reg_type
, NULL
);
993 src0_3src(FILE *file
, const struct brw_device_info
*devinfo
, brw_inst
*inst
)
996 unsigned src0_subreg_nr
= brw_inst_3src_src0_subreg_nr(devinfo
, inst
);
998 err
|= control(file
, "negate", m_negate
,
999 brw_inst_3src_src0_negate(devinfo
, inst
), NULL
);
1000 err
|= control(file
, "abs", _abs
, brw_inst_3src_src0_abs(devinfo
, inst
), NULL
);
1002 err
|= reg(file
, BRW_GENERAL_REGISTER_FILE
,
1003 brw_inst_3src_src0_reg_nr(devinfo
, inst
));
1006 if (src0_subreg_nr
|| brw_inst_3src_src0_rep_ctrl(devinfo
, inst
))
1007 format(file
, ".%d", src0_subreg_nr
);
1008 if (brw_inst_3src_src0_rep_ctrl(devinfo
, inst
))
1009 string(file
, "<0,1,0>");
1011 string(file
, "<4,4,1>");
1012 err
|= src_swizzle(file
, brw_inst_3src_src0_swizzle(devinfo
, inst
));
1014 err
|= control(file
, "src da16 reg type", three_source_reg_encoding
,
1015 brw_inst_3src_src_type(devinfo
, inst
), NULL
);
1020 src1_3src(FILE *file
, const struct brw_device_info
*devinfo
, brw_inst
*inst
)
1023 unsigned src1_subreg_nr
= brw_inst_3src_src1_subreg_nr(devinfo
, inst
);
1025 err
|= control(file
, "negate", m_negate
,
1026 brw_inst_3src_src1_negate(devinfo
, inst
), NULL
);
1027 err
|= control(file
, "abs", _abs
, brw_inst_3src_src1_abs(devinfo
, inst
), NULL
);
1029 err
|= reg(file
, BRW_GENERAL_REGISTER_FILE
,
1030 brw_inst_3src_src1_reg_nr(devinfo
, inst
));
1033 if (src1_subreg_nr
|| brw_inst_3src_src1_rep_ctrl(devinfo
, inst
))
1034 format(file
, ".%d", src1_subreg_nr
);
1035 if (brw_inst_3src_src1_rep_ctrl(devinfo
, inst
))
1036 string(file
, "<0,1,0>");
1038 string(file
, "<4,4,1>");
1039 err
|= src_swizzle(file
, brw_inst_3src_src1_swizzle(devinfo
, inst
));
1041 err
|= control(file
, "src da16 reg type", three_source_reg_encoding
,
1042 brw_inst_3src_src_type(devinfo
, inst
), NULL
);
1048 src2_3src(FILE *file
, const struct brw_device_info
*devinfo
, brw_inst
*inst
)
1051 unsigned src2_subreg_nr
= brw_inst_3src_src2_subreg_nr(devinfo
, inst
);
1053 err
|= control(file
, "negate", m_negate
,
1054 brw_inst_3src_src2_negate(devinfo
, inst
), NULL
);
1055 err
|= control(file
, "abs", _abs
, brw_inst_3src_src2_abs(devinfo
, inst
), NULL
);
1057 err
|= reg(file
, BRW_GENERAL_REGISTER_FILE
,
1058 brw_inst_3src_src2_reg_nr(devinfo
, inst
));
1061 if (src2_subreg_nr
|| brw_inst_3src_src2_rep_ctrl(devinfo
, inst
))
1062 format(file
, ".%d", src2_subreg_nr
);
1063 if (brw_inst_3src_src2_rep_ctrl(devinfo
, inst
))
1064 string(file
, "<0,1,0>");
1066 string(file
, "<4,4,1>");
1067 err
|= src_swizzle(file
, brw_inst_3src_src2_swizzle(devinfo
, inst
));
1069 err
|= control(file
, "src da16 reg type", three_source_reg_encoding
,
1070 brw_inst_3src_src_type(devinfo
, inst
), NULL
);
1075 imm(FILE *file
, const struct brw_device_info
*devinfo
, unsigned type
, brw_inst
*inst
)
1078 case BRW_HW_REG_TYPE_UD
:
1079 format(file
, "0x%08xUD", brw_inst_imm_ud(devinfo
, inst
));
1081 case BRW_HW_REG_TYPE_D
:
1082 format(file
, "%dD", brw_inst_imm_d(devinfo
, inst
));
1084 case BRW_HW_REG_TYPE_UW
:
1085 format(file
, "0x%04xUW", (uint16_t) brw_inst_imm_ud(devinfo
, inst
));
1087 case BRW_HW_REG_TYPE_W
:
1088 format(file
, "%dW", (int16_t) brw_inst_imm_d(devinfo
, inst
));
1090 case BRW_HW_REG_IMM_TYPE_UV
:
1091 format(file
, "0x%08xUV", brw_inst_imm_ud(devinfo
, inst
));
1093 case BRW_HW_REG_IMM_TYPE_VF
:
1094 format(file
, "[%-gF, %-gF, %-gF, %-gF]VF",
1095 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
)),
1096 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
) >> 8),
1097 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
) >> 16),
1098 brw_vf_to_float(brw_inst_imm_ud(devinfo
, inst
) >> 24));
1100 case BRW_HW_REG_IMM_TYPE_V
:
1101 format(file
, "0x%08xV", brw_inst_imm_ud(devinfo
, inst
));
1103 case BRW_HW_REG_TYPE_F
:
1104 format(file
, "%-gF", brw_inst_imm_f(devinfo
, inst
));
1106 case GEN8_HW_REG_IMM_TYPE_DF
:
1107 string(file
, "Double IMM");
1109 case GEN8_HW_REG_IMM_TYPE_HF
:
1110 string(file
, "Half Float IMM");
1117 src0(FILE *file
, const struct brw_device_info
*devinfo
, brw_inst
*inst
)
1119 if (brw_inst_src0_reg_file(devinfo
, inst
) == BRW_IMMEDIATE_VALUE
) {
1120 return imm(file
, devinfo
, brw_inst_src0_reg_type(devinfo
, inst
), inst
);
1121 } else if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
1122 if (brw_inst_src0_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1123 return src_da1(file
,
1125 brw_inst_opcode(devinfo
, inst
),
1126 brw_inst_src0_reg_type(devinfo
, inst
),
1127 brw_inst_src0_reg_file(devinfo
, inst
),
1128 brw_inst_src0_vstride(devinfo
, inst
),
1129 brw_inst_src0_width(devinfo
, inst
),
1130 brw_inst_src0_hstride(devinfo
, inst
),
1131 brw_inst_src0_da_reg_nr(devinfo
, inst
),
1132 brw_inst_src0_da1_subreg_nr(devinfo
, inst
),
1133 brw_inst_src0_abs(devinfo
, inst
),
1134 brw_inst_src0_negate(devinfo
, inst
));
1136 return src_ia1(file
,
1138 brw_inst_opcode(devinfo
, inst
),
1139 brw_inst_src0_reg_type(devinfo
, inst
),
1140 brw_inst_src0_reg_file(devinfo
, inst
),
1141 brw_inst_src0_ia1_addr_imm(devinfo
, inst
),
1142 brw_inst_src0_ia_subreg_nr(devinfo
, inst
),
1143 brw_inst_src0_negate(devinfo
, inst
),
1144 brw_inst_src0_abs(devinfo
, inst
),
1145 brw_inst_src0_address_mode(devinfo
, inst
),
1146 brw_inst_src0_hstride(devinfo
, inst
),
1147 brw_inst_src0_width(devinfo
, inst
),
1148 brw_inst_src0_vstride(devinfo
, inst
));
1151 if (brw_inst_src0_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1152 return src_da16(file
,
1154 brw_inst_opcode(devinfo
, inst
),
1155 brw_inst_src0_reg_type(devinfo
, inst
),
1156 brw_inst_src0_reg_file(devinfo
, inst
),
1157 brw_inst_src0_vstride(devinfo
, inst
),
1158 brw_inst_src0_da_reg_nr(devinfo
, inst
),
1159 brw_inst_src0_da16_subreg_nr(devinfo
, inst
),
1160 brw_inst_src0_abs(devinfo
, inst
),
1161 brw_inst_src0_negate(devinfo
, inst
),
1162 brw_inst_src0_da16_swiz_x(devinfo
, inst
),
1163 brw_inst_src0_da16_swiz_y(devinfo
, inst
),
1164 brw_inst_src0_da16_swiz_z(devinfo
, inst
),
1165 brw_inst_src0_da16_swiz_w(devinfo
, inst
));
1167 string(file
, "Indirect align16 address mode not supported");
1174 src1(FILE *file
, const struct brw_device_info
*devinfo
, brw_inst
*inst
)
1176 if (brw_inst_src1_reg_file(devinfo
, inst
) == BRW_IMMEDIATE_VALUE
) {
1177 return imm(file
, devinfo
, brw_inst_src1_reg_type(devinfo
, inst
), inst
);
1178 } else if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
1179 if (brw_inst_src1_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1180 return src_da1(file
,
1182 brw_inst_opcode(devinfo
, inst
),
1183 brw_inst_src1_reg_type(devinfo
, inst
),
1184 brw_inst_src1_reg_file(devinfo
, inst
),
1185 brw_inst_src1_vstride(devinfo
, inst
),
1186 brw_inst_src1_width(devinfo
, inst
),
1187 brw_inst_src1_hstride(devinfo
, inst
),
1188 brw_inst_src1_da_reg_nr(devinfo
, inst
),
1189 brw_inst_src1_da1_subreg_nr(devinfo
, inst
),
1190 brw_inst_src1_abs(devinfo
, inst
),
1191 brw_inst_src1_negate(devinfo
, inst
));
1193 return src_ia1(file
,
1195 brw_inst_opcode(devinfo
, inst
),
1196 brw_inst_src1_reg_type(devinfo
, inst
),
1197 brw_inst_src1_reg_file(devinfo
, inst
),
1198 brw_inst_src1_ia1_addr_imm(devinfo
, inst
),
1199 brw_inst_src1_ia_subreg_nr(devinfo
, inst
),
1200 brw_inst_src1_negate(devinfo
, inst
),
1201 brw_inst_src1_abs(devinfo
, inst
),
1202 brw_inst_src1_address_mode(devinfo
, inst
),
1203 brw_inst_src1_hstride(devinfo
, inst
),
1204 brw_inst_src1_width(devinfo
, inst
),
1205 brw_inst_src1_vstride(devinfo
, inst
));
1208 if (brw_inst_src1_address_mode(devinfo
, inst
) == BRW_ADDRESS_DIRECT
) {
1209 return src_da16(file
,
1211 brw_inst_opcode(devinfo
, inst
),
1212 brw_inst_src1_reg_type(devinfo
, inst
),
1213 brw_inst_src1_reg_file(devinfo
, inst
),
1214 brw_inst_src1_vstride(devinfo
, inst
),
1215 brw_inst_src1_da_reg_nr(devinfo
, inst
),
1216 brw_inst_src1_da16_subreg_nr(devinfo
, inst
),
1217 brw_inst_src1_abs(devinfo
, inst
),
1218 brw_inst_src1_negate(devinfo
, inst
),
1219 brw_inst_src1_da16_swiz_x(devinfo
, inst
),
1220 brw_inst_src1_da16_swiz_y(devinfo
, inst
),
1221 brw_inst_src1_da16_swiz_z(devinfo
, inst
),
1222 brw_inst_src1_da16_swiz_w(devinfo
, inst
));
1224 string(file
, "Indirect align16 address mode not supported");
1231 qtr_ctrl(FILE *file
, const struct brw_device_info
*devinfo
, brw_inst
*inst
)
1233 int qtr_ctl
= brw_inst_qtr_control(devinfo
, inst
);
1234 int exec_size
= 1 << brw_inst_exec_size(devinfo
, inst
);
1236 if (exec_size
== 8) {
1239 string(file
, " 1Q");
1242 string(file
, " 2Q");
1245 string(file
, " 3Q");
1248 string(file
, " 4Q");
1251 } else if (exec_size
== 16) {
1253 string(file
, " 1H");
1255 string(file
, " 2H");
1261 static __attribute__((__unused__
)) int
1262 brw_disassemble_imm(const struct brw_device_info
*devinfo
,
1263 uint32_t dw3
, uint32_t dw2
, uint32_t dw1
, uint32_t dw0
)
1266 inst
.data
[0] = (((uint64_t) dw1
) << 32) | ((uint64_t) dw0
);
1267 inst
.data
[1] = (((uint64_t) dw3
) << 32) | ((uint64_t) dw2
);
1268 return brw_disassemble_inst(stderr
, devinfo
, &inst
, false);
1273 brw_disassemble_inst(FILE *file
, const struct brw_device_info
*devinfo
,
1274 brw_inst
*inst
, bool is_compacted
)
1279 const enum opcode opcode
= brw_inst_opcode(devinfo
, inst
);
1281 if (brw_inst_pred_control(devinfo
, inst
)) {
1283 err
|= control(file
, "predicate inverse", pred_inv
,
1284 brw_inst_pred_inv(devinfo
, inst
), NULL
);
1285 format(file
, "f%ld", devinfo
->gen
>= 7 ? brw_inst_flag_reg_nr(devinfo
, inst
) : 0);
1286 if (brw_inst_flag_subreg_nr(devinfo
, inst
))
1287 format(file
, ".%ld", brw_inst_flag_subreg_nr(devinfo
, inst
));
1288 if (brw_inst_access_mode(devinfo
, inst
) == BRW_ALIGN_1
) {
1289 err
|= control(file
, "predicate control align1", pred_ctrl_align1
,
1290 brw_inst_pred_control(devinfo
, inst
), NULL
);
1292 err
|= control(file
, "predicate control align16", pred_ctrl_align16
,
1293 brw_inst_pred_control(devinfo
, inst
), NULL
);
1298 err
|= print_opcode(file
, opcode
);
1299 err
|= control(file
, "saturate", saturate
, brw_inst_saturate(devinfo
, inst
),
1302 err
|= control(file
, "debug control", debug_ctrl
,
1303 brw_inst_debug_control(devinfo
, inst
), NULL
);
1305 if (opcode
== BRW_OPCODE_MATH
) {
1307 err
|= control(file
, "function", math_function
,
1308 brw_inst_math_function(devinfo
, inst
), NULL
);
1309 } else if (opcode
!= BRW_OPCODE_SEND
&& opcode
!= BRW_OPCODE_SENDC
) {
1310 err
|= control(file
, "conditional modifier", conditional_modifier
,
1311 brw_inst_cond_modifier(devinfo
, inst
), NULL
);
1313 /* If we're using the conditional modifier, print which flags reg is
1314 * used for it. Note that on gen6+, the embedded-condition SEL and
1315 * control flow doesn't update flags.
1317 if (brw_inst_cond_modifier(devinfo
, inst
) &&
1318 (devinfo
->gen
< 6 || (opcode
!= BRW_OPCODE_SEL
&&
1319 opcode
!= BRW_OPCODE_IF
&&
1320 opcode
!= BRW_OPCODE_WHILE
))) {
1321 format(file
, ".f%ld",
1322 devinfo
->gen
>= 7 ? brw_inst_flag_reg_nr(devinfo
, inst
) : 0);
1323 if (brw_inst_flag_subreg_nr(devinfo
, inst
))
1324 format(file
, ".%ld", brw_inst_flag_subreg_nr(devinfo
, inst
));
1328 if (opcode
!= BRW_OPCODE_NOP
&& opcode
!= BRW_OPCODE_NENOP
) {
1330 err
|= control(file
, "execution size", exec_size
,
1331 brw_inst_exec_size(devinfo
, inst
), NULL
);
1335 if (opcode
== BRW_OPCODE_SEND
&& devinfo
->gen
< 6)
1336 format(file
, " %ld", brw_inst_base_mrf(devinfo
, inst
));
1338 if (has_uip(devinfo
, opcode
)) {
1339 /* Instructions that have UIP also have JIP. */
1341 format(file
, "JIP: %d", brw_inst_jip(devinfo
, inst
));
1343 format(file
, "UIP: %d", brw_inst_uip(devinfo
, inst
));
1344 } else if (has_jip(devinfo
, opcode
)) {
1346 if (devinfo
->gen
>= 7) {
1347 format(file
, "JIP: %d", brw_inst_jip(devinfo
, inst
));
1349 format(file
, "JIP: %d", brw_inst_gen6_jump_count(devinfo
, inst
));
1351 } else if (devinfo
->gen
< 6 && (opcode
== BRW_OPCODE_BREAK
||
1352 opcode
== BRW_OPCODE_CONTINUE
||
1353 opcode
== BRW_OPCODE_ELSE
)) {
1355 format(file
, "Jump: %d", brw_inst_gen4_jump_count(devinfo
, inst
));
1357 format(file
, "Pop: %ld", brw_inst_gen4_pop_count(devinfo
, inst
));
1358 } else if (devinfo
->gen
< 6 && (opcode
== BRW_OPCODE_IF
||
1359 opcode
== BRW_OPCODE_IFF
||
1360 opcode
== BRW_OPCODE_HALT
)) {
1362 format(file
, "Jump: %d", brw_inst_gen4_jump_count(devinfo
, inst
));
1363 } else if (devinfo
->gen
< 6 && opcode
== BRW_OPCODE_ENDIF
) {
1365 format(file
, "Pop: %ld", brw_inst_gen4_pop_count(devinfo
, inst
));
1366 } else if (opcode
== BRW_OPCODE_JMPI
) {
1368 err
|= src1(file
, devinfo
, inst
);
1369 } else if (opcode_descs
[opcode
].nsrc
== 3) {
1371 err
|= dest_3src(file
, devinfo
, inst
);
1374 err
|= src0_3src(file
, devinfo
, inst
);
1377 err
|= src1_3src(file
, devinfo
, inst
);
1380 err
|= src2_3src(file
, devinfo
, inst
);
1382 if (opcode_descs
[opcode
].ndst
> 0) {
1384 err
|= dest(file
, devinfo
, inst
);
1387 if (opcode_descs
[opcode
].nsrc
> 0) {
1389 err
|= src0(file
, devinfo
, inst
);
1392 if (opcode_descs
[opcode
].nsrc
> 1) {
1394 err
|= src1(file
, devinfo
, inst
);
1398 if (opcode
== BRW_OPCODE_SEND
|| opcode
== BRW_OPCODE_SENDC
) {
1399 enum brw_message_target sfid
= brw_inst_sfid(devinfo
, inst
);
1401 if (brw_inst_src1_reg_file(devinfo
, inst
) != BRW_IMMEDIATE_VALUE
) {
1402 /* show the indirect descriptor source */
1404 err
|= src1(file
, devinfo
, inst
);
1412 err
|= control(file
, "SFID", devinfo
->gen
>= 6 ? gen6_sfid
: gen4_sfid
,
1416 if (brw_inst_src1_reg_file(devinfo
, inst
) != BRW_IMMEDIATE_VALUE
) {
1417 format(file
, " indirect");
1421 err
|= control(file
, "math function", math_function
,
1422 brw_inst_math_msg_function(devinfo
, inst
), &space
);
1423 err
|= control(file
, "math saturate", math_saturate
,
1424 brw_inst_math_msg_saturate(devinfo
, inst
), &space
);
1425 err
|= control(file
, "math signed", math_signed
,
1426 brw_inst_math_msg_signed_int(devinfo
, inst
), &space
);
1427 err
|= control(file
, "math scalar", math_scalar
,
1428 brw_inst_math_msg_data_type(devinfo
, inst
), &space
);
1429 err
|= control(file
, "math precision", math_precision
,
1430 brw_inst_math_msg_precision(devinfo
, inst
), &space
);
1432 case BRW_SFID_SAMPLER
:
1433 if (devinfo
->gen
>= 5) {
1434 err
|= control(file
, "sampler message", gen5_sampler_msg_type
,
1435 brw_inst_sampler_msg_type(devinfo
, inst
), &space
);
1436 err
|= control(file
, "sampler simd mode", gen5_sampler_simd_mode
,
1437 brw_inst_sampler_simd_mode(devinfo
, inst
), &space
);
1438 format(file
, " Surface = %ld Sampler = %ld",
1439 brw_inst_binding_table_index(devinfo
, inst
),
1440 brw_inst_sampler(devinfo
, inst
));
1442 format(file
, " (%ld, %ld, %ld, ",
1443 brw_inst_binding_table_index(devinfo
, inst
),
1444 brw_inst_sampler(devinfo
, inst
),
1445 brw_inst_sampler_msg_type(devinfo
, inst
));
1446 if (!devinfo
->is_g4x
) {
1447 err
|= control(file
, "sampler target format",
1448 sampler_target_format
,
1449 brw_inst_sampler_return_format(devinfo
, inst
), NULL
);
1454 case GEN6_SFID_DATAPORT_SAMPLER_CACHE
:
1455 /* aka BRW_SFID_DATAPORT_READ on Gen4-5 */
1456 if (devinfo
->gen
>= 6) {
1457 format(file
, " (%ld, %ld, %ld, %ld)",
1458 brw_inst_binding_table_index(devinfo
, inst
),
1459 brw_inst_dp_msg_control(devinfo
, inst
),
1460 brw_inst_dp_msg_type(devinfo
, inst
),
1461 devinfo
->gen
>= 7 ? 0 : brw_inst_dp_write_commit(devinfo
, inst
));
1463 bool is_965
= devinfo
->gen
== 4 && !devinfo
->is_g4x
;
1464 err
|= control(file
, "DP read message type",
1465 is_965
? gen4_dp_read_port_msg_type
:
1466 g45_dp_read_port_msg_type
,
1467 brw_inst_dp_read_msg_type(devinfo
, inst
),
1470 format(file
, " MsgCtrl = 0x%lx",
1471 brw_inst_dp_read_msg_control(devinfo
, inst
));
1473 format(file
, " Surface = %ld", brw_inst_binding_table_index(devinfo
, inst
));
1477 case GEN6_SFID_DATAPORT_RENDER_CACHE
: {
1478 /* aka BRW_SFID_DATAPORT_WRITE on Gen4-5 */
1479 unsigned msg_type
= brw_inst_dp_write_msg_type(devinfo
, inst
);
1481 err
|= control(file
, "DP rc message type",
1482 devinfo
->gen
>= 6 ? dp_rc_msg_type_gen6
1483 : dp_write_port_msg_type
,
1486 bool is_rt_write
= msg_type
==
1487 (devinfo
->gen
>= 6 ? GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
1488 : BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
);
1491 err
|= control(file
, "RT message type", m_rt_write_subtype
,
1492 brw_inst_rt_message_type(devinfo
, inst
), &space
);
1493 if (devinfo
->gen
>= 6 && brw_inst_rt_slot_group(devinfo
, inst
))
1494 string(file
, " Hi");
1495 if (brw_inst_rt_last(devinfo
, inst
))
1496 string(file
, " LastRT");
1497 if (devinfo
->gen
< 7 && brw_inst_dp_write_commit(devinfo
, inst
))
1498 string(file
, " WriteCommit");
1500 format(file
, " MsgCtrl = 0x%lx",
1501 brw_inst_dp_write_msg_control(devinfo
, inst
));
1504 format(file
, " Surface = %ld", brw_inst_binding_table_index(devinfo
, inst
));
1509 format(file
, " %ld", brw_inst_urb_global_offset(devinfo
, inst
));
1512 if (devinfo
->gen
>= 7) {
1513 err
|= control(file
, "urb opcode", gen7_urb_opcode
,
1514 brw_inst_urb_opcode(devinfo
, inst
), &space
);
1515 } else if (devinfo
->gen
>= 5) {
1516 err
|= control(file
, "urb opcode", gen5_urb_opcode
,
1517 brw_inst_urb_opcode(devinfo
, inst
), &space
);
1519 err
|= control(file
, "urb swizzle", urb_swizzle
,
1520 brw_inst_urb_swizzle_control(devinfo
, inst
), &space
);
1521 if (devinfo
->gen
< 7) {
1522 err
|= control(file
, "urb allocate", urb_allocate
,
1523 brw_inst_urb_allocate(devinfo
, inst
), &space
);
1524 err
|= control(file
, "urb used", urb_used
,
1525 brw_inst_urb_used(devinfo
, inst
), &space
);
1527 if (devinfo
->gen
< 8) {
1528 err
|= control(file
, "urb complete", urb_complete
,
1529 brw_inst_urb_complete(devinfo
, inst
), &space
);
1532 case BRW_SFID_THREAD_SPAWNER
:
1535 case BRW_SFID_MESSAGE_GATEWAY
:
1536 format(file
, " (%s)",
1537 gen7_gateway_subfuncid
[brw_inst_gateway_subfuncid(devinfo
, inst
)]);
1540 case GEN7_SFID_DATAPORT_DATA_CACHE
:
1541 if (devinfo
->gen
>= 7) {
1544 err
|= control(file
, "DP DC0 message type",
1545 dp_dc0_msg_type_gen7
,
1546 brw_inst_dp_msg_type(devinfo
, inst
), &space
);
1548 format(file
, ", %ld, ", brw_inst_binding_table_index(devinfo
, inst
));
1550 switch (brw_inst_dp_msg_type(devinfo
, inst
)) {
1551 case GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP
:
1552 control(file
, "atomic op", aop
,
1553 brw_inst_imm_ud(devinfo
, inst
) >> 8 & 0xf, &space
);
1556 format(file
, "%ld", brw_inst_dp_msg_control(devinfo
, inst
));
1563 case HSW_SFID_DATAPORT_DATA_CACHE_1
: {
1564 if (devinfo
->gen
>= 7) {
1567 unsigned msg_ctrl
= brw_inst_dp_msg_control(devinfo
, inst
);
1569 err
|= control(file
, "DP DC1 message type",
1570 dp_dc1_msg_type_hsw
,
1571 brw_inst_dp_msg_type(devinfo
, inst
), &space
);
1573 format(file
, ", Surface = %ld, ",
1574 brw_inst_binding_table_index(devinfo
, inst
));
1576 switch (brw_inst_dp_msg_type(devinfo
, inst
)) {
1577 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP
:
1578 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP
:
1579 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP
:
1580 format(file
, "SIMD%d,", (msg_ctrl
& (1 << 4)) ? 8 : 16);
1582 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2
:
1583 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2
:
1584 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2
:
1585 control(file
, "atomic op", aop
, msg_ctrl
& 0xf, &space
);
1587 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ
:
1588 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE
:
1589 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ
:
1590 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE
: {
1591 static const char *simd_modes
[] = { "4x2", "16", "8" };
1592 format(file
, "SIMD%s, Mask = 0x%x",
1593 simd_modes
[msg_ctrl
>> 4], msg_ctrl
& 0xf);
1597 format(file
, "0x%x", msg_ctrl
);
1605 case GEN7_SFID_PIXEL_INTERPOLATOR
:
1606 if (devinfo
->gen
>= 7) {
1607 format(file
, " (%s, %s, 0x%02lx)",
1608 brw_inst_pi_nopersp(devinfo
, inst
) ? "linear" : "persp",
1609 pixel_interpolator_msg_types
[brw_inst_pi_message_type(devinfo
, inst
)],
1610 brw_inst_pi_message_data(devinfo
, inst
));
1616 format(file
, "unsupported shared function ID %d", sfid
);
1622 format(file
, "mlen %ld", brw_inst_mlen(devinfo
, inst
));
1623 format(file
, " rlen %ld", brw_inst_rlen(devinfo
, inst
));
1627 if (opcode
!= BRW_OPCODE_NOP
&& opcode
!= BRW_OPCODE_NENOP
) {
1630 err
|= control(file
, "access mode", access_mode
,
1631 brw_inst_access_mode(devinfo
, inst
), &space
);
1632 if (devinfo
->gen
>= 6) {
1633 err
|= control(file
, "write enable control", wectrl
,
1634 brw_inst_mask_control(devinfo
, inst
), &space
);
1636 err
|= control(file
, "mask control", mask_ctrl
,
1637 brw_inst_mask_control(devinfo
, inst
), &space
);
1639 err
|= control(file
, "dependency control", dep_ctrl
,
1640 ((brw_inst_no_dd_check(devinfo
, inst
) << 1) |
1641 brw_inst_no_dd_clear(devinfo
, inst
)), &space
);
1643 if (devinfo
->gen
>= 6)
1644 err
|= qtr_ctrl(file
, devinfo
, inst
);
1646 if (brw_inst_qtr_control(devinfo
, inst
) == BRW_COMPRESSION_COMPRESSED
&&
1647 opcode_descs
[opcode
].ndst
> 0 &&
1648 brw_inst_dst_reg_file(devinfo
, inst
) == BRW_MESSAGE_REGISTER_FILE
&&
1649 brw_inst_dst_da_reg_nr(devinfo
, inst
) & (1 << 7)) {
1650 format(file
, " compr4");
1652 err
|= control(file
, "compression control", compr_ctrl
,
1653 brw_inst_qtr_control(devinfo
, inst
), &space
);
1657 err
|= control(file
, "compaction", cmpt_ctrl
, is_compacted
, &space
);
1658 err
|= control(file
, "thread control", thread_ctrl
,
1659 brw_inst_thread_control(devinfo
, inst
), &space
);
1660 if (has_branch_ctrl(devinfo
, opcode
)) {
1661 err
|= control(file
, "branch ctrl", branch_ctrl
,
1662 brw_inst_branch_control(devinfo
, inst
), &space
);
1663 } else if (devinfo
->gen
>= 6) {
1664 err
|= control(file
, "acc write control", accwr
,
1665 brw_inst_acc_wr_control(devinfo
, inst
), &space
);
1667 if (opcode
== BRW_OPCODE_SEND
|| opcode
== BRW_OPCODE_SENDC
)
1668 err
|= control(file
, "end of thread", end_of_thread
,
1669 brw_inst_eot(devinfo
, inst
), &space
);