glsl: Add a new ir_txs (textureSize) opcode to ir_texture.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_disasm.c
1 /*
2 * Copyright © 2008 Keith Packard
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
13 *
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20 * OF THIS SOFTWARE.
21 */
22
23 #include <stdio.h>
24 #include <stdlib.h>
25 #include <string.h>
26 #include <getopt.h>
27 #include <unistd.h>
28 #include <stdarg.h>
29
30 #include "main/mtypes.h"
31
32 #include "brw_context.h"
33 #include "brw_defines.h"
34
35 struct {
36 char *name;
37 int nsrc;
38 int ndst;
39 } opcode[128] = {
40 [BRW_OPCODE_MOV] = { .name = "mov", .nsrc = 1, .ndst = 1 },
41 [BRW_OPCODE_FRC] = { .name = "frc", .nsrc = 1, .ndst = 1 },
42 [BRW_OPCODE_RNDU] = { .name = "rndu", .nsrc = 1, .ndst = 1 },
43 [BRW_OPCODE_RNDD] = { .name = "rndd", .nsrc = 1, .ndst = 1 },
44 [BRW_OPCODE_RNDE] = { .name = "rnde", .nsrc = 1, .ndst = 1 },
45 [BRW_OPCODE_RNDZ] = { .name = "rndz", .nsrc = 1, .ndst = 1 },
46 [BRW_OPCODE_NOT] = { .name = "not", .nsrc = 1, .ndst = 1 },
47 [BRW_OPCODE_LZD] = { .name = "lzd", .nsrc = 1, .ndst = 1 },
48
49 [BRW_OPCODE_MUL] = { .name = "mul", .nsrc = 2, .ndst = 1 },
50 [BRW_OPCODE_MAC] = { .name = "mac", .nsrc = 2, .ndst = 1 },
51 [BRW_OPCODE_MACH] = { .name = "mach", .nsrc = 2, .ndst = 1 },
52 [BRW_OPCODE_LINE] = { .name = "line", .nsrc = 2, .ndst = 1 },
53 [BRW_OPCODE_PLN] = { .name = "pln", .nsrc = 2, .ndst = 1 },
54 [BRW_OPCODE_SAD2] = { .name = "sad2", .nsrc = 2, .ndst = 1 },
55 [BRW_OPCODE_SADA2] = { .name = "sada2", .nsrc = 2, .ndst = 1 },
56 [BRW_OPCODE_DP4] = { .name = "dp4", .nsrc = 2, .ndst = 1 },
57 [BRW_OPCODE_DPH] = { .name = "dph", .nsrc = 2, .ndst = 1 },
58 [BRW_OPCODE_DP3] = { .name = "dp3", .nsrc = 2, .ndst = 1 },
59 [BRW_OPCODE_DP2] = { .name = "dp2", .nsrc = 2, .ndst = 1 },
60 [BRW_OPCODE_MATH] = { .name = "math", .nsrc = 2, .ndst = 1 },
61
62 [BRW_OPCODE_AVG] = { .name = "avg", .nsrc = 2, .ndst = 1 },
63 [BRW_OPCODE_ADD] = { .name = "add", .nsrc = 2, .ndst = 1 },
64 [BRW_OPCODE_SEL] = { .name = "sel", .nsrc = 2, .ndst = 1 },
65 [BRW_OPCODE_AND] = { .name = "and", .nsrc = 2, .ndst = 1 },
66 [BRW_OPCODE_OR] = { .name = "or", .nsrc = 2, .ndst = 1 },
67 [BRW_OPCODE_XOR] = { .name = "xor", .nsrc = 2, .ndst = 1 },
68 [BRW_OPCODE_SHR] = { .name = "shr", .nsrc = 2, .ndst = 1 },
69 [BRW_OPCODE_SHL] = { .name = "shl", .nsrc = 2, .ndst = 1 },
70 [BRW_OPCODE_ASR] = { .name = "asr", .nsrc = 2, .ndst = 1 },
71 [BRW_OPCODE_CMP] = { .name = "cmp", .nsrc = 2, .ndst = 1 },
72 [BRW_OPCODE_CMPN] = { .name = "cmpn", .nsrc = 2, .ndst = 1 },
73
74 [BRW_OPCODE_SEND] = { .name = "send", .nsrc = 1, .ndst = 1 },
75 [BRW_OPCODE_SENDC] = { .name = "sendc", .nsrc = 1, .ndst = 1 },
76 [BRW_OPCODE_NOP] = { .name = "nop", .nsrc = 0, .ndst = 0 },
77 [BRW_OPCODE_JMPI] = { .name = "jmpi", .nsrc = 1, .ndst = 0 },
78 [BRW_OPCODE_IF] = { .name = "if", .nsrc = 2, .ndst = 0 },
79 [BRW_OPCODE_IFF] = { .name = "iff", .nsrc = 2, .ndst = 1 },
80 [BRW_OPCODE_WHILE] = { .name = "while", .nsrc = 2, .ndst = 0 },
81 [BRW_OPCODE_ELSE] = { .name = "else", .nsrc = 2, .ndst = 0 },
82 [BRW_OPCODE_BREAK] = { .name = "break", .nsrc = 2, .ndst = 0 },
83 [BRW_OPCODE_CONTINUE] = { .name = "cont", .nsrc = 1, .ndst = 0 },
84 [BRW_OPCODE_HALT] = { .name = "halt", .nsrc = 1, .ndst = 0 },
85 [BRW_OPCODE_MSAVE] = { .name = "msave", .nsrc = 1, .ndst = 1 },
86 [BRW_OPCODE_PUSH] = { .name = "push", .nsrc = 1, .ndst = 1 },
87 [BRW_OPCODE_MRESTORE] = { .name = "mrest", .nsrc = 1, .ndst = 1 },
88 [BRW_OPCODE_POP] = { .name = "pop", .nsrc = 2, .ndst = 0 },
89 [BRW_OPCODE_WAIT] = { .name = "wait", .nsrc = 1, .ndst = 0 },
90 [BRW_OPCODE_DO] = { .name = "do", .nsrc = 0, .ndst = 0 },
91 [BRW_OPCODE_ENDIF] = { .name = "endif", .nsrc = 2, .ndst = 0 },
92 };
93
94 char *conditional_modifier[16] = {
95 [BRW_CONDITIONAL_NONE] = "",
96 [BRW_CONDITIONAL_Z] = ".e",
97 [BRW_CONDITIONAL_NZ] = ".ne",
98 [BRW_CONDITIONAL_G] = ".g",
99 [BRW_CONDITIONAL_GE] = ".ge",
100 [BRW_CONDITIONAL_L] = ".l",
101 [BRW_CONDITIONAL_LE] = ".le",
102 [BRW_CONDITIONAL_R] = ".r",
103 [BRW_CONDITIONAL_O] = ".o",
104 [BRW_CONDITIONAL_U] = ".u",
105 };
106
107 char *negate[2] = {
108 [0] = "",
109 [1] = "-",
110 };
111
112 char *_abs[2] = {
113 [0] = "",
114 [1] = "(abs)",
115 };
116
117 char *vert_stride[16] = {
118 [0] = "0",
119 [1] = "1",
120 [2] = "2",
121 [3] = "4",
122 [4] = "8",
123 [5] = "16",
124 [6] = "32",
125 [15] = "VxH",
126 };
127
128 char *width[8] = {
129 [0] = "1",
130 [1] = "2",
131 [2] = "4",
132 [3] = "8",
133 [4] = "16",
134 };
135
136 char *horiz_stride[4] = {
137 [0] = "0",
138 [1] = "1",
139 [2] = "2",
140 [3] = "4"
141 };
142
143 char *chan_sel[4] = {
144 [0] = "x",
145 [1] = "y",
146 [2] = "z",
147 [3] = "w",
148 };
149
150 char *dest_condmod[16] = {
151 };
152
153 char *debug_ctrl[2] = {
154 [0] = "",
155 [1] = ".breakpoint"
156 };
157
158 char *saturate[2] = {
159 [0] = "",
160 [1] = ".sat"
161 };
162
163 char *accwr[2] = {
164 [0] = "",
165 [1] = "AccWrEnable"
166 };
167
168 char *wectrl[2] = {
169 [0] = "WE_normal",
170 [1] = "WE_all"
171 };
172
173 char *exec_size[8] = {
174 [0] = "1",
175 [1] = "2",
176 [2] = "4",
177 [3] = "8",
178 [4] = "16",
179 [5] = "32"
180 };
181
182 char *pred_inv[2] = {
183 [0] = "+",
184 [1] = "-"
185 };
186
187 char *pred_ctrl_align16[16] = {
188 [1] = "",
189 [2] = ".x",
190 [3] = ".y",
191 [4] = ".z",
192 [5] = ".w",
193 [6] = ".any4h",
194 [7] = ".all4h",
195 };
196
197 char *pred_ctrl_align1[16] = {
198 [1] = "",
199 [2] = ".anyv",
200 [3] = ".allv",
201 [4] = ".any2h",
202 [5] = ".all2h",
203 [6] = ".any4h",
204 [7] = ".all4h",
205 [8] = ".any8h",
206 [9] = ".all8h",
207 [10] = ".any16h",
208 [11] = ".all16h",
209 };
210
211 char *thread_ctrl[4] = {
212 [0] = "",
213 [2] = "switch"
214 };
215
216 char *compr_ctrl[4] = {
217 [0] = "",
218 [1] = "sechalf",
219 [2] = "compr",
220 [3] = "compr4",
221 };
222
223 char *dep_ctrl[4] = {
224 [0] = "",
225 [1] = "NoDDClr",
226 [2] = "NoDDChk",
227 [3] = "NoDDClr,NoDDChk",
228 };
229
230 char *mask_ctrl[4] = {
231 [0] = "",
232 [1] = "nomask",
233 };
234
235 char *access_mode[2] = {
236 [0] = "align1",
237 [1] = "align16",
238 };
239
240 char *reg_encoding[8] = {
241 [0] = "UD",
242 [1] = "D",
243 [2] = "UW",
244 [3] = "W",
245 [4] = "UB",
246 [5] = "B",
247 [7] = "F"
248 };
249
250 int reg_type_size[8] = {
251 [0] = 4,
252 [1] = 4,
253 [2] = 2,
254 [3] = 2,
255 [4] = 1,
256 [5] = 1,
257 [7] = 4
258 };
259
260 char *imm_encoding[8] = {
261 [0] = "UD",
262 [1] = "D",
263 [2] = "UW",
264 [3] = "W",
265 [5] = "VF",
266 [6] = "V",
267 [7] = "F"
268 };
269
270 char *reg_file[4] = {
271 [0] = "A",
272 [1] = "g",
273 [2] = "m",
274 [3] = "imm",
275 };
276
277 char *writemask[16] = {
278 [0x0] = ".",
279 [0x1] = ".x",
280 [0x2] = ".y",
281 [0x3] = ".xy",
282 [0x4] = ".z",
283 [0x5] = ".xz",
284 [0x6] = ".yz",
285 [0x7] = ".xyz",
286 [0x8] = ".w",
287 [0x9] = ".xw",
288 [0xa] = ".yw",
289 [0xb] = ".xyw",
290 [0xc] = ".zw",
291 [0xd] = ".xzw",
292 [0xe] = ".yzw",
293 [0xf] = "",
294 };
295
296 char *end_of_thread[2] = {
297 [0] = "",
298 [1] = "EOT"
299 };
300
301 char *target_function[16] = {
302 [BRW_MESSAGE_TARGET_NULL] = "null",
303 [BRW_MESSAGE_TARGET_MATH] = "math",
304 [BRW_MESSAGE_TARGET_SAMPLER] = "sampler",
305 [BRW_MESSAGE_TARGET_GATEWAY] = "gateway",
306 [BRW_MESSAGE_TARGET_DATAPORT_READ] = "read",
307 [BRW_MESSAGE_TARGET_DATAPORT_WRITE] = "write",
308 [BRW_MESSAGE_TARGET_URB] = "urb",
309 [BRW_MESSAGE_TARGET_THREAD_SPAWNER] = "thread_spawner"
310 };
311
312 char *target_function_gen6[16] = {
313 [BRW_MESSAGE_TARGET_NULL] = "null",
314 [BRW_MESSAGE_TARGET_MATH] = "math",
315 [BRW_MESSAGE_TARGET_SAMPLER] = "sampler",
316 [BRW_MESSAGE_TARGET_GATEWAY] = "gateway",
317 [GEN6_MESSAGE_TARGET_DP_SAMPLER_CACHE] = "sampler",
318 [GEN6_MESSAGE_TARGET_DP_RENDER_CACHE] = "render",
319 [GEN6_MESSAGE_TARGET_DP_CONST_CACHE] = "const",
320 [BRW_MESSAGE_TARGET_URB] = "urb",
321 [BRW_MESSAGE_TARGET_THREAD_SPAWNER] = "thread_spawner"
322 };
323
324 char *dp_rc_msg_type_gen6[16] = {
325 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read",
326 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read",
327 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read",
328 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read",
329 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] = "OWORD unaligned block read",
330 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read",
331 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write",
332 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write",
333 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] = "OWORD dual block write",
334 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write",
335 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] = "DWORD scattered write",
336 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write",
337 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write",
338 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORMc write",
339 };
340
341 char *math_function[16] = {
342 [BRW_MATH_FUNCTION_INV] = "inv",
343 [BRW_MATH_FUNCTION_LOG] = "log",
344 [BRW_MATH_FUNCTION_EXP] = "exp",
345 [BRW_MATH_FUNCTION_SQRT] = "sqrt",
346 [BRW_MATH_FUNCTION_RSQ] = "rsq",
347 [BRW_MATH_FUNCTION_SIN] = "sin",
348 [BRW_MATH_FUNCTION_COS] = "cos",
349 [BRW_MATH_FUNCTION_SINCOS] = "sincos",
350 [BRW_MATH_FUNCTION_TAN] = "tan",
351 [BRW_MATH_FUNCTION_POW] = "pow",
352 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] = "intdivmod",
353 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] = "intmod",
354 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER] = "intdiv",
355 };
356
357 char *math_saturate[2] = {
358 [0] = "",
359 [1] = "sat"
360 };
361
362 char *math_signed[2] = {
363 [0] = "",
364 [1] = "signed"
365 };
366
367 char *math_scalar[2] = {
368 [0] = "",
369 [1] = "scalar"
370 };
371
372 char *math_precision[2] = {
373 [0] = "",
374 [1] = "partial_precision"
375 };
376
377 char *urb_opcode[2] = {
378 [0] = "urb_write",
379 [1] = "ff_sync",
380 };
381
382 char *urb_swizzle[4] = {
383 [BRW_URB_SWIZZLE_NONE] = "",
384 [BRW_URB_SWIZZLE_INTERLEAVE] = "interleave",
385 [BRW_URB_SWIZZLE_TRANSPOSE] = "transpose",
386 };
387
388 char *urb_allocate[2] = {
389 [0] = "",
390 [1] = "allocate"
391 };
392
393 char *urb_used[2] = {
394 [0] = "",
395 [1] = "used"
396 };
397
398 char *urb_complete[2] = {
399 [0] = "",
400 [1] = "complete"
401 };
402
403 char *sampler_target_format[4] = {
404 [0] = "F",
405 [2] = "UD",
406 [3] = "D"
407 };
408
409
410 static int column;
411
412 static int string (FILE *file, char *string)
413 {
414 fputs (string, file);
415 column += strlen (string);
416 return 0;
417 }
418
419 static int format (FILE *f, char *format, ...)
420 {
421 char buf[1024];
422 va_list args;
423 va_start (args, format);
424
425 vsnprintf (buf, sizeof (buf) - 1, format, args);
426 va_end (args);
427 string (f, buf);
428 return 0;
429 }
430
431 static int newline (FILE *f)
432 {
433 putc ('\n', f);
434 column = 0;
435 return 0;
436 }
437
438 static int pad (FILE *f, int c)
439 {
440 do
441 string (f, " ");
442 while (column < c);
443 return 0;
444 }
445
446 static int control (FILE *file, char *name, char *ctrl[], GLuint id, int *space)
447 {
448 if (!ctrl[id]) {
449 fprintf (file, "*** invalid %s value %d ",
450 name, id);
451 return 1;
452 }
453 if (ctrl[id][0])
454 {
455 if (space && *space)
456 string (file, " ");
457 string (file, ctrl[id]);
458 if (space)
459 *space = 1;
460 }
461 return 0;
462 }
463
464 static int print_opcode (FILE *file, int id)
465 {
466 if (!opcode[id].name) {
467 format (file, "*** invalid opcode value %d ", id);
468 return 1;
469 }
470 string (file, opcode[id].name);
471 return 0;
472 }
473
474 static int reg (FILE *file, GLuint _reg_file, GLuint _reg_nr)
475 {
476 int err = 0;
477
478 /* Clear the Compr4 instruction compression bit. */
479 if (_reg_file == BRW_MESSAGE_REGISTER_FILE)
480 _reg_nr &= ~(1 << 7);
481
482 if (_reg_file == BRW_ARCHITECTURE_REGISTER_FILE) {
483 switch (_reg_nr & 0xf0) {
484 case BRW_ARF_NULL:
485 string (file, "null");
486 return -1;
487 case BRW_ARF_ADDRESS:
488 format (file, "a%d", _reg_nr & 0x0f);
489 break;
490 case BRW_ARF_ACCUMULATOR:
491 format (file, "acc%d", _reg_nr & 0x0f);
492 break;
493 case BRW_ARF_FLAG:
494 format (file, "f%d", _reg_nr & 0x0f);
495 break;
496 case BRW_ARF_MASK:
497 format (file, "mask%d", _reg_nr & 0x0f);
498 break;
499 case BRW_ARF_MASK_STACK:
500 format (file, "msd%d", _reg_nr & 0x0f);
501 break;
502 case BRW_ARF_STATE:
503 format (file, "sr%d", _reg_nr & 0x0f);
504 break;
505 case BRW_ARF_CONTROL:
506 format (file, "cr%d", _reg_nr & 0x0f);
507 break;
508 case BRW_ARF_NOTIFICATION_COUNT:
509 format (file, "n%d", _reg_nr & 0x0f);
510 break;
511 case BRW_ARF_IP:
512 string (file, "ip");
513 return -1;
514 break;
515 default:
516 format (file, "ARF%d", _reg_nr);
517 break;
518 }
519 } else {
520 err |= control (file, "src reg file", reg_file, _reg_file, NULL);
521 format (file, "%d", _reg_nr);
522 }
523 return err;
524 }
525
526 static int dest (FILE *file, struct brw_instruction *inst)
527 {
528 int err = 0;
529
530 if (inst->header.access_mode == BRW_ALIGN_1)
531 {
532 if (inst->bits1.da1.dest_address_mode == BRW_ADDRESS_DIRECT)
533 {
534 err |= reg (file, inst->bits1.da1.dest_reg_file, inst->bits1.da1.dest_reg_nr);
535 if (err == -1)
536 return 0;
537 if (inst->bits1.da1.dest_subreg_nr)
538 format (file, ".%d", inst->bits1.da1.dest_subreg_nr /
539 reg_type_size[inst->bits1.da1.dest_reg_type]);
540 format (file, "<%d>", inst->bits1.da1.dest_horiz_stride);
541 err |= control (file, "dest reg encoding", reg_encoding, inst->bits1.da1.dest_reg_type, NULL);
542 }
543 else
544 {
545 string (file, "g[a0");
546 if (inst->bits1.ia1.dest_subreg_nr)
547 format (file, ".%d", inst->bits1.ia1.dest_subreg_nr /
548 reg_type_size[inst->bits1.ia1.dest_reg_type]);
549 if (inst->bits1.ia1.dest_indirect_offset)
550 format (file, " %d", inst->bits1.ia1.dest_indirect_offset);
551 string (file, "]");
552 format (file, "<%d>", inst->bits1.ia1.dest_horiz_stride);
553 err |= control (file, "dest reg encoding", reg_encoding, inst->bits1.ia1.dest_reg_type, NULL);
554 }
555 }
556 else
557 {
558 if (inst->bits1.da16.dest_address_mode == BRW_ADDRESS_DIRECT)
559 {
560 err |= reg (file, inst->bits1.da16.dest_reg_file, inst->bits1.da16.dest_reg_nr);
561 if (err == -1)
562 return 0;
563 if (inst->bits1.da16.dest_subreg_nr)
564 format (file, ".%d", inst->bits1.da16.dest_subreg_nr /
565 reg_type_size[inst->bits1.da16.dest_reg_type]);
566 string (file, "<1>");
567 err |= control (file, "writemask", writemask, inst->bits1.da16.dest_writemask, NULL);
568 err |= control (file, "dest reg encoding", reg_encoding, inst->bits1.da16.dest_reg_type, NULL);
569 }
570 else
571 {
572 err = 1;
573 string (file, "Indirect align16 address mode not supported");
574 }
575 }
576
577 return 0;
578 }
579
580 static int src_align1_region (FILE *file,
581 GLuint _vert_stride, GLuint _width, GLuint _horiz_stride)
582 {
583 int err = 0;
584 string (file, "<");
585 err |= control (file, "vert stride", vert_stride, _vert_stride, NULL);
586 string (file, ",");
587 err |= control (file, "width", width, _width, NULL);
588 string (file, ",");
589 err |= control (file, "horiz_stride", horiz_stride, _horiz_stride, NULL);
590 string (file, ">");
591 return err;
592 }
593
594 static int src_da1 (FILE *file, GLuint type, GLuint _reg_file,
595 GLuint _vert_stride, GLuint _width, GLuint _horiz_stride,
596 GLuint reg_num, GLuint sub_reg_num, GLuint __abs, GLuint _negate)
597 {
598 int err = 0;
599 err |= control (file, "negate", negate, _negate, NULL);
600 err |= control (file, "abs", _abs, __abs, NULL);
601
602 err |= reg (file, _reg_file, reg_num);
603 if (err == -1)
604 return 0;
605 if (sub_reg_num)
606 format (file, ".%d", sub_reg_num / reg_type_size[type]); /* use formal style like spec */
607 src_align1_region (file, _vert_stride, _width, _horiz_stride);
608 err |= control (file, "src reg encoding", reg_encoding, type, NULL);
609 return err;
610 }
611
612 static int src_ia1 (FILE *file,
613 GLuint type,
614 GLuint _reg_file,
615 GLint _addr_imm,
616 GLuint _addr_subreg_nr,
617 GLuint _negate,
618 GLuint __abs,
619 GLuint _addr_mode,
620 GLuint _horiz_stride,
621 GLuint _width,
622 GLuint _vert_stride)
623 {
624 int err = 0;
625 err |= control (file, "negate", negate, _negate, NULL);
626 err |= control (file, "abs", _abs, __abs, NULL);
627
628 string (file, "g[a0");
629 if (_addr_subreg_nr)
630 format (file, ".%d", _addr_subreg_nr);
631 if (_addr_imm)
632 format (file, " %d", _addr_imm);
633 string (file, "]");
634 src_align1_region (file, _vert_stride, _width, _horiz_stride);
635 err |= control (file, "src reg encoding", reg_encoding, type, NULL);
636 return err;
637 }
638
639 static int src_da16 (FILE *file,
640 GLuint _reg_type,
641 GLuint _reg_file,
642 GLuint _vert_stride,
643 GLuint _reg_nr,
644 GLuint _subreg_nr,
645 GLuint __abs,
646 GLuint _negate,
647 GLuint swz_x,
648 GLuint swz_y,
649 GLuint swz_z,
650 GLuint swz_w)
651 {
652 int err = 0;
653 err |= control (file, "negate", negate, _negate, NULL);
654 err |= control (file, "abs", _abs, __abs, NULL);
655
656 err |= reg (file, _reg_file, _reg_nr);
657 if (err == -1)
658 return 0;
659 if (_subreg_nr)
660 /* bit4 for subreg number byte addressing. Make this same meaning as
661 in da1 case, so output looks consistent. */
662 format (file, ".%d", 16 / reg_type_size[_reg_type]);
663 string (file, "<");
664 err |= control (file, "vert stride", vert_stride, _vert_stride, NULL);
665 string (file, ",4,1>");
666 /*
667 * Three kinds of swizzle display:
668 * identity - nothing printed
669 * 1->all - print the single channel
670 * 1->1 - print the mapping
671 */
672 if (swz_x == BRW_CHANNEL_X &&
673 swz_y == BRW_CHANNEL_Y &&
674 swz_z == BRW_CHANNEL_Z &&
675 swz_w == BRW_CHANNEL_W)
676 {
677 ;
678 }
679 else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w)
680 {
681 string (file, ".");
682 err |= control (file, "channel select", chan_sel, swz_x, NULL);
683 }
684 else
685 {
686 string (file, ".");
687 err |= control (file, "channel select", chan_sel, swz_x, NULL);
688 err |= control (file, "channel select", chan_sel, swz_y, NULL);
689 err |= control (file, "channel select", chan_sel, swz_z, NULL);
690 err |= control (file, "channel select", chan_sel, swz_w, NULL);
691 }
692 err |= control (file, "src da16 reg type", reg_encoding, _reg_type, NULL);
693 return err;
694 }
695
696
697 static int imm (FILE *file, GLuint type, struct brw_instruction *inst) {
698 switch (type) {
699 case BRW_REGISTER_TYPE_UD:
700 format (file, "0x%08xUD", inst->bits3.ud);
701 break;
702 case BRW_REGISTER_TYPE_D:
703 format (file, "%dD", inst->bits3.d);
704 break;
705 case BRW_REGISTER_TYPE_UW:
706 format (file, "0x%04xUW", (uint16_t) inst->bits3.ud);
707 break;
708 case BRW_REGISTER_TYPE_W:
709 format (file, "%dW", (int16_t) inst->bits3.d);
710 break;
711 case BRW_REGISTER_TYPE_UB:
712 format (file, "0x%02xUB", (int8_t) inst->bits3.ud);
713 break;
714 case BRW_REGISTER_TYPE_VF:
715 format (file, "Vector Float");
716 break;
717 case BRW_REGISTER_TYPE_V:
718 format (file, "0x%08xV", inst->bits3.ud);
719 break;
720 case BRW_REGISTER_TYPE_F:
721 format (file, "%-gF", inst->bits3.f);
722 }
723 return 0;
724 }
725
726 static int src0 (FILE *file, struct brw_instruction *inst)
727 {
728 if (inst->bits1.da1.src0_reg_file == BRW_IMMEDIATE_VALUE)
729 return imm (file, inst->bits1.da1.src0_reg_type,
730 inst);
731 else if (inst->header.access_mode == BRW_ALIGN_1)
732 {
733 if (inst->bits2.da1.src0_address_mode == BRW_ADDRESS_DIRECT)
734 {
735 return src_da1 (file,
736 inst->bits1.da1.src0_reg_type,
737 inst->bits1.da1.src0_reg_file,
738 inst->bits2.da1.src0_vert_stride,
739 inst->bits2.da1.src0_width,
740 inst->bits2.da1.src0_horiz_stride,
741 inst->bits2.da1.src0_reg_nr,
742 inst->bits2.da1.src0_subreg_nr,
743 inst->bits2.da1.src0_abs,
744 inst->bits2.da1.src0_negate);
745 }
746 else
747 {
748 return src_ia1 (file,
749 inst->bits1.ia1.src0_reg_type,
750 inst->bits1.ia1.src0_reg_file,
751 inst->bits2.ia1.src0_indirect_offset,
752 inst->bits2.ia1.src0_subreg_nr,
753 inst->bits2.ia1.src0_negate,
754 inst->bits2.ia1.src0_abs,
755 inst->bits2.ia1.src0_address_mode,
756 inst->bits2.ia1.src0_horiz_stride,
757 inst->bits2.ia1.src0_width,
758 inst->bits2.ia1.src0_vert_stride);
759 }
760 }
761 else
762 {
763 if (inst->bits2.da16.src0_address_mode == BRW_ADDRESS_DIRECT)
764 {
765 return src_da16 (file,
766 inst->bits1.da16.src0_reg_type,
767 inst->bits1.da16.src0_reg_file,
768 inst->bits2.da16.src0_vert_stride,
769 inst->bits2.da16.src0_reg_nr,
770 inst->bits2.da16.src0_subreg_nr,
771 inst->bits2.da16.src0_abs,
772 inst->bits2.da16.src0_negate,
773 inst->bits2.da16.src0_swz_x,
774 inst->bits2.da16.src0_swz_y,
775 inst->bits2.da16.src0_swz_z,
776 inst->bits2.da16.src0_swz_w);
777 }
778 else
779 {
780 string (file, "Indirect align16 address mode not supported");
781 return 1;
782 }
783 }
784 }
785
786 static int src1 (FILE *file, struct brw_instruction *inst)
787 {
788 if (inst->bits1.da1.src1_reg_file == BRW_IMMEDIATE_VALUE)
789 return imm (file, inst->bits1.da1.src1_reg_type,
790 inst);
791 else if (inst->header.access_mode == BRW_ALIGN_1)
792 {
793 if (inst->bits3.da1.src1_address_mode == BRW_ADDRESS_DIRECT)
794 {
795 return src_da1 (file,
796 inst->bits1.da1.src1_reg_type,
797 inst->bits1.da1.src1_reg_file,
798 inst->bits3.da1.src1_vert_stride,
799 inst->bits3.da1.src1_width,
800 inst->bits3.da1.src1_horiz_stride,
801 inst->bits3.da1.src1_reg_nr,
802 inst->bits3.da1.src1_subreg_nr,
803 inst->bits3.da1.src1_abs,
804 inst->bits3.da1.src1_negate);
805 }
806 else
807 {
808 return src_ia1 (file,
809 inst->bits1.ia1.src1_reg_type,
810 inst->bits1.ia1.src1_reg_file,
811 inst->bits3.ia1.src1_indirect_offset,
812 inst->bits3.ia1.src1_subreg_nr,
813 inst->bits3.ia1.src1_negate,
814 inst->bits3.ia1.src1_abs,
815 inst->bits3.ia1.src1_address_mode,
816 inst->bits3.ia1.src1_horiz_stride,
817 inst->bits3.ia1.src1_width,
818 inst->bits3.ia1.src1_vert_stride);
819 }
820 }
821 else
822 {
823 if (inst->bits3.da16.src1_address_mode == BRW_ADDRESS_DIRECT)
824 {
825 return src_da16 (file,
826 inst->bits1.da16.src1_reg_type,
827 inst->bits1.da16.src1_reg_file,
828 inst->bits3.da16.src1_vert_stride,
829 inst->bits3.da16.src1_reg_nr,
830 inst->bits3.da16.src1_subreg_nr,
831 inst->bits3.da16.src1_abs,
832 inst->bits3.da16.src1_negate,
833 inst->bits3.da16.src1_swz_x,
834 inst->bits3.da16.src1_swz_y,
835 inst->bits3.da16.src1_swz_z,
836 inst->bits3.da16.src1_swz_w);
837 }
838 else
839 {
840 string (file, "Indirect align16 address mode not supported");
841 return 1;
842 }
843 }
844 }
845
846 int esize[6] = {
847 [0] = 1,
848 [1] = 2,
849 [2] = 4,
850 [3] = 8,
851 [4] = 16,
852 [5] = 32,
853 };
854
855 static int qtr_ctrl(FILE *file, struct brw_instruction *inst)
856 {
857 int qtr_ctl = inst->header.compression_control;
858 int exec_size = esize[inst->header.execution_size];
859
860 if (exec_size == 8) {
861 switch (qtr_ctl) {
862 case 0:
863 string (file, " 1Q");
864 break;
865 case 1:
866 string (file, " 2Q");
867 break;
868 case 2:
869 string (file, " 3Q");
870 break;
871 case 3:
872 string (file, " 4Q");
873 break;
874 }
875 } else if (exec_size == 16){
876 if (qtr_ctl < 2)
877 string (file, " 1H");
878 else
879 string (file, " 2H");
880 }
881 return 0;
882 }
883
884 int brw_disasm (FILE *file, struct brw_instruction *inst, int gen)
885 {
886 int err = 0;
887 int space = 0;
888
889 if (inst->header.predicate_control) {
890 string (file, "(");
891 err |= control (file, "predicate inverse", pred_inv, inst->header.predicate_inverse, NULL);
892 string (file, "f0");
893 if (inst->bits2.da1.flag_reg_nr)
894 format (file, ".%d", inst->bits2.da1.flag_reg_nr);
895 if (inst->header.access_mode == BRW_ALIGN_1)
896 err |= control (file, "predicate control align1", pred_ctrl_align1,
897 inst->header.predicate_control, NULL);
898 else
899 err |= control (file, "predicate control align16", pred_ctrl_align16,
900 inst->header.predicate_control, NULL);
901 string (file, ") ");
902 }
903
904 err |= print_opcode (file, inst->header.opcode);
905 err |= control (file, "saturate", saturate, inst->header.saturate, NULL);
906 err |= control (file, "debug control", debug_ctrl, inst->header.debug_control, NULL);
907
908 if (inst->header.opcode == BRW_OPCODE_MATH) {
909 string (file, " ");
910 err |= control (file, "function", math_function,
911 inst->header.destreg__conditionalmod, NULL);
912 } else if (inst->header.opcode != BRW_OPCODE_SEND &&
913 inst->header.opcode != BRW_OPCODE_SENDC)
914 err |= control (file, "conditional modifier", conditional_modifier,
915 inst->header.destreg__conditionalmod, NULL);
916
917 if (inst->header.opcode != BRW_OPCODE_NOP) {
918 string (file, "(");
919 err |= control (file, "execution size", exec_size, inst->header.execution_size, NULL);
920 string (file, ")");
921 }
922
923 if (inst->header.opcode == BRW_OPCODE_SEND && gen < 6)
924 format (file, " %d", inst->header.destreg__conditionalmod);
925
926 if (opcode[inst->header.opcode].ndst > 0) {
927 pad (file, 16);
928 err |= dest (file, inst);
929 } else if (gen >= 6 && (inst->header.opcode == BRW_OPCODE_IF ||
930 inst->header.opcode == BRW_OPCODE_ELSE ||
931 inst->header.opcode == BRW_OPCODE_ENDIF ||
932 inst->header.opcode == BRW_OPCODE_WHILE)) {
933 format (file, " %d", inst->bits1.branch_gen6.jump_count);
934 }
935
936 if (opcode[inst->header.opcode].nsrc > 0) {
937 pad (file, 32);
938 err |= src0 (file, inst);
939 }
940 if (opcode[inst->header.opcode].nsrc > 1) {
941 pad (file, 48);
942 err |= src1 (file, inst);
943 }
944
945 if (inst->header.opcode == BRW_OPCODE_SEND ||
946 inst->header.opcode == BRW_OPCODE_SENDC) {
947 int target;
948
949 if (gen >= 6)
950 target = inst->header.destreg__conditionalmod;
951 else if (gen == 5)
952 target = inst->bits2.send_gen5.sfid;
953 else
954 target = inst->bits3.generic.msg_target;
955
956 newline (file);
957 pad (file, 16);
958 space = 0;
959
960 if (gen >= 6) {
961 err |= control (file, "target function", target_function_gen6,
962 target, &space);
963 } else {
964 err |= control (file, "target function", target_function,
965 target, &space);
966 }
967
968 switch (target) {
969 case BRW_MESSAGE_TARGET_MATH:
970 err |= control (file, "math function", math_function,
971 inst->bits3.math.function, &space);
972 err |= control (file, "math saturate", math_saturate,
973 inst->bits3.math.saturate, &space);
974 err |= control (file, "math signed", math_signed,
975 inst->bits3.math.int_type, &space);
976 err |= control (file, "math scalar", math_scalar,
977 inst->bits3.math.data_type, &space);
978 err |= control (file, "math precision", math_precision,
979 inst->bits3.math.precision, &space);
980 break;
981 case BRW_MESSAGE_TARGET_SAMPLER:
982 if (gen >= 5) {
983 format (file, " (%d, %d, %d, %d)",
984 inst->bits3.sampler_gen5.binding_table_index,
985 inst->bits3.sampler_gen5.sampler,
986 inst->bits3.sampler_gen5.msg_type,
987 inst->bits3.sampler_gen5.simd_mode);
988 } else if (0 /* FINISHME: is_g4x */) {
989 format (file, " (%d, %d)",
990 inst->bits3.sampler_g4x.binding_table_index,
991 inst->bits3.sampler_g4x.sampler);
992 } else {
993 format (file, " (%d, %d, ",
994 inst->bits3.sampler.binding_table_index,
995 inst->bits3.sampler.sampler);
996 err |= control (file, "sampler target format",
997 sampler_target_format,
998 inst->bits3.sampler.return_format, NULL);
999 string (file, ")");
1000 }
1001 break;
1002 case BRW_MESSAGE_TARGET_DATAPORT_READ:
1003 if (gen >= 6) {
1004 format (file, " (%d, %d, %d, %d, %d, %d)",
1005 inst->bits3.gen6_dp.binding_table_index,
1006 inst->bits3.gen6_dp.msg_control,
1007 inst->bits3.gen6_dp.msg_type,
1008 inst->bits3.gen6_dp.send_commit_msg,
1009 inst->bits3.gen6_dp.msg_length,
1010 inst->bits3.gen6_dp.response_length);
1011 } else if (gen >= 5 /* FINISHME: || is_g4x */) {
1012 format (file, " (%d, %d, %d)",
1013 inst->bits3.dp_read_gen5.binding_table_index,
1014 inst->bits3.dp_read_gen5.msg_control,
1015 inst->bits3.dp_read_gen5.msg_type);
1016 } else {
1017 format (file, " (%d, %d, %d)",
1018 inst->bits3.dp_read.binding_table_index,
1019 inst->bits3.dp_read.msg_control,
1020 inst->bits3.dp_read.msg_type);
1021 }
1022 break;
1023
1024 case BRW_MESSAGE_TARGET_DATAPORT_WRITE:
1025 if (gen >= 6) {
1026 format (file, " (");
1027
1028 err |= control (file, "DP rc message type",
1029 dp_rc_msg_type_gen6,
1030 inst->bits3.gen6_dp.msg_type, &space);
1031
1032 format (file, ", %d, %d, %d, %d, %d, %d)",
1033 inst->bits3.gen6_dp.binding_table_index,
1034 inst->bits3.gen6_dp.msg_control,
1035 inst->bits3.gen6_dp.msg_type,
1036 inst->bits3.gen6_dp.send_commit_msg,
1037 inst->bits3.gen6_dp.msg_length,
1038 inst->bits3.gen6_dp.response_length);
1039 } else {
1040 format (file, " (%d, %d, %d, %d)",
1041 inst->bits3.dp_write.binding_table_index,
1042 (inst->bits3.dp_write.pixel_scoreboard_clear << 3) |
1043 inst->bits3.dp_write.msg_control,
1044 inst->bits3.dp_write.msg_type,
1045 inst->bits3.dp_write.send_commit_msg);
1046 }
1047 break;
1048
1049 case BRW_MESSAGE_TARGET_URB:
1050 if (gen >= 5) {
1051 format (file, " %d", inst->bits3.urb_gen5.offset);
1052 } else {
1053 format (file, " %d", inst->bits3.urb.offset);
1054 }
1055
1056 space = 1;
1057 if (gen >= 5) {
1058 err |= control (file, "urb opcode", urb_opcode,
1059 inst->bits3.urb_gen5.opcode, &space);
1060 }
1061 err |= control (file, "urb swizzle", urb_swizzle,
1062 inst->bits3.urb.swizzle_control, &space);
1063 err |= control (file, "urb allocate", urb_allocate,
1064 inst->bits3.urb.allocate, &space);
1065 err |= control (file, "urb used", urb_used,
1066 inst->bits3.urb.used, &space);
1067 err |= control (file, "urb complete", urb_complete,
1068 inst->bits3.urb.complete, &space);
1069 if (gen >= 5) {
1070 format (file, " mlen %d, rlen %d\n",
1071 inst->bits3.urb_gen5.msg_length,
1072 inst->bits3.urb_gen5.response_length);
1073 }
1074 break;
1075 case BRW_MESSAGE_TARGET_THREAD_SPAWNER:
1076 break;
1077 default:
1078 format (file, "unsupported target %d", target);
1079 break;
1080 }
1081 if (space)
1082 string (file, " ");
1083 if (gen >= 5) {
1084 format (file, "mlen %d",
1085 inst->bits3.generic_gen5.msg_length);
1086 format (file, " rlen %d",
1087 inst->bits3.generic_gen5.response_length);
1088 } else {
1089 format (file, "mlen %d",
1090 inst->bits3.generic.msg_length);
1091 format (file, " rlen %d",
1092 inst->bits3.generic.response_length);
1093 }
1094 }
1095 pad (file, 64);
1096 if (inst->header.opcode != BRW_OPCODE_NOP) {
1097 string (file, "{");
1098 space = 1;
1099 err |= control(file, "access mode", access_mode, inst->header.access_mode, &space);
1100 if (gen >= 6)
1101 err |= control (file, "write enable control", wectrl, inst->header.mask_control, &space);
1102 else
1103 err |= control (file, "mask control", mask_ctrl, inst->header.mask_control, &space);
1104 err |= control (file, "dependency control", dep_ctrl, inst->header.dependency_control, &space);
1105
1106 if (gen >= 6)
1107 err |= qtr_ctrl (file, inst);
1108 else {
1109 if (inst->header.compression_control == BRW_COMPRESSION_COMPRESSED &&
1110 opcode[inst->header.opcode].ndst > 0 &&
1111 inst->bits1.da1.dest_reg_file == BRW_MESSAGE_REGISTER_FILE &&
1112 inst->bits1.da1.dest_reg_nr & (1 << 7)) {
1113 format (file, " compr4");
1114 } else {
1115 err |= control (file, "compression control", compr_ctrl,
1116 inst->header.compression_control, &space);
1117 }
1118 }
1119
1120 err |= control (file, "thread control", thread_ctrl, inst->header.thread_control, &space);
1121 if (gen >= 6)
1122 err |= control (file, "acc write control", accwr, inst->header.acc_wr_control, &space);
1123 if (inst->header.opcode == BRW_OPCODE_SEND ||
1124 inst->header.opcode == BRW_OPCODE_SENDC)
1125 err |= control (file, "end of thread", end_of_thread,
1126 inst->bits3.generic.end_of_thread, &space);
1127 if (space)
1128 string (file, " ");
1129 string (file, "}");
1130 }
1131 string (file, ";");
1132 newline (file);
1133 return err;
1134 }