2 * Copyright © 2008 Keith Packard
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
30 #include "main/mtypes.h"
32 #include "brw_context.h"
33 #include "brw_defines.h"
40 [BRW_OPCODE_MOV
] = { .name
= "mov", .nsrc
= 1, .ndst
= 1 },
41 [BRW_OPCODE_FRC
] = { .name
= "frc", .nsrc
= 1, .ndst
= 1 },
42 [BRW_OPCODE_RNDU
] = { .name
= "rndu", .nsrc
= 1, .ndst
= 1 },
43 [BRW_OPCODE_RNDD
] = { .name
= "rndd", .nsrc
= 1, .ndst
= 1 },
44 [BRW_OPCODE_RNDE
] = { .name
= "rnde", .nsrc
= 1, .ndst
= 1 },
45 [BRW_OPCODE_RNDZ
] = { .name
= "rndz", .nsrc
= 1, .ndst
= 1 },
46 [BRW_OPCODE_NOT
] = { .name
= "not", .nsrc
= 1, .ndst
= 1 },
47 [BRW_OPCODE_LZD
] = { .name
= "lzd", .nsrc
= 1, .ndst
= 1 },
49 [BRW_OPCODE_MUL
] = { .name
= "mul", .nsrc
= 2, .ndst
= 1 },
50 [BRW_OPCODE_MAC
] = { .name
= "mac", .nsrc
= 2, .ndst
= 1 },
51 [BRW_OPCODE_MACH
] = { .name
= "mach", .nsrc
= 2, .ndst
= 1 },
52 [BRW_OPCODE_LINE
] = { .name
= "line", .nsrc
= 2, .ndst
= 1 },
53 [BRW_OPCODE_PLN
] = { .name
= "pln", .nsrc
= 2, .ndst
= 1 },
54 [BRW_OPCODE_SAD2
] = { .name
= "sad2", .nsrc
= 2, .ndst
= 1 },
55 [BRW_OPCODE_SADA2
] = { .name
= "sada2", .nsrc
= 2, .ndst
= 1 },
56 [BRW_OPCODE_DP4
] = { .name
= "dp4", .nsrc
= 2, .ndst
= 1 },
57 [BRW_OPCODE_DPH
] = { .name
= "dph", .nsrc
= 2, .ndst
= 1 },
58 [BRW_OPCODE_DP3
] = { .name
= "dp3", .nsrc
= 2, .ndst
= 1 },
59 [BRW_OPCODE_DP2
] = { .name
= "dp2", .nsrc
= 2, .ndst
= 1 },
60 [BRW_OPCODE_MATH
] = { .name
= "math", .nsrc
= 2, .ndst
= 1 },
62 [BRW_OPCODE_AVG
] = { .name
= "avg", .nsrc
= 2, .ndst
= 1 },
63 [BRW_OPCODE_ADD
] = { .name
= "add", .nsrc
= 2, .ndst
= 1 },
64 [BRW_OPCODE_SEL
] = { .name
= "sel", .nsrc
= 2, .ndst
= 1 },
65 [BRW_OPCODE_AND
] = { .name
= "and", .nsrc
= 2, .ndst
= 1 },
66 [BRW_OPCODE_OR
] = { .name
= "or", .nsrc
= 2, .ndst
= 1 },
67 [BRW_OPCODE_XOR
] = { .name
= "xor", .nsrc
= 2, .ndst
= 1 },
68 [BRW_OPCODE_SHR
] = { .name
= "shr", .nsrc
= 2, .ndst
= 1 },
69 [BRW_OPCODE_SHL
] = { .name
= "shl", .nsrc
= 2, .ndst
= 1 },
70 [BRW_OPCODE_ASR
] = { .name
= "asr", .nsrc
= 2, .ndst
= 1 },
71 [BRW_OPCODE_CMP
] = { .name
= "cmp", .nsrc
= 2, .ndst
= 1 },
72 [BRW_OPCODE_CMPN
] = { .name
= "cmpn", .nsrc
= 2, .ndst
= 1 },
74 [BRW_OPCODE_SEND
] = { .name
= "send", .nsrc
= 1, .ndst
= 1 },
75 [BRW_OPCODE_SENDC
] = { .name
= "sendc", .nsrc
= 1, .ndst
= 1 },
76 [BRW_OPCODE_NOP
] = { .name
= "nop", .nsrc
= 0, .ndst
= 0 },
77 [BRW_OPCODE_JMPI
] = { .name
= "jmpi", .nsrc
= 1, .ndst
= 0 },
78 [BRW_OPCODE_IF
] = { .name
= "if", .nsrc
= 2, .ndst
= 0 },
79 [BRW_OPCODE_IFF
] = { .name
= "iff", .nsrc
= 2, .ndst
= 1 },
80 [BRW_OPCODE_WHILE
] = { .name
= "while", .nsrc
= 2, .ndst
= 0 },
81 [BRW_OPCODE_ELSE
] = { .name
= "else", .nsrc
= 2, .ndst
= 0 },
82 [BRW_OPCODE_BREAK
] = { .name
= "break", .nsrc
= 2, .ndst
= 0 },
83 [BRW_OPCODE_CONTINUE
] = { .name
= "cont", .nsrc
= 1, .ndst
= 0 },
84 [BRW_OPCODE_HALT
] = { .name
= "halt", .nsrc
= 1, .ndst
= 0 },
85 [BRW_OPCODE_MSAVE
] = { .name
= "msave", .nsrc
= 1, .ndst
= 1 },
86 [BRW_OPCODE_PUSH
] = { .name
= "push", .nsrc
= 1, .ndst
= 1 },
87 [BRW_OPCODE_MRESTORE
] = { .name
= "mrest", .nsrc
= 1, .ndst
= 1 },
88 [BRW_OPCODE_POP
] = { .name
= "pop", .nsrc
= 2, .ndst
= 0 },
89 [BRW_OPCODE_WAIT
] = { .name
= "wait", .nsrc
= 1, .ndst
= 0 },
90 [BRW_OPCODE_DO
] = { .name
= "do", .nsrc
= 0, .ndst
= 0 },
91 [BRW_OPCODE_ENDIF
] = { .name
= "endif", .nsrc
= 2, .ndst
= 0 },
94 char *conditional_modifier
[16] = {
95 [BRW_CONDITIONAL_NONE
] = "",
96 [BRW_CONDITIONAL_Z
] = ".e",
97 [BRW_CONDITIONAL_NZ
] = ".ne",
98 [BRW_CONDITIONAL_G
] = ".g",
99 [BRW_CONDITIONAL_GE
] = ".ge",
100 [BRW_CONDITIONAL_L
] = ".l",
101 [BRW_CONDITIONAL_LE
] = ".le",
102 [BRW_CONDITIONAL_R
] = ".r",
103 [BRW_CONDITIONAL_O
] = ".o",
104 [BRW_CONDITIONAL_U
] = ".u",
117 char *vert_stride
[16] = {
136 char *horiz_stride
[4] = {
143 char *chan_sel
[4] = {
150 char *dest_condmod
[16] = {
153 char *debug_ctrl
[2] = {
158 char *saturate
[2] = {
173 char *exec_size
[8] = {
182 char *pred_inv
[2] = {
187 char *pred_ctrl_align16
[16] = {
197 char *pred_ctrl_align1
[16] = {
211 char *thread_ctrl
[4] = {
216 char *compr_ctrl
[4] = {
223 char *dep_ctrl
[4] = {
227 [3] = "NoDDClr,NoDDChk",
230 char *mask_ctrl
[4] = {
235 char *access_mode
[2] = {
240 char *reg_encoding
[8] = {
250 int reg_type_size
[8] = {
260 char *imm_encoding
[8] = {
270 char *reg_file
[4] = {
277 char *writemask
[16] = {
296 char *end_of_thread
[2] = {
301 char *target_function
[16] = {
302 [BRW_MESSAGE_TARGET_NULL
] = "null",
303 [BRW_MESSAGE_TARGET_MATH
] = "math",
304 [BRW_MESSAGE_TARGET_SAMPLER
] = "sampler",
305 [BRW_MESSAGE_TARGET_GATEWAY
] = "gateway",
306 [BRW_MESSAGE_TARGET_DATAPORT_READ
] = "read",
307 [BRW_MESSAGE_TARGET_DATAPORT_WRITE
] = "write",
308 [BRW_MESSAGE_TARGET_URB
] = "urb",
309 [BRW_MESSAGE_TARGET_THREAD_SPAWNER
] = "thread_spawner"
312 char *math_function
[16] = {
313 [BRW_MATH_FUNCTION_INV
] = "inv",
314 [BRW_MATH_FUNCTION_LOG
] = "log",
315 [BRW_MATH_FUNCTION_EXP
] = "exp",
316 [BRW_MATH_FUNCTION_SQRT
] = "sqrt",
317 [BRW_MATH_FUNCTION_RSQ
] = "rsq",
318 [BRW_MATH_FUNCTION_SIN
] = "sin",
319 [BRW_MATH_FUNCTION_COS
] = "cos",
320 [BRW_MATH_FUNCTION_SINCOS
] = "sincos",
321 [BRW_MATH_FUNCTION_TAN
] = "tan",
322 [BRW_MATH_FUNCTION_POW
] = "pow",
323 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER
] = "intdivmod",
324 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT
] = "intmod",
325 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER
] = "intdiv",
328 char *math_saturate
[2] = {
333 char *math_signed
[2] = {
338 char *math_scalar
[2] = {
343 char *math_precision
[2] = {
345 [1] = "partial_precision"
348 char *urb_opcode
[2] = {
353 char *urb_swizzle
[4] = {
354 [BRW_URB_SWIZZLE_NONE
] = "",
355 [BRW_URB_SWIZZLE_INTERLEAVE
] = "interleave",
356 [BRW_URB_SWIZZLE_TRANSPOSE
] = "transpose",
359 char *urb_allocate
[2] = {
364 char *urb_used
[2] = {
369 char *urb_complete
[2] = {
374 char *sampler_target_format
[4] = {
383 static int string (FILE *file
, char *string
)
385 fputs (string
, file
);
386 column
+= strlen (string
);
390 static int format (FILE *f
, char *format
, ...)
394 va_start (args
, format
);
396 vsnprintf (buf
, sizeof (buf
) - 1, format
, args
);
402 static int newline (FILE *f
)
409 static int pad (FILE *f
, int c
)
417 static int control (FILE *file
, char *name
, char *ctrl
[], GLuint id
, int *space
)
420 fprintf (file
, "*** invalid %s value %d ",
428 string (file
, ctrl
[id
]);
435 static int print_opcode (FILE *file
, int id
)
437 if (!opcode
[id
].name
) {
438 format (file
, "*** invalid opcode value %d ", id
);
441 string (file
, opcode
[id
].name
);
445 static int reg (FILE *file
, GLuint _reg_file
, GLuint _reg_nr
)
449 /* Clear the Compr4 instruction compression bit. */
450 if (_reg_file
== BRW_MESSAGE_REGISTER_FILE
)
451 _reg_nr
&= ~(1 << 7);
453 if (_reg_file
== BRW_ARCHITECTURE_REGISTER_FILE
) {
454 switch (_reg_nr
& 0xf0) {
456 string (file
, "null");
458 case BRW_ARF_ADDRESS
:
459 format (file
, "a%d", _reg_nr
& 0x0f);
461 case BRW_ARF_ACCUMULATOR
:
462 format (file
, "acc%d", _reg_nr
& 0x0f);
465 format (file
, "f%d", _reg_nr
& 0x0f);
468 format (file
, "mask%d", _reg_nr
& 0x0f);
470 case BRW_ARF_MASK_STACK
:
471 format (file
, "msd%d", _reg_nr
& 0x0f);
474 format (file
, "sr%d", _reg_nr
& 0x0f);
476 case BRW_ARF_CONTROL
:
477 format (file
, "cr%d", _reg_nr
& 0x0f);
479 case BRW_ARF_NOTIFICATION_COUNT
:
480 format (file
, "n%d", _reg_nr
& 0x0f);
487 format (file
, "ARF%d", _reg_nr
);
491 err
|= control (file
, "src reg file", reg_file
, _reg_file
, NULL
);
492 format (file
, "%d", _reg_nr
);
497 static int dest (FILE *file
, struct brw_instruction
*inst
)
501 if (inst
->header
.access_mode
== BRW_ALIGN_1
)
503 if (inst
->bits1
.da1
.dest_address_mode
== BRW_ADDRESS_DIRECT
)
505 err
|= reg (file
, inst
->bits1
.da1
.dest_reg_file
, inst
->bits1
.da1
.dest_reg_nr
);
508 if (inst
->bits1
.da1
.dest_subreg_nr
)
509 format (file
, ".%d", inst
->bits1
.da1
.dest_subreg_nr
/
510 reg_type_size
[inst
->bits1
.da1
.dest_reg_type
]);
511 format (file
, "<%d>", inst
->bits1
.da1
.dest_horiz_stride
);
512 err
|= control (file
, "dest reg encoding", reg_encoding
, inst
->bits1
.da1
.dest_reg_type
, NULL
);
516 string (file
, "g[a0");
517 if (inst
->bits1
.ia1
.dest_subreg_nr
)
518 format (file
, ".%d", inst
->bits1
.ia1
.dest_subreg_nr
/
519 reg_type_size
[inst
->bits1
.ia1
.dest_reg_type
]);
520 if (inst
->bits1
.ia1
.dest_indirect_offset
)
521 format (file
, " %d", inst
->bits1
.ia1
.dest_indirect_offset
);
523 format (file
, "<%d>", inst
->bits1
.ia1
.dest_horiz_stride
);
524 err
|= control (file
, "dest reg encoding", reg_encoding
, inst
->bits1
.ia1
.dest_reg_type
, NULL
);
529 if (inst
->bits1
.da16
.dest_address_mode
== BRW_ADDRESS_DIRECT
)
531 err
|= reg (file
, inst
->bits1
.da16
.dest_reg_file
, inst
->bits1
.da16
.dest_reg_nr
);
534 if (inst
->bits1
.da16
.dest_subreg_nr
)
535 format (file
, ".%d", inst
->bits1
.da16
.dest_subreg_nr
/
536 reg_type_size
[inst
->bits1
.da16
.dest_reg_type
]);
537 string (file
, "<1>");
538 err
|= control (file
, "writemask", writemask
, inst
->bits1
.da16
.dest_writemask
, NULL
);
539 err
|= control (file
, "dest reg encoding", reg_encoding
, inst
->bits1
.da16
.dest_reg_type
, NULL
);
544 string (file
, "Indirect align16 address mode not supported");
551 static int src_align1_region (FILE *file
,
552 GLuint _vert_stride
, GLuint _width
, GLuint _horiz_stride
)
556 err
|= control (file
, "vert stride", vert_stride
, _vert_stride
, NULL
);
558 err
|= control (file
, "width", width
, _width
, NULL
);
560 err
|= control (file
, "horiz_stride", horiz_stride
, _horiz_stride
, NULL
);
565 static int src_da1 (FILE *file
, GLuint type
, GLuint _reg_file
,
566 GLuint _vert_stride
, GLuint _width
, GLuint _horiz_stride
,
567 GLuint reg_num
, GLuint sub_reg_num
, GLuint __abs
, GLuint _negate
)
570 err
|= control (file
, "negate", negate
, _negate
, NULL
);
571 err
|= control (file
, "abs", _abs
, __abs
, NULL
);
573 err
|= reg (file
, _reg_file
, reg_num
);
577 format (file
, ".%d", sub_reg_num
/ reg_type_size
[type
]); /* use formal style like spec */
578 src_align1_region (file
, _vert_stride
, _width
, _horiz_stride
);
579 err
|= control (file
, "src reg encoding", reg_encoding
, type
, NULL
);
583 static int src_ia1 (FILE *file
,
587 GLuint _addr_subreg_nr
,
591 GLuint _horiz_stride
,
596 err
|= control (file
, "negate", negate
, _negate
, NULL
);
597 err
|= control (file
, "abs", _abs
, __abs
, NULL
);
599 string (file
, "g[a0");
601 format (file
, ".%d", _addr_subreg_nr
);
603 format (file
, " %d", _addr_imm
);
605 src_align1_region (file
, _vert_stride
, _width
, _horiz_stride
);
606 err
|= control (file
, "src reg encoding", reg_encoding
, type
, NULL
);
610 static int src_da16 (FILE *file
,
624 err
|= control (file
, "negate", negate
, _negate
, NULL
);
625 err
|= control (file
, "abs", _abs
, __abs
, NULL
);
627 err
|= reg (file
, _reg_file
, _reg_nr
);
631 /* bit4 for subreg number byte addressing. Make this same meaning as
632 in da1 case, so output looks consistent. */
633 format (file
, ".%d", 16 / reg_type_size
[_reg_type
]);
635 err
|= control (file
, "vert stride", vert_stride
, _vert_stride
, NULL
);
636 string (file
, ",4,1>");
638 * Three kinds of swizzle display:
639 * identity - nothing printed
640 * 1->all - print the single channel
641 * 1->1 - print the mapping
643 if (swz_x
== BRW_CHANNEL_X
&&
644 swz_y
== BRW_CHANNEL_Y
&&
645 swz_z
== BRW_CHANNEL_Z
&&
646 swz_w
== BRW_CHANNEL_W
)
650 else if (swz_x
== swz_y
&& swz_x
== swz_z
&& swz_x
== swz_w
)
653 err
|= control (file
, "channel select", chan_sel
, swz_x
, NULL
);
658 err
|= control (file
, "channel select", chan_sel
, swz_x
, NULL
);
659 err
|= control (file
, "channel select", chan_sel
, swz_y
, NULL
);
660 err
|= control (file
, "channel select", chan_sel
, swz_z
, NULL
);
661 err
|= control (file
, "channel select", chan_sel
, swz_w
, NULL
);
663 err
|= control (file
, "src da16 reg type", reg_encoding
, _reg_type
, NULL
);
668 static int imm (FILE *file
, GLuint type
, struct brw_instruction
*inst
) {
670 case BRW_REGISTER_TYPE_UD
:
671 format (file
, "0x%08xUD", inst
->bits3
.ud
);
673 case BRW_REGISTER_TYPE_D
:
674 format (file
, "%dD", inst
->bits3
.d
);
676 case BRW_REGISTER_TYPE_UW
:
677 format (file
, "0x%04xUW", (uint16_t) inst
->bits3
.ud
);
679 case BRW_REGISTER_TYPE_W
:
680 format (file
, "%dW", (int16_t) inst
->bits3
.d
);
682 case BRW_REGISTER_TYPE_UB
:
683 format (file
, "0x%02xUB", (int8_t) inst
->bits3
.ud
);
685 case BRW_REGISTER_TYPE_VF
:
686 format (file
, "Vector Float");
688 case BRW_REGISTER_TYPE_V
:
689 format (file
, "0x%08xV", inst
->bits3
.ud
);
691 case BRW_REGISTER_TYPE_F
:
692 format (file
, "%-gF", inst
->bits3
.f
);
697 static int src0 (FILE *file
, struct brw_instruction
*inst
)
699 if (inst
->bits1
.da1
.src0_reg_file
== BRW_IMMEDIATE_VALUE
)
700 return imm (file
, inst
->bits1
.da1
.src0_reg_type
,
702 else if (inst
->header
.access_mode
== BRW_ALIGN_1
)
704 if (inst
->bits2
.da1
.src0_address_mode
== BRW_ADDRESS_DIRECT
)
706 return src_da1 (file
,
707 inst
->bits1
.da1
.src0_reg_type
,
708 inst
->bits1
.da1
.src0_reg_file
,
709 inst
->bits2
.da1
.src0_vert_stride
,
710 inst
->bits2
.da1
.src0_width
,
711 inst
->bits2
.da1
.src0_horiz_stride
,
712 inst
->bits2
.da1
.src0_reg_nr
,
713 inst
->bits2
.da1
.src0_subreg_nr
,
714 inst
->bits2
.da1
.src0_abs
,
715 inst
->bits2
.da1
.src0_negate
);
719 return src_ia1 (file
,
720 inst
->bits1
.ia1
.src0_reg_type
,
721 inst
->bits1
.ia1
.src0_reg_file
,
722 inst
->bits2
.ia1
.src0_indirect_offset
,
723 inst
->bits2
.ia1
.src0_subreg_nr
,
724 inst
->bits2
.ia1
.src0_negate
,
725 inst
->bits2
.ia1
.src0_abs
,
726 inst
->bits2
.ia1
.src0_address_mode
,
727 inst
->bits2
.ia1
.src0_horiz_stride
,
728 inst
->bits2
.ia1
.src0_width
,
729 inst
->bits2
.ia1
.src0_vert_stride
);
734 if (inst
->bits2
.da16
.src0_address_mode
== BRW_ADDRESS_DIRECT
)
736 return src_da16 (file
,
737 inst
->bits1
.da16
.src0_reg_type
,
738 inst
->bits1
.da16
.src0_reg_file
,
739 inst
->bits2
.da16
.src0_vert_stride
,
740 inst
->bits2
.da16
.src0_reg_nr
,
741 inst
->bits2
.da16
.src0_subreg_nr
,
742 inst
->bits2
.da16
.src0_abs
,
743 inst
->bits2
.da16
.src0_negate
,
744 inst
->bits2
.da16
.src0_swz_x
,
745 inst
->bits2
.da16
.src0_swz_y
,
746 inst
->bits2
.da16
.src0_swz_z
,
747 inst
->bits2
.da16
.src0_swz_w
);
751 string (file
, "Indirect align16 address mode not supported");
757 static int src1 (FILE *file
, struct brw_instruction
*inst
)
759 if (inst
->bits1
.da1
.src1_reg_file
== BRW_IMMEDIATE_VALUE
)
760 return imm (file
, inst
->bits1
.da1
.src1_reg_type
,
762 else if (inst
->header
.access_mode
== BRW_ALIGN_1
)
764 if (inst
->bits3
.da1
.src1_address_mode
== BRW_ADDRESS_DIRECT
)
766 return src_da1 (file
,
767 inst
->bits1
.da1
.src1_reg_type
,
768 inst
->bits1
.da1
.src1_reg_file
,
769 inst
->bits3
.da1
.src1_vert_stride
,
770 inst
->bits3
.da1
.src1_width
,
771 inst
->bits3
.da1
.src1_horiz_stride
,
772 inst
->bits3
.da1
.src1_reg_nr
,
773 inst
->bits3
.da1
.src1_subreg_nr
,
774 inst
->bits3
.da1
.src1_abs
,
775 inst
->bits3
.da1
.src1_negate
);
779 return src_ia1 (file
,
780 inst
->bits1
.ia1
.src1_reg_type
,
781 inst
->bits1
.ia1
.src1_reg_file
,
782 inst
->bits3
.ia1
.src1_indirect_offset
,
783 inst
->bits3
.ia1
.src1_subreg_nr
,
784 inst
->bits3
.ia1
.src1_negate
,
785 inst
->bits3
.ia1
.src1_abs
,
786 inst
->bits3
.ia1
.src1_address_mode
,
787 inst
->bits3
.ia1
.src1_horiz_stride
,
788 inst
->bits3
.ia1
.src1_width
,
789 inst
->bits3
.ia1
.src1_vert_stride
);
794 if (inst
->bits3
.da16
.src1_address_mode
== BRW_ADDRESS_DIRECT
)
796 return src_da16 (file
,
797 inst
->bits1
.da16
.src1_reg_type
,
798 inst
->bits1
.da16
.src1_reg_file
,
799 inst
->bits3
.da16
.src1_vert_stride
,
800 inst
->bits3
.da16
.src1_reg_nr
,
801 inst
->bits3
.da16
.src1_subreg_nr
,
802 inst
->bits3
.da16
.src1_abs
,
803 inst
->bits3
.da16
.src1_negate
,
804 inst
->bits3
.da16
.src1_swz_x
,
805 inst
->bits3
.da16
.src1_swz_y
,
806 inst
->bits3
.da16
.src1_swz_z
,
807 inst
->bits3
.da16
.src1_swz_w
);
811 string (file
, "Indirect align16 address mode not supported");
826 static int qtr_ctrl(FILE *file
, struct brw_instruction
*inst
)
828 int qtr_ctl
= inst
->header
.compression_control
;
829 int exec_size
= esize
[inst
->header
.execution_size
];
831 if (exec_size
== 8) {
834 string (file
, " 1Q");
837 string (file
, " 2Q");
840 string (file
, " 3Q");
843 string (file
, " 4Q");
846 } else if (exec_size
== 16){
848 string (file
, " 1H");
850 string (file
, " 2H");
855 int brw_disasm (FILE *file
, struct brw_instruction
*inst
, int gen
)
860 if (inst
->header
.predicate_control
) {
862 err
|= control (file
, "predicate inverse", pred_inv
, inst
->header
.predicate_inverse
, NULL
);
864 if (inst
->bits2
.da1
.flag_reg_nr
)
865 format (file
, ".%d", inst
->bits2
.da1
.flag_reg_nr
);
866 if (inst
->header
.access_mode
== BRW_ALIGN_1
)
867 err
|= control (file
, "predicate control align1", pred_ctrl_align1
,
868 inst
->header
.predicate_control
, NULL
);
870 err
|= control (file
, "predicate control align16", pred_ctrl_align16
,
871 inst
->header
.predicate_control
, NULL
);
875 err
|= print_opcode (file
, inst
->header
.opcode
);
876 err
|= control (file
, "saturate", saturate
, inst
->header
.saturate
, NULL
);
877 err
|= control (file
, "debug control", debug_ctrl
, inst
->header
.debug_control
, NULL
);
879 if (inst
->header
.opcode
== BRW_OPCODE_MATH
) {
881 err
|= control (file
, "function", math_function
,
882 inst
->header
.destreg__conditionalmod
, NULL
);
883 } else if (inst
->header
.opcode
!= BRW_OPCODE_SEND
&&
884 inst
->header
.opcode
!= BRW_OPCODE_SENDC
)
885 err
|= control (file
, "conditional modifier", conditional_modifier
,
886 inst
->header
.destreg__conditionalmod
, NULL
);
888 if (inst
->header
.opcode
!= BRW_OPCODE_NOP
) {
890 err
|= control (file
, "execution size", exec_size
, inst
->header
.execution_size
, NULL
);
894 if (inst
->header
.opcode
== BRW_OPCODE_SEND
&& gen
< 6)
895 format (file
, " %d", inst
->header
.destreg__conditionalmod
);
897 if (opcode
[inst
->header
.opcode
].ndst
> 0) {
899 err
|= dest (file
, inst
);
900 } else if (gen
>= 6 && (inst
->header
.opcode
== BRW_OPCODE_IF
||
901 inst
->header
.opcode
== BRW_OPCODE_ELSE
||
902 inst
->header
.opcode
== BRW_OPCODE_ENDIF
||
903 inst
->header
.opcode
== BRW_OPCODE_WHILE
)) {
904 format (file
, " %d", inst
->bits1
.branch_gen6
.jump_count
);
907 if (opcode
[inst
->header
.opcode
].nsrc
> 0) {
909 err
|= src0 (file
, inst
);
911 if (opcode
[inst
->header
.opcode
].nsrc
> 1) {
913 err
|= src1 (file
, inst
);
916 if (inst
->header
.opcode
== BRW_OPCODE_SEND
||
917 inst
->header
.opcode
== BRW_OPCODE_SENDC
) {
921 target
= inst
->header
.destreg__conditionalmod
;
923 target
= inst
->bits2
.send_gen5
.sfid
;
925 target
= inst
->bits3
.generic
.msg_target
;
930 err
|= control (file
, "target function", target_function
,
934 case BRW_MESSAGE_TARGET_MATH
:
935 err
|= control (file
, "math function", math_function
,
936 inst
->bits3
.math
.function
, &space
);
937 err
|= control (file
, "math saturate", math_saturate
,
938 inst
->bits3
.math
.saturate
, &space
);
939 err
|= control (file
, "math signed", math_signed
,
940 inst
->bits3
.math
.int_type
, &space
);
941 err
|= control (file
, "math scalar", math_scalar
,
942 inst
->bits3
.math
.data_type
, &space
);
943 err
|= control (file
, "math precision", math_precision
,
944 inst
->bits3
.math
.precision
, &space
);
946 case BRW_MESSAGE_TARGET_SAMPLER
:
948 format (file
, " (%d, %d, %d, %d)",
949 inst
->bits3
.sampler_gen5
.binding_table_index
,
950 inst
->bits3
.sampler_gen5
.sampler
,
951 inst
->bits3
.sampler_gen5
.msg_type
,
952 inst
->bits3
.sampler_gen5
.simd_mode
);
953 } else if (0 /* FINISHME: is_g4x */) {
954 format (file
, " (%d, %d)",
955 inst
->bits3
.sampler_g4x
.binding_table_index
,
956 inst
->bits3
.sampler_g4x
.sampler
);
958 format (file
, " (%d, %d, ",
959 inst
->bits3
.sampler
.binding_table_index
,
960 inst
->bits3
.sampler
.sampler
);
961 err
|= control (file
, "sampler target format",
962 sampler_target_format
,
963 inst
->bits3
.sampler
.return_format
, NULL
);
967 case BRW_MESSAGE_TARGET_DATAPORT_READ
:
969 format (file
, " (%d, %d, %d, %d, %d, %d)",
970 inst
->bits3
.gen6_dp
.binding_table_index
,
971 inst
->bits3
.gen6_dp
.msg_control
,
972 inst
->bits3
.gen6_dp
.msg_type
,
973 inst
->bits3
.gen6_dp
.send_commit_msg
,
974 inst
->bits3
.gen6_dp
.msg_length
,
975 inst
->bits3
.gen6_dp
.response_length
);
976 } else if (gen
>= 5 /* FINISHME: || is_g4x */) {
977 format (file
, " (%d, %d, %d)",
978 inst
->bits3
.dp_read_gen5
.binding_table_index
,
979 inst
->bits3
.dp_read_gen5
.msg_control
,
980 inst
->bits3
.dp_read_gen5
.msg_type
);
982 format (file
, " (%d, %d, %d)",
983 inst
->bits3
.dp_read
.binding_table_index
,
984 inst
->bits3
.dp_read
.msg_control
,
985 inst
->bits3
.dp_read
.msg_type
);
988 case BRW_MESSAGE_TARGET_DATAPORT_WRITE
:
990 format (file
, " (%d, %d, %d, %d, %d, %d)",
991 inst
->bits3
.gen6_dp
.binding_table_index
,
992 inst
->bits3
.gen6_dp
.msg_control
,
993 inst
->bits3
.gen6_dp
.msg_type
,
994 inst
->bits3
.gen6_dp
.send_commit_msg
,
995 inst
->bits3
.gen6_dp
.msg_length
,
996 inst
->bits3
.gen6_dp
.response_length
);
998 format (file
, " (%d, %d, %d, %d)",
999 inst
->bits3
.dp_write
.binding_table_index
,
1000 (inst
->bits3
.dp_write
.pixel_scoreboard_clear
<< 3) |
1001 inst
->bits3
.dp_write
.msg_control
,
1002 inst
->bits3
.dp_write
.msg_type
,
1003 inst
->bits3
.dp_write
.send_commit_msg
);
1006 case BRW_MESSAGE_TARGET_URB
:
1008 format (file
, " %d", inst
->bits3
.urb_gen5
.offset
);
1010 format (file
, " %d", inst
->bits3
.urb
.offset
);
1015 err
|= control (file
, "urb opcode", urb_opcode
,
1016 inst
->bits3
.urb_gen5
.opcode
, &space
);
1018 err
|= control (file
, "urb swizzle", urb_swizzle
,
1019 inst
->bits3
.urb
.swizzle_control
, &space
);
1020 err
|= control (file
, "urb allocate", urb_allocate
,
1021 inst
->bits3
.urb
.allocate
, &space
);
1022 err
|= control (file
, "urb used", urb_used
,
1023 inst
->bits3
.urb
.used
, &space
);
1024 err
|= control (file
, "urb complete", urb_complete
,
1025 inst
->bits3
.urb
.complete
, &space
);
1027 format (file
, " mlen %d, rlen %d\n",
1028 inst
->bits3
.urb_gen5
.msg_length
,
1029 inst
->bits3
.urb_gen5
.response_length
);
1032 case BRW_MESSAGE_TARGET_THREAD_SPAWNER
:
1035 format (file
, "unsupported target %d", target
);
1041 format (file
, "mlen %d",
1042 inst
->bits3
.generic_gen5
.msg_length
);
1043 format (file
, " rlen %d",
1044 inst
->bits3
.generic_gen5
.response_length
);
1046 format (file
, "mlen %d",
1047 inst
->bits3
.generic
.msg_length
);
1048 format (file
, " rlen %d",
1049 inst
->bits3
.generic
.response_length
);
1053 if (inst
->header
.opcode
!= BRW_OPCODE_NOP
) {
1056 err
|= control(file
, "access mode", access_mode
, inst
->header
.access_mode
, &space
);
1058 err
|= control (file
, "write enable control", wectrl
, inst
->header
.mask_control
, &space
);
1060 err
|= control (file
, "mask control", mask_ctrl
, inst
->header
.mask_control
, &space
);
1061 err
|= control (file
, "dependency control", dep_ctrl
, inst
->header
.dependency_control
, &space
);
1064 err
|= qtr_ctrl (file
, inst
);
1066 if (inst
->header
.compression_control
== BRW_COMPRESSION_COMPRESSED
&&
1067 opcode
[inst
->header
.opcode
].ndst
> 0 &&
1068 inst
->bits1
.da1
.dest_reg_file
== BRW_MESSAGE_REGISTER_FILE
&&
1069 inst
->bits1
.da1
.dest_reg_nr
& (1 << 7)) {
1070 format (file
, " compr4");
1072 err
|= control (file
, "compression control", compr_ctrl
,
1073 inst
->header
.compression_control
, &space
);
1077 err
|= control (file
, "thread control", thread_ctrl
, inst
->header
.thread_control
, &space
);
1079 err
|= control (file
, "acc write control", accwr
, inst
->header
.acc_wr_control
, &space
);
1080 if (inst
->header
.opcode
== BRW_OPCODE_SEND
||
1081 inst
->header
.opcode
== BRW_OPCODE_SENDC
)
1082 err
|= control (file
, "end of thread", end_of_thread
,
1083 inst
->bits3
.generic
.end_of_thread
, &space
);