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i965/vec4: Simplify opt_reduce_swizzle() using the swizzle utils.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_disasm.c
1 /*
2 * Copyright © 2008 Keith Packard
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
13 *
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20 * OF THIS SOFTWARE.
21 */
22
23 #include <stdio.h>
24 #include <stdlib.h>
25 #include <string.h>
26 #include <getopt.h>
27 #include <unistd.h>
28 #include <stdarg.h>
29
30 #include "brw_context.h"
31 #include "brw_defines.h"
32 #include "brw_reg.h"
33 #include "brw_inst.h"
34
35 const struct opcode_desc opcode_descs[128] = {
36 [BRW_OPCODE_MOV] = { .name = "mov", .nsrc = 1, .ndst = 1 },
37 [BRW_OPCODE_FRC] = { .name = "frc", .nsrc = 1, .ndst = 1 },
38 [BRW_OPCODE_RNDU] = { .name = "rndu", .nsrc = 1, .ndst = 1 },
39 [BRW_OPCODE_RNDD] = { .name = "rndd", .nsrc = 1, .ndst = 1 },
40 [BRW_OPCODE_RNDE] = { .name = "rnde", .nsrc = 1, .ndst = 1 },
41 [BRW_OPCODE_RNDZ] = { .name = "rndz", .nsrc = 1, .ndst = 1 },
42 [BRW_OPCODE_NOT] = { .name = "not", .nsrc = 1, .ndst = 1 },
43 [BRW_OPCODE_LZD] = { .name = "lzd", .nsrc = 1, .ndst = 1 },
44 [BRW_OPCODE_F32TO16] = { .name = "f32to16", .nsrc = 1, .ndst = 1 },
45 [BRW_OPCODE_F16TO32] = { .name = "f16to32", .nsrc = 1, .ndst = 1 },
46 [BRW_OPCODE_BFREV] = { .name = "bfrev", .nsrc = 1, .ndst = 1 },
47 [BRW_OPCODE_FBH] = { .name = "fbh", .nsrc = 1, .ndst = 1 },
48 [BRW_OPCODE_FBL] = { .name = "fbl", .nsrc = 1, .ndst = 1 },
49 [BRW_OPCODE_CBIT] = { .name = "cbit", .nsrc = 1, .ndst = 1 },
50
51 [BRW_OPCODE_MUL] = { .name = "mul", .nsrc = 2, .ndst = 1 },
52 [BRW_OPCODE_MAC] = { .name = "mac", .nsrc = 2, .ndst = 1 },
53 [BRW_OPCODE_MACH] = { .name = "mach", .nsrc = 2, .ndst = 1 },
54 [BRW_OPCODE_LINE] = { .name = "line", .nsrc = 2, .ndst = 1 },
55 [BRW_OPCODE_PLN] = { .name = "pln", .nsrc = 2, .ndst = 1 },
56 [BRW_OPCODE_MAD] = { .name = "mad", .nsrc = 3, .ndst = 1 },
57 [BRW_OPCODE_LRP] = { .name = "lrp", .nsrc = 3, .ndst = 1 },
58 [BRW_OPCODE_SAD2] = { .name = "sad2", .nsrc = 2, .ndst = 1 },
59 [BRW_OPCODE_SADA2] = { .name = "sada2", .nsrc = 2, .ndst = 1 },
60 [BRW_OPCODE_DP4] = { .name = "dp4", .nsrc = 2, .ndst = 1 },
61 [BRW_OPCODE_DPH] = { .name = "dph", .nsrc = 2, .ndst = 1 },
62 [BRW_OPCODE_DP3] = { .name = "dp3", .nsrc = 2, .ndst = 1 },
63 [BRW_OPCODE_DP2] = { .name = "dp2", .nsrc = 2, .ndst = 1 },
64 [BRW_OPCODE_MATH] = { .name = "math", .nsrc = 2, .ndst = 1 },
65
66 [BRW_OPCODE_AVG] = { .name = "avg", .nsrc = 2, .ndst = 1 },
67 [BRW_OPCODE_ADD] = { .name = "add", .nsrc = 2, .ndst = 1 },
68 [BRW_OPCODE_SEL] = { .name = "sel", .nsrc = 2, .ndst = 1 },
69 [BRW_OPCODE_AND] = { .name = "and", .nsrc = 2, .ndst = 1 },
70 [BRW_OPCODE_OR] = { .name = "or", .nsrc = 2, .ndst = 1 },
71 [BRW_OPCODE_XOR] = { .name = "xor", .nsrc = 2, .ndst = 1 },
72 [BRW_OPCODE_SHR] = { .name = "shr", .nsrc = 2, .ndst = 1 },
73 [BRW_OPCODE_SHL] = { .name = "shl", .nsrc = 2, .ndst = 1 },
74 [BRW_OPCODE_ASR] = { .name = "asr", .nsrc = 2, .ndst = 1 },
75 [BRW_OPCODE_CMP] = { .name = "cmp", .nsrc = 2, .ndst = 1 },
76 [BRW_OPCODE_CMPN] = { .name = "cmpn", .nsrc = 2, .ndst = 1 },
77 [BRW_OPCODE_CSEL] = { .name = "csel", .nsrc = 3, .ndst = 1 },
78 [BRW_OPCODE_BFE] = { .name = "bfe", .nsrc = 3, .ndst = 1 },
79 [BRW_OPCODE_BFI1] = { .name = "bfi1", .nsrc = 2, .ndst = 1 },
80 [BRW_OPCODE_BFI2] = { .name = "bfi2", .nsrc = 3, .ndst = 1 },
81 [BRW_OPCODE_ADDC] = { .name = "addc", .nsrc = 2, .ndst = 1 },
82 [BRW_OPCODE_SUBB] = { .name = "subb", .nsrc = 2, .ndst = 1 },
83
84 [BRW_OPCODE_SEND] = { .name = "send", .nsrc = 1, .ndst = 1 },
85 [BRW_OPCODE_SENDC] = { .name = "sendc", .nsrc = 1, .ndst = 1 },
86 [BRW_OPCODE_NOP] = { .name = "nop", .nsrc = 0, .ndst = 0 },
87 [BRW_OPCODE_NENOP] = { .name = "nenop", .nsrc = 0, .ndst = 0 },
88 [BRW_OPCODE_JMPI] = { .name = "jmpi", .nsrc = 0, .ndst = 0 },
89 [BRW_OPCODE_IF] = { .name = "if", .nsrc = 2, .ndst = 0 },
90 [BRW_OPCODE_IFF] = { .name = "iff", .nsrc = 2, .ndst = 1 },
91 [BRW_OPCODE_WHILE] = { .name = "while", .nsrc = 2, .ndst = 0 },
92 [BRW_OPCODE_ELSE] = { .name = "else", .nsrc = 2, .ndst = 0 },
93 [BRW_OPCODE_BREAK] = { .name = "break", .nsrc = 2, .ndst = 0 },
94 [BRW_OPCODE_CONTINUE] = { .name = "cont", .nsrc = 1, .ndst = 0 },
95 [BRW_OPCODE_HALT] = { .name = "halt", .nsrc = 1, .ndst = 0 },
96 [BRW_OPCODE_MSAVE] = { .name = "msave", .nsrc = 1, .ndst = 1 },
97 [BRW_OPCODE_PUSH] = { .name = "push", .nsrc = 1, .ndst = 1 },
98 [BRW_OPCODE_MRESTORE] = { .name = "mrest", .nsrc = 1, .ndst = 1 },
99 [BRW_OPCODE_POP] = { .name = "pop", .nsrc = 2, .ndst = 0 },
100 [BRW_OPCODE_WAIT] = { .name = "wait", .nsrc = 1, .ndst = 0 },
101 [BRW_OPCODE_DO] = { .name = "do", .nsrc = 0, .ndst = 0 },
102 [BRW_OPCODE_ENDIF] = { .name = "endif", .nsrc = 2, .ndst = 0 },
103 };
104
105 static bool
106 has_jip(struct brw_context *brw, enum opcode opcode)
107 {
108 if (brw->gen < 6)
109 return false;
110
111 return opcode == BRW_OPCODE_IF ||
112 opcode == BRW_OPCODE_ELSE ||
113 opcode == BRW_OPCODE_ENDIF ||
114 opcode == BRW_OPCODE_WHILE ||
115 opcode == BRW_OPCODE_BREAK ||
116 opcode == BRW_OPCODE_CONTINUE ||
117 opcode == BRW_OPCODE_HALT;
118 }
119
120 static bool
121 has_uip(struct brw_context *brw, enum opcode opcode)
122 {
123 if (brw->gen < 6)
124 return false;
125
126 return (brw->gen >= 7 && opcode == BRW_OPCODE_IF) ||
127 (brw->gen >= 8 && opcode == BRW_OPCODE_ELSE) ||
128 opcode == BRW_OPCODE_BREAK ||
129 opcode == BRW_OPCODE_CONTINUE ||
130 opcode == BRW_OPCODE_HALT;
131 }
132
133 static bool
134 has_branch_ctrl(struct brw_context *brw, enum opcode opcode)
135 {
136 if (brw->gen < 8)
137 return false;
138
139 return opcode == BRW_OPCODE_IF ||
140 opcode == BRW_OPCODE_ELSE ||
141 opcode == BRW_OPCODE_GOTO;
142 }
143
144 static bool
145 is_logic_instruction(unsigned opcode)
146 {
147 return opcode == BRW_OPCODE_AND ||
148 opcode == BRW_OPCODE_NOT ||
149 opcode == BRW_OPCODE_OR ||
150 opcode == BRW_OPCODE_XOR;
151 }
152
153 const char *const conditional_modifier[16] = {
154 [BRW_CONDITIONAL_NONE] = "",
155 [BRW_CONDITIONAL_Z] = ".z",
156 [BRW_CONDITIONAL_NZ] = ".nz",
157 [BRW_CONDITIONAL_G] = ".g",
158 [BRW_CONDITIONAL_GE] = ".ge",
159 [BRW_CONDITIONAL_L] = ".l",
160 [BRW_CONDITIONAL_LE] = ".le",
161 [BRW_CONDITIONAL_R] = ".r",
162 [BRW_CONDITIONAL_O] = ".o",
163 [BRW_CONDITIONAL_U] = ".u",
164 };
165
166 static const char *const m_negate[2] = {
167 [0] = "",
168 [1] = "-",
169 };
170
171 static const char *const _abs[2] = {
172 [0] = "",
173 [1] = "(abs)",
174 };
175
176 static const char *const m_bitnot[2] = { "", "~" };
177
178 static const char *const vert_stride[16] = {
179 [0] = "0",
180 [1] = "1",
181 [2] = "2",
182 [3] = "4",
183 [4] = "8",
184 [5] = "16",
185 [6] = "32",
186 [15] = "VxH",
187 };
188
189 static const char *const width[8] = {
190 [0] = "1",
191 [1] = "2",
192 [2] = "4",
193 [3] = "8",
194 [4] = "16",
195 };
196
197 static const char *const horiz_stride[4] = {
198 [0] = "0",
199 [1] = "1",
200 [2] = "2",
201 [3] = "4"
202 };
203
204 static const char *const chan_sel[4] = {
205 [0] = "x",
206 [1] = "y",
207 [2] = "z",
208 [3] = "w",
209 };
210
211 static const char *const debug_ctrl[2] = {
212 [0] = "",
213 [1] = ".breakpoint"
214 };
215
216 static const char *const saturate[2] = {
217 [0] = "",
218 [1] = ".sat"
219 };
220
221 static const char *const cmpt_ctrl[2] = {
222 [0] = "",
223 [1] = "compacted"
224 };
225
226 static const char *const accwr[2] = {
227 [0] = "",
228 [1] = "AccWrEnable"
229 };
230
231 static const char *const branch_ctrl[2] = {
232 [0] = "",
233 [1] = "BranchCtrl"
234 };
235
236 static const char *const wectrl[2] = {
237 [0] = "",
238 [1] = "WE_all"
239 };
240
241 static const char *const exec_size[8] = {
242 [0] = "1",
243 [1] = "2",
244 [2] = "4",
245 [3] = "8",
246 [4] = "16",
247 [5] = "32"
248 };
249
250 static const char *const pred_inv[2] = {
251 [0] = "+",
252 [1] = "-"
253 };
254
255 static const char *const pred_ctrl_align16[16] = {
256 [1] = "",
257 [2] = ".x",
258 [3] = ".y",
259 [4] = ".z",
260 [5] = ".w",
261 [6] = ".any4h",
262 [7] = ".all4h",
263 };
264
265 static const char *const pred_ctrl_align1[16] = {
266 [BRW_PREDICATE_NORMAL] = "",
267 [BRW_PREDICATE_ALIGN1_ANYV] = ".anyv",
268 [BRW_PREDICATE_ALIGN1_ALLV] = ".allv",
269 [BRW_PREDICATE_ALIGN1_ANY2H] = ".any2h",
270 [BRW_PREDICATE_ALIGN1_ALL2H] = ".all2h",
271 [BRW_PREDICATE_ALIGN1_ANY4H] = ".any4h",
272 [BRW_PREDICATE_ALIGN1_ALL4H] = ".all4h",
273 [BRW_PREDICATE_ALIGN1_ANY8H] = ".any8h",
274 [BRW_PREDICATE_ALIGN1_ALL8H] = ".all8h",
275 [BRW_PREDICATE_ALIGN1_ANY16H] = ".any16h",
276 [BRW_PREDICATE_ALIGN1_ALL16H] = ".all16h",
277 [BRW_PREDICATE_ALIGN1_ANY32H] = ".any32h",
278 [BRW_PREDICATE_ALIGN1_ALL32H] = ".all32h",
279 };
280
281 static const char *const thread_ctrl[4] = {
282 [BRW_THREAD_NORMAL] = "",
283 [BRW_THREAD_ATOMIC] = "atomic",
284 [BRW_THREAD_SWITCH] = "switch",
285 };
286
287 static const char *const compr_ctrl[4] = {
288 [0] = "",
289 [1] = "sechalf",
290 [2] = "compr",
291 [3] = "compr4",
292 };
293
294 static const char *const dep_ctrl[4] = {
295 [0] = "",
296 [1] = "NoDDClr",
297 [2] = "NoDDChk",
298 [3] = "NoDDClr,NoDDChk",
299 };
300
301 static const char *const mask_ctrl[4] = {
302 [0] = "",
303 [1] = "nomask",
304 };
305
306 static const char *const access_mode[2] = {
307 [0] = "align1",
308 [1] = "align16",
309 };
310
311 static const char * const reg_encoding[] = {
312 [BRW_HW_REG_TYPE_UD] = "UD",
313 [BRW_HW_REG_TYPE_D] = "D",
314 [BRW_HW_REG_TYPE_UW] = "UW",
315 [BRW_HW_REG_TYPE_W] = "W",
316 [BRW_HW_REG_NON_IMM_TYPE_UB] = "UB",
317 [BRW_HW_REG_NON_IMM_TYPE_B] = "B",
318 [GEN7_HW_REG_NON_IMM_TYPE_DF] = "DF",
319 [BRW_HW_REG_TYPE_F] = "F",
320 [GEN8_HW_REG_TYPE_UQ] = "UQ",
321 [GEN8_HW_REG_TYPE_Q] = "Q",
322 [GEN8_HW_REG_NON_IMM_TYPE_HF] = "HF",
323 };
324
325 static const char *const three_source_reg_encoding[] = {
326 [BRW_3SRC_TYPE_F] = "F",
327 [BRW_3SRC_TYPE_D] = "D",
328 [BRW_3SRC_TYPE_UD] = "UD",
329 };
330
331 const int reg_type_size[] = {
332 [BRW_HW_REG_TYPE_UD] = 4,
333 [BRW_HW_REG_TYPE_D] = 4,
334 [BRW_HW_REG_TYPE_UW] = 2,
335 [BRW_HW_REG_TYPE_W] = 2,
336 [BRW_HW_REG_NON_IMM_TYPE_UB] = 1,
337 [BRW_HW_REG_NON_IMM_TYPE_B] = 1,
338 [GEN7_HW_REG_NON_IMM_TYPE_DF] = 8,
339 [BRW_HW_REG_TYPE_F] = 4,
340 [GEN8_HW_REG_TYPE_UQ] = 8,
341 [GEN8_HW_REG_TYPE_Q] = 8,
342 [GEN8_HW_REG_NON_IMM_TYPE_HF] = 2,
343 };
344
345 static const char *const reg_file[4] = {
346 [0] = "A",
347 [1] = "g",
348 [2] = "m",
349 [3] = "imm",
350 };
351
352 static const char *const writemask[16] = {
353 [0x0] = ".",
354 [0x1] = ".x",
355 [0x2] = ".y",
356 [0x3] = ".xy",
357 [0x4] = ".z",
358 [0x5] = ".xz",
359 [0x6] = ".yz",
360 [0x7] = ".xyz",
361 [0x8] = ".w",
362 [0x9] = ".xw",
363 [0xa] = ".yw",
364 [0xb] = ".xyw",
365 [0xc] = ".zw",
366 [0xd] = ".xzw",
367 [0xe] = ".yzw",
368 [0xf] = "",
369 };
370
371 static const char *const end_of_thread[2] = {
372 [0] = "",
373 [1] = "EOT"
374 };
375
376 /* SFIDs on Gen4-5 */
377 static const char *const gen4_sfid[16] = {
378 [BRW_SFID_NULL] = "null",
379 [BRW_SFID_MATH] = "math",
380 [BRW_SFID_SAMPLER] = "sampler",
381 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
382 [BRW_SFID_DATAPORT_READ] = "read",
383 [BRW_SFID_DATAPORT_WRITE] = "write",
384 [BRW_SFID_URB] = "urb",
385 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
386 [BRW_SFID_VME] = "vme",
387 };
388
389 static const char *const gen6_sfid[16] = {
390 [BRW_SFID_NULL] = "null",
391 [BRW_SFID_MATH] = "math",
392 [BRW_SFID_SAMPLER] = "sampler",
393 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
394 [BRW_SFID_URB] = "urb",
395 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
396 [GEN6_SFID_DATAPORT_SAMPLER_CACHE] = "sampler",
397 [GEN6_SFID_DATAPORT_RENDER_CACHE] = "render",
398 [GEN6_SFID_DATAPORT_CONSTANT_CACHE] = "const",
399 [GEN7_SFID_DATAPORT_DATA_CACHE] = "data",
400 [GEN7_SFID_PIXEL_INTERPOLATOR] = "pixel interp",
401 [HSW_SFID_DATAPORT_DATA_CACHE_1] = "dp data 1",
402 [HSW_SFID_CRE] = "cre",
403 };
404
405 static const char *const dp_write_port_msg_type[8] = {
406 [0b000] = "OWord block write",
407 [0b001] = "OWord dual block write",
408 [0b010] = "media block write",
409 [0b011] = "DWord scattered write",
410 [0b100] = "RT write",
411 [0b101] = "streamed VB write",
412 [0b110] = "RT UNORM write", /* G45+ */
413 [0b111] = "flush render cache",
414 };
415
416 static const char *const dp_rc_msg_type_gen6[16] = {
417 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read",
418 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read",
419 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read",
420 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read",
421 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] =
422 "OWORD unaligned block read",
423 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read",
424 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write",
425 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write",
426 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] =
427 "OWORD dual block write",
428 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write",
429 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] =
430 "DWORD scattered write",
431 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write",
432 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write",
433 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORM write",
434 };
435
436 static const char *const m_rt_write_subtype[] = {
437 [0b000] = "SIMD16",
438 [0b001] = "SIMD16/RepData",
439 [0b010] = "SIMD8/DualSrcLow",
440 [0b011] = "SIMD8/DualSrcHigh",
441 [0b100] = "SIMD8",
442 [0b101] = "SIMD8/ImageWrite", /* Gen6+ */
443 [0b111] = "SIMD16/RepData-111", /* no idea how this is different than 1 */
444 };
445
446 static const char *const dp_dc0_msg_type_gen7[16] = {
447 [GEN7_DATAPORT_DC_OWORD_BLOCK_READ] = "DC OWORD block read",
448 [GEN7_DATAPORT_DC_UNALIGNED_OWORD_BLOCK_READ] =
449 "DC unaligned OWORD block read",
450 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_READ] = "DC OWORD dual block read",
451 [GEN7_DATAPORT_DC_DWORD_SCATTERED_READ] = "DC DWORD scattered read",
452 [GEN7_DATAPORT_DC_BYTE_SCATTERED_READ] = "DC byte scattered read",
453 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_READ] = "DC untyped surface read",
454 [GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP] = "DC untyped atomic",
455 [GEN7_DATAPORT_DC_MEMORY_FENCE] = "DC mfence",
456 [GEN7_DATAPORT_DC_OWORD_BLOCK_WRITE] = "DC OWORD block write",
457 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_WRITE] = "DC OWORD dual block write",
458 [GEN7_DATAPORT_DC_DWORD_SCATTERED_WRITE] = "DC DWORD scatterd write",
459 [GEN7_DATAPORT_DC_BYTE_SCATTERED_WRITE] = "DC byte scattered write",
460 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
461 };
462
463 static const char *const dp_dc1_msg_type_hsw[16] = {
464 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ] = "untyped surface read",
465 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP] = "DC untyped atomic op",
466 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2] =
467 "DC untyped 4x2 atomic op",
468 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_READ] = "DC media block read",
469 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ] = "DC typed surface read",
470 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP] = "DC typed atomic",
471 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2] = "DC typed 4x2 atomic op",
472 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
473 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_WRITE] = "DC media block write",
474 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP] = "DC atomic counter op",
475 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2] =
476 "DC 4x2 atomic counter op",
477 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE] = "DC typed surface write",
478 };
479
480 static const char *const aop[16] = {
481 [BRW_AOP_AND] = "and",
482 [BRW_AOP_OR] = "or",
483 [BRW_AOP_XOR] = "xor",
484 [BRW_AOP_MOV] = "mov",
485 [BRW_AOP_INC] = "inc",
486 [BRW_AOP_DEC] = "dec",
487 [BRW_AOP_ADD] = "add",
488 [BRW_AOP_SUB] = "sub",
489 [BRW_AOP_REVSUB] = "revsub",
490 [BRW_AOP_IMAX] = "imax",
491 [BRW_AOP_IMIN] = "imin",
492 [BRW_AOP_UMAX] = "umax",
493 [BRW_AOP_UMIN] = "umin",
494 [BRW_AOP_CMPWR] = "cmpwr",
495 [BRW_AOP_PREDEC] = "predec",
496 };
497
498 static const char * const pixel_interpolator_msg_types[4] = {
499 [GEN7_PIXEL_INTERPOLATOR_LOC_SHARED_OFFSET] = "per_message_offset",
500 [GEN7_PIXEL_INTERPOLATOR_LOC_SAMPLE] = "sample_position",
501 [GEN7_PIXEL_INTERPOLATOR_LOC_CENTROID] = "centroid",
502 [GEN7_PIXEL_INTERPOLATOR_LOC_PER_SLOT_OFFSET] = "per_slot_offset",
503 };
504
505 static const char *const math_function[16] = {
506 [BRW_MATH_FUNCTION_INV] = "inv",
507 [BRW_MATH_FUNCTION_LOG] = "log",
508 [BRW_MATH_FUNCTION_EXP] = "exp",
509 [BRW_MATH_FUNCTION_SQRT] = "sqrt",
510 [BRW_MATH_FUNCTION_RSQ] = "rsq",
511 [BRW_MATH_FUNCTION_SIN] = "sin",
512 [BRW_MATH_FUNCTION_COS] = "cos",
513 [BRW_MATH_FUNCTION_SINCOS] = "sincos",
514 [BRW_MATH_FUNCTION_FDIV] = "fdiv",
515 [BRW_MATH_FUNCTION_POW] = "pow",
516 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] = "intdivmod",
517 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] = "intdiv",
518 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER] = "intmod",
519 [GEN8_MATH_FUNCTION_INVM] = "invm",
520 [GEN8_MATH_FUNCTION_RSQRTM] = "rsqrtm",
521 };
522
523 static const char *const math_saturate[2] = {
524 [0] = "",
525 [1] = "sat"
526 };
527
528 static const char *const math_signed[2] = {
529 [0] = "",
530 [1] = "signed"
531 };
532
533 static const char *const math_scalar[2] = {
534 [0] = "",
535 [1] = "scalar"
536 };
537
538 static const char *const math_precision[2] = {
539 [0] = "",
540 [1] = "partial_precision"
541 };
542
543 static const char *const gen5_urb_opcode[] = {
544 [0] = "urb_write",
545 [1] = "ff_sync",
546 };
547
548 static const char *const gen7_urb_opcode[] = {
549 [0] = "write HWord",
550 [1] = "write OWord",
551 [2] = "read HWord",
552 [3] = "read OWord",
553 [4] = "atomic mov", /* Gen7+ */
554 [5] = "atomic inc", /* Gen7+ */
555 [6] = "atomic add", /* Gen8+ */
556 [7] = "SIMD8 write", /* Gen8+ */
557 [8] = "SIMD8 read", /* Gen8+ */
558 /* [9-15] - reserved */
559 };
560
561 static const char *const urb_swizzle[4] = {
562 [BRW_URB_SWIZZLE_NONE] = "",
563 [BRW_URB_SWIZZLE_INTERLEAVE] = "interleave",
564 [BRW_URB_SWIZZLE_TRANSPOSE] = "transpose",
565 };
566
567 static const char *const urb_allocate[2] = {
568 [0] = "",
569 [1] = "allocate"
570 };
571
572 static const char *const urb_used[2] = {
573 [0] = "",
574 [1] = "used"
575 };
576
577 static const char *const urb_complete[2] = {
578 [0] = "",
579 [1] = "complete"
580 };
581
582 static const char *const sampler_target_format[4] = {
583 [0] = "F",
584 [2] = "UD",
585 [3] = "D"
586 };
587
588
589 static int column;
590
591 static int
592 string(FILE *file, const char *string)
593 {
594 fputs(string, file);
595 column += strlen(string);
596 return 0;
597 }
598
599 static int
600 format(FILE *f, const char *format, ...) PRINTFLIKE(2, 3);
601
602 static int
603 format(FILE *f, const char *format, ...)
604 {
605 char buf[1024];
606 va_list args;
607 va_start(args, format);
608
609 vsnprintf(buf, sizeof(buf) - 1, format, args);
610 va_end(args);
611 string(f, buf);
612 return 0;
613 }
614
615 static int
616 newline(FILE *f)
617 {
618 putc('\n', f);
619 column = 0;
620 return 0;
621 }
622
623 static int
624 pad(FILE *f, int c)
625 {
626 do
627 string(f, " ");
628 while (column < c);
629 return 0;
630 }
631
632 static int
633 control(FILE *file, const char *name, const char *const ctrl[],
634 unsigned id, int *space)
635 {
636 if (!ctrl[id]) {
637 fprintf(file, "*** invalid %s value %d ", name, id);
638 return 1;
639 }
640 if (ctrl[id][0]) {
641 if (space && *space)
642 string(file, " ");
643 string(file, ctrl[id]);
644 if (space)
645 *space = 1;
646 }
647 return 0;
648 }
649
650 static int
651 print_opcode(FILE *file, int id)
652 {
653 if (!opcode_descs[id].name) {
654 format(file, "*** invalid opcode value %d ", id);
655 return 1;
656 }
657 string(file, opcode_descs[id].name);
658 return 0;
659 }
660
661 static int
662 reg(FILE *file, unsigned _reg_file, unsigned _reg_nr)
663 {
664 int err = 0;
665
666 /* Clear the Compr4 instruction compression bit. */
667 if (_reg_file == BRW_MESSAGE_REGISTER_FILE)
668 _reg_nr &= ~(1 << 7);
669
670 if (_reg_file == BRW_ARCHITECTURE_REGISTER_FILE) {
671 switch (_reg_nr & 0xf0) {
672 case BRW_ARF_NULL:
673 string(file, "null");
674 return -1;
675 case BRW_ARF_ADDRESS:
676 format(file, "a%d", _reg_nr & 0x0f);
677 break;
678 case BRW_ARF_ACCUMULATOR:
679 format(file, "acc%d", _reg_nr & 0x0f);
680 break;
681 case BRW_ARF_FLAG:
682 format(file, "f%d", _reg_nr & 0x0f);
683 break;
684 case BRW_ARF_MASK:
685 format(file, "mask%d", _reg_nr & 0x0f);
686 break;
687 case BRW_ARF_MASK_STACK:
688 format(file, "msd%d", _reg_nr & 0x0f);
689 break;
690 case BRW_ARF_STATE:
691 format(file, "sr%d", _reg_nr & 0x0f);
692 break;
693 case BRW_ARF_CONTROL:
694 format(file, "cr%d", _reg_nr & 0x0f);
695 break;
696 case BRW_ARF_NOTIFICATION_COUNT:
697 format(file, "n%d", _reg_nr & 0x0f);
698 break;
699 case BRW_ARF_IP:
700 string(file, "ip");
701 return -1;
702 break;
703 case BRW_ARF_TDR:
704 format(file, "tdr0");
705 return -1;
706 case BRW_ARF_TIMESTAMP:
707 format(file, "tm%d", _reg_nr & 0x0f);
708 break;
709 default:
710 format(file, "ARF%d", _reg_nr);
711 break;
712 }
713 } else {
714 err |= control(file, "src reg file", reg_file, _reg_file, NULL);
715 format(file, "%d", _reg_nr);
716 }
717 return err;
718 }
719
720 static int
721 dest(FILE *file, struct brw_context *brw, brw_inst *inst)
722 {
723 int err = 0;
724
725 if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
726 if (brw_inst_dst_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
727 err |= reg(file, brw_inst_dst_reg_file(brw, inst),
728 brw_inst_dst_da_reg_nr(brw, inst));
729 if (err == -1)
730 return 0;
731 if (brw_inst_dst_da1_subreg_nr(brw, inst))
732 format(file, ".%ld", brw_inst_dst_da1_subreg_nr(brw, inst) /
733 reg_type_size[brw_inst_dst_reg_type(brw, inst)]);
734 string(file, "<");
735 err |= control(file, "horiz stride", horiz_stride,
736 brw_inst_dst_hstride(brw, inst), NULL);
737 string(file, ">");
738 err |= control(file, "dest reg encoding", reg_encoding,
739 brw_inst_dst_reg_type(brw, inst), NULL);
740 } else {
741 string(file, "g[a0");
742 if (brw_inst_dst_ia_subreg_nr(brw, inst))
743 format(file, ".%ld", brw_inst_dst_ia_subreg_nr(brw, inst) /
744 reg_type_size[brw_inst_dst_reg_type(brw, inst)]);
745 if (brw_inst_dst_ia1_addr_imm(brw, inst))
746 format(file, " %d", brw_inst_dst_ia1_addr_imm(brw, inst));
747 string(file, "]<");
748 err |= control(file, "horiz stride", horiz_stride,
749 brw_inst_dst_hstride(brw, inst), NULL);
750 string(file, ">");
751 err |= control(file, "dest reg encoding", reg_encoding,
752 brw_inst_dst_reg_type(brw, inst), NULL);
753 }
754 } else {
755 if (brw_inst_dst_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
756 err |= reg(file, brw_inst_dst_reg_file(brw, inst),
757 brw_inst_dst_da_reg_nr(brw, inst));
758 if (err == -1)
759 return 0;
760 if (brw_inst_dst_da16_subreg_nr(brw, inst))
761 format(file, ".%ld", brw_inst_dst_da16_subreg_nr(brw, inst) /
762 reg_type_size[brw_inst_dst_reg_type(brw, inst)]);
763 string(file, "<1>");
764 err |= control(file, "writemask", writemask,
765 brw_inst_da16_writemask(brw, inst), NULL);
766 err |= control(file, "dest reg encoding", reg_encoding,
767 brw_inst_dst_reg_type(brw, inst), NULL);
768 } else {
769 err = 1;
770 string(file, "Indirect align16 address mode not supported");
771 }
772 }
773
774 return 0;
775 }
776
777 static int
778 dest_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
779 {
780 int err = 0;
781 uint32_t reg_file;
782
783 if (brw->gen == 6 && brw_inst_3src_dst_reg_file(brw, inst))
784 reg_file = BRW_MESSAGE_REGISTER_FILE;
785 else
786 reg_file = BRW_GENERAL_REGISTER_FILE;
787
788 err |= reg(file, reg_file, brw_inst_3src_dst_reg_nr(brw, inst));
789 if (err == -1)
790 return 0;
791 if (brw_inst_3src_dst_subreg_nr(brw, inst))
792 format(file, ".%ld", brw_inst_3src_dst_subreg_nr(brw, inst));
793 string(file, "<1>");
794 err |= control(file, "writemask", writemask,
795 brw_inst_3src_dst_writemask(brw, inst), NULL);
796 err |= control(file, "dest reg encoding", three_source_reg_encoding,
797 brw_inst_3src_dst_type(brw, inst), NULL);
798
799 return 0;
800 }
801
802 static int
803 src_align1_region(FILE *file,
804 unsigned _vert_stride, unsigned _width,
805 unsigned _horiz_stride)
806 {
807 int err = 0;
808 string(file, "<");
809 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
810 string(file, ",");
811 err |= control(file, "width", width, _width, NULL);
812 string(file, ",");
813 err |= control(file, "horiz_stride", horiz_stride, _horiz_stride, NULL);
814 string(file, ">");
815 return err;
816 }
817
818 static int
819 src_da1(FILE *file,
820 const struct brw_context *brw,
821 unsigned opcode,
822 unsigned type, unsigned _reg_file,
823 unsigned _vert_stride, unsigned _width, unsigned _horiz_stride,
824 unsigned reg_num, unsigned sub_reg_num, unsigned __abs,
825 unsigned _negate)
826 {
827 int err = 0;
828
829 if (brw->gen >= 8 && is_logic_instruction(opcode))
830 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
831 else
832 err |= control(file, "negate", m_negate, _negate, NULL);
833
834 err |= control(file, "abs", _abs, __abs, NULL);
835
836 err |= reg(file, _reg_file, reg_num);
837 if (err == -1)
838 return 0;
839 if (sub_reg_num)
840 format(file, ".%d", sub_reg_num / reg_type_size[type]); /* use formal style like spec */
841 src_align1_region(file, _vert_stride, _width, _horiz_stride);
842 err |= control(file, "src reg encoding", reg_encoding, type, NULL);
843 return err;
844 }
845
846 static int
847 src_ia1(FILE *file,
848 const struct brw_context *brw,
849 unsigned opcode,
850 unsigned type,
851 unsigned _reg_file,
852 int _addr_imm,
853 unsigned _addr_subreg_nr,
854 unsigned _negate,
855 unsigned __abs,
856 unsigned _addr_mode,
857 unsigned _horiz_stride, unsigned _width, unsigned _vert_stride)
858 {
859 int err = 0;
860
861 if (brw->gen >= 8 && is_logic_instruction(opcode))
862 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
863 else
864 err |= control(file, "negate", m_negate, _negate, NULL);
865
866 err |= control(file, "abs", _abs, __abs, NULL);
867
868 string(file, "g[a0");
869 if (_addr_subreg_nr)
870 format(file, ".%d", _addr_subreg_nr);
871 if (_addr_imm)
872 format(file, " %d", _addr_imm);
873 string(file, "]");
874 src_align1_region(file, _vert_stride, _width, _horiz_stride);
875 err |= control(file, "src reg encoding", reg_encoding, type, NULL);
876 return err;
877 }
878
879 static int
880 src_swizzle(FILE *file, unsigned swiz)
881 {
882 unsigned x = BRW_GET_SWZ(swiz, BRW_CHANNEL_X);
883 unsigned y = BRW_GET_SWZ(swiz, BRW_CHANNEL_Y);
884 unsigned z = BRW_GET_SWZ(swiz, BRW_CHANNEL_Z);
885 unsigned w = BRW_GET_SWZ(swiz, BRW_CHANNEL_W);
886 int err = 0;
887
888 if (x == y && x == z && x == w) {
889 string(file, ".");
890 err |= control(file, "channel select", chan_sel, x, NULL);
891 } else if (swiz != BRW_SWIZZLE_XYZW) {
892 string(file, ".");
893 err |= control(file, "channel select", chan_sel, x, NULL);
894 err |= control(file, "channel select", chan_sel, y, NULL);
895 err |= control(file, "channel select", chan_sel, z, NULL);
896 err |= control(file, "channel select", chan_sel, w, NULL);
897 }
898 return err;
899 }
900
901 static int
902 src_da16(FILE *file,
903 const struct brw_context *brw,
904 unsigned opcode,
905 unsigned _reg_type,
906 unsigned _reg_file,
907 unsigned _vert_stride,
908 unsigned _reg_nr,
909 unsigned _subreg_nr,
910 unsigned __abs,
911 unsigned _negate,
912 unsigned swz_x, unsigned swz_y, unsigned swz_z, unsigned swz_w)
913 {
914 int err = 0;
915
916 if (brw->gen >= 8 && is_logic_instruction(opcode))
917 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
918 else
919 err |= control(file, "negate", m_negate, _negate, NULL);
920
921 err |= control(file, "abs", _abs, __abs, NULL);
922
923 err |= reg(file, _reg_file, _reg_nr);
924 if (err == -1)
925 return 0;
926 if (_subreg_nr)
927 /* bit4 for subreg number byte addressing. Make this same meaning as
928 in da1 case, so output looks consistent. */
929 format(file, ".%d", 16 / reg_type_size[_reg_type]);
930 string(file, "<");
931 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
932 string(file, ",4,1>");
933 err |= src_swizzle(file, BRW_SWIZZLE4(swz_x, swz_y, swz_z, swz_w));
934 err |= control(file, "src da16 reg type", reg_encoding, _reg_type, NULL);
935 return err;
936 }
937
938 static int
939 src0_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
940 {
941 int err = 0;
942 unsigned src0_subreg_nr = brw_inst_3src_src0_subreg_nr(brw, inst);
943
944 err |= control(file, "negate", m_negate,
945 brw_inst_3src_src0_negate(brw, inst), NULL);
946 err |= control(file, "abs", _abs, brw_inst_3src_src0_abs(brw, inst), NULL);
947
948 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
949 brw_inst_3src_src0_reg_nr(brw, inst));
950 if (err == -1)
951 return 0;
952 if (src0_subreg_nr)
953 format(file, ".%d", src0_subreg_nr);
954 if (brw_inst_3src_src0_rep_ctrl(brw, inst))
955 string(file, "<0,1,0>");
956 else
957 string(file, "<4,4,1>");
958 err |= control(file, "src da16 reg type", three_source_reg_encoding,
959 brw_inst_3src_src_type(brw, inst), NULL);
960 err |= src_swizzle(file, brw_inst_3src_src0_swizzle(brw, inst));
961 return err;
962 }
963
964 static int
965 src1_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
966 {
967 int err = 0;
968 unsigned src1_subreg_nr = brw_inst_3src_src1_subreg_nr(brw, inst);
969
970 err |= control(file, "negate", m_negate,
971 brw_inst_3src_src1_negate(brw, inst), NULL);
972 err |= control(file, "abs", _abs, brw_inst_3src_src1_abs(brw, inst), NULL);
973
974 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
975 brw_inst_3src_src1_reg_nr(brw, inst));
976 if (err == -1)
977 return 0;
978 if (src1_subreg_nr)
979 format(file, ".%d", src1_subreg_nr);
980 if (brw_inst_3src_src1_rep_ctrl(brw, inst))
981 string(file, "<0,1,0>");
982 else
983 string(file, "<4,4,1>");
984 err |= control(file, "src da16 reg type", three_source_reg_encoding,
985 brw_inst_3src_src_type(brw, inst), NULL);
986 err |= src_swizzle(file, brw_inst_3src_src1_swizzle(brw, inst));
987 return err;
988 }
989
990
991 static int
992 src2_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
993 {
994 int err = 0;
995 unsigned src2_subreg_nr = brw_inst_3src_src2_subreg_nr(brw, inst);
996
997 err |= control(file, "negate", m_negate,
998 brw_inst_3src_src2_negate(brw, inst), NULL);
999 err |= control(file, "abs", _abs, brw_inst_3src_src2_abs(brw, inst), NULL);
1000
1001 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
1002 brw_inst_3src_src2_reg_nr(brw, inst));
1003 if (err == -1)
1004 return 0;
1005 if (src2_subreg_nr)
1006 format(file, ".%d", src2_subreg_nr);
1007 if (brw_inst_3src_src2_rep_ctrl(brw, inst))
1008 string(file, "<0,1,0>");
1009 else
1010 string(file, "<4,4,1>");
1011 err |= control(file, "src da16 reg type", three_source_reg_encoding,
1012 brw_inst_3src_src_type(brw, inst), NULL);
1013 err |= src_swizzle(file, brw_inst_3src_src2_swizzle(brw, inst));
1014 return err;
1015 }
1016
1017 static int
1018 imm(FILE *file, struct brw_context *brw, unsigned type, brw_inst *inst)
1019 {
1020 switch (type) {
1021 case BRW_HW_REG_TYPE_UD:
1022 format(file, "0x%08xUD", brw_inst_imm_ud(brw, inst));
1023 break;
1024 case BRW_HW_REG_TYPE_D:
1025 format(file, "%dD", brw_inst_imm_d(brw, inst));
1026 break;
1027 case BRW_HW_REG_TYPE_UW:
1028 format(file, "0x%04xUW", (uint16_t) brw_inst_imm_ud(brw, inst));
1029 break;
1030 case BRW_HW_REG_TYPE_W:
1031 format(file, "%dW", (int16_t) brw_inst_imm_d(brw, inst));
1032 break;
1033 case BRW_HW_REG_IMM_TYPE_UV:
1034 format(file, "0x%08xUV", brw_inst_imm_ud(brw, inst));
1035 break;
1036 case BRW_HW_REG_IMM_TYPE_VF:
1037 format(file, "[%-gF, %-gF, %-gF, %-gF]VF",
1038 brw_vf_to_float(brw_inst_imm_ud(brw, inst)),
1039 brw_vf_to_float(brw_inst_imm_ud(brw, inst) >> 8),
1040 brw_vf_to_float(brw_inst_imm_ud(brw, inst) >> 16),
1041 brw_vf_to_float(brw_inst_imm_ud(brw, inst) >> 24));
1042 break;
1043 case BRW_HW_REG_IMM_TYPE_V:
1044 format(file, "0x%08xV", brw_inst_imm_ud(brw, inst));
1045 break;
1046 case BRW_HW_REG_TYPE_F:
1047 format(file, "%-gF", brw_inst_imm_f(brw, inst));
1048 break;
1049 case GEN8_HW_REG_IMM_TYPE_DF:
1050 string(file, "Double IMM");
1051 break;
1052 case GEN8_HW_REG_IMM_TYPE_HF:
1053 string(file, "Half Float IMM");
1054 break;
1055 }
1056 return 0;
1057 }
1058
1059 static int
1060 src0(FILE *file, struct brw_context *brw, brw_inst *inst)
1061 {
1062 if (brw_inst_src0_reg_file(brw, inst) == BRW_IMMEDIATE_VALUE) {
1063 return imm(file, brw, brw_inst_src0_reg_type(brw, inst), inst);
1064 } else if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
1065 if (brw_inst_src0_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
1066 return src_da1(file,
1067 brw,
1068 brw_inst_opcode(brw, inst),
1069 brw_inst_src0_reg_type(brw, inst),
1070 brw_inst_src0_reg_file(brw, inst),
1071 brw_inst_src0_vstride(brw, inst),
1072 brw_inst_src0_width(brw, inst),
1073 brw_inst_src0_hstride(brw, inst),
1074 brw_inst_src0_da_reg_nr(brw, inst),
1075 brw_inst_src0_da1_subreg_nr(brw, inst),
1076 brw_inst_src0_abs(brw, inst),
1077 brw_inst_src0_negate(brw, inst));
1078 } else {
1079 return src_ia1(file,
1080 brw,
1081 brw_inst_opcode(brw, inst),
1082 brw_inst_src0_reg_type(brw, inst),
1083 brw_inst_src0_reg_file(brw, inst),
1084 brw_inst_src0_ia1_addr_imm(brw, inst),
1085 brw_inst_src0_ia_subreg_nr(brw, inst),
1086 brw_inst_src0_negate(brw, inst),
1087 brw_inst_src0_abs(brw, inst),
1088 brw_inst_src0_address_mode(brw, inst),
1089 brw_inst_src0_hstride(brw, inst),
1090 brw_inst_src0_width(brw, inst),
1091 brw_inst_src0_vstride(brw, inst));
1092 }
1093 } else {
1094 if (brw_inst_src0_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
1095 return src_da16(file,
1096 brw,
1097 brw_inst_opcode(brw, inst),
1098 brw_inst_src0_reg_type(brw, inst),
1099 brw_inst_src0_reg_file(brw, inst),
1100 brw_inst_src0_vstride(brw, inst),
1101 brw_inst_src0_da_reg_nr(brw, inst),
1102 brw_inst_src0_da16_subreg_nr(brw, inst),
1103 brw_inst_src0_abs(brw, inst),
1104 brw_inst_src0_negate(brw, inst),
1105 brw_inst_src0_da16_swiz_x(brw, inst),
1106 brw_inst_src0_da16_swiz_y(brw, inst),
1107 brw_inst_src0_da16_swiz_z(brw, inst),
1108 brw_inst_src0_da16_swiz_w(brw, inst));
1109 } else {
1110 string(file, "Indirect align16 address mode not supported");
1111 return 1;
1112 }
1113 }
1114 }
1115
1116 static int
1117 src1(FILE *file, struct brw_context *brw, brw_inst *inst)
1118 {
1119 if (brw_inst_src1_reg_file(brw, inst) == BRW_IMMEDIATE_VALUE) {
1120 return imm(file, brw, brw_inst_src1_reg_type(brw, inst), inst);
1121 } else if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
1122 if (brw_inst_src1_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
1123 return src_da1(file,
1124 brw,
1125 brw_inst_opcode(brw, inst),
1126 brw_inst_src1_reg_type(brw, inst),
1127 brw_inst_src1_reg_file(brw, inst),
1128 brw_inst_src1_vstride(brw, inst),
1129 brw_inst_src1_width(brw, inst),
1130 brw_inst_src1_hstride(brw, inst),
1131 brw_inst_src1_da_reg_nr(brw, inst),
1132 brw_inst_src1_da1_subreg_nr(brw, inst),
1133 brw_inst_src1_abs(brw, inst),
1134 brw_inst_src1_negate(brw, inst));
1135 } else {
1136 return src_ia1(file,
1137 brw,
1138 brw_inst_opcode(brw, inst),
1139 brw_inst_src1_reg_type(brw, inst),
1140 brw_inst_src1_reg_file(brw, inst),
1141 brw_inst_src1_ia1_addr_imm(brw, inst),
1142 brw_inst_src1_ia_subreg_nr(brw, inst),
1143 brw_inst_src1_negate(brw, inst),
1144 brw_inst_src1_abs(brw, inst),
1145 brw_inst_src1_address_mode(brw, inst),
1146 brw_inst_src1_hstride(brw, inst),
1147 brw_inst_src1_width(brw, inst),
1148 brw_inst_src1_vstride(brw, inst));
1149 }
1150 } else {
1151 if (brw_inst_src1_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
1152 return src_da16(file,
1153 brw,
1154 brw_inst_opcode(brw, inst),
1155 brw_inst_src1_reg_type(brw, inst),
1156 brw_inst_src1_reg_file(brw, inst),
1157 brw_inst_src1_vstride(brw, inst),
1158 brw_inst_src1_da_reg_nr(brw, inst),
1159 brw_inst_src1_da16_subreg_nr(brw, inst),
1160 brw_inst_src1_abs(brw, inst),
1161 brw_inst_src1_negate(brw, inst),
1162 brw_inst_src1_da16_swiz_x(brw, inst),
1163 brw_inst_src1_da16_swiz_y(brw, inst),
1164 brw_inst_src1_da16_swiz_z(brw, inst),
1165 brw_inst_src1_da16_swiz_w(brw, inst));
1166 } else {
1167 string(file, "Indirect align16 address mode not supported");
1168 return 1;
1169 }
1170 }
1171 }
1172
1173 static int
1174 qtr_ctrl(FILE *file, struct brw_context *brw, brw_inst *inst)
1175 {
1176 int qtr_ctl = brw_inst_qtr_control(brw, inst);
1177 int exec_size = 1 << brw_inst_exec_size(brw, inst);
1178
1179 if (exec_size == 8) {
1180 switch (qtr_ctl) {
1181 case 0:
1182 string(file, " 1Q");
1183 break;
1184 case 1:
1185 string(file, " 2Q");
1186 break;
1187 case 2:
1188 string(file, " 3Q");
1189 break;
1190 case 3:
1191 string(file, " 4Q");
1192 break;
1193 }
1194 } else if (exec_size == 16) {
1195 if (qtr_ctl < 2)
1196 string(file, " 1H");
1197 else
1198 string(file, " 2H");
1199 }
1200 return 0;
1201 }
1202
1203 #ifdef DEBUG
1204 static __attribute__((__unused__)) int
1205 brw_disassemble_imm(struct brw_context *brw,
1206 uint32_t dw3, uint32_t dw2, uint32_t dw1, uint32_t dw0)
1207 {
1208 brw_inst inst;
1209 inst.data[0] = (((uint64_t) dw1) << 32) | ((uint64_t) dw0);
1210 inst.data[1] = (((uint64_t) dw3) << 32) | ((uint64_t) dw2);
1211 return brw_disassemble_inst(stderr, brw, &inst, false);
1212 }
1213 #endif
1214
1215 int
1216 brw_disassemble_inst(FILE *file, struct brw_context *brw, brw_inst *inst,
1217 bool is_compacted)
1218 {
1219 int err = 0;
1220 int space = 0;
1221
1222 const enum opcode opcode = brw_inst_opcode(brw, inst);
1223
1224 if (brw_inst_pred_control(brw, inst)) {
1225 string(file, "(");
1226 err |= control(file, "predicate inverse", pred_inv,
1227 brw_inst_pred_inv(brw, inst), NULL);
1228 format(file, "f%ld", brw->gen >= 7 ? brw_inst_flag_reg_nr(brw, inst) : 0);
1229 if (brw_inst_flag_subreg_nr(brw, inst))
1230 format(file, ".%ld", brw_inst_flag_subreg_nr(brw, inst));
1231 if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
1232 err |= control(file, "predicate control align1", pred_ctrl_align1,
1233 brw_inst_pred_control(brw, inst), NULL);
1234 } else {
1235 err |= control(file, "predicate control align16", pred_ctrl_align16,
1236 brw_inst_pred_control(brw, inst), NULL);
1237 }
1238 string(file, ") ");
1239 }
1240
1241 err |= print_opcode(file, opcode);
1242 err |= control(file, "saturate", saturate, brw_inst_saturate(brw, inst),
1243 NULL);
1244
1245 err |= control(file, "debug control", debug_ctrl,
1246 brw_inst_debug_control(brw, inst), NULL);
1247
1248 if (opcode == BRW_OPCODE_MATH) {
1249 string(file, " ");
1250 err |= control(file, "function", math_function,
1251 brw_inst_math_function(brw, inst), NULL);
1252 } else if (opcode != BRW_OPCODE_SEND && opcode != BRW_OPCODE_SENDC) {
1253 err |= control(file, "conditional modifier", conditional_modifier,
1254 brw_inst_cond_modifier(brw, inst), NULL);
1255
1256 /* If we're using the conditional modifier, print which flags reg is
1257 * used for it. Note that on gen6+, the embedded-condition SEL and
1258 * control flow doesn't update flags.
1259 */
1260 if (brw_inst_cond_modifier(brw, inst) &&
1261 (brw->gen < 6 || (opcode != BRW_OPCODE_SEL &&
1262 opcode != BRW_OPCODE_IF &&
1263 opcode != BRW_OPCODE_WHILE))) {
1264 format(file, ".f%ld",
1265 brw->gen >= 7 ? brw_inst_flag_reg_nr(brw, inst) : 0);
1266 if (brw_inst_flag_subreg_nr(brw, inst))
1267 format(file, ".%ld", brw_inst_flag_subreg_nr(brw, inst));
1268 }
1269 }
1270
1271 if (opcode != BRW_OPCODE_NOP && opcode != BRW_OPCODE_NENOP) {
1272 string(file, "(");
1273 err |= control(file, "execution size", exec_size,
1274 brw_inst_exec_size(brw, inst), NULL);
1275 string(file, ")");
1276 }
1277
1278 if (opcode == BRW_OPCODE_SEND && brw->gen < 6)
1279 format(file, " %ld", brw_inst_base_mrf(brw, inst));
1280
1281 if (has_uip(brw, opcode)) {
1282 /* Instructions that have UIP also have JIP. */
1283 pad(file, 16);
1284 format(file, "JIP: %d", brw_inst_jip(brw, inst));
1285 pad(file, 32);
1286 format(file, "UIP: %d", brw_inst_uip(brw, inst));
1287 } else if (has_jip(brw, opcode)) {
1288 pad(file, 16);
1289 if (brw->gen >= 7) {
1290 format(file, "JIP: %d", brw_inst_jip(brw, inst));
1291 } else {
1292 format(file, "JIP: %d", brw_inst_gen6_jump_count(brw, inst));
1293 }
1294 } else if (brw->gen < 6 && (opcode == BRW_OPCODE_BREAK ||
1295 opcode == BRW_OPCODE_CONTINUE ||
1296 opcode == BRW_OPCODE_ELSE)) {
1297 pad(file, 16);
1298 format(file, "Jump: %d", brw_inst_gen4_jump_count(brw, inst));
1299 pad(file, 32);
1300 format(file, "Pop: %ld", brw_inst_gen4_pop_count(brw, inst));
1301 } else if (brw->gen < 6 && (opcode == BRW_OPCODE_IF ||
1302 opcode == BRW_OPCODE_IFF ||
1303 opcode == BRW_OPCODE_HALT)) {
1304 pad(file, 16);
1305 format(file, "Jump: %d", brw_inst_gen4_jump_count(brw, inst));
1306 } else if (brw->gen < 6 && opcode == BRW_OPCODE_ENDIF) {
1307 pad(file, 16);
1308 format(file, "Pop: %ld", brw_inst_gen4_pop_count(brw, inst));
1309 } else if (opcode == BRW_OPCODE_JMPI) {
1310 pad(file, 16);
1311 err |= src1(file, brw, inst);
1312 } else if (opcode_descs[opcode].nsrc == 3) {
1313 pad(file, 16);
1314 err |= dest_3src(file, brw, inst);
1315
1316 pad(file, 32);
1317 err |= src0_3src(file, brw, inst);
1318
1319 pad(file, 48);
1320 err |= src1_3src(file, brw, inst);
1321
1322 pad(file, 64);
1323 err |= src2_3src(file, brw, inst);
1324 } else {
1325 if (opcode_descs[opcode].ndst > 0) {
1326 pad(file, 16);
1327 err |= dest(file, brw, inst);
1328 }
1329
1330 if (opcode_descs[opcode].nsrc > 0) {
1331 pad(file, 32);
1332 err |= src0(file, brw, inst);
1333 }
1334
1335 if (opcode_descs[opcode].nsrc > 1) {
1336 pad(file, 48);
1337 err |= src1(file, brw, inst);
1338 }
1339 }
1340
1341 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) {
1342 enum brw_message_target sfid = brw_inst_sfid(brw, inst);
1343
1344 if (brw_inst_src1_reg_file(brw, inst) != BRW_IMMEDIATE_VALUE) {
1345 /* show the indirect descriptor source */
1346 pad(file, 48);
1347 err |= src1(file, brw, inst);
1348 }
1349
1350 newline(file);
1351 pad(file, 16);
1352 space = 0;
1353
1354 fprintf(file, " ");
1355 err |= control(file, "SFID", brw->gen >= 6 ? gen6_sfid : gen4_sfid,
1356 sfid, &space);
1357
1358
1359 if (brw_inst_src1_reg_file(brw, inst) != BRW_IMMEDIATE_VALUE) {
1360 format(file, " indirect");
1361 } else {
1362 switch (sfid) {
1363 case BRW_SFID_MATH:
1364 err |= control(file, "math function", math_function,
1365 brw_inst_math_msg_function(brw, inst), &space);
1366 err |= control(file, "math saturate", math_saturate,
1367 brw_inst_math_msg_saturate(brw, inst), &space);
1368 err |= control(file, "math signed", math_signed,
1369 brw_inst_math_msg_signed_int(brw, inst), &space);
1370 err |= control(file, "math scalar", math_scalar,
1371 brw_inst_math_msg_data_type(brw, inst), &space);
1372 err |= control(file, "math precision", math_precision,
1373 brw_inst_math_msg_precision(brw, inst), &space);
1374 break;
1375 case BRW_SFID_SAMPLER:
1376 if (brw->gen >= 5) {
1377 format(file, " (%ld, %ld, %ld, %ld)",
1378 brw_inst_binding_table_index(brw, inst),
1379 brw_inst_sampler(brw, inst),
1380 brw_inst_sampler_msg_type(brw, inst),
1381 brw_inst_sampler_simd_mode(brw, inst));
1382 } else {
1383 format(file, " (%ld, %ld, %ld, ",
1384 brw_inst_binding_table_index(brw, inst),
1385 brw_inst_sampler(brw, inst),
1386 brw_inst_sampler_msg_type(brw, inst));
1387 if (!brw->is_g4x) {
1388 err |= control(file, "sampler target format",
1389 sampler_target_format,
1390 brw_inst_sampler_return_format(brw, inst), NULL);
1391 }
1392 string(file, ")");
1393 }
1394 break;
1395 case GEN6_SFID_DATAPORT_SAMPLER_CACHE:
1396 /* aka BRW_SFID_DATAPORT_READ on Gen4-5 */
1397 if (brw->gen >= 6) {
1398 format(file, " (%ld, %ld, %ld, %ld)",
1399 brw_inst_binding_table_index(brw, inst),
1400 brw_inst_dp_msg_control(brw, inst),
1401 brw_inst_dp_msg_type(brw, inst),
1402 brw->gen >= 7 ? 0 : brw_inst_dp_write_commit(brw, inst));
1403 } else {
1404 format(file, " (%ld, %ld, %ld)",
1405 brw_inst_binding_table_index(brw, inst),
1406 brw_inst_dp_read_msg_control(brw, inst),
1407 brw_inst_dp_read_msg_type(brw, inst));
1408 }
1409 break;
1410
1411 case GEN6_SFID_DATAPORT_RENDER_CACHE: {
1412 /* aka BRW_SFID_DATAPORT_WRITE on Gen4-5 */
1413 unsigned msg_type = brw_inst_dp_write_msg_type(brw, inst);
1414
1415 err |= control(file, "DP rc message type",
1416 brw->gen >= 6 ? dp_rc_msg_type_gen6
1417 : dp_write_port_msg_type,
1418 msg_type, &space);
1419
1420 bool is_rt_write = msg_type ==
1421 (brw->gen >= 6 ? GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
1422 : BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE);
1423
1424 if (is_rt_write) {
1425 err |= control(file, "RT message type", m_rt_write_subtype,
1426 brw_inst_rt_message_type(brw, inst), &space);
1427 if (brw->gen >= 6 && brw_inst_rt_slot_group(brw, inst))
1428 string(file, " Hi");
1429 if (brw_inst_rt_last(brw, inst))
1430 string(file, " LastRT");
1431 if (brw->gen < 7 && brw_inst_dp_write_commit(brw, inst))
1432 string(file, " WriteCommit");
1433 } else {
1434 format(file, " MsgCtrl = 0x%lx",
1435 brw_inst_dp_write_msg_control(brw, inst));
1436 }
1437
1438 format(file, " Surface = %ld", brw_inst_binding_table_index(brw, inst));
1439 break;
1440 }
1441
1442 case BRW_SFID_URB:
1443 format(file, " %ld", brw_inst_urb_global_offset(brw, inst));
1444
1445 space = 1;
1446 if (brw->gen >= 7) {
1447 err |= control(file, "urb opcode", gen7_urb_opcode,
1448 brw_inst_urb_opcode(brw, inst), &space);
1449 } else if (brw->gen >= 5) {
1450 err |= control(file, "urb opcode", gen5_urb_opcode,
1451 brw_inst_urb_opcode(brw, inst), &space);
1452 }
1453 err |= control(file, "urb swizzle", urb_swizzle,
1454 brw_inst_urb_swizzle_control(brw, inst), &space);
1455 if (brw->gen < 7) {
1456 err |= control(file, "urb allocate", urb_allocate,
1457 brw_inst_urb_allocate(brw, inst), &space);
1458 err |= control(file, "urb used", urb_used,
1459 brw_inst_urb_used(brw, inst), &space);
1460 }
1461 if (brw->gen < 8) {
1462 err |= control(file, "urb complete", urb_complete,
1463 brw_inst_urb_complete(brw, inst), &space);
1464 }
1465 break;
1466 case BRW_SFID_THREAD_SPAWNER:
1467 break;
1468 case GEN7_SFID_DATAPORT_DATA_CACHE:
1469 if (brw->gen >= 7) {
1470 format(file, " (");
1471
1472 err |= control(file, "DP DC0 message type",
1473 dp_dc0_msg_type_gen7,
1474 brw_inst_dp_msg_type(brw, inst), &space);
1475
1476 format(file, ", %ld, ", brw_inst_binding_table_index(brw, inst));
1477
1478 switch (brw_inst_dp_msg_type(brw, inst)) {
1479 case GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP:
1480 control(file, "atomic op", aop,
1481 brw_inst_imm_ud(brw, inst) >> 8 & 0xf, &space);
1482 break;
1483 default:
1484 format(file, "%ld", brw_inst_dp_msg_control(brw, inst));
1485 }
1486 format(file, ")");
1487 break;
1488 }
1489 /* FALLTHROUGH */
1490
1491 case HSW_SFID_DATAPORT_DATA_CACHE_1: {
1492 if (brw->gen >= 7) {
1493 format(file, " (");
1494
1495 unsigned msg_ctrl = brw_inst_dp_msg_control(brw, inst);
1496
1497 err |= control(file, "DP DC1 message type",
1498 dp_dc1_msg_type_hsw,
1499 brw_inst_dp_msg_type(brw, inst), &space);
1500
1501 format(file, ", Surface = %ld, ",
1502 brw_inst_binding_table_index(brw, inst));
1503
1504 switch (brw_inst_dp_msg_type(brw, inst)) {
1505 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP:
1506 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP:
1507 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP:
1508 format(file, "SIMD%d,", (msg_ctrl & (1 << 4)) ? 8 : 16);
1509 /* fallthrough */
1510 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2:
1511 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2:
1512 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2:
1513 control(file, "atomic op", aop, msg_ctrl & 0xf, &space);
1514 break;
1515 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ:
1516 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE:
1517 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ:
1518 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE: {
1519 static const char *simd_modes[] = { "4x2", "16", "8" };
1520 format(file, "SIMD%s, Mask = 0x%x",
1521 simd_modes[msg_ctrl >> 4], msg_ctrl & 0xf);
1522 break;
1523 }
1524 default:
1525 format(file, "0x%x", msg_ctrl);
1526 }
1527 format(file, ")");
1528 break;
1529 }
1530 /* FALLTHROUGH */
1531 }
1532
1533 case GEN7_SFID_PIXEL_INTERPOLATOR:
1534 if (brw->gen >= 7) {
1535 format(file, " (%s, %s, 0x%02lx)",
1536 brw_inst_pi_nopersp(brw, inst) ? "linear" : "persp",
1537 pixel_interpolator_msg_types[brw_inst_pi_message_type(brw, inst)],
1538 brw_inst_pi_message_data(brw, inst));
1539 break;
1540 }
1541 /* FALLTHROUGH */
1542
1543 default:
1544 format(file, "unsupported shared function ID %d", sfid);
1545 break;
1546 }
1547
1548 if (space)
1549 string(file, " ");
1550 format(file, "mlen %ld", brw_inst_mlen(brw, inst));
1551 format(file, " rlen %ld", brw_inst_rlen(brw, inst));
1552 }
1553 }
1554 pad(file, 64);
1555 if (opcode != BRW_OPCODE_NOP && opcode != BRW_OPCODE_NENOP) {
1556 string(file, "{");
1557 space = 1;
1558 err |= control(file, "access mode", access_mode,
1559 brw_inst_access_mode(brw, inst), &space);
1560 if (brw->gen >= 6) {
1561 err |= control(file, "write enable control", wectrl,
1562 brw_inst_mask_control(brw, inst), &space);
1563 } else {
1564 err |= control(file, "mask control", mask_ctrl,
1565 brw_inst_mask_control(brw, inst), &space);
1566 }
1567 err |= control(file, "dependency control", dep_ctrl,
1568 ((brw_inst_no_dd_check(brw, inst) << 1) |
1569 brw_inst_no_dd_clear(brw, inst)), &space);
1570
1571 if (brw->gen >= 6)
1572 err |= qtr_ctrl(file, brw, inst);
1573 else {
1574 if (brw_inst_qtr_control(brw, inst) == BRW_COMPRESSION_COMPRESSED &&
1575 opcode_descs[opcode].ndst > 0 &&
1576 brw_inst_dst_reg_file(brw, inst) == BRW_MESSAGE_REGISTER_FILE &&
1577 brw_inst_dst_da_reg_nr(brw, inst) & (1 << 7)) {
1578 format(file, " compr4");
1579 } else {
1580 err |= control(file, "compression control", compr_ctrl,
1581 brw_inst_qtr_control(brw, inst), &space);
1582 }
1583 }
1584
1585 err |= control(file, "compaction", cmpt_ctrl, is_compacted, &space);
1586 err |= control(file, "thread control", thread_ctrl,
1587 brw_inst_thread_control(brw, inst), &space);
1588 if (has_branch_ctrl(brw, opcode)) {
1589 err |= control(file, "branch ctrl", branch_ctrl,
1590 brw_inst_branch_control(brw, inst), &space);
1591 } else if (brw->gen >= 6) {
1592 err |= control(file, "acc write control", accwr,
1593 brw_inst_acc_wr_control(brw, inst), &space);
1594 }
1595 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC)
1596 err |= control(file, "end of thread", end_of_thread,
1597 brw_inst_eot(brw, inst), &space);
1598 if (space)
1599 string(file, " ");
1600 string(file, "}");
1601 }
1602 string(file, ";");
1603 newline(file);
1604 return err;
1605 }