projects / mesa.git / blob
? search:


c6f981a70e7ff946718e7f4e7540ffa3cb5cf364
[mesa.git] / src / mesa / drivers / dri / i965 / brw_disasm.c
1 /*
2 * Copyright © 2008 Keith Packard
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
13 *
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20 * OF THIS SOFTWARE.
21 */
22
23 #include <stdio.h>
24 #include <stdlib.h>
25 #include <string.h>
26 #include <getopt.h>
27 #include <unistd.h>
28 #include <stdarg.h>
29
30 #include "brw_context.h"
31 #include "brw_defines.h"
32 #include "brw_reg.h"
33 #include "brw_inst.h"
34
35 const struct opcode_desc opcode_descs[128] = {
36 [BRW_OPCODE_MOV] = { .name = "mov", .nsrc = 1, .ndst = 1 },
37 [BRW_OPCODE_FRC] = { .name = "frc", .nsrc = 1, .ndst = 1 },
38 [BRW_OPCODE_RNDU] = { .name = "rndu", .nsrc = 1, .ndst = 1 },
39 [BRW_OPCODE_RNDD] = { .name = "rndd", .nsrc = 1, .ndst = 1 },
40 [BRW_OPCODE_RNDE] = { .name = "rnde", .nsrc = 1, .ndst = 1 },
41 [BRW_OPCODE_RNDZ] = { .name = "rndz", .nsrc = 1, .ndst = 1 },
42 [BRW_OPCODE_NOT] = { .name = "not", .nsrc = 1, .ndst = 1 },
43 [BRW_OPCODE_LZD] = { .name = "lzd", .nsrc = 1, .ndst = 1 },
44 [BRW_OPCODE_F32TO16] = { .name = "f32to16", .nsrc = 1, .ndst = 1 },
45 [BRW_OPCODE_F16TO32] = { .name = "f16to32", .nsrc = 1, .ndst = 1 },
46 [BRW_OPCODE_BFREV] = { .name = "bfrev", .nsrc = 1, .ndst = 1 },
47 [BRW_OPCODE_FBH] = { .name = "fbh", .nsrc = 1, .ndst = 1 },
48 [BRW_OPCODE_FBL] = { .name = "fbl", .nsrc = 1, .ndst = 1 },
49 [BRW_OPCODE_CBIT] = { .name = "cbit", .nsrc = 1, .ndst = 1 },
50
51 [BRW_OPCODE_MUL] = { .name = "mul", .nsrc = 2, .ndst = 1 },
52 [BRW_OPCODE_MAC] = { .name = "mac", .nsrc = 2, .ndst = 1 },
53 [BRW_OPCODE_MACH] = { .name = "mach", .nsrc = 2, .ndst = 1 },
54 [BRW_OPCODE_LINE] = { .name = "line", .nsrc = 2, .ndst = 1 },
55 [BRW_OPCODE_PLN] = { .name = "pln", .nsrc = 2, .ndst = 1 },
56 [BRW_OPCODE_MAD] = { .name = "mad", .nsrc = 3, .ndst = 1 },
57 [BRW_OPCODE_LRP] = { .name = "lrp", .nsrc = 3, .ndst = 1 },
58 [BRW_OPCODE_SAD2] = { .name = "sad2", .nsrc = 2, .ndst = 1 },
59 [BRW_OPCODE_SADA2] = { .name = "sada2", .nsrc = 2, .ndst = 1 },
60 [BRW_OPCODE_DP4] = { .name = "dp4", .nsrc = 2, .ndst = 1 },
61 [BRW_OPCODE_DPH] = { .name = "dph", .nsrc = 2, .ndst = 1 },
62 [BRW_OPCODE_DP3] = { .name = "dp3", .nsrc = 2, .ndst = 1 },
63 [BRW_OPCODE_DP2] = { .name = "dp2", .nsrc = 2, .ndst = 1 },
64 [BRW_OPCODE_MATH] = { .name = "math", .nsrc = 2, .ndst = 1 },
65
66 [BRW_OPCODE_AVG] = { .name = "avg", .nsrc = 2, .ndst = 1 },
67 [BRW_OPCODE_ADD] = { .name = "add", .nsrc = 2, .ndst = 1 },
68 [BRW_OPCODE_SEL] = { .name = "sel", .nsrc = 2, .ndst = 1 },
69 [BRW_OPCODE_AND] = { .name = "and", .nsrc = 2, .ndst = 1 },
70 [BRW_OPCODE_OR] = { .name = "or", .nsrc = 2, .ndst = 1 },
71 [BRW_OPCODE_XOR] = { .name = "xor", .nsrc = 2, .ndst = 1 },
72 [BRW_OPCODE_SHR] = { .name = "shr", .nsrc = 2, .ndst = 1 },
73 [BRW_OPCODE_SHL] = { .name = "shl", .nsrc = 2, .ndst = 1 },
74 [BRW_OPCODE_ASR] = { .name = "asr", .nsrc = 2, .ndst = 1 },
75 [BRW_OPCODE_CMP] = { .name = "cmp", .nsrc = 2, .ndst = 1 },
76 [BRW_OPCODE_CMPN] = { .name = "cmpn", .nsrc = 2, .ndst = 1 },
77 [BRW_OPCODE_BFE] = { .name = "bfe", .nsrc = 3, .ndst = 1 },
78 [BRW_OPCODE_BFI1] = { .name = "bfi1", .nsrc = 2, .ndst = 1 },
79 [BRW_OPCODE_BFI2] = { .name = "bfi2", .nsrc = 3, .ndst = 1 },
80 [BRW_OPCODE_ADDC] = { .name = "addc", .nsrc = 2, .ndst = 1 },
81 [BRW_OPCODE_SUBB] = { .name = "subb", .nsrc = 2, .ndst = 1 },
82
83 [BRW_OPCODE_SEND] = { .name = "send", .nsrc = 1, .ndst = 1 },
84 [BRW_OPCODE_SENDC] = { .name = "sendc", .nsrc = 1, .ndst = 1 },
85 [BRW_OPCODE_NOP] = { .name = "nop", .nsrc = 0, .ndst = 0 },
86 [BRW_OPCODE_JMPI] = { .name = "jmpi", .nsrc = 0, .ndst = 0 },
87 [BRW_OPCODE_IF] = { .name = "if", .nsrc = 2, .ndst = 0 },
88 [BRW_OPCODE_IFF] = { .name = "iff", .nsrc = 2, .ndst = 1 },
89 [BRW_OPCODE_WHILE] = { .name = "while", .nsrc = 2, .ndst = 0 },
90 [BRW_OPCODE_ELSE] = { .name = "else", .nsrc = 2, .ndst = 0 },
91 [BRW_OPCODE_BREAK] = { .name = "break", .nsrc = 2, .ndst = 0 },
92 [BRW_OPCODE_CONTINUE] = { .name = "cont", .nsrc = 1, .ndst = 0 },
93 [BRW_OPCODE_HALT] = { .name = "halt", .nsrc = 1, .ndst = 0 },
94 [BRW_OPCODE_MSAVE] = { .name = "msave", .nsrc = 1, .ndst = 1 },
95 [BRW_OPCODE_PUSH] = { .name = "push", .nsrc = 1, .ndst = 1 },
96 [BRW_OPCODE_MRESTORE] = { .name = "mrest", .nsrc = 1, .ndst = 1 },
97 [BRW_OPCODE_POP] = { .name = "pop", .nsrc = 2, .ndst = 0 },
98 [BRW_OPCODE_WAIT] = { .name = "wait", .nsrc = 1, .ndst = 0 },
99 [BRW_OPCODE_DO] = { .name = "do", .nsrc = 0, .ndst = 0 },
100 [BRW_OPCODE_ENDIF] = { .name = "endif", .nsrc = 2, .ndst = 0 },
101 };
102
103 static bool
104 has_jip(struct brw_context *brw, enum opcode opcode)
105 {
106 if (brw->gen < 6)
107 return false;
108
109 return opcode == BRW_OPCODE_IF ||
110 opcode == BRW_OPCODE_ELSE ||
111 opcode == BRW_OPCODE_ENDIF ||
112 opcode == BRW_OPCODE_WHILE;
113 }
114
115 static bool
116 has_uip(struct brw_context *brw, enum opcode opcode)
117 {
118 if (brw->gen < 6)
119 return false;
120
121 return (brw->gen >= 7 && opcode == BRW_OPCODE_IF) ||
122 (brw->gen >= 8 && opcode == BRW_OPCODE_ELSE) ||
123 opcode == BRW_OPCODE_BREAK ||
124 opcode == BRW_OPCODE_CONTINUE ||
125 opcode == BRW_OPCODE_HALT;
126 }
127
128 static bool
129 is_logic_instruction(unsigned opcode)
130 {
131 return opcode == BRW_OPCODE_AND ||
132 opcode == BRW_OPCODE_NOT ||
133 opcode == BRW_OPCODE_OR ||
134 opcode == BRW_OPCODE_XOR;
135 }
136
137 const char *const conditional_modifier[16] = {
138 [BRW_CONDITIONAL_NONE] = "",
139 [BRW_CONDITIONAL_Z] = ".e",
140 [BRW_CONDITIONAL_NZ] = ".ne",
141 [BRW_CONDITIONAL_G] = ".g",
142 [BRW_CONDITIONAL_GE] = ".ge",
143 [BRW_CONDITIONAL_L] = ".l",
144 [BRW_CONDITIONAL_LE] = ".le",
145 [BRW_CONDITIONAL_R] = ".r",
146 [BRW_CONDITIONAL_O] = ".o",
147 [BRW_CONDITIONAL_U] = ".u",
148 };
149
150 static const char *const m_negate[2] = {
151 [0] = "",
152 [1] = "-",
153 };
154
155 static const char *const _abs[2] = {
156 [0] = "",
157 [1] = "(abs)",
158 };
159
160 static const char *const m_bitnot[2] = { "", "~" };
161
162 static const char *const vert_stride[16] = {
163 [0] = "0",
164 [1] = "1",
165 [2] = "2",
166 [3] = "4",
167 [4] = "8",
168 [5] = "16",
169 [6] = "32",
170 [15] = "VxH",
171 };
172
173 static const char *const width[8] = {
174 [0] = "1",
175 [1] = "2",
176 [2] = "4",
177 [3] = "8",
178 [4] = "16",
179 };
180
181 static const char *const horiz_stride[4] = {
182 [0] = "0",
183 [1] = "1",
184 [2] = "2",
185 [3] = "4"
186 };
187
188 static const char *const chan_sel[4] = {
189 [0] = "x",
190 [1] = "y",
191 [2] = "z",
192 [3] = "w",
193 };
194
195 static const char *const debug_ctrl[2] = {
196 [0] = "",
197 [1] = ".breakpoint"
198 };
199
200 static const char *const saturate[2] = {
201 [0] = "",
202 [1] = ".sat"
203 };
204
205 static const char *const cmpt_ctrl[2] = {
206 [0] = "",
207 [1] = "compacted"
208 };
209
210 static const char *const accwr[2] = {
211 [0] = "",
212 [1] = "AccWrEnable"
213 };
214
215 static const char *const wectrl[2] = {
216 [0] = "",
217 [1] = "WE_all"
218 };
219
220 static const char *const exec_size[8] = {
221 [0] = "1",
222 [1] = "2",
223 [2] = "4",
224 [3] = "8",
225 [4] = "16",
226 [5] = "32"
227 };
228
229 static const char *const pred_inv[2] = {
230 [0] = "+",
231 [1] = "-"
232 };
233
234 static const char *const pred_ctrl_align16[16] = {
235 [1] = "",
236 [2] = ".x",
237 [3] = ".y",
238 [4] = ".z",
239 [5] = ".w",
240 [6] = ".any4h",
241 [7] = ".all4h",
242 };
243
244 static const char *const pred_ctrl_align1[16] = {
245 [BRW_PREDICATE_NORMAL] = "",
246 [BRW_PREDICATE_ALIGN1_ANYV] = ".anyv",
247 [BRW_PREDICATE_ALIGN1_ALLV] = ".allv",
248 [BRW_PREDICATE_ALIGN1_ANY2H] = ".any2h",
249 [BRW_PREDICATE_ALIGN1_ALL2H] = ".all2h",
250 [BRW_PREDICATE_ALIGN1_ANY4H] = ".any4h",
251 [BRW_PREDICATE_ALIGN1_ALL4H] = ".all4h",
252 [BRW_PREDICATE_ALIGN1_ANY8H] = ".any8h",
253 [BRW_PREDICATE_ALIGN1_ALL8H] = ".all8h",
254 [BRW_PREDICATE_ALIGN1_ANY16H] = ".any16h",
255 [BRW_PREDICATE_ALIGN1_ALL16H] = ".all16h",
256 [BRW_PREDICATE_ALIGN1_ANY32H] = ".any32h",
257 [BRW_PREDICATE_ALIGN1_ANY32H] = ".all32h",
258 };
259
260 static const char *const thread_ctrl[4] = {
261 [BRW_THREAD_NORMAL] = "",
262 [BRW_THREAD_ATOMIC] = "atomic",
263 [BRW_THREAD_SWITCH] = "switch",
264 };
265
266 static const char *const compr_ctrl[4] = {
267 [0] = "",
268 [1] = "sechalf",
269 [2] = "compr",
270 [3] = "compr4",
271 };
272
273 static const char *const dep_ctrl[4] = {
274 [0] = "",
275 [1] = "NoDDClr",
276 [2] = "NoDDChk",
277 [3] = "NoDDClr,NoDDChk",
278 };
279
280 static const char *const mask_ctrl[4] = {
281 [0] = "",
282 [1] = "nomask",
283 };
284
285 static const char *const access_mode[2] = {
286 [0] = "align1",
287 [1] = "align16",
288 };
289
290 static const char * const reg_encoding[] = {
291 [BRW_HW_REG_TYPE_UD] = "UD",
292 [BRW_HW_REG_TYPE_D] = "D",
293 [BRW_HW_REG_TYPE_UW] = "UW",
294 [BRW_HW_REG_TYPE_W] = "W",
295 [BRW_HW_REG_NON_IMM_TYPE_UB] = "UB",
296 [BRW_HW_REG_NON_IMM_TYPE_B] = "B",
297 [GEN7_HW_REG_NON_IMM_TYPE_DF] = "DF",
298 [BRW_HW_REG_TYPE_F] = "F",
299 [GEN8_HW_REG_TYPE_UQ] = "UQ",
300 [GEN8_HW_REG_TYPE_Q] = "Q",
301 [GEN8_HW_REG_NON_IMM_TYPE_HF] = "HF",
302 };
303
304 static const char *const three_source_reg_encoding[] = {
305 [BRW_3SRC_TYPE_F] = "F",
306 [BRW_3SRC_TYPE_D] = "D",
307 [BRW_3SRC_TYPE_UD] = "UD",
308 };
309
310 const int reg_type_size[] = {
311 [BRW_HW_REG_TYPE_UD] = 4,
312 [BRW_HW_REG_TYPE_D] = 4,
313 [BRW_HW_REG_TYPE_UW] = 2,
314 [BRW_HW_REG_TYPE_W] = 2,
315 [BRW_HW_REG_NON_IMM_TYPE_UB] = 1,
316 [BRW_HW_REG_NON_IMM_TYPE_B] = 1,
317 [GEN7_HW_REG_NON_IMM_TYPE_DF] = 8,
318 [BRW_HW_REG_TYPE_F] = 4,
319 [GEN8_HW_REG_TYPE_UQ] = 8,
320 [GEN8_HW_REG_TYPE_Q] = 8,
321 [GEN8_HW_REG_NON_IMM_TYPE_HF] = 2,
322 };
323
324 static const char *const reg_file[4] = {
325 [0] = "A",
326 [1] = "g",
327 [2] = "m",
328 [3] = "imm",
329 };
330
331 static const char *const writemask[16] = {
332 [0x0] = ".",
333 [0x1] = ".x",
334 [0x2] = ".y",
335 [0x3] = ".xy",
336 [0x4] = ".z",
337 [0x5] = ".xz",
338 [0x6] = ".yz",
339 [0x7] = ".xyz",
340 [0x8] = ".w",
341 [0x9] = ".xw",
342 [0xa] = ".yw",
343 [0xb] = ".xyw",
344 [0xc] = ".zw",
345 [0xd] = ".xzw",
346 [0xe] = ".yzw",
347 [0xf] = "",
348 };
349
350 static const char *const end_of_thread[2] = {
351 [0] = "",
352 [1] = "EOT"
353 };
354
355 /* SFIDs on Gen4-5 */
356 static const char *const gen4_sfid[16] = {
357 [BRW_SFID_NULL] = "null",
358 [BRW_SFID_MATH] = "math",
359 [BRW_SFID_SAMPLER] = "sampler",
360 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
361 [BRW_SFID_DATAPORT_READ] = "read",
362 [BRW_SFID_DATAPORT_WRITE] = "write",
363 [BRW_SFID_URB] = "urb",
364 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
365 [BRW_SFID_VME] = "vme",
366 };
367
368 static const char *const gen6_sfid[16] = {
369 [BRW_SFID_NULL] = "null",
370 [BRW_SFID_MATH] = "math",
371 [BRW_SFID_SAMPLER] = "sampler",
372 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
373 [BRW_SFID_URB] = "urb",
374 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
375 [GEN6_SFID_DATAPORT_SAMPLER_CACHE] = "sampler",
376 [GEN6_SFID_DATAPORT_RENDER_CACHE] = "render",
377 [GEN6_SFID_DATAPORT_CONSTANT_CACHE] = "const",
378 [GEN7_SFID_DATAPORT_DATA_CACHE] = "data",
379 [GEN7_SFID_PIXEL_INTERPOLATOR] = "pixel interp",
380 [HSW_SFID_DATAPORT_DATA_CACHE_1] = "dp data 1",
381 [HSW_SFID_CRE] = "cre",
382 };
383
384 static const char *const dp_write_port_msg_type[8] = {
385 [0b000] = "OWord block write",
386 [0b001] = "OWord dual block write",
387 [0b010] = "media block write",
388 [0b011] = "DWord scattered write",
389 [0b100] = "RT write",
390 [0b101] = "streamed VB write",
391 [0b110] = "RT UNORM write", /* G45+ */
392 [0b111] = "flush render cache",
393 };
394
395 static const char *const dp_rc_msg_type_gen6[16] = {
396 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read",
397 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read",
398 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read",
399 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read",
400 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] =
401 "OWORD unaligned block read",
402 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read",
403 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write",
404 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write",
405 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] =
406 "OWORD dual block write",
407 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write",
408 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] =
409 "DWORD scattered write",
410 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write",
411 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write",
412 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORM write",
413 };
414
415 static const char *const m_rt_write_subtype[] = {
416 [0b000] = "SIMD16",
417 [0b001] = "SIMD16/RepData",
418 [0b010] = "SIMD8/DualSrcLow",
419 [0b011] = "SIMD8/DualSrcHigh",
420 [0b100] = "SIMD8",
421 [0b101] = "SIMD8/ImageWrite", /* Gen6+ */
422 [0b111] = "SIMD16/RepData-111", /* no idea how this is different than 1 */
423 };
424
425 static const char *const dp_dc0_msg_type_gen7[16] = {
426 [GEN7_DATAPORT_DC_OWORD_BLOCK_READ] = "DC OWORD block read",
427 [GEN7_DATAPORT_DC_UNALIGNED_OWORD_BLOCK_READ] =
428 "DC unaligned OWORD block read",
429 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_READ] = "DC OWORD dual block read",
430 [GEN7_DATAPORT_DC_DWORD_SCATTERED_READ] = "DC DWORD scattered read",
431 [GEN7_DATAPORT_DC_BYTE_SCATTERED_READ] = "DC byte scattered read",
432 [GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP] = "DC untyped atomic",
433 [GEN7_DATAPORT_DC_MEMORY_FENCE] = "DC mfence",
434 [GEN7_DATAPORT_DC_OWORD_BLOCK_WRITE] = "DC OWORD block write",
435 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_WRITE] = "DC OWORD dual block write",
436 [GEN7_DATAPORT_DC_DWORD_SCATTERED_WRITE] = "DC DWORD scatterd write",
437 [GEN7_DATAPORT_DC_BYTE_SCATTERED_WRITE] = "DC byte scattered write",
438 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
439 };
440
441 static const char *const dp_dc1_msg_type_hsw[16] = {
442 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ] = "untyped surface read",
443 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP] = "DC untyped atomic op",
444 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2] =
445 "DC untyped 4x2 atomic op",
446 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_READ] = "DC media block read",
447 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ] = "DC typed surface read",
448 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP] = "DC typed atomic",
449 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2] = "DC typed 4x2 atomic op",
450 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
451 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_WRITE] = "DC media block write",
452 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP] = "DC atomic counter op",
453 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2] =
454 "DC 4x2 atomic counter op",
455 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE] = "DC typed surface write",
456 };
457
458 static const char *const aop[16] = {
459 [BRW_AOP_AND] = "and",
460 [BRW_AOP_OR] = "or",
461 [BRW_AOP_XOR] = "xor",
462 [BRW_AOP_MOV] = "mov",
463 [BRW_AOP_INC] = "inc",
464 [BRW_AOP_DEC] = "dec",
465 [BRW_AOP_ADD] = "add",
466 [BRW_AOP_SUB] = "sub",
467 [BRW_AOP_REVSUB] = "revsub",
468 [BRW_AOP_IMAX] = "imax",
469 [BRW_AOP_IMIN] = "imin",
470 [BRW_AOP_UMAX] = "umax",
471 [BRW_AOP_UMIN] = "umin",
472 [BRW_AOP_CMPWR] = "cmpwr",
473 [BRW_AOP_PREDEC] = "predec",
474 };
475
476 static const char * const pixel_interpolator_msg_types[4] = {
477 [GEN7_PIXEL_INTERPOLATOR_LOC_SHARED_OFFSET] = "per_message_offset",
478 [GEN7_PIXEL_INTERPOLATOR_LOC_SAMPLE] = "sample_position",
479 [GEN7_PIXEL_INTERPOLATOR_LOC_CENTROID] = "centroid",
480 [GEN7_PIXEL_INTERPOLATOR_LOC_PER_SLOT_OFFSET] = "per_slot_offset",
481 };
482
483 static const char *const math_function[16] = {
484 [BRW_MATH_FUNCTION_INV] = "inv",
485 [BRW_MATH_FUNCTION_LOG] = "log",
486 [BRW_MATH_FUNCTION_EXP] = "exp",
487 [BRW_MATH_FUNCTION_SQRT] = "sqrt",
488 [BRW_MATH_FUNCTION_RSQ] = "rsq",
489 [BRW_MATH_FUNCTION_SIN] = "sin",
490 [BRW_MATH_FUNCTION_COS] = "cos",
491 [BRW_MATH_FUNCTION_SINCOS] = "sincos",
492 [BRW_MATH_FUNCTION_FDIV] = "fdiv",
493 [BRW_MATH_FUNCTION_POW] = "pow",
494 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] = "intdivmod",
495 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] = "intdiv",
496 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER] = "intmod",
497 [GEN8_MATH_FUNCTION_INVM] = "invm",
498 [GEN8_MATH_FUNCTION_RSQRTM] = "rsqrtm",
499 };
500
501 static const char *const math_saturate[2] = {
502 [0] = "",
503 [1] = "sat"
504 };
505
506 static const char *const math_signed[2] = {
507 [0] = "",
508 [1] = "signed"
509 };
510
511 static const char *const math_scalar[2] = {
512 [0] = "",
513 [1] = "scalar"
514 };
515
516 static const char *const math_precision[2] = {
517 [0] = "",
518 [1] = "partial_precision"
519 };
520
521 static const char *const gen5_urb_opcode[] = {
522 [0] = "urb_write",
523 [1] = "ff_sync",
524 };
525
526 static const char *const gen7_urb_opcode[] = {
527 [0] = "write HWord",
528 [1] = "write OWord",
529 [2] = "read HWord",
530 [3] = "read OWord",
531 [4] = "atomic mov", /* Gen7+ */
532 [5] = "atomic inc", /* Gen7+ */
533 [6] = "atomic add", /* Gen8+ */
534 [7] = "SIMD8 write", /* Gen8+ */
535 [8] = "SIMD8 read", /* Gen8+ */
536 /* [9-15] - reserved */
537 };
538
539 static const char *const urb_swizzle[4] = {
540 [BRW_URB_SWIZZLE_NONE] = "",
541 [BRW_URB_SWIZZLE_INTERLEAVE] = "interleave",
542 [BRW_URB_SWIZZLE_TRANSPOSE] = "transpose",
543 };
544
545 static const char *const urb_allocate[2] = {
546 [0] = "",
547 [1] = "allocate"
548 };
549
550 static const char *const urb_used[2] = {
551 [0] = "",
552 [1] = "used"
553 };
554
555 static const char *const urb_complete[2] = {
556 [0] = "",
557 [1] = "complete"
558 };
559
560 static const char *const sampler_target_format[4] = {
561 [0] = "F",
562 [2] = "UD",
563 [3] = "D"
564 };
565
566
567 static int column;
568
569 static int
570 string(FILE *file, const char *string)
571 {
572 fputs(string, file);
573 column += strlen(string);
574 return 0;
575 }
576
577 static int
578 format(FILE *f, const char *format, ...)
579 {
580 char buf[1024];
581 va_list args;
582 va_start(args, format);
583
584 vsnprintf(buf, sizeof(buf) - 1, format, args);
585 va_end(args);
586 string(f, buf);
587 return 0;
588 }
589
590 static int
591 newline(FILE *f)
592 {
593 putc('\n', f);
594 column = 0;
595 return 0;
596 }
597
598 static int
599 pad(FILE *f, int c)
600 {
601 do
602 string(f, " ");
603 while (column < c);
604 return 0;
605 }
606
607 static int
608 control(FILE *file, const char *name, const char *const ctrl[],
609 unsigned id, int *space)
610 {
611 if (!ctrl[id]) {
612 fprintf(file, "*** invalid %s value %d ", name, id);
613 return 1;
614 }
615 if (ctrl[id][0]) {
616 if (space && *space)
617 string(file, " ");
618 string(file, ctrl[id]);
619 if (space)
620 *space = 1;
621 }
622 return 0;
623 }
624
625 static int
626 print_opcode(FILE *file, int id)
627 {
628 if (!opcode_descs[id].name) {
629 format(file, "*** invalid opcode value %d ", id);
630 return 1;
631 }
632 string(file, opcode_descs[id].name);
633 return 0;
634 }
635
636 static int
637 reg(FILE *file, unsigned _reg_file, unsigned _reg_nr)
638 {
639 int err = 0;
640
641 /* Clear the Compr4 instruction compression bit. */
642 if (_reg_file == BRW_MESSAGE_REGISTER_FILE)
643 _reg_nr &= ~(1 << 7);
644
645 if (_reg_file == BRW_ARCHITECTURE_REGISTER_FILE) {
646 switch (_reg_nr & 0xf0) {
647 case BRW_ARF_NULL:
648 string(file, "null");
649 return -1;
650 case BRW_ARF_ADDRESS:
651 format(file, "a%d", _reg_nr & 0x0f);
652 break;
653 case BRW_ARF_ACCUMULATOR:
654 format(file, "acc%d", _reg_nr & 0x0f);
655 break;
656 case BRW_ARF_FLAG:
657 format(file, "f%d", _reg_nr & 0x0f);
658 break;
659 case BRW_ARF_MASK:
660 format(file, "mask%d", _reg_nr & 0x0f);
661 break;
662 case BRW_ARF_MASK_STACK:
663 format(file, "msd%d", _reg_nr & 0x0f);
664 break;
665 case BRW_ARF_STATE:
666 format(file, "sr%d", _reg_nr & 0x0f);
667 break;
668 case BRW_ARF_CONTROL:
669 format(file, "cr%d", _reg_nr & 0x0f);
670 break;
671 case BRW_ARF_NOTIFICATION_COUNT:
672 format(file, "n%d", _reg_nr & 0x0f);
673 break;
674 case BRW_ARF_IP:
675 string(file, "ip");
676 return -1;
677 break;
678 default:
679 format(file, "ARF%d", _reg_nr);
680 break;
681 }
682 } else {
683 err |= control(file, "src reg file", reg_file, _reg_file, NULL);
684 format(file, "%d", _reg_nr);
685 }
686 return err;
687 }
688
689 static int
690 dest(FILE *file, struct brw_context *brw, brw_inst *inst)
691 {
692 int err = 0;
693
694 if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
695 if (brw_inst_dst_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
696 err |= reg(file, brw_inst_dst_reg_file(brw, inst),
697 brw_inst_dst_da_reg_nr(brw, inst));
698 if (err == -1)
699 return 0;
700 if (brw_inst_dst_da1_subreg_nr(brw, inst))
701 format(file, ".%d", brw_inst_dst_da1_subreg_nr(brw, inst) /
702 reg_type_size[brw_inst_dst_reg_type(brw, inst)]);
703 string(file, "<");
704 err |= control(file, "horiz stride", horiz_stride,
705 brw_inst_dst_hstride(brw, inst), NULL);
706 string(file, ">");
707 err |= control(file, "dest reg encoding", reg_encoding,
708 brw_inst_dst_reg_type(brw, inst), NULL);
709 } else {
710 string(file, "g[a0");
711 if (brw_inst_dst_ia_subreg_nr(brw, inst))
712 format(file, ".%d", brw_inst_dst_ia_subreg_nr(brw, inst) /
713 reg_type_size[brw_inst_dst_reg_type(brw, inst)]);
714 if (brw_inst_dst_ia1_addr_imm(brw, inst))
715 format(file, " %d", brw_inst_dst_ia1_addr_imm(brw, inst));
716 string(file, "]<");
717 err |= control(file, "horiz stride", horiz_stride,
718 brw_inst_dst_hstride(brw, inst), NULL);
719 string(file, ">");
720 err |= control(file, "dest reg encoding", reg_encoding,
721 brw_inst_dst_reg_type(brw, inst), NULL);
722 }
723 } else {
724 if (brw_inst_dst_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
725 err |= reg(file, brw_inst_dst_reg_file(brw, inst),
726 brw_inst_dst_da_reg_nr(brw, inst));
727 if (err == -1)
728 return 0;
729 if (brw_inst_dst_da16_subreg_nr(brw, inst))
730 format(file, ".%d", brw_inst_dst_da16_subreg_nr(brw, inst) /
731 reg_type_size[brw_inst_dst_reg_type(brw, inst)]);
732 string(file, "<1>");
733 err |= control(file, "writemask", writemask,
734 brw_inst_da16_writemask(brw, inst), NULL);
735 err |= control(file, "dest reg encoding", reg_encoding,
736 brw_inst_dst_reg_type(brw, inst), NULL);
737 } else {
738 err = 1;
739 string(file, "Indirect align16 address mode not supported");
740 }
741 }
742
743 return 0;
744 }
745
746 static int
747 dest_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
748 {
749 int err = 0;
750 uint32_t reg_file;
751
752 if (brw->gen == 6 && brw_inst_3src_dst_reg_file(brw, inst))
753 reg_file = BRW_MESSAGE_REGISTER_FILE;
754 else
755 reg_file = BRW_GENERAL_REGISTER_FILE;
756
757 err |= reg(file, reg_file, brw_inst_3src_dst_reg_nr(brw, inst));
758 if (err == -1)
759 return 0;
760 if (brw_inst_3src_dst_subreg_nr(brw, inst))
761 format(file, ".%d", brw_inst_3src_dst_subreg_nr(brw, inst));
762 string(file, "<1>");
763 err |= control(file, "writemask", writemask,
764 brw_inst_3src_dst_writemask(brw, inst), NULL);
765 err |= control(file, "dest reg encoding", three_source_reg_encoding,
766 brw_inst_3src_dst_type(brw, inst), NULL);
767
768 return 0;
769 }
770
771 static int
772 src_align1_region(FILE *file,
773 unsigned _vert_stride, unsigned _width,
774 unsigned _horiz_stride)
775 {
776 int err = 0;
777 string(file, "<");
778 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
779 string(file, ",");
780 err |= control(file, "width", width, _width, NULL);
781 string(file, ",");
782 err |= control(file, "horiz_stride", horiz_stride, _horiz_stride, NULL);
783 string(file, ">");
784 return err;
785 }
786
787 static int
788 src_da1(FILE *file,
789 const struct brw_context *brw,
790 unsigned opcode,
791 unsigned type, unsigned _reg_file,
792 unsigned _vert_stride, unsigned _width, unsigned _horiz_stride,
793 unsigned reg_num, unsigned sub_reg_num, unsigned __abs,
794 unsigned _negate)
795 {
796 int err = 0;
797
798 if (brw->gen >= 8 && is_logic_instruction(opcode))
799 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
800 else
801 err |= control(file, "negate", m_negate, _negate, NULL);
802
803 err |= control(file, "abs", _abs, __abs, NULL);
804
805 err |= reg(file, _reg_file, reg_num);
806 if (err == -1)
807 return 0;
808 if (sub_reg_num)
809 format(file, ".%d", sub_reg_num / reg_type_size[type]); /* use formal style like spec */
810 src_align1_region(file, _vert_stride, _width, _horiz_stride);
811 err |= control(file, "src reg encoding", reg_encoding, type, NULL);
812 return err;
813 }
814
815 static int
816 src_ia1(FILE *file,
817 const struct brw_context *brw,
818 unsigned opcode,
819 unsigned type,
820 unsigned _reg_file,
821 int _addr_imm,
822 unsigned _addr_subreg_nr,
823 unsigned _negate,
824 unsigned __abs,
825 unsigned _addr_mode,
826 unsigned _horiz_stride, unsigned _width, unsigned _vert_stride)
827 {
828 int err = 0;
829
830 if (brw->gen >= 8 && is_logic_instruction(opcode))
831 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
832 else
833 err |= control(file, "negate", m_negate, _negate, NULL);
834
835 err |= control(file, "abs", _abs, __abs, NULL);
836
837 string(file, "g[a0");
838 if (_addr_subreg_nr)
839 format(file, ".%d", _addr_subreg_nr);
840 if (_addr_imm)
841 format(file, " %d", _addr_imm);
842 string(file, "]");
843 src_align1_region(file, _vert_stride, _width, _horiz_stride);
844 err |= control(file, "src reg encoding", reg_encoding, type, NULL);
845 return err;
846 }
847
848 static int
849 src_swizzle(FILE *file, unsigned swiz)
850 {
851 unsigned x = BRW_GET_SWZ(swiz, BRW_CHANNEL_X);
852 unsigned y = BRW_GET_SWZ(swiz, BRW_CHANNEL_Y);
853 unsigned z = BRW_GET_SWZ(swiz, BRW_CHANNEL_Z);
854 unsigned w = BRW_GET_SWZ(swiz, BRW_CHANNEL_W);
855 int err = 0;
856
857 if (x == y && x == z && x == w) {
858 string(file, ".");
859 err |= control(file, "channel select", chan_sel, x, NULL);
860 } else if (swiz != BRW_SWIZZLE_XYZW) {
861 string(file, ".");
862 err |= control(file, "channel select", chan_sel, x, NULL);
863 err |= control(file, "channel select", chan_sel, y, NULL);
864 err |= control(file, "channel select", chan_sel, z, NULL);
865 err |= control(file, "channel select", chan_sel, w, NULL);
866 }
867 return err;
868 }
869
870 static int
871 src_da16(FILE *file,
872 const struct brw_context *brw,
873 unsigned opcode,
874 unsigned _reg_type,
875 unsigned _reg_file,
876 unsigned _vert_stride,
877 unsigned _reg_nr,
878 unsigned _subreg_nr,
879 unsigned __abs,
880 unsigned _negate,
881 unsigned swz_x, unsigned swz_y, unsigned swz_z, unsigned swz_w)
882 {
883 int err = 0;
884
885 if (brw->gen >= 8 && is_logic_instruction(opcode))
886 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
887 else
888 err |= control(file, "negate", m_negate, _negate, NULL);
889
890 err |= control(file, "abs", _abs, __abs, NULL);
891
892 err |= reg(file, _reg_file, _reg_nr);
893 if (err == -1)
894 return 0;
895 if (_subreg_nr)
896 /* bit4 for subreg number byte addressing. Make this same meaning as
897 in da1 case, so output looks consistent. */
898 format(file, ".%d", 16 / reg_type_size[_reg_type]);
899 string(file, "<");
900 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
901 string(file, ",4,1>");
902 err |= src_swizzle(file, BRW_SWIZZLE4(swz_x, swz_y, swz_z, swz_w));
903 err |= control(file, "src da16 reg type", reg_encoding, _reg_type, NULL);
904 return err;
905 }
906
907 static int
908 src0_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
909 {
910 int err = 0;
911 unsigned src0_subreg_nr = brw_inst_3src_src0_subreg_nr(brw, inst);
912
913 err |= control(file, "negate", m_negate,
914 brw_inst_3src_src0_negate(brw, inst), NULL);
915 err |= control(file, "abs", _abs, brw_inst_3src_src0_abs(brw, inst), NULL);
916
917 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
918 brw_inst_3src_src0_reg_nr(brw, inst));
919 if (err == -1)
920 return 0;
921 if (src0_subreg_nr)
922 format(file, ".%d", src0_subreg_nr);
923 if (brw_inst_3src_src0_rep_ctrl(brw, inst))
924 string(file, "<0,1,0>");
925 else
926 string(file, "<4,4,1>");
927 err |= control(file, "src da16 reg type", three_source_reg_encoding,
928 brw_inst_3src_src_type(brw, inst), NULL);
929 err |= src_swizzle(file, brw_inst_3src_src0_swizzle(brw, inst));
930 return err;
931 }
932
933 static int
934 src1_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
935 {
936 int err = 0;
937 unsigned src1_subreg_nr = brw_inst_3src_src1_subreg_nr(brw, inst);
938
939 err |= control(file, "negate", m_negate,
940 brw_inst_3src_src1_negate(brw, inst), NULL);
941 err |= control(file, "abs", _abs, brw_inst_3src_src1_abs(brw, inst), NULL);
942
943 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
944 brw_inst_3src_src1_reg_nr(brw, inst));
945 if (err == -1)
946 return 0;
947 if (src1_subreg_nr)
948 format(file, ".%d", src1_subreg_nr);
949 if (brw_inst_3src_src1_rep_ctrl(brw, inst))
950 string(file, "<0,1,0>");
951 else
952 string(file, "<4,4,1>");
953 err |= control(file, "src da16 reg type", three_source_reg_encoding,
954 brw_inst_3src_src_type(brw, inst), NULL);
955 err |= src_swizzle(file, brw_inst_3src_src1_swizzle(brw, inst));
956 return err;
957 }
958
959
960 static int
961 src2_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
962 {
963 int err = 0;
964 unsigned src2_subreg_nr = brw_inst_3src_src2_subreg_nr(brw, inst);
965
966 err |= control(file, "negate", m_negate,
967 brw_inst_3src_src2_negate(brw, inst), NULL);
968 err |= control(file, "abs", _abs, brw_inst_3src_src2_abs(brw, inst), NULL);
969
970 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
971 brw_inst_3src_src2_reg_nr(brw, inst));
972 if (err == -1)
973 return 0;
974 if (src2_subreg_nr)
975 format(file, ".%d", src2_subreg_nr);
976 if (brw_inst_3src_src2_rep_ctrl(brw, inst))
977 string(file, "<0,1,0>");
978 else
979 string(file, "<4,4,1>");
980 err |= control(file, "src da16 reg type", three_source_reg_encoding,
981 brw_inst_3src_src_type(brw, inst), NULL);
982 err |= src_swizzle(file, brw_inst_3src_src2_swizzle(brw, inst));
983 return err;
984 }
985
986 static int
987 imm(FILE *file, struct brw_context *brw, unsigned type, brw_inst *inst)
988 {
989 switch (type) {
990 case BRW_HW_REG_TYPE_UD:
991 format(file, "0x%08xUD", brw_inst_imm_ud(brw, inst));
992 break;
993 case BRW_HW_REG_TYPE_D:
994 format(file, "%dD", brw_inst_imm_d(brw, inst));
995 break;
996 case BRW_HW_REG_TYPE_UW:
997 format(file, "0x%04xUW", (uint16_t) brw_inst_imm_ud(brw, inst));
998 break;
999 case BRW_HW_REG_TYPE_W:
1000 format(file, "%dW", (int16_t) brw_inst_imm_d(brw, inst));
1001 break;
1002 case BRW_HW_REG_IMM_TYPE_UV:
1003 format(file, "0x%08xUV", brw_inst_imm_ud(brw, inst));
1004 break;
1005 case BRW_HW_REG_IMM_TYPE_VF:
1006 format(file, "Vector Float");
1007 break;
1008 case BRW_HW_REG_IMM_TYPE_V:
1009 format(file, "0x%08xV", brw_inst_imm_ud(brw, inst));
1010 break;
1011 case BRW_HW_REG_TYPE_F:
1012 format(file, "%-gF", brw_inst_imm_f(brw, inst));
1013 break;
1014 case GEN8_HW_REG_IMM_TYPE_DF:
1015 string(file, "Double IMM");
1016 break;
1017 case GEN8_HW_REG_IMM_TYPE_HF:
1018 string(file, "Half Float IMM");
1019 break;
1020 }
1021 return 0;
1022 }
1023
1024 static int
1025 src0(FILE *file, struct brw_context *brw, brw_inst *inst)
1026 {
1027 if (brw_inst_src0_reg_file(brw, inst) == BRW_IMMEDIATE_VALUE) {
1028 return imm(file, brw, brw_inst_src0_reg_type(brw, inst), inst);
1029 } else if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
1030 if (brw_inst_src0_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
1031 return src_da1(file,
1032 brw,
1033 brw_inst_opcode(brw, inst),
1034 brw_inst_src0_reg_type(brw, inst),
1035 brw_inst_src0_reg_file(brw, inst),
1036 brw_inst_src0_vstride(brw, inst),
1037 brw_inst_src0_width(brw, inst),
1038 brw_inst_src0_hstride(brw, inst),
1039 brw_inst_src0_da_reg_nr(brw, inst),
1040 brw_inst_src0_da1_subreg_nr(brw, inst),
1041 brw_inst_src0_abs(brw, inst),
1042 brw_inst_src0_negate(brw, inst));
1043 } else {
1044 return src_ia1(file,
1045 brw,
1046 brw_inst_opcode(brw, inst),
1047 brw_inst_src0_reg_type(brw, inst),
1048 brw_inst_src0_reg_file(brw, inst),
1049 brw_inst_src0_ia1_addr_imm(brw, inst),
1050 brw_inst_src0_ia_subreg_nr(brw, inst),
1051 brw_inst_src0_negate(brw, inst),
1052 brw_inst_src0_abs(brw, inst),
1053 brw_inst_src0_address_mode(brw, inst),
1054 brw_inst_src0_hstride(brw, inst),
1055 brw_inst_src0_width(brw, inst),
1056 brw_inst_src0_vstride(brw, inst));
1057 }
1058 } else {
1059 if (brw_inst_src0_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
1060 return src_da16(file,
1061 brw,
1062 brw_inst_opcode(brw, inst),
1063 brw_inst_src0_reg_type(brw, inst),
1064 brw_inst_src0_reg_file(brw, inst),
1065 brw_inst_src0_vstride(brw, inst),
1066 brw_inst_src0_da_reg_nr(brw, inst),
1067 brw_inst_src0_da16_subreg_nr(brw, inst),
1068 brw_inst_src0_abs(brw, inst),
1069 brw_inst_src0_negate(brw, inst),
1070 brw_inst_src0_da16_swiz_x(brw, inst),
1071 brw_inst_src0_da16_swiz_y(brw, inst),
1072 brw_inst_src0_da16_swiz_z(brw, inst),
1073 brw_inst_src0_da16_swiz_w(brw, inst));
1074 } else {
1075 string(file, "Indirect align16 address mode not supported");
1076 return 1;
1077 }
1078 }
1079 }
1080
1081 static int
1082 src1(FILE *file, struct brw_context *brw, brw_inst *inst)
1083 {
1084 if (brw_inst_src1_reg_file(brw, inst) == BRW_IMMEDIATE_VALUE) {
1085 return imm(file, brw, brw_inst_src1_reg_type(brw, inst), inst);
1086 } else if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
1087 if (brw_inst_src1_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
1088 return src_da1(file,
1089 brw,
1090 brw_inst_opcode(brw, inst),
1091 brw_inst_src1_reg_type(brw, inst),
1092 brw_inst_src1_reg_file(brw, inst),
1093 brw_inst_src1_vstride(brw, inst),
1094 brw_inst_src1_width(brw, inst),
1095 brw_inst_src1_hstride(brw, inst),
1096 brw_inst_src1_da_reg_nr(brw, inst),
1097 brw_inst_src1_da1_subreg_nr(brw, inst),
1098 brw_inst_src1_abs(brw, inst),
1099 brw_inst_src1_negate(brw, inst));
1100 } else {
1101 return src_ia1(file,
1102 brw,
1103 brw_inst_opcode(brw, inst),
1104 brw_inst_src1_reg_type(brw, inst),
1105 brw_inst_src1_reg_file(brw, inst),
1106 brw_inst_src1_ia1_addr_imm(brw, inst),
1107 brw_inst_src1_ia_subreg_nr(brw, inst),
1108 brw_inst_src1_negate(brw, inst),
1109 brw_inst_src1_abs(brw, inst),
1110 brw_inst_src1_address_mode(brw, inst),
1111 brw_inst_src1_hstride(brw, inst),
1112 brw_inst_src1_width(brw, inst),
1113 brw_inst_src1_vstride(brw, inst));
1114 }
1115 } else {
1116 if (brw_inst_src1_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
1117 return src_da16(file,
1118 brw,
1119 brw_inst_opcode(brw, inst),
1120 brw_inst_src1_reg_type(brw, inst),
1121 brw_inst_src1_reg_file(brw, inst),
1122 brw_inst_src1_vstride(brw, inst),
1123 brw_inst_src1_da_reg_nr(brw, inst),
1124 brw_inst_src1_da16_subreg_nr(brw, inst),
1125 brw_inst_src1_abs(brw, inst),
1126 brw_inst_src1_negate(brw, inst),
1127 brw_inst_src1_da16_swiz_x(brw, inst),
1128 brw_inst_src1_da16_swiz_y(brw, inst),
1129 brw_inst_src1_da16_swiz_z(brw, inst),
1130 brw_inst_src1_da16_swiz_w(brw, inst));
1131 } else {
1132 string(file, "Indirect align16 address mode not supported");
1133 return 1;
1134 }
1135 }
1136 }
1137
1138 static int
1139 qtr_ctrl(FILE *file, struct brw_context *brw, brw_inst *inst)
1140 {
1141 int qtr_ctl = brw_inst_qtr_control(brw, inst);
1142 int exec_size = 1 << brw_inst_exec_size(brw, inst);
1143
1144 if (exec_size == 8) {
1145 switch (qtr_ctl) {
1146 case 0:
1147 string(file, " 1Q");
1148 break;
1149 case 1:
1150 string(file, " 2Q");
1151 break;
1152 case 2:
1153 string(file, " 3Q");
1154 break;
1155 case 3:
1156 string(file, " 4Q");
1157 break;
1158 }
1159 } else if (exec_size == 16) {
1160 if (qtr_ctl < 2)
1161 string(file, " 1H");
1162 else
1163 string(file, " 2H");
1164 }
1165 return 0;
1166 }
1167
1168 int
1169 brw_disassemble_inst(FILE *file, struct brw_context *brw, brw_inst *inst,
1170 bool is_compacted)
1171 {
1172 int err = 0;
1173 int space = 0;
1174
1175 const enum opcode opcode = brw_inst_opcode(brw, inst);
1176
1177 if (brw_inst_pred_control(brw, inst)) {
1178 string(file, "(");
1179 err |= control(file, "predicate inverse", pred_inv,
1180 brw_inst_pred_inv(brw, inst), NULL);
1181 format(file, "f%d", brw->gen >= 7 ? brw_inst_flag_reg_nr(brw, inst) : 0);
1182 if (brw_inst_flag_subreg_nr(brw, inst))
1183 format(file, ".%d", brw_inst_flag_subreg_nr(brw, inst));
1184 if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
1185 err |= control(file, "predicate control align1", pred_ctrl_align1,
1186 brw_inst_pred_control(brw, inst), NULL);
1187 } else {
1188 err |= control(file, "predicate control align16", pred_ctrl_align16,
1189 brw_inst_pred_control(brw, inst), NULL);
1190 }
1191 string(file, ") ");
1192 }
1193
1194 err |= print_opcode(file, opcode);
1195 err |= control(file, "saturate", saturate, brw_inst_saturate(brw, inst),
1196 NULL);
1197
1198 err |= control(file, "debug control", debug_ctrl,
1199 brw_inst_debug_control(brw, inst), NULL);
1200
1201 if (opcode == BRW_OPCODE_MATH) {
1202 string(file, " ");
1203 err |= control(file, "function", math_function,
1204 brw_inst_math_function(brw, inst), NULL);
1205 } else if (opcode != BRW_OPCODE_SEND && opcode != BRW_OPCODE_SENDC) {
1206 err |= control(file, "conditional modifier", conditional_modifier,
1207 brw_inst_cond_modifier(brw, inst), NULL);
1208
1209 /* If we're using the conditional modifier, print which flags reg is
1210 * used for it. Note that on gen6+, the embedded-condition SEL and
1211 * control flow doesn't update flags.
1212 */
1213 if (brw_inst_cond_modifier(brw, inst) &&
1214 (brw->gen < 6 || (opcode != BRW_OPCODE_SEL &&
1215 opcode != BRW_OPCODE_IF &&
1216 opcode != BRW_OPCODE_WHILE))) {
1217 format(file, ".f%d",
1218 brw->gen >= 7 ? brw_inst_flag_reg_nr(brw, inst) : 0);
1219 if (brw_inst_flag_subreg_nr(brw, inst))
1220 format(file, ".%d", brw_inst_flag_subreg_nr(brw, inst));
1221 }
1222 }
1223
1224 if (opcode != BRW_OPCODE_NOP) {
1225 string(file, "(");
1226 err |= control(file, "execution size", exec_size,
1227 brw_inst_exec_size(brw, inst), NULL);
1228 string(file, ")");
1229 }
1230
1231 if (opcode == BRW_OPCODE_SEND && brw->gen < 6)
1232 format(file, " %d", brw_inst_base_mrf(brw, inst));
1233
1234 if (has_uip(brw, opcode)) {
1235 /* Instructions that have UIP also have JIP. */
1236 pad(file, 16);
1237 format(file, "JIP: %d", brw_inst_jip(brw, inst));
1238 pad(file, 32);
1239 format(file, "UIP: %d", brw_inst_uip(brw, inst));
1240 } else if (has_jip(brw, opcode)) {
1241 pad(file, 16);
1242 if (brw->gen >= 7) {
1243 format(file, "JIP: %d", brw_inst_jip(brw, inst));
1244 } else {
1245 format(file, "JIP: %d", brw_inst_gen6_jump_count(brw, inst));
1246 }
1247 } else if (brw->gen < 6 && (opcode == BRW_OPCODE_BREAK ||
1248 opcode == BRW_OPCODE_CONTINUE ||
1249 opcode == BRW_OPCODE_ELSE)) {
1250 pad(file, 16);
1251 format(file, "Jump: %d", brw_inst_gen4_jump_count(brw, inst));
1252 pad(file, 32);
1253 format(file, "Pop: %d", brw_inst_gen4_pop_count(brw, inst));
1254 } else if (brw->gen < 6 && (opcode == BRW_OPCODE_IF ||
1255 opcode == BRW_OPCODE_IFF ||
1256 opcode == BRW_OPCODE_HALT)) {
1257 pad(file, 16);
1258 format(file, "Jump: %d", brw_inst_gen4_pop_count(brw, inst));
1259 } else if (brw->gen < 6 && opcode == BRW_OPCODE_ENDIF) {
1260 pad(file, 16);
1261 format(file, "Pop: %d", brw_inst_gen4_pop_count(brw, inst));
1262 } else if (opcode == BRW_OPCODE_JMPI) {
1263 format(file, " %d", brw_inst_imm_d(brw, inst));
1264 } else if (opcode_descs[opcode].nsrc == 3) {
1265 pad(file, 16);
1266 err |= dest_3src(file, brw, inst);
1267
1268 pad(file, 32);
1269 err |= src0_3src(file, brw, inst);
1270
1271 pad(file, 48);
1272 err |= src1_3src(file, brw, inst);
1273
1274 pad(file, 64);
1275 err |= src2_3src(file, brw, inst);
1276 } else {
1277 if (opcode_descs[opcode].ndst > 0) {
1278 pad(file, 16);
1279 err |= dest(file, brw, inst);
1280 }
1281
1282 if (opcode_descs[opcode].nsrc > 0) {
1283 pad(file, 32);
1284 err |= src0(file, brw, inst);
1285 }
1286
1287 if (opcode_descs[opcode].nsrc > 1) {
1288 pad(file, 48);
1289 err |= src1(file, brw, inst);
1290 }
1291 }
1292
1293 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) {
1294 enum brw_message_target sfid = brw_inst_sfid(brw, inst);
1295
1296 if (brw_inst_src1_reg_file(brw, inst) != BRW_IMMEDIATE_VALUE) {
1297 /* show the indirect descriptor source */
1298 pad(file, 48);
1299 err |= src1(file, brw, inst);
1300 }
1301
1302 newline(file);
1303 pad(file, 16);
1304 space = 0;
1305
1306 fprintf(file, " ");
1307 err |= control(file, "SFID", brw->gen >= 6 ? gen6_sfid : gen4_sfid,
1308 sfid, &space);
1309
1310
1311 if (brw_inst_src1_reg_file(brw, inst) != BRW_IMMEDIATE_VALUE) {
1312 format(file, " indirect");
1313 } else {
1314 switch (sfid) {
1315 case BRW_SFID_MATH:
1316 err |= control(file, "math function", math_function,
1317 brw_inst_math_msg_function(brw, inst), &space);
1318 err |= control(file, "math saturate", math_saturate,
1319 brw_inst_math_msg_saturate(brw, inst), &space);
1320 err |= control(file, "math signed", math_signed,
1321 brw_inst_math_msg_signed_int(brw, inst), &space);
1322 err |= control(file, "math scalar", math_scalar,
1323 brw_inst_math_msg_data_type(brw, inst), &space);
1324 err |= control(file, "math precision", math_precision,
1325 brw_inst_math_msg_precision(brw, inst), &space);
1326 break;
1327 case BRW_SFID_SAMPLER:
1328 if (brw->gen >= 5) {
1329 format(file, " (%d, %d, %d, %d)",
1330 brw_inst_binding_table_index(brw, inst),
1331 brw_inst_sampler(brw, inst),
1332 brw_inst_sampler_msg_type(brw, inst),
1333 brw_inst_sampler_simd_mode(brw, inst));
1334 } else {
1335 format(file, " (%d, %d, %d, ",
1336 brw_inst_binding_table_index(brw, inst),
1337 brw_inst_sampler(brw, inst),
1338 brw_inst_sampler_msg_type(brw, inst));
1339 if (!brw->is_g4x) {
1340 err |= control(file, "sampler target format",
1341 sampler_target_format,
1342 brw_inst_sampler_return_format(brw, inst), NULL);
1343 }
1344 string(file, ")");
1345 }
1346 break;
1347 case GEN6_SFID_DATAPORT_SAMPLER_CACHE:
1348 /* aka BRW_SFID_DATAPORT_READ on Gen4-5 */
1349 if (brw->gen >= 6) {
1350 format(file, " (%d, %d, %d, %d)",
1351 brw_inst_binding_table_index(brw, inst),
1352 brw_inst_dp_msg_control(brw, inst),
1353 brw_inst_dp_msg_type(brw, inst),
1354 brw->gen >= 7 ? 0 : brw_inst_dp_write_commit(brw, inst));
1355 } else {
1356 format(file, " (%d, %d, %d)",
1357 brw_inst_binding_table_index(brw, inst),
1358 brw_inst_dp_read_msg_control(brw, inst),
1359 brw_inst_dp_read_msg_type(brw, inst));
1360 }
1361 break;
1362
1363 case GEN6_SFID_DATAPORT_RENDER_CACHE: {
1364 /* aka BRW_SFID_DATAPORT_WRITE on Gen4-5 */
1365 unsigned msg_type = brw_inst_dp_write_msg_type(brw, inst);
1366
1367 err |= control(file, "DP rc message type",
1368 brw->gen >= 6 ? dp_rc_msg_type_gen6
1369 : dp_write_port_msg_type,
1370 msg_type, &space);
1371
1372 bool is_rt_write = msg_type ==
1373 (brw->gen >= 6 ? GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
1374 : BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE);
1375
1376 if (is_rt_write) {
1377 err |= control(file, "RT message type", m_rt_write_subtype,
1378 brw_inst_rt_message_type(brw, inst), &space);
1379 if (brw->gen >= 6 && brw_inst_rt_slot_group(brw, inst))
1380 string(file, " Hi");
1381 if (brw_inst_rt_last(brw, inst))
1382 string(file, " LastRT");
1383 if (brw->gen < 7 && brw_inst_dp_write_commit(brw, inst))
1384 string(file, " WriteCommit");
1385 } else {
1386 format(file, " MsgCtrl = 0x%x",
1387 brw_inst_dp_write_msg_control(brw, inst));
1388 }
1389
1390 format(file, " Surface = %d", brw_inst_binding_table_index(brw, inst));
1391 break;
1392 }
1393
1394 case BRW_SFID_URB:
1395 format(file, " %d", brw_inst_urb_global_offset(brw, inst));
1396
1397 space = 1;
1398 if (brw->gen >= 7) {
1399 err |= control(file, "urb opcode", gen7_urb_opcode,
1400 brw_inst_urb_opcode(brw, inst), &space);
1401 } else if (brw->gen >= 5) {
1402 err |= control(file, "urb opcode", gen5_urb_opcode,
1403 brw_inst_urb_opcode(brw, inst), &space);
1404 }
1405 err |= control(file, "urb swizzle", urb_swizzle,
1406 brw_inst_urb_swizzle_control(brw, inst), &space);
1407 if (brw->gen < 7) {
1408 err |= control(file, "urb allocate", urb_allocate,
1409 brw_inst_urb_allocate(brw, inst), &space);
1410 err |= control(file, "urb used", urb_used,
1411 brw_inst_urb_used(brw, inst), &space);
1412 }
1413 if (brw->gen < 8) {
1414 err |= control(file, "urb complete", urb_complete,
1415 brw_inst_urb_complete(brw, inst), &space);
1416 }
1417 break;
1418 case BRW_SFID_THREAD_SPAWNER:
1419 break;
1420 case GEN7_SFID_DATAPORT_DATA_CACHE:
1421 if (brw->gen >= 7) {
1422 format(file, " (");
1423
1424 err |= control(file, "DP DC0 message type",
1425 dp_dc0_msg_type_gen7,
1426 brw_inst_dp_msg_type(brw, inst), &space);
1427
1428 format(file, ", %d, ", brw_inst_binding_table_index(brw, inst));
1429
1430 switch (brw_inst_dp_msg_type(brw, inst)) {
1431 case GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP:
1432 control(file, "atomic op", aop,
1433 brw_inst_imm_ud(brw, inst) >> 8 & 0xf, &space);
1434 break;
1435 default:
1436 format(file, "%d", brw_inst_dp_msg_control(brw, inst));
1437 }
1438 format(file, ")");
1439 break;
1440 }
1441 /* FALLTHROUGH */
1442
1443 case HSW_SFID_DATAPORT_DATA_CACHE_1: {
1444 if (brw->gen >= 7) {
1445 format(file, " (");
1446
1447 unsigned msg_ctrl = brw_inst_dp_msg_control(brw, inst);
1448
1449 err |= control(file, "DP DC1 message type",
1450 dp_dc1_msg_type_hsw,
1451 brw_inst_dp_msg_type(brw, inst), &space);
1452
1453 format(file, ", Surface = %d, ",
1454 brw_inst_binding_table_index(brw, inst));
1455
1456 switch (brw_inst_dp_msg_type(brw, inst)) {
1457 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP:
1458 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP:
1459 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP:
1460 format(file, "SIMD%d,", (msg_ctrl & (1 << 4)) ? 8 : 16);
1461 /* fallthrough */
1462 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2:
1463 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2:
1464 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2:
1465 control(file, "atomic op", aop, msg_ctrl & 0xf, &space);
1466 break;
1467 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ:
1468 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE:
1469 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ:
1470 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE: {
1471 static const char *simd_modes[] = { "4x2", "16", "8" };
1472 format(file, "SIMD%s, Mask = 0x%x",
1473 simd_modes[msg_ctrl >> 4], msg_ctrl & 0xf);
1474 break;
1475 }
1476 default:
1477 format(file, "0x%x", msg_ctrl);
1478 }
1479 format(file, ")");
1480 break;
1481 }
1482 /* FALLTHROUGH */
1483 }
1484
1485 case GEN7_SFID_PIXEL_INTERPOLATOR:
1486 if (brw->gen >= 7) {
1487 format(file, " (%s, %s, 0x%02x)",
1488 brw_inst_pi_nopersp(brw, inst) ? "linear" : "persp",
1489 pixel_interpolator_msg_types[brw_inst_pi_message_type(brw, inst)],
1490 brw_inst_pi_message_data(brw, inst));
1491 break;
1492 }
1493 /* FALLTHROUGH */
1494
1495 default:
1496 format(file, "unsupported shared function ID %d", sfid);
1497 break;
1498 }
1499
1500 if (space)
1501 string(file, " ");
1502 format(file, "mlen %d", brw_inst_mlen(brw, inst));
1503 format(file, " rlen %d", brw_inst_rlen(brw, inst));
1504 }
1505 }
1506 pad(file, 64);
1507 if (opcode != BRW_OPCODE_NOP) {
1508 string(file, "{");
1509 space = 1;
1510 err |= control(file, "access mode", access_mode,
1511 brw_inst_access_mode(brw, inst), &space);
1512 if (brw->gen >= 6) {
1513 err |= control(file, "write enable control", wectrl,
1514 brw_inst_mask_control(brw, inst), &space);
1515 } else {
1516 err |= control(file, "mask control", mask_ctrl,
1517 brw_inst_mask_control(brw, inst), &space);
1518 }
1519 err |= control(file, "dependency control", dep_ctrl,
1520 ((brw_inst_no_dd_check(brw, inst) << 1) |
1521 brw_inst_no_dd_clear(brw, inst)), &space);
1522
1523 if (brw->gen >= 6)
1524 err |= qtr_ctrl(file, brw, inst);
1525 else {
1526 if (brw_inst_qtr_control(brw, inst) == BRW_COMPRESSION_COMPRESSED &&
1527 opcode_descs[opcode].ndst > 0 &&
1528 brw_inst_dst_reg_file(brw, inst) == BRW_MESSAGE_REGISTER_FILE &&
1529 brw_inst_dst_da_reg_nr(brw, inst) & (1 << 7)) {
1530 format(file, " compr4");
1531 } else {
1532 err |= control(file, "compression control", compr_ctrl,
1533 brw_inst_qtr_control(brw, inst), &space);
1534 }
1535 }
1536
1537 err |= control(file, "compaction", cmpt_ctrl, is_compacted, &space);
1538 err |= control(file, "thread control", thread_ctrl,
1539 brw_inst_thread_control(brw, inst), &space);
1540 if (brw->gen >= 6)
1541 err |= control(file, "acc write control", accwr,
1542 brw_inst_acc_wr_control(brw, inst), &space);
1543 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC)
1544 err |= control(file, "end of thread", end_of_thread,
1545 brw_inst_eot(brw, inst), &space);
1546 if (space)
1547 string(file, " ");
1548 string(file, "}");
1549 }
1550 string(file, ";");
1551 newline(file);
1552 return err;
1553 }