i965: Fix execution size of scalar TCS barrier setup code.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_disasm.c
1 /*
2 * Copyright © 2008 Keith Packard
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
13 *
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20 * OF THIS SOFTWARE.
21 */
22
23 #include <stdio.h>
24 #include <string.h>
25 #include <stdarg.h>
26
27 #include "brw_context.h"
28 #include "brw_defines.h"
29 #include "brw_reg.h"
30 #include "brw_inst.h"
31 #include "brw_eu.h"
32
33 static bool
34 has_jip(const struct brw_device_info *devinfo, enum opcode opcode)
35 {
36 if (devinfo->gen < 6)
37 return false;
38
39 return opcode == BRW_OPCODE_IF ||
40 opcode == BRW_OPCODE_ELSE ||
41 opcode == BRW_OPCODE_ENDIF ||
42 opcode == BRW_OPCODE_WHILE ||
43 opcode == BRW_OPCODE_BREAK ||
44 opcode == BRW_OPCODE_CONTINUE ||
45 opcode == BRW_OPCODE_HALT;
46 }
47
48 static bool
49 has_uip(const struct brw_device_info *devinfo, enum opcode opcode)
50 {
51 if (devinfo->gen < 6)
52 return false;
53
54 return (devinfo->gen >= 7 && opcode == BRW_OPCODE_IF) ||
55 (devinfo->gen >= 8 && opcode == BRW_OPCODE_ELSE) ||
56 opcode == BRW_OPCODE_BREAK ||
57 opcode == BRW_OPCODE_CONTINUE ||
58 opcode == BRW_OPCODE_HALT;
59 }
60
61 static bool
62 has_branch_ctrl(const struct brw_device_info *devinfo, enum opcode opcode)
63 {
64 if (devinfo->gen < 8)
65 return false;
66
67 return opcode == BRW_OPCODE_IF ||
68 opcode == BRW_OPCODE_ELSE;
69 /* opcode == BRW_OPCODE_GOTO; */
70 }
71
72 static bool
73 is_logic_instruction(unsigned opcode)
74 {
75 return opcode == BRW_OPCODE_AND ||
76 opcode == BRW_OPCODE_NOT ||
77 opcode == BRW_OPCODE_OR ||
78 opcode == BRW_OPCODE_XOR;
79 }
80
81 const char *const conditional_modifier[16] = {
82 [BRW_CONDITIONAL_NONE] = "",
83 [BRW_CONDITIONAL_Z] = ".z",
84 [BRW_CONDITIONAL_NZ] = ".nz",
85 [BRW_CONDITIONAL_G] = ".g",
86 [BRW_CONDITIONAL_GE] = ".ge",
87 [BRW_CONDITIONAL_L] = ".l",
88 [BRW_CONDITIONAL_LE] = ".le",
89 [BRW_CONDITIONAL_R] = ".r",
90 [BRW_CONDITIONAL_O] = ".o",
91 [BRW_CONDITIONAL_U] = ".u",
92 };
93
94 static const char *const m_negate[2] = {
95 [0] = "",
96 [1] = "-",
97 };
98
99 static const char *const _abs[2] = {
100 [0] = "",
101 [1] = "(abs)",
102 };
103
104 static const char *const m_bitnot[2] = { "", "~" };
105
106 static const char *const vert_stride[16] = {
107 [0] = "0",
108 [1] = "1",
109 [2] = "2",
110 [3] = "4",
111 [4] = "8",
112 [5] = "16",
113 [6] = "32",
114 [15] = "VxH",
115 };
116
117 static const char *const width[8] = {
118 [0] = "1",
119 [1] = "2",
120 [2] = "4",
121 [3] = "8",
122 [4] = "16",
123 };
124
125 static const char *const horiz_stride[4] = {
126 [0] = "0",
127 [1] = "1",
128 [2] = "2",
129 [3] = "4"
130 };
131
132 static const char *const chan_sel[4] = {
133 [0] = "x",
134 [1] = "y",
135 [2] = "z",
136 [3] = "w",
137 };
138
139 static const char *const debug_ctrl[2] = {
140 [0] = "",
141 [1] = ".breakpoint"
142 };
143
144 static const char *const saturate[2] = {
145 [0] = "",
146 [1] = ".sat"
147 };
148
149 static const char *const cmpt_ctrl[2] = {
150 [0] = "",
151 [1] = "compacted"
152 };
153
154 static const char *const accwr[2] = {
155 [0] = "",
156 [1] = "AccWrEnable"
157 };
158
159 static const char *const branch_ctrl[2] = {
160 [0] = "",
161 [1] = "BranchCtrl"
162 };
163
164 static const char *const wectrl[2] = {
165 [0] = "",
166 [1] = "WE_all"
167 };
168
169 static const char *const exec_size[8] = {
170 [0] = "1",
171 [1] = "2",
172 [2] = "4",
173 [3] = "8",
174 [4] = "16",
175 [5] = "32"
176 };
177
178 static const char *const pred_inv[2] = {
179 [0] = "+",
180 [1] = "-"
181 };
182
183 const char *const pred_ctrl_align16[16] = {
184 [1] = "",
185 [2] = ".x",
186 [3] = ".y",
187 [4] = ".z",
188 [5] = ".w",
189 [6] = ".any4h",
190 [7] = ".all4h",
191 };
192
193 static const char *const pred_ctrl_align1[16] = {
194 [BRW_PREDICATE_NORMAL] = "",
195 [BRW_PREDICATE_ALIGN1_ANYV] = ".anyv",
196 [BRW_PREDICATE_ALIGN1_ALLV] = ".allv",
197 [BRW_PREDICATE_ALIGN1_ANY2H] = ".any2h",
198 [BRW_PREDICATE_ALIGN1_ALL2H] = ".all2h",
199 [BRW_PREDICATE_ALIGN1_ANY4H] = ".any4h",
200 [BRW_PREDICATE_ALIGN1_ALL4H] = ".all4h",
201 [BRW_PREDICATE_ALIGN1_ANY8H] = ".any8h",
202 [BRW_PREDICATE_ALIGN1_ALL8H] = ".all8h",
203 [BRW_PREDICATE_ALIGN1_ANY16H] = ".any16h",
204 [BRW_PREDICATE_ALIGN1_ALL16H] = ".all16h",
205 [BRW_PREDICATE_ALIGN1_ANY32H] = ".any32h",
206 [BRW_PREDICATE_ALIGN1_ALL32H] = ".all32h",
207 };
208
209 static const char *const thread_ctrl[4] = {
210 [BRW_THREAD_NORMAL] = "",
211 [BRW_THREAD_ATOMIC] = "atomic",
212 [BRW_THREAD_SWITCH] = "switch",
213 };
214
215 static const char *const compr_ctrl[4] = {
216 [0] = "",
217 [1] = "sechalf",
218 [2] = "compr",
219 [3] = "compr4",
220 };
221
222 static const char *const dep_ctrl[4] = {
223 [0] = "",
224 [1] = "NoDDClr",
225 [2] = "NoDDChk",
226 [3] = "NoDDClr,NoDDChk",
227 };
228
229 static const char *const mask_ctrl[4] = {
230 [0] = "",
231 [1] = "nomask",
232 };
233
234 static const char *const access_mode[2] = {
235 [0] = "align1",
236 [1] = "align16",
237 };
238
239 static const char * const reg_encoding[] = {
240 [BRW_HW_REG_TYPE_UD] = "UD",
241 [BRW_HW_REG_TYPE_D] = "D",
242 [BRW_HW_REG_TYPE_UW] = "UW",
243 [BRW_HW_REG_TYPE_W] = "W",
244 [BRW_HW_REG_NON_IMM_TYPE_UB] = "UB",
245 [BRW_HW_REG_NON_IMM_TYPE_B] = "B",
246 [GEN7_HW_REG_NON_IMM_TYPE_DF] = "DF",
247 [BRW_HW_REG_TYPE_F] = "F",
248 [GEN8_HW_REG_TYPE_UQ] = "UQ",
249 [GEN8_HW_REG_TYPE_Q] = "Q",
250 [GEN8_HW_REG_NON_IMM_TYPE_HF] = "HF",
251 };
252
253 static const char *const three_source_reg_encoding[] = {
254 [BRW_3SRC_TYPE_F] = "F",
255 [BRW_3SRC_TYPE_D] = "D",
256 [BRW_3SRC_TYPE_UD] = "UD",
257 [BRW_3SRC_TYPE_DF] = "DF",
258 };
259
260 const int reg_type_size[] = {
261 [BRW_HW_REG_TYPE_UD] = 4,
262 [BRW_HW_REG_TYPE_D] = 4,
263 [BRW_HW_REG_TYPE_UW] = 2,
264 [BRW_HW_REG_TYPE_W] = 2,
265 [BRW_HW_REG_NON_IMM_TYPE_UB] = 1,
266 [BRW_HW_REG_NON_IMM_TYPE_B] = 1,
267 [GEN7_HW_REG_NON_IMM_TYPE_DF] = 8,
268 [BRW_HW_REG_TYPE_F] = 4,
269 [GEN8_HW_REG_TYPE_UQ] = 8,
270 [GEN8_HW_REG_TYPE_Q] = 8,
271 [GEN8_HW_REG_NON_IMM_TYPE_HF] = 2,
272 };
273
274 static const char *const reg_file[4] = {
275 [0] = "A",
276 [1] = "g",
277 [2] = "m",
278 [3] = "imm",
279 };
280
281 static const char *const writemask[16] = {
282 [0x0] = ".",
283 [0x1] = ".x",
284 [0x2] = ".y",
285 [0x3] = ".xy",
286 [0x4] = ".z",
287 [0x5] = ".xz",
288 [0x6] = ".yz",
289 [0x7] = ".xyz",
290 [0x8] = ".w",
291 [0x9] = ".xw",
292 [0xa] = ".yw",
293 [0xb] = ".xyw",
294 [0xc] = ".zw",
295 [0xd] = ".xzw",
296 [0xe] = ".yzw",
297 [0xf] = "",
298 };
299
300 static const char *const end_of_thread[2] = {
301 [0] = "",
302 [1] = "EOT"
303 };
304
305 /* SFIDs on Gen4-5 */
306 static const char *const gen4_sfid[16] = {
307 [BRW_SFID_NULL] = "null",
308 [BRW_SFID_MATH] = "math",
309 [BRW_SFID_SAMPLER] = "sampler",
310 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
311 [BRW_SFID_DATAPORT_READ] = "read",
312 [BRW_SFID_DATAPORT_WRITE] = "write",
313 [BRW_SFID_URB] = "urb",
314 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
315 [BRW_SFID_VME] = "vme",
316 };
317
318 static const char *const gen6_sfid[16] = {
319 [BRW_SFID_NULL] = "null",
320 [BRW_SFID_MATH] = "math",
321 [BRW_SFID_SAMPLER] = "sampler",
322 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
323 [BRW_SFID_URB] = "urb",
324 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
325 [GEN6_SFID_DATAPORT_SAMPLER_CACHE] = "sampler",
326 [GEN6_SFID_DATAPORT_RENDER_CACHE] = "render",
327 [GEN6_SFID_DATAPORT_CONSTANT_CACHE] = "const",
328 [GEN7_SFID_DATAPORT_DATA_CACHE] = "data",
329 [GEN7_SFID_PIXEL_INTERPOLATOR] = "pixel interp",
330 [HSW_SFID_DATAPORT_DATA_CACHE_1] = "dp data 1",
331 [HSW_SFID_CRE] = "cre",
332 };
333
334 static const char *const gen7_gateway_subfuncid[8] = {
335 [BRW_MESSAGE_GATEWAY_SFID_OPEN_GATEWAY] = "open",
336 [BRW_MESSAGE_GATEWAY_SFID_CLOSE_GATEWAY] = "close",
337 [BRW_MESSAGE_GATEWAY_SFID_FORWARD_MSG] = "forward msg",
338 [BRW_MESSAGE_GATEWAY_SFID_GET_TIMESTAMP] = "get timestamp",
339 [BRW_MESSAGE_GATEWAY_SFID_BARRIER_MSG] = "barrier msg",
340 [BRW_MESSAGE_GATEWAY_SFID_UPDATE_GATEWAY_STATE] = "update state",
341 [BRW_MESSAGE_GATEWAY_SFID_MMIO_READ_WRITE] = "mmio read/write",
342 };
343
344 static const char *const gen4_dp_read_port_msg_type[4] = {
345 [0b00] = "OWord Block Read",
346 [0b01] = "OWord Dual Block Read",
347 [0b10] = "Media Block Read",
348 [0b11] = "DWord Scattered Read",
349 };
350
351 static const char *const g45_dp_read_port_msg_type[8] = {
352 [0b000] = "OWord Block Read",
353 [0b010] = "OWord Dual Block Read",
354 [0b100] = "Media Block Read",
355 [0b110] = "DWord Scattered Read",
356 [0b001] = "Render Target UNORM Read",
357 [0b011] = "AVC Loop Filter Read",
358 };
359
360 static const char *const dp_write_port_msg_type[8] = {
361 [0b000] = "OWord block write",
362 [0b001] = "OWord dual block write",
363 [0b010] = "media block write",
364 [0b011] = "DWord scattered write",
365 [0b100] = "RT write",
366 [0b101] = "streamed VB write",
367 [0b110] = "RT UNORM write", /* G45+ */
368 [0b111] = "flush render cache",
369 };
370
371 static const char *const dp_rc_msg_type_gen6[16] = {
372 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read",
373 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read",
374 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read",
375 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read",
376 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] =
377 "OWORD unaligned block read",
378 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read",
379 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write",
380 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write",
381 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] =
382 "OWORD dual block write",
383 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write",
384 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] =
385 "DWORD scattered write",
386 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write",
387 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write",
388 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORM write",
389 };
390
391 static const char *const m_rt_write_subtype[] = {
392 [0b000] = "SIMD16",
393 [0b001] = "SIMD16/RepData",
394 [0b010] = "SIMD8/DualSrcLow",
395 [0b011] = "SIMD8/DualSrcHigh",
396 [0b100] = "SIMD8",
397 [0b101] = "SIMD8/ImageWrite", /* Gen6+ */
398 [0b111] = "SIMD16/RepData-111", /* no idea how this is different than 1 */
399 };
400
401 static const char *const dp_dc0_msg_type_gen7[16] = {
402 [GEN7_DATAPORT_DC_OWORD_BLOCK_READ] = "DC OWORD block read",
403 [GEN7_DATAPORT_DC_UNALIGNED_OWORD_BLOCK_READ] =
404 "DC unaligned OWORD block read",
405 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_READ] = "DC OWORD dual block read",
406 [GEN7_DATAPORT_DC_DWORD_SCATTERED_READ] = "DC DWORD scattered read",
407 [GEN7_DATAPORT_DC_BYTE_SCATTERED_READ] = "DC byte scattered read",
408 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_READ] = "DC untyped surface read",
409 [GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP] = "DC untyped atomic",
410 [GEN7_DATAPORT_DC_MEMORY_FENCE] = "DC mfence",
411 [GEN7_DATAPORT_DC_OWORD_BLOCK_WRITE] = "DC OWORD block write",
412 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_WRITE] = "DC OWORD dual block write",
413 [GEN7_DATAPORT_DC_DWORD_SCATTERED_WRITE] = "DC DWORD scatterd write",
414 [GEN7_DATAPORT_DC_BYTE_SCATTERED_WRITE] = "DC byte scattered write",
415 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
416 };
417
418 static const char *const dp_dc1_msg_type_hsw[16] = {
419 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ] = "untyped surface read",
420 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP] = "DC untyped atomic op",
421 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2] =
422 "DC untyped 4x2 atomic op",
423 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_READ] = "DC media block read",
424 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ] = "DC typed surface read",
425 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP] = "DC typed atomic",
426 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2] = "DC typed 4x2 atomic op",
427 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
428 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_WRITE] = "DC media block write",
429 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP] = "DC atomic counter op",
430 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2] =
431 "DC 4x2 atomic counter op",
432 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE] = "DC typed surface write",
433 };
434
435 static const char *const aop[16] = {
436 [BRW_AOP_AND] = "and",
437 [BRW_AOP_OR] = "or",
438 [BRW_AOP_XOR] = "xor",
439 [BRW_AOP_MOV] = "mov",
440 [BRW_AOP_INC] = "inc",
441 [BRW_AOP_DEC] = "dec",
442 [BRW_AOP_ADD] = "add",
443 [BRW_AOP_SUB] = "sub",
444 [BRW_AOP_REVSUB] = "revsub",
445 [BRW_AOP_IMAX] = "imax",
446 [BRW_AOP_IMIN] = "imin",
447 [BRW_AOP_UMAX] = "umax",
448 [BRW_AOP_UMIN] = "umin",
449 [BRW_AOP_CMPWR] = "cmpwr",
450 [BRW_AOP_PREDEC] = "predec",
451 };
452
453 static const char * const pixel_interpolator_msg_types[4] = {
454 [GEN7_PIXEL_INTERPOLATOR_LOC_SHARED_OFFSET] = "per_message_offset",
455 [GEN7_PIXEL_INTERPOLATOR_LOC_SAMPLE] = "sample_position",
456 [GEN7_PIXEL_INTERPOLATOR_LOC_CENTROID] = "centroid",
457 [GEN7_PIXEL_INTERPOLATOR_LOC_PER_SLOT_OFFSET] = "per_slot_offset",
458 };
459
460 static const char *const math_function[16] = {
461 [BRW_MATH_FUNCTION_INV] = "inv",
462 [BRW_MATH_FUNCTION_LOG] = "log",
463 [BRW_MATH_FUNCTION_EXP] = "exp",
464 [BRW_MATH_FUNCTION_SQRT] = "sqrt",
465 [BRW_MATH_FUNCTION_RSQ] = "rsq",
466 [BRW_MATH_FUNCTION_SIN] = "sin",
467 [BRW_MATH_FUNCTION_COS] = "cos",
468 [BRW_MATH_FUNCTION_SINCOS] = "sincos",
469 [BRW_MATH_FUNCTION_FDIV] = "fdiv",
470 [BRW_MATH_FUNCTION_POW] = "pow",
471 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] = "intdivmod",
472 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] = "intdiv",
473 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER] = "intmod",
474 [GEN8_MATH_FUNCTION_INVM] = "invm",
475 [GEN8_MATH_FUNCTION_RSQRTM] = "rsqrtm",
476 };
477
478 static const char *const math_saturate[2] = {
479 [0] = "",
480 [1] = "sat"
481 };
482
483 static const char *const math_signed[2] = {
484 [0] = "",
485 [1] = "signed"
486 };
487
488 static const char *const math_scalar[2] = {
489 [0] = "",
490 [1] = "scalar"
491 };
492
493 static const char *const math_precision[2] = {
494 [0] = "",
495 [1] = "partial_precision"
496 };
497
498 static const char *const gen5_urb_opcode[] = {
499 [0] = "urb_write",
500 [1] = "ff_sync",
501 };
502
503 static const char *const gen7_urb_opcode[] = {
504 [BRW_URB_OPCODE_WRITE_HWORD] = "write HWord",
505 [BRW_URB_OPCODE_WRITE_OWORD] = "write OWord",
506 [BRW_URB_OPCODE_READ_HWORD] = "read HWord",
507 [BRW_URB_OPCODE_READ_OWORD] = "read OWord",
508 [GEN7_URB_OPCODE_ATOMIC_MOV] = "atomic mov", /* Gen7+ */
509 [GEN7_URB_OPCODE_ATOMIC_INC] = "atomic inc", /* Gen7+ */
510 [GEN8_URB_OPCODE_ATOMIC_ADD] = "atomic add", /* Gen8+ */
511 [GEN8_URB_OPCODE_SIMD8_WRITE] = "SIMD8 write", /* Gen8+ */
512 [GEN8_URB_OPCODE_SIMD8_READ] = "SIMD8 read", /* Gen8+ */
513 /* [9-15] - reserved */
514 };
515
516 static const char *const urb_swizzle[4] = {
517 [BRW_URB_SWIZZLE_NONE] = "",
518 [BRW_URB_SWIZZLE_INTERLEAVE] = "interleave",
519 [BRW_URB_SWIZZLE_TRANSPOSE] = "transpose",
520 };
521
522 static const char *const urb_allocate[2] = {
523 [0] = "",
524 [1] = "allocate"
525 };
526
527 static const char *const urb_used[2] = {
528 [0] = "",
529 [1] = "used"
530 };
531
532 static const char *const urb_complete[2] = {
533 [0] = "",
534 [1] = "complete"
535 };
536
537 static const char *const gen5_sampler_msg_type[] = {
538 [GEN5_SAMPLER_MESSAGE_SAMPLE] = "sample",
539 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS] = "sample_b",
540 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD] = "sample_l",
541 [GEN5_SAMPLER_MESSAGE_SAMPLE_COMPARE] = "sample_c",
542 [GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS] = "sample_d",
543 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS_COMPARE] = "sample_b_c",
544 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE] = "sample_l_c",
545 [GEN5_SAMPLER_MESSAGE_SAMPLE_LD] = "ld",
546 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4] = "gather4",
547 [GEN5_SAMPLER_MESSAGE_LOD] = "lod",
548 [GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO] = "resinfo",
549 [GEN6_SAMPLER_MESSAGE_SAMPLE_SAMPLEINFO] = "sampleinfo",
550 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_C] = "gather4_c",
551 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO] = "gather4_po",
552 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO_C] = "gather4_po_c",
553 [HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE] = "sample_d_c",
554 [GEN9_SAMPLER_MESSAGE_SAMPLE_LZ] = "sample_lz",
555 [GEN9_SAMPLER_MESSAGE_SAMPLE_C_LZ] = "sample_c_lz",
556 [GEN9_SAMPLER_MESSAGE_SAMPLE_LD_LZ] = "ld_lz",
557 [GEN9_SAMPLER_MESSAGE_SAMPLE_LD2DMS_W] = "ld2dms_w",
558 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS] = "ld_mcs",
559 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DMS] = "ld2dms",
560 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS] = "ld2dss",
561 };
562
563 static const char *const gen5_sampler_simd_mode[4] = {
564 [BRW_SAMPLER_SIMD_MODE_SIMD4X2] = "SIMD4x2",
565 [BRW_SAMPLER_SIMD_MODE_SIMD8] = "SIMD8",
566 [BRW_SAMPLER_SIMD_MODE_SIMD16] = "SIMD16",
567 [BRW_SAMPLER_SIMD_MODE_SIMD32_64] = "SIMD32/64",
568 };
569
570 static const char *const sampler_target_format[4] = {
571 [0] = "F",
572 [2] = "UD",
573 [3] = "D"
574 };
575
576
577 static int column;
578
579 static int
580 string(FILE *file, const char *string)
581 {
582 fputs(string, file);
583 column += strlen(string);
584 return 0;
585 }
586
587 static int
588 format(FILE *f, const char *format, ...) PRINTFLIKE(2, 3);
589
590 static int
591 format(FILE *f, const char *format, ...)
592 {
593 char buf[1024];
594 va_list args;
595 va_start(args, format);
596
597 vsnprintf(buf, sizeof(buf) - 1, format, args);
598 va_end(args);
599 string(f, buf);
600 return 0;
601 }
602
603 static int
604 newline(FILE *f)
605 {
606 putc('\n', f);
607 column = 0;
608 return 0;
609 }
610
611 static int
612 pad(FILE *f, int c)
613 {
614 do
615 string(f, " ");
616 while (column < c);
617 return 0;
618 }
619
620 static int
621 control(FILE *file, const char *name, const char *const ctrl[],
622 unsigned id, int *space)
623 {
624 if (!ctrl[id]) {
625 fprintf(file, "*** invalid %s value %d ", name, id);
626 return 1;
627 }
628 if (ctrl[id][0]) {
629 if (space && *space)
630 string(file, " ");
631 string(file, ctrl[id]);
632 if (space)
633 *space = 1;
634 }
635 return 0;
636 }
637
638 static int
639 print_opcode(FILE *file, const struct brw_device_info *devinfo,
640 enum opcode id)
641 {
642 const struct opcode_desc *desc = brw_opcode_desc(devinfo, id);
643 if (!desc) {
644 format(file, "*** invalid opcode value %d ", id);
645 return 1;
646 }
647 string(file, desc->name);
648 return 0;
649 }
650
651 static int
652 reg(FILE *file, unsigned _reg_file, unsigned _reg_nr)
653 {
654 int err = 0;
655
656 /* Clear the Compr4 instruction compression bit. */
657 if (_reg_file == BRW_MESSAGE_REGISTER_FILE)
658 _reg_nr &= ~BRW_MRF_COMPR4;
659
660 if (_reg_file == BRW_ARCHITECTURE_REGISTER_FILE) {
661 switch (_reg_nr & 0xf0) {
662 case BRW_ARF_NULL:
663 string(file, "null");
664 break;
665 case BRW_ARF_ADDRESS:
666 format(file, "a%d", _reg_nr & 0x0f);
667 break;
668 case BRW_ARF_ACCUMULATOR:
669 format(file, "acc%d", _reg_nr & 0x0f);
670 break;
671 case BRW_ARF_FLAG:
672 format(file, "f%d", _reg_nr & 0x0f);
673 break;
674 case BRW_ARF_MASK:
675 format(file, "mask%d", _reg_nr & 0x0f);
676 break;
677 case BRW_ARF_MASK_STACK:
678 format(file, "msd%d", _reg_nr & 0x0f);
679 break;
680 case BRW_ARF_STATE:
681 format(file, "sr%d", _reg_nr & 0x0f);
682 break;
683 case BRW_ARF_CONTROL:
684 format(file, "cr%d", _reg_nr & 0x0f);
685 break;
686 case BRW_ARF_NOTIFICATION_COUNT:
687 format(file, "n%d", _reg_nr & 0x0f);
688 break;
689 case BRW_ARF_IP:
690 string(file, "ip");
691 return -1;
692 break;
693 case BRW_ARF_TDR:
694 format(file, "tdr0");
695 return -1;
696 case BRW_ARF_TIMESTAMP:
697 format(file, "tm%d", _reg_nr & 0x0f);
698 break;
699 default:
700 format(file, "ARF%d", _reg_nr);
701 break;
702 }
703 } else {
704 err |= control(file, "src reg file", reg_file, _reg_file, NULL);
705 format(file, "%d", _reg_nr);
706 }
707 return err;
708 }
709
710 static int
711 dest(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
712 {
713 int err = 0;
714
715 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
716 if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
717 err |= reg(file, brw_inst_dst_reg_file(devinfo, inst),
718 brw_inst_dst_da_reg_nr(devinfo, inst));
719 if (err == -1)
720 return 0;
721 if (brw_inst_dst_da1_subreg_nr(devinfo, inst))
722 format(file, ".%"PRIu64, brw_inst_dst_da1_subreg_nr(devinfo, inst) /
723 reg_type_size[brw_inst_dst_reg_type(devinfo, inst)]);
724 string(file, "<");
725 err |= control(file, "horiz stride", horiz_stride,
726 brw_inst_dst_hstride(devinfo, inst), NULL);
727 string(file, ">");
728 err |= control(file, "dest reg encoding", reg_encoding,
729 brw_inst_dst_reg_type(devinfo, inst), NULL);
730 } else {
731 string(file, "g[a0");
732 if (brw_inst_dst_ia_subreg_nr(devinfo, inst))
733 format(file, ".%"PRIu64, brw_inst_dst_ia_subreg_nr(devinfo, inst) /
734 reg_type_size[brw_inst_dst_reg_type(devinfo, inst)]);
735 if (brw_inst_dst_ia1_addr_imm(devinfo, inst))
736 format(file, " %d", brw_inst_dst_ia1_addr_imm(devinfo, inst));
737 string(file, "]<");
738 err |= control(file, "horiz stride", horiz_stride,
739 brw_inst_dst_hstride(devinfo, inst), NULL);
740 string(file, ">");
741 err |= control(file, "dest reg encoding", reg_encoding,
742 brw_inst_dst_reg_type(devinfo, inst), NULL);
743 }
744 } else {
745 if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
746 err |= reg(file, brw_inst_dst_reg_file(devinfo, inst),
747 brw_inst_dst_da_reg_nr(devinfo, inst));
748 if (err == -1)
749 return 0;
750 if (brw_inst_dst_da16_subreg_nr(devinfo, inst))
751 format(file, ".%"PRIu64, brw_inst_dst_da16_subreg_nr(devinfo, inst) /
752 reg_type_size[brw_inst_dst_reg_type(devinfo, inst)]);
753 string(file, "<1>");
754 err |= control(file, "writemask", writemask,
755 brw_inst_da16_writemask(devinfo, inst), NULL);
756 err |= control(file, "dest reg encoding", reg_encoding,
757 brw_inst_dst_reg_type(devinfo, inst), NULL);
758 } else {
759 err = 1;
760 string(file, "Indirect align16 address mode not supported");
761 }
762 }
763
764 return 0;
765 }
766
767 static int
768 dest_3src(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
769 {
770 int err = 0;
771 uint32_t reg_file;
772
773 if (devinfo->gen == 6 && brw_inst_3src_dst_reg_file(devinfo, inst))
774 reg_file = BRW_MESSAGE_REGISTER_FILE;
775 else
776 reg_file = BRW_GENERAL_REGISTER_FILE;
777
778 err |= reg(file, reg_file, brw_inst_3src_dst_reg_nr(devinfo, inst));
779 if (err == -1)
780 return 0;
781 if (brw_inst_3src_dst_subreg_nr(devinfo, inst))
782 format(file, ".%"PRIu64, brw_inst_3src_dst_subreg_nr(devinfo, inst));
783 string(file, "<1>");
784 err |= control(file, "writemask", writemask,
785 brw_inst_3src_dst_writemask(devinfo, inst), NULL);
786 err |= control(file, "dest reg encoding", three_source_reg_encoding,
787 brw_inst_3src_dst_type(devinfo, inst), NULL);
788
789 return 0;
790 }
791
792 static int
793 src_align1_region(FILE *file,
794 unsigned _vert_stride, unsigned _width,
795 unsigned _horiz_stride)
796 {
797 int err = 0;
798 string(file, "<");
799 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
800 string(file, ",");
801 err |= control(file, "width", width, _width, NULL);
802 string(file, ",");
803 err |= control(file, "horiz_stride", horiz_stride, _horiz_stride, NULL);
804 string(file, ">");
805 return err;
806 }
807
808 static int
809 src_da1(FILE *file,
810 const struct brw_device_info *devinfo,
811 unsigned opcode,
812 unsigned type, unsigned _reg_file,
813 unsigned _vert_stride, unsigned _width, unsigned _horiz_stride,
814 unsigned reg_num, unsigned sub_reg_num, unsigned __abs,
815 unsigned _negate)
816 {
817 int err = 0;
818
819 if (devinfo->gen >= 8 && is_logic_instruction(opcode))
820 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
821 else
822 err |= control(file, "negate", m_negate, _negate, NULL);
823
824 err |= control(file, "abs", _abs, __abs, NULL);
825
826 err |= reg(file, _reg_file, reg_num);
827 if (err == -1)
828 return 0;
829 if (sub_reg_num)
830 format(file, ".%d", sub_reg_num / reg_type_size[type]); /* use formal style like spec */
831 src_align1_region(file, _vert_stride, _width, _horiz_stride);
832 err |= control(file, "src reg encoding", reg_encoding, type, NULL);
833 return err;
834 }
835
836 static int
837 src_ia1(FILE *file,
838 const struct brw_device_info *devinfo,
839 unsigned opcode,
840 unsigned type,
841 unsigned _reg_file,
842 int _addr_imm,
843 unsigned _addr_subreg_nr,
844 unsigned _negate,
845 unsigned __abs,
846 unsigned _horiz_stride, unsigned _width, unsigned _vert_stride)
847 {
848 int err = 0;
849
850 if (devinfo->gen >= 8 && is_logic_instruction(opcode))
851 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
852 else
853 err |= control(file, "negate", m_negate, _negate, NULL);
854
855 err |= control(file, "abs", _abs, __abs, NULL);
856
857 string(file, "g[a0");
858 if (_addr_subreg_nr)
859 format(file, ".%d", _addr_subreg_nr);
860 if (_addr_imm)
861 format(file, " %d", _addr_imm);
862 string(file, "]");
863 src_align1_region(file, _vert_stride, _width, _horiz_stride);
864 err |= control(file, "src reg encoding", reg_encoding, type, NULL);
865 return err;
866 }
867
868 static int
869 src_swizzle(FILE *file, unsigned swiz)
870 {
871 unsigned x = BRW_GET_SWZ(swiz, BRW_CHANNEL_X);
872 unsigned y = BRW_GET_SWZ(swiz, BRW_CHANNEL_Y);
873 unsigned z = BRW_GET_SWZ(swiz, BRW_CHANNEL_Z);
874 unsigned w = BRW_GET_SWZ(swiz, BRW_CHANNEL_W);
875 int err = 0;
876
877 if (x == y && x == z && x == w) {
878 string(file, ".");
879 err |= control(file, "channel select", chan_sel, x, NULL);
880 } else if (swiz != BRW_SWIZZLE_XYZW) {
881 string(file, ".");
882 err |= control(file, "channel select", chan_sel, x, NULL);
883 err |= control(file, "channel select", chan_sel, y, NULL);
884 err |= control(file, "channel select", chan_sel, z, NULL);
885 err |= control(file, "channel select", chan_sel, w, NULL);
886 }
887 return err;
888 }
889
890 static int
891 src_da16(FILE *file,
892 const struct brw_device_info *devinfo,
893 unsigned opcode,
894 unsigned _reg_type,
895 unsigned _reg_file,
896 unsigned _vert_stride,
897 unsigned _reg_nr,
898 unsigned _subreg_nr,
899 unsigned __abs,
900 unsigned _negate,
901 unsigned swz_x, unsigned swz_y, unsigned swz_z, unsigned swz_w)
902 {
903 int err = 0;
904
905 if (devinfo->gen >= 8 && is_logic_instruction(opcode))
906 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
907 else
908 err |= control(file, "negate", m_negate, _negate, NULL);
909
910 err |= control(file, "abs", _abs, __abs, NULL);
911
912 err |= reg(file, _reg_file, _reg_nr);
913 if (err == -1)
914 return 0;
915 if (_subreg_nr)
916 /* bit4 for subreg number byte addressing. Make this same meaning as
917 in da1 case, so output looks consistent. */
918 format(file, ".%d", 16 / reg_type_size[_reg_type]);
919 string(file, "<");
920 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
921 string(file, ",4,1>");
922 err |= src_swizzle(file, BRW_SWIZZLE4(swz_x, swz_y, swz_z, swz_w));
923 err |= control(file, "src da16 reg type", reg_encoding, _reg_type, NULL);
924 return err;
925 }
926
927 static int
928 src0_3src(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
929 {
930 int err = 0;
931 unsigned src0_subreg_nr = brw_inst_3src_src0_subreg_nr(devinfo, inst);
932
933 err |= control(file, "negate", m_negate,
934 brw_inst_3src_src0_negate(devinfo, inst), NULL);
935 err |= control(file, "abs", _abs, brw_inst_3src_src0_abs(devinfo, inst), NULL);
936
937 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
938 brw_inst_3src_src0_reg_nr(devinfo, inst));
939 if (err == -1)
940 return 0;
941 if (src0_subreg_nr || brw_inst_3src_src0_rep_ctrl(devinfo, inst))
942 format(file, ".%d", src0_subreg_nr);
943 if (brw_inst_3src_src0_rep_ctrl(devinfo, inst))
944 string(file, "<0,1,0>");
945 else {
946 string(file, "<4,4,1>");
947 err |= src_swizzle(file, brw_inst_3src_src0_swizzle(devinfo, inst));
948 }
949 err |= control(file, "src da16 reg type", three_source_reg_encoding,
950 brw_inst_3src_src_type(devinfo, inst), NULL);
951 return err;
952 }
953
954 static int
955 src1_3src(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
956 {
957 int err = 0;
958 unsigned src1_subreg_nr = brw_inst_3src_src1_subreg_nr(devinfo, inst);
959
960 err |= control(file, "negate", m_negate,
961 brw_inst_3src_src1_negate(devinfo, inst), NULL);
962 err |= control(file, "abs", _abs, brw_inst_3src_src1_abs(devinfo, inst), NULL);
963
964 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
965 brw_inst_3src_src1_reg_nr(devinfo, inst));
966 if (err == -1)
967 return 0;
968 if (src1_subreg_nr || brw_inst_3src_src1_rep_ctrl(devinfo, inst))
969 format(file, ".%d", src1_subreg_nr);
970 if (brw_inst_3src_src1_rep_ctrl(devinfo, inst))
971 string(file, "<0,1,0>");
972 else {
973 string(file, "<4,4,1>");
974 err |= src_swizzle(file, brw_inst_3src_src1_swizzle(devinfo, inst));
975 }
976 err |= control(file, "src da16 reg type", three_source_reg_encoding,
977 brw_inst_3src_src_type(devinfo, inst), NULL);
978 return err;
979 }
980
981
982 static int
983 src2_3src(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
984 {
985 int err = 0;
986 unsigned src2_subreg_nr = brw_inst_3src_src2_subreg_nr(devinfo, inst);
987
988 err |= control(file, "negate", m_negate,
989 brw_inst_3src_src2_negate(devinfo, inst), NULL);
990 err |= control(file, "abs", _abs, brw_inst_3src_src2_abs(devinfo, inst), NULL);
991
992 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
993 brw_inst_3src_src2_reg_nr(devinfo, inst));
994 if (err == -1)
995 return 0;
996 if (src2_subreg_nr || brw_inst_3src_src2_rep_ctrl(devinfo, inst))
997 format(file, ".%d", src2_subreg_nr);
998 if (brw_inst_3src_src2_rep_ctrl(devinfo, inst))
999 string(file, "<0,1,0>");
1000 else {
1001 string(file, "<4,4,1>");
1002 err |= src_swizzle(file, brw_inst_3src_src2_swizzle(devinfo, inst));
1003 }
1004 err |= control(file, "src da16 reg type", three_source_reg_encoding,
1005 brw_inst_3src_src_type(devinfo, inst), NULL);
1006 return err;
1007 }
1008
1009 static int
1010 imm(FILE *file, const struct brw_device_info *devinfo, unsigned type, brw_inst *inst)
1011 {
1012 switch (type) {
1013 case BRW_HW_REG_TYPE_UD:
1014 format(file, "0x%08xUD", brw_inst_imm_ud(devinfo, inst));
1015 break;
1016 case BRW_HW_REG_TYPE_D:
1017 format(file, "%dD", brw_inst_imm_d(devinfo, inst));
1018 break;
1019 case BRW_HW_REG_TYPE_UW:
1020 format(file, "0x%04xUW", (uint16_t) brw_inst_imm_ud(devinfo, inst));
1021 break;
1022 case BRW_HW_REG_TYPE_W:
1023 format(file, "%dW", (int16_t) brw_inst_imm_d(devinfo, inst));
1024 break;
1025 case BRW_HW_REG_IMM_TYPE_UV:
1026 format(file, "0x%08xUV", brw_inst_imm_ud(devinfo, inst));
1027 break;
1028 case BRW_HW_REG_IMM_TYPE_VF:
1029 format(file, "[%-gF, %-gF, %-gF, %-gF]VF",
1030 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst)),
1031 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 8),
1032 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 16),
1033 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 24));
1034 break;
1035 case BRW_HW_REG_IMM_TYPE_V:
1036 format(file, "0x%08xV", brw_inst_imm_ud(devinfo, inst));
1037 break;
1038 case BRW_HW_REG_TYPE_F:
1039 format(file, "%-gF", brw_inst_imm_f(devinfo, inst));
1040 break;
1041 case GEN8_HW_REG_IMM_TYPE_DF:
1042 format(file, "%-gDF", brw_inst_imm_df(devinfo, inst));
1043 break;
1044 case GEN8_HW_REG_IMM_TYPE_HF:
1045 string(file, "Half Float IMM");
1046 break;
1047 }
1048 return 0;
1049 }
1050
1051 static int
1052 src0(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
1053 {
1054 if (brw_inst_src0_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) {
1055 return imm(file, devinfo, brw_inst_src0_reg_type(devinfo, inst), inst);
1056 } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
1057 if (brw_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1058 return src_da1(file,
1059 devinfo,
1060 brw_inst_opcode(devinfo, inst),
1061 brw_inst_src0_reg_type(devinfo, inst),
1062 brw_inst_src0_reg_file(devinfo, inst),
1063 brw_inst_src0_vstride(devinfo, inst),
1064 brw_inst_src0_width(devinfo, inst),
1065 brw_inst_src0_hstride(devinfo, inst),
1066 brw_inst_src0_da_reg_nr(devinfo, inst),
1067 brw_inst_src0_da1_subreg_nr(devinfo, inst),
1068 brw_inst_src0_abs(devinfo, inst),
1069 brw_inst_src0_negate(devinfo, inst));
1070 } else {
1071 return src_ia1(file,
1072 devinfo,
1073 brw_inst_opcode(devinfo, inst),
1074 brw_inst_src0_reg_type(devinfo, inst),
1075 brw_inst_src0_reg_file(devinfo, inst),
1076 brw_inst_src0_ia1_addr_imm(devinfo, inst),
1077 brw_inst_src0_ia_subreg_nr(devinfo, inst),
1078 brw_inst_src0_negate(devinfo, inst),
1079 brw_inst_src0_abs(devinfo, inst),
1080 brw_inst_src0_hstride(devinfo, inst),
1081 brw_inst_src0_width(devinfo, inst),
1082 brw_inst_src0_vstride(devinfo, inst));
1083 }
1084 } else {
1085 if (brw_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1086 return src_da16(file,
1087 devinfo,
1088 brw_inst_opcode(devinfo, inst),
1089 brw_inst_src0_reg_type(devinfo, inst),
1090 brw_inst_src0_reg_file(devinfo, inst),
1091 brw_inst_src0_vstride(devinfo, inst),
1092 brw_inst_src0_da_reg_nr(devinfo, inst),
1093 brw_inst_src0_da16_subreg_nr(devinfo, inst),
1094 brw_inst_src0_abs(devinfo, inst),
1095 brw_inst_src0_negate(devinfo, inst),
1096 brw_inst_src0_da16_swiz_x(devinfo, inst),
1097 brw_inst_src0_da16_swiz_y(devinfo, inst),
1098 brw_inst_src0_da16_swiz_z(devinfo, inst),
1099 brw_inst_src0_da16_swiz_w(devinfo, inst));
1100 } else {
1101 string(file, "Indirect align16 address mode not supported");
1102 return 1;
1103 }
1104 }
1105 }
1106
1107 static int
1108 src1(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
1109 {
1110 if (brw_inst_src1_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) {
1111 return imm(file, devinfo, brw_inst_src1_reg_type(devinfo, inst), inst);
1112 } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
1113 if (brw_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1114 return src_da1(file,
1115 devinfo,
1116 brw_inst_opcode(devinfo, inst),
1117 brw_inst_src1_reg_type(devinfo, inst),
1118 brw_inst_src1_reg_file(devinfo, inst),
1119 brw_inst_src1_vstride(devinfo, inst),
1120 brw_inst_src1_width(devinfo, inst),
1121 brw_inst_src1_hstride(devinfo, inst),
1122 brw_inst_src1_da_reg_nr(devinfo, inst),
1123 brw_inst_src1_da1_subreg_nr(devinfo, inst),
1124 brw_inst_src1_abs(devinfo, inst),
1125 brw_inst_src1_negate(devinfo, inst));
1126 } else {
1127 return src_ia1(file,
1128 devinfo,
1129 brw_inst_opcode(devinfo, inst),
1130 brw_inst_src1_reg_type(devinfo, inst),
1131 brw_inst_src1_reg_file(devinfo, inst),
1132 brw_inst_src1_ia1_addr_imm(devinfo, inst),
1133 brw_inst_src1_ia_subreg_nr(devinfo, inst),
1134 brw_inst_src1_negate(devinfo, inst),
1135 brw_inst_src1_abs(devinfo, inst),
1136 brw_inst_src1_hstride(devinfo, inst),
1137 brw_inst_src1_width(devinfo, inst),
1138 brw_inst_src1_vstride(devinfo, inst));
1139 }
1140 } else {
1141 if (brw_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1142 return src_da16(file,
1143 devinfo,
1144 brw_inst_opcode(devinfo, inst),
1145 brw_inst_src1_reg_type(devinfo, inst),
1146 brw_inst_src1_reg_file(devinfo, inst),
1147 brw_inst_src1_vstride(devinfo, inst),
1148 brw_inst_src1_da_reg_nr(devinfo, inst),
1149 brw_inst_src1_da16_subreg_nr(devinfo, inst),
1150 brw_inst_src1_abs(devinfo, inst),
1151 brw_inst_src1_negate(devinfo, inst),
1152 brw_inst_src1_da16_swiz_x(devinfo, inst),
1153 brw_inst_src1_da16_swiz_y(devinfo, inst),
1154 brw_inst_src1_da16_swiz_z(devinfo, inst),
1155 brw_inst_src1_da16_swiz_w(devinfo, inst));
1156 } else {
1157 string(file, "Indirect align16 address mode not supported");
1158 return 1;
1159 }
1160 }
1161 }
1162
1163 static int
1164 qtr_ctrl(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
1165 {
1166 int qtr_ctl = brw_inst_qtr_control(devinfo, inst);
1167 int exec_size = 1 << brw_inst_exec_size(devinfo, inst);
1168
1169 if (exec_size == 8) {
1170 switch (qtr_ctl) {
1171 case 0:
1172 string(file, " 1Q");
1173 break;
1174 case 1:
1175 string(file, " 2Q");
1176 break;
1177 case 2:
1178 string(file, " 3Q");
1179 break;
1180 case 3:
1181 string(file, " 4Q");
1182 break;
1183 }
1184 } else if (exec_size == 16) {
1185 if (qtr_ctl < 2)
1186 string(file, " 1H");
1187 else
1188 string(file, " 2H");
1189 }
1190 return 0;
1191 }
1192
1193 #ifdef DEBUG
1194 static __attribute__((__unused__)) int
1195 brw_disassemble_imm(const struct brw_device_info *devinfo,
1196 uint32_t dw3, uint32_t dw2, uint32_t dw1, uint32_t dw0)
1197 {
1198 brw_inst inst;
1199 inst.data[0] = (((uint64_t) dw1) << 32) | ((uint64_t) dw0);
1200 inst.data[1] = (((uint64_t) dw3) << 32) | ((uint64_t) dw2);
1201 return brw_disassemble_inst(stderr, devinfo, &inst, false);
1202 }
1203 #endif
1204
1205 int
1206 brw_disassemble_inst(FILE *file, const struct brw_device_info *devinfo,
1207 brw_inst *inst, bool is_compacted)
1208 {
1209 int err = 0;
1210 int space = 0;
1211
1212 const enum opcode opcode = brw_inst_opcode(devinfo, inst);
1213 const struct opcode_desc *desc = brw_opcode_desc(devinfo, opcode);
1214
1215 if (brw_inst_pred_control(devinfo, inst)) {
1216 string(file, "(");
1217 err |= control(file, "predicate inverse", pred_inv,
1218 brw_inst_pred_inv(devinfo, inst), NULL);
1219 format(file, "f%"PRIu64, devinfo->gen >= 7 ? brw_inst_flag_reg_nr(devinfo, inst) : 0);
1220 if (brw_inst_flag_subreg_nr(devinfo, inst))
1221 format(file, ".%"PRIu64, brw_inst_flag_subreg_nr(devinfo, inst));
1222 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
1223 err |= control(file, "predicate control align1", pred_ctrl_align1,
1224 brw_inst_pred_control(devinfo, inst), NULL);
1225 } else {
1226 err |= control(file, "predicate control align16", pred_ctrl_align16,
1227 brw_inst_pred_control(devinfo, inst), NULL);
1228 }
1229 string(file, ") ");
1230 }
1231
1232 err |= print_opcode(file, devinfo, opcode);
1233 err |= control(file, "saturate", saturate, brw_inst_saturate(devinfo, inst),
1234 NULL);
1235
1236 err |= control(file, "debug control", debug_ctrl,
1237 brw_inst_debug_control(devinfo, inst), NULL);
1238
1239 if (opcode == BRW_OPCODE_MATH) {
1240 string(file, " ");
1241 err |= control(file, "function", math_function,
1242 brw_inst_math_function(devinfo, inst), NULL);
1243 } else if (opcode != BRW_OPCODE_SEND && opcode != BRW_OPCODE_SENDC) {
1244 err |= control(file, "conditional modifier", conditional_modifier,
1245 brw_inst_cond_modifier(devinfo, inst), NULL);
1246
1247 /* If we're using the conditional modifier, print which flags reg is
1248 * used for it. Note that on gen6+, the embedded-condition SEL and
1249 * control flow doesn't update flags.
1250 */
1251 if (brw_inst_cond_modifier(devinfo, inst) &&
1252 (devinfo->gen < 6 || (opcode != BRW_OPCODE_SEL &&
1253 opcode != BRW_OPCODE_IF &&
1254 opcode != BRW_OPCODE_WHILE))) {
1255 format(file, ".f%"PRIu64,
1256 devinfo->gen >= 7 ? brw_inst_flag_reg_nr(devinfo, inst) : 0);
1257 if (brw_inst_flag_subreg_nr(devinfo, inst))
1258 format(file, ".%"PRIu64, brw_inst_flag_subreg_nr(devinfo, inst));
1259 }
1260 }
1261
1262 if (opcode != BRW_OPCODE_NOP && opcode != BRW_OPCODE_NENOP) {
1263 string(file, "(");
1264 err |= control(file, "execution size", exec_size,
1265 brw_inst_exec_size(devinfo, inst), NULL);
1266 string(file, ")");
1267 }
1268
1269 if (opcode == BRW_OPCODE_SEND && devinfo->gen < 6)
1270 format(file, " %"PRIu64, brw_inst_base_mrf(devinfo, inst));
1271
1272 if (has_uip(devinfo, opcode)) {
1273 /* Instructions that have UIP also have JIP. */
1274 pad(file, 16);
1275 format(file, "JIP: %d", brw_inst_jip(devinfo, inst));
1276 pad(file, 32);
1277 format(file, "UIP: %d", brw_inst_uip(devinfo, inst));
1278 } else if (has_jip(devinfo, opcode)) {
1279 pad(file, 16);
1280 if (devinfo->gen >= 7) {
1281 format(file, "JIP: %d", brw_inst_jip(devinfo, inst));
1282 } else {
1283 format(file, "JIP: %d", brw_inst_gen6_jump_count(devinfo, inst));
1284 }
1285 } else if (devinfo->gen < 6 && (opcode == BRW_OPCODE_BREAK ||
1286 opcode == BRW_OPCODE_CONTINUE ||
1287 opcode == BRW_OPCODE_ELSE)) {
1288 pad(file, 16);
1289 format(file, "Jump: %d", brw_inst_gen4_jump_count(devinfo, inst));
1290 pad(file, 32);
1291 format(file, "Pop: %"PRIu64, brw_inst_gen4_pop_count(devinfo, inst));
1292 } else if (devinfo->gen < 6 && (opcode == BRW_OPCODE_IF ||
1293 opcode == BRW_OPCODE_IFF ||
1294 opcode == BRW_OPCODE_HALT)) {
1295 pad(file, 16);
1296 format(file, "Jump: %d", brw_inst_gen4_jump_count(devinfo, inst));
1297 } else if (devinfo->gen < 6 && opcode == BRW_OPCODE_ENDIF) {
1298 pad(file, 16);
1299 format(file, "Pop: %"PRIu64, brw_inst_gen4_pop_count(devinfo, inst));
1300 } else if (opcode == BRW_OPCODE_JMPI) {
1301 pad(file, 16);
1302 err |= src1(file, devinfo, inst);
1303 } else if (desc && desc->nsrc == 3) {
1304 pad(file, 16);
1305 err |= dest_3src(file, devinfo, inst);
1306
1307 pad(file, 32);
1308 err |= src0_3src(file, devinfo, inst);
1309
1310 pad(file, 48);
1311 err |= src1_3src(file, devinfo, inst);
1312
1313 pad(file, 64);
1314 err |= src2_3src(file, devinfo, inst);
1315 } else if (desc) {
1316 if (desc->ndst > 0) {
1317 pad(file, 16);
1318 err |= dest(file, devinfo, inst);
1319 }
1320
1321 if (desc->nsrc > 0) {
1322 pad(file, 32);
1323 err |= src0(file, devinfo, inst);
1324 }
1325
1326 if (desc->nsrc > 1) {
1327 pad(file, 48);
1328 err |= src1(file, devinfo, inst);
1329 }
1330 }
1331
1332 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) {
1333 enum brw_message_target sfid = brw_inst_sfid(devinfo, inst);
1334
1335 if (brw_inst_src1_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE) {
1336 /* show the indirect descriptor source */
1337 pad(file, 48);
1338 err |= src1(file, devinfo, inst);
1339 }
1340
1341 newline(file);
1342 pad(file, 16);
1343 space = 0;
1344
1345 fprintf(file, " ");
1346 err |= control(file, "SFID", devinfo->gen >= 6 ? gen6_sfid : gen4_sfid,
1347 sfid, &space);
1348
1349
1350 if (brw_inst_src1_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE) {
1351 format(file, " indirect");
1352 } else {
1353 switch (sfid) {
1354 case BRW_SFID_MATH:
1355 err |= control(file, "math function", math_function,
1356 brw_inst_math_msg_function(devinfo, inst), &space);
1357 err |= control(file, "math saturate", math_saturate,
1358 brw_inst_math_msg_saturate(devinfo, inst), &space);
1359 err |= control(file, "math signed", math_signed,
1360 brw_inst_math_msg_signed_int(devinfo, inst), &space);
1361 err |= control(file, "math scalar", math_scalar,
1362 brw_inst_math_msg_data_type(devinfo, inst), &space);
1363 err |= control(file, "math precision", math_precision,
1364 brw_inst_math_msg_precision(devinfo, inst), &space);
1365 break;
1366 case BRW_SFID_SAMPLER:
1367 if (devinfo->gen >= 5) {
1368 err |= control(file, "sampler message", gen5_sampler_msg_type,
1369 brw_inst_sampler_msg_type(devinfo, inst), &space);
1370 err |= control(file, "sampler simd mode", gen5_sampler_simd_mode,
1371 brw_inst_sampler_simd_mode(devinfo, inst), &space);
1372 format(file, " Surface = %"PRIu64" Sampler = %"PRIu64,
1373 brw_inst_binding_table_index(devinfo, inst),
1374 brw_inst_sampler(devinfo, inst));
1375 } else {
1376 format(file, " (%"PRIu64", %"PRIu64", %"PRIu64", ",
1377 brw_inst_binding_table_index(devinfo, inst),
1378 brw_inst_sampler(devinfo, inst),
1379 brw_inst_sampler_msg_type(devinfo, inst));
1380 if (!devinfo->is_g4x) {
1381 err |= control(file, "sampler target format",
1382 sampler_target_format,
1383 brw_inst_sampler_return_format(devinfo, inst), NULL);
1384 }
1385 string(file, ")");
1386 }
1387 break;
1388 case GEN6_SFID_DATAPORT_SAMPLER_CACHE:
1389 /* aka BRW_SFID_DATAPORT_READ on Gen4-5 */
1390 if (devinfo->gen >= 6) {
1391 format(file, " (%"PRIu64", %"PRIu64", %"PRIu64", %"PRIu64")",
1392 brw_inst_binding_table_index(devinfo, inst),
1393 brw_inst_dp_msg_control(devinfo, inst),
1394 brw_inst_dp_msg_type(devinfo, inst),
1395 devinfo->gen >= 7 ? 0 : brw_inst_dp_write_commit(devinfo, inst));
1396 } else {
1397 bool is_965 = devinfo->gen == 4 && !devinfo->is_g4x;
1398 err |= control(file, "DP read message type",
1399 is_965 ? gen4_dp_read_port_msg_type :
1400 g45_dp_read_port_msg_type,
1401 brw_inst_dp_read_msg_type(devinfo, inst),
1402 &space);
1403
1404 format(file, " MsgCtrl = 0x%"PRIx64,
1405 brw_inst_dp_read_msg_control(devinfo, inst));
1406
1407 format(file, " Surface = %"PRIu64, brw_inst_binding_table_index(devinfo, inst));
1408 }
1409 break;
1410
1411 case GEN6_SFID_DATAPORT_RENDER_CACHE: {
1412 /* aka BRW_SFID_DATAPORT_WRITE on Gen4-5 */
1413 unsigned msg_type = brw_inst_dp_write_msg_type(devinfo, inst);
1414
1415 err |= control(file, "DP rc message type",
1416 devinfo->gen >= 6 ? dp_rc_msg_type_gen6
1417 : dp_write_port_msg_type,
1418 msg_type, &space);
1419
1420 bool is_rt_write = msg_type ==
1421 (devinfo->gen >= 6 ? GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
1422 : BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE);
1423
1424 if (is_rt_write) {
1425 err |= control(file, "RT message type", m_rt_write_subtype,
1426 brw_inst_rt_message_type(devinfo, inst), &space);
1427 if (devinfo->gen >= 6 && brw_inst_rt_slot_group(devinfo, inst))
1428 string(file, " Hi");
1429 if (brw_inst_rt_last(devinfo, inst))
1430 string(file, " LastRT");
1431 if (devinfo->gen < 7 && brw_inst_dp_write_commit(devinfo, inst))
1432 string(file, " WriteCommit");
1433 } else {
1434 format(file, " MsgCtrl = 0x%"PRIx64,
1435 brw_inst_dp_write_msg_control(devinfo, inst));
1436 }
1437
1438 format(file, " Surface = %"PRIu64, brw_inst_binding_table_index(devinfo, inst));
1439 break;
1440 }
1441
1442 case BRW_SFID_URB: {
1443 unsigned opcode = brw_inst_urb_opcode(devinfo, inst);
1444
1445 format(file, " %"PRIu64, brw_inst_urb_global_offset(devinfo, inst));
1446
1447 space = 1;
1448
1449 err |= control(file, "urb opcode",
1450 devinfo->gen >= 7 ? gen7_urb_opcode
1451 : gen5_urb_opcode,
1452 opcode, &space);
1453
1454 if (devinfo->gen >= 7 &&
1455 brw_inst_urb_per_slot_offset(devinfo, inst)) {
1456 string(file, " per-slot");
1457 }
1458
1459 if (opcode == GEN8_URB_OPCODE_SIMD8_WRITE ||
1460 opcode == GEN8_URB_OPCODE_SIMD8_READ) {
1461 if (brw_inst_urb_channel_mask_present(devinfo, inst))
1462 string(file, " masked");
1463 } else {
1464 err |= control(file, "urb swizzle", urb_swizzle,
1465 brw_inst_urb_swizzle_control(devinfo, inst),
1466 &space);
1467 }
1468
1469 if (devinfo->gen < 7) {
1470 err |= control(file, "urb allocate", urb_allocate,
1471 brw_inst_urb_allocate(devinfo, inst), &space);
1472 err |= control(file, "urb used", urb_used,
1473 brw_inst_urb_used(devinfo, inst), &space);
1474 }
1475 if (devinfo->gen < 8) {
1476 err |= control(file, "urb complete", urb_complete,
1477 brw_inst_urb_complete(devinfo, inst), &space);
1478 }
1479 break;
1480 }
1481 case BRW_SFID_THREAD_SPAWNER:
1482 break;
1483
1484 case BRW_SFID_MESSAGE_GATEWAY:
1485 format(file, " (%s)",
1486 gen7_gateway_subfuncid[brw_inst_gateway_subfuncid(devinfo, inst)]);
1487 break;
1488
1489 case GEN7_SFID_DATAPORT_DATA_CACHE:
1490 if (devinfo->gen >= 7) {
1491 format(file, " (");
1492
1493 err |= control(file, "DP DC0 message type",
1494 dp_dc0_msg_type_gen7,
1495 brw_inst_dp_msg_type(devinfo, inst), &space);
1496
1497 format(file, ", %"PRIu64", ", brw_inst_binding_table_index(devinfo, inst));
1498
1499 switch (brw_inst_dp_msg_type(devinfo, inst)) {
1500 case GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP:
1501 control(file, "atomic op", aop,
1502 brw_inst_imm_ud(devinfo, inst) >> 8 & 0xf, &space);
1503 break;
1504 default:
1505 format(file, "%"PRIu64, brw_inst_dp_msg_control(devinfo, inst));
1506 }
1507 format(file, ")");
1508 break;
1509 }
1510 /* FALLTHROUGH */
1511
1512 case HSW_SFID_DATAPORT_DATA_CACHE_1: {
1513 if (devinfo->gen >= 7) {
1514 format(file, " (");
1515
1516 unsigned msg_ctrl = brw_inst_dp_msg_control(devinfo, inst);
1517
1518 err |= control(file, "DP DC1 message type",
1519 dp_dc1_msg_type_hsw,
1520 brw_inst_dp_msg_type(devinfo, inst), &space);
1521
1522 format(file, ", Surface = %"PRIu64", ",
1523 brw_inst_binding_table_index(devinfo, inst));
1524
1525 switch (brw_inst_dp_msg_type(devinfo, inst)) {
1526 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP:
1527 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP:
1528 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP:
1529 format(file, "SIMD%d,", (msg_ctrl & (1 << 4)) ? 8 : 16);
1530 /* fallthrough */
1531 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2:
1532 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2:
1533 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2:
1534 control(file, "atomic op", aop, msg_ctrl & 0xf, &space);
1535 break;
1536 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ:
1537 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE:
1538 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ:
1539 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE: {
1540 static const char *simd_modes[] = { "4x2", "16", "8" };
1541 format(file, "SIMD%s, Mask = 0x%x",
1542 simd_modes[msg_ctrl >> 4], msg_ctrl & 0xf);
1543 break;
1544 }
1545 default:
1546 format(file, "0x%x", msg_ctrl);
1547 }
1548 format(file, ")");
1549 break;
1550 }
1551 /* FALLTHROUGH */
1552 }
1553
1554 case GEN7_SFID_PIXEL_INTERPOLATOR:
1555 if (devinfo->gen >= 7) {
1556 format(file, " (%s, %s, 0x%02"PRIx64")",
1557 brw_inst_pi_nopersp(devinfo, inst) ? "linear" : "persp",
1558 pixel_interpolator_msg_types[brw_inst_pi_message_type(devinfo, inst)],
1559 brw_inst_pi_message_data(devinfo, inst));
1560 break;
1561 }
1562 /* FALLTHROUGH */
1563
1564 default:
1565 format(file, "unsupported shared function ID %d", sfid);
1566 break;
1567 }
1568
1569 if (space)
1570 string(file, " ");
1571 format(file, "mlen %"PRIu64, brw_inst_mlen(devinfo, inst));
1572 format(file, " rlen %"PRIu64, brw_inst_rlen(devinfo, inst));
1573 }
1574 }
1575 pad(file, 64);
1576 if (opcode != BRW_OPCODE_NOP && opcode != BRW_OPCODE_NENOP) {
1577 string(file, "{");
1578 space = 1;
1579 err |= control(file, "access mode", access_mode,
1580 brw_inst_access_mode(devinfo, inst), &space);
1581 if (devinfo->gen >= 6) {
1582 err |= control(file, "write enable control", wectrl,
1583 brw_inst_mask_control(devinfo, inst), &space);
1584 } else {
1585 err |= control(file, "mask control", mask_ctrl,
1586 brw_inst_mask_control(devinfo, inst), &space);
1587 }
1588 err |= control(file, "dependency control", dep_ctrl,
1589 ((brw_inst_no_dd_check(devinfo, inst) << 1) |
1590 brw_inst_no_dd_clear(devinfo, inst)), &space);
1591
1592 if (devinfo->gen >= 6)
1593 err |= qtr_ctrl(file, devinfo, inst);
1594 else {
1595 if (brw_inst_qtr_control(devinfo, inst) == BRW_COMPRESSION_COMPRESSED &&
1596 desc && desc->ndst > 0 &&
1597 brw_inst_dst_reg_file(devinfo, inst) == BRW_MESSAGE_REGISTER_FILE &&
1598 brw_inst_dst_da_reg_nr(devinfo, inst) & BRW_MRF_COMPR4) {
1599 format(file, " compr4");
1600 } else {
1601 err |= control(file, "compression control", compr_ctrl,
1602 brw_inst_qtr_control(devinfo, inst), &space);
1603 }
1604 }
1605
1606 err |= control(file, "compaction", cmpt_ctrl, is_compacted, &space);
1607 err |= control(file, "thread control", thread_ctrl,
1608 brw_inst_thread_control(devinfo, inst), &space);
1609 if (has_branch_ctrl(devinfo, opcode)) {
1610 err |= control(file, "branch ctrl", branch_ctrl,
1611 brw_inst_branch_control(devinfo, inst), &space);
1612 } else if (devinfo->gen >= 6) {
1613 err |= control(file, "acc write control", accwr,
1614 brw_inst_acc_wr_control(devinfo, inst), &space);
1615 }
1616 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC)
1617 err |= control(file, "end of thread", end_of_thread,
1618 brw_inst_eot(devinfo, inst), &space);
1619 if (space)
1620 string(file, " ");
1621 string(file, "}");
1622 }
1623 string(file, ";");
1624 newline(file);
1625 return err;
1626 }