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i965/disasm: "Handle" Gen8+ HF/DF immediate cases.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_disasm.c
1 /*
2 * Copyright © 2008 Keith Packard
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
13 *
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20 * OF THIS SOFTWARE.
21 */
22
23 #include <stdio.h>
24 #include <stdlib.h>
25 #include <string.h>
26 #include <getopt.h>
27 #include <unistd.h>
28 #include <stdarg.h>
29
30 #include "brw_context.h"
31 #include "brw_defines.h"
32 #include "brw_reg.h"
33 #include "brw_inst.h"
34
35 const struct opcode_desc opcode_descs[128] = {
36 [BRW_OPCODE_MOV] = { .name = "mov", .nsrc = 1, .ndst = 1 },
37 [BRW_OPCODE_FRC] = { .name = "frc", .nsrc = 1, .ndst = 1 },
38 [BRW_OPCODE_RNDU] = { .name = "rndu", .nsrc = 1, .ndst = 1 },
39 [BRW_OPCODE_RNDD] = { .name = "rndd", .nsrc = 1, .ndst = 1 },
40 [BRW_OPCODE_RNDE] = { .name = "rnde", .nsrc = 1, .ndst = 1 },
41 [BRW_OPCODE_RNDZ] = { .name = "rndz", .nsrc = 1, .ndst = 1 },
42 [BRW_OPCODE_NOT] = { .name = "not", .nsrc = 1, .ndst = 1 },
43 [BRW_OPCODE_LZD] = { .name = "lzd", .nsrc = 1, .ndst = 1 },
44 [BRW_OPCODE_F32TO16] = { .name = "f32to16", .nsrc = 1, .ndst = 1 },
45 [BRW_OPCODE_F16TO32] = { .name = "f16to32", .nsrc = 1, .ndst = 1 },
46 [BRW_OPCODE_BFREV] = { .name = "bfrev", .nsrc = 1, .ndst = 1 },
47 [BRW_OPCODE_FBH] = { .name = "fbh", .nsrc = 1, .ndst = 1 },
48 [BRW_OPCODE_FBL] = { .name = "fbl", .nsrc = 1, .ndst = 1 },
49 [BRW_OPCODE_CBIT] = { .name = "cbit", .nsrc = 1, .ndst = 1 },
50
51 [BRW_OPCODE_MUL] = { .name = "mul", .nsrc = 2, .ndst = 1 },
52 [BRW_OPCODE_MAC] = { .name = "mac", .nsrc = 2, .ndst = 1 },
53 [BRW_OPCODE_MACH] = { .name = "mach", .nsrc = 2, .ndst = 1 },
54 [BRW_OPCODE_LINE] = { .name = "line", .nsrc = 2, .ndst = 1 },
55 [BRW_OPCODE_PLN] = { .name = "pln", .nsrc = 2, .ndst = 1 },
56 [BRW_OPCODE_MAD] = { .name = "mad", .nsrc = 3, .ndst = 1 },
57 [BRW_OPCODE_LRP] = { .name = "lrp", .nsrc = 3, .ndst = 1 },
58 [BRW_OPCODE_SAD2] = { .name = "sad2", .nsrc = 2, .ndst = 1 },
59 [BRW_OPCODE_SADA2] = { .name = "sada2", .nsrc = 2, .ndst = 1 },
60 [BRW_OPCODE_DP4] = { .name = "dp4", .nsrc = 2, .ndst = 1 },
61 [BRW_OPCODE_DPH] = { .name = "dph", .nsrc = 2, .ndst = 1 },
62 [BRW_OPCODE_DP3] = { .name = "dp3", .nsrc = 2, .ndst = 1 },
63 [BRW_OPCODE_DP2] = { .name = "dp2", .nsrc = 2, .ndst = 1 },
64 [BRW_OPCODE_MATH] = { .name = "math", .nsrc = 2, .ndst = 1 },
65
66 [BRW_OPCODE_AVG] = { .name = "avg", .nsrc = 2, .ndst = 1 },
67 [BRW_OPCODE_ADD] = { .name = "add", .nsrc = 2, .ndst = 1 },
68 [BRW_OPCODE_SEL] = { .name = "sel", .nsrc = 2, .ndst = 1 },
69 [BRW_OPCODE_AND] = { .name = "and", .nsrc = 2, .ndst = 1 },
70 [BRW_OPCODE_OR] = { .name = "or", .nsrc = 2, .ndst = 1 },
71 [BRW_OPCODE_XOR] = { .name = "xor", .nsrc = 2, .ndst = 1 },
72 [BRW_OPCODE_SHR] = { .name = "shr", .nsrc = 2, .ndst = 1 },
73 [BRW_OPCODE_SHL] = { .name = "shl", .nsrc = 2, .ndst = 1 },
74 [BRW_OPCODE_ASR] = { .name = "asr", .nsrc = 2, .ndst = 1 },
75 [BRW_OPCODE_CMP] = { .name = "cmp", .nsrc = 2, .ndst = 1 },
76 [BRW_OPCODE_CMPN] = { .name = "cmpn", .nsrc = 2, .ndst = 1 },
77 [BRW_OPCODE_BFE] = { .name = "bfe", .nsrc = 3, .ndst = 1 },
78 [BRW_OPCODE_BFI1] = { .name = "bfi1", .nsrc = 2, .ndst = 1 },
79 [BRW_OPCODE_BFI2] = { .name = "bfi2", .nsrc = 3, .ndst = 1 },
80 [BRW_OPCODE_ADDC] = { .name = "addc", .nsrc = 2, .ndst = 1 },
81 [BRW_OPCODE_SUBB] = { .name = "subb", .nsrc = 2, .ndst = 1 },
82
83 [BRW_OPCODE_SEND] = { .name = "send", .nsrc = 1, .ndst = 1 },
84 [BRW_OPCODE_SENDC] = { .name = "sendc", .nsrc = 1, .ndst = 1 },
85 [BRW_OPCODE_NOP] = { .name = "nop", .nsrc = 0, .ndst = 0 },
86 [BRW_OPCODE_JMPI] = { .name = "jmpi", .nsrc = 0, .ndst = 0 },
87 [BRW_OPCODE_IF] = { .name = "if", .nsrc = 2, .ndst = 0 },
88 [BRW_OPCODE_IFF] = { .name = "iff", .nsrc = 2, .ndst = 1 },
89 [BRW_OPCODE_WHILE] = { .name = "while", .nsrc = 2, .ndst = 0 },
90 [BRW_OPCODE_ELSE] = { .name = "else", .nsrc = 2, .ndst = 0 },
91 [BRW_OPCODE_BREAK] = { .name = "break", .nsrc = 2, .ndst = 0 },
92 [BRW_OPCODE_CONTINUE] = { .name = "cont", .nsrc = 1, .ndst = 0 },
93 [BRW_OPCODE_HALT] = { .name = "halt", .nsrc = 1, .ndst = 0 },
94 [BRW_OPCODE_MSAVE] = { .name = "msave", .nsrc = 1, .ndst = 1 },
95 [BRW_OPCODE_PUSH] = { .name = "push", .nsrc = 1, .ndst = 1 },
96 [BRW_OPCODE_MRESTORE] = { .name = "mrest", .nsrc = 1, .ndst = 1 },
97 [BRW_OPCODE_POP] = { .name = "pop", .nsrc = 2, .ndst = 0 },
98 [BRW_OPCODE_WAIT] = { .name = "wait", .nsrc = 1, .ndst = 0 },
99 [BRW_OPCODE_DO] = { .name = "do", .nsrc = 0, .ndst = 0 },
100 [BRW_OPCODE_ENDIF] = { .name = "endif", .nsrc = 2, .ndst = 0 },
101 };
102
103 static bool
104 has_jip(struct brw_context *brw, enum opcode opcode)
105 {
106 if (brw->gen < 6)
107 return false;
108
109 return opcode == BRW_OPCODE_IF ||
110 opcode == BRW_OPCODE_ELSE ||
111 opcode == BRW_OPCODE_ENDIF ||
112 opcode == BRW_OPCODE_WHILE;
113 }
114
115 static bool
116 has_uip(struct brw_context *brw, enum opcode opcode)
117 {
118 if (brw->gen < 6)
119 return false;
120
121 return (brw->gen >= 7 && opcode == BRW_OPCODE_IF) ||
122 (brw->gen >= 8 && opcode == BRW_OPCODE_ELSE) ||
123 opcode == BRW_OPCODE_BREAK ||
124 opcode == BRW_OPCODE_CONTINUE ||
125 opcode == BRW_OPCODE_HALT;
126 }
127
128 static bool
129 is_logic_instruction(unsigned opcode)
130 {
131 return opcode == BRW_OPCODE_AND ||
132 opcode == BRW_OPCODE_NOT ||
133 opcode == BRW_OPCODE_OR ||
134 opcode == BRW_OPCODE_XOR;
135 }
136
137 const char *const conditional_modifier[16] = {
138 [BRW_CONDITIONAL_NONE] = "",
139 [BRW_CONDITIONAL_Z] = ".e",
140 [BRW_CONDITIONAL_NZ] = ".ne",
141 [BRW_CONDITIONAL_G] = ".g",
142 [BRW_CONDITIONAL_GE] = ".ge",
143 [BRW_CONDITIONAL_L] = ".l",
144 [BRW_CONDITIONAL_LE] = ".le",
145 [BRW_CONDITIONAL_R] = ".r",
146 [BRW_CONDITIONAL_O] = ".o",
147 [BRW_CONDITIONAL_U] = ".u",
148 };
149
150 static const char *const m_negate[2] = {
151 [0] = "",
152 [1] = "-",
153 };
154
155 static const char *const _abs[2] = {
156 [0] = "",
157 [1] = "(abs)",
158 };
159
160 static const char *const m_bitnot[2] = { "", "~" };
161
162 static const char *const vert_stride[16] = {
163 [0] = "0",
164 [1] = "1",
165 [2] = "2",
166 [3] = "4",
167 [4] = "8",
168 [5] = "16",
169 [6] = "32",
170 [15] = "VxH",
171 };
172
173 static const char *const width[8] = {
174 [0] = "1",
175 [1] = "2",
176 [2] = "4",
177 [3] = "8",
178 [4] = "16",
179 };
180
181 static const char *const horiz_stride[4] = {
182 [0] = "0",
183 [1] = "1",
184 [2] = "2",
185 [3] = "4"
186 };
187
188 static const char *const chan_sel[4] = {
189 [0] = "x",
190 [1] = "y",
191 [2] = "z",
192 [3] = "w",
193 };
194
195 static const char *const debug_ctrl[2] = {
196 [0] = "",
197 [1] = ".breakpoint"
198 };
199
200 static const char *const saturate[2] = {
201 [0] = "",
202 [1] = ".sat"
203 };
204
205 static const char *const cmpt_ctrl[2] = {
206 [0] = "",
207 [1] = "compacted"
208 };
209
210 static const char *const accwr[2] = {
211 [0] = "",
212 [1] = "AccWrEnable"
213 };
214
215 static const char *const wectrl[2] = {
216 [0] = "WE_normal",
217 [1] = "WE_all"
218 };
219
220 static const char *const exec_size[8] = {
221 [0] = "1",
222 [1] = "2",
223 [2] = "4",
224 [3] = "8",
225 [4] = "16",
226 [5] = "32"
227 };
228
229 static const char *const pred_inv[2] = {
230 [0] = "+",
231 [1] = "-"
232 };
233
234 static const char *const pred_ctrl_align16[16] = {
235 [1] = "",
236 [2] = ".x",
237 [3] = ".y",
238 [4] = ".z",
239 [5] = ".w",
240 [6] = ".any4h",
241 [7] = ".all4h",
242 };
243
244 static const char *const pred_ctrl_align1[16] = {
245 [BRW_PREDICATE_NORMAL] = "",
246 [BRW_PREDICATE_ALIGN1_ANYV] = ".anyv",
247 [BRW_PREDICATE_ALIGN1_ALLV] = ".allv",
248 [BRW_PREDICATE_ALIGN1_ANY2H] = ".any2h",
249 [BRW_PREDICATE_ALIGN1_ALL2H] = ".all2h",
250 [BRW_PREDICATE_ALIGN1_ANY4H] = ".any4h",
251 [BRW_PREDICATE_ALIGN1_ALL4H] = ".all4h",
252 [BRW_PREDICATE_ALIGN1_ANY8H] = ".any8h",
253 [BRW_PREDICATE_ALIGN1_ALL8H] = ".all8h",
254 [BRW_PREDICATE_ALIGN1_ANY16H] = ".any16h",
255 [BRW_PREDICATE_ALIGN1_ANY16H] = ".all16h",
256 [BRW_PREDICATE_ALIGN1_ANY32H] = ".any32h",
257 [BRW_PREDICATE_ALIGN1_ANY32H] = ".all32h",
258 };
259
260 static const char *const thread_ctrl[4] = {
261 [BRW_THREAD_NORMAL] = "",
262 [BRW_THREAD_ATOMIC] = "atomic",
263 [BRW_THREAD_SWITCH] = "switch",
264 };
265
266 static const char *const compr_ctrl[4] = {
267 [0] = "",
268 [1] = "sechalf",
269 [2] = "compr",
270 [3] = "compr4",
271 };
272
273 static const char *const dep_ctrl[4] = {
274 [0] = "",
275 [1] = "NoDDClr",
276 [2] = "NoDDChk",
277 [3] = "NoDDClr,NoDDChk",
278 };
279
280 static const char *const mask_ctrl[4] = {
281 [0] = "",
282 [1] = "nomask",
283 };
284
285 static const char *const access_mode[2] = {
286 [0] = "align1",
287 [1] = "align16",
288 };
289
290 static const char * const reg_encoding[] = {
291 [BRW_HW_REG_TYPE_UD] = "UD",
292 [BRW_HW_REG_TYPE_D] = "D",
293 [BRW_HW_REG_TYPE_UW] = "UW",
294 [BRW_HW_REG_TYPE_W] = "W",
295 [BRW_HW_REG_NON_IMM_TYPE_UB] = "UB",
296 [BRW_HW_REG_NON_IMM_TYPE_B] = "B",
297 [GEN7_HW_REG_NON_IMM_TYPE_DF] = "DF",
298 [BRW_HW_REG_TYPE_F] = "F",
299 [GEN8_HW_REG_TYPE_UQ] = "UQ",
300 [GEN8_HW_REG_TYPE_Q] = "Q",
301 [GEN8_HW_REG_NON_IMM_TYPE_HF] = "HF",
302 };
303
304 static const char *const three_source_reg_encoding[] = {
305 [BRW_3SRC_TYPE_F] = "F",
306 [BRW_3SRC_TYPE_D] = "D",
307 [BRW_3SRC_TYPE_UD] = "UD",
308 };
309
310 const int reg_type_size[] = {
311 [BRW_HW_REG_TYPE_UD] = 4,
312 [BRW_HW_REG_TYPE_D] = 4,
313 [BRW_HW_REG_TYPE_UW] = 2,
314 [BRW_HW_REG_TYPE_W] = 2,
315 [BRW_HW_REG_NON_IMM_TYPE_UB] = 1,
316 [BRW_HW_REG_NON_IMM_TYPE_B] = 1,
317 [GEN7_HW_REG_NON_IMM_TYPE_DF] = 8,
318 [BRW_HW_REG_TYPE_F] = 4,
319 [GEN8_HW_REG_TYPE_UQ] = 8,
320 [GEN8_HW_REG_TYPE_Q] = 8,
321 [GEN8_HW_REG_NON_IMM_TYPE_HF] = 2,
322 };
323
324 static const char *const reg_file[4] = {
325 [0] = "A",
326 [1] = "g",
327 [2] = "m",
328 [3] = "imm",
329 };
330
331 static const char *const writemask[16] = {
332 [0x0] = ".",
333 [0x1] = ".x",
334 [0x2] = ".y",
335 [0x3] = ".xy",
336 [0x4] = ".z",
337 [0x5] = ".xz",
338 [0x6] = ".yz",
339 [0x7] = ".xyz",
340 [0x8] = ".w",
341 [0x9] = ".xw",
342 [0xa] = ".yw",
343 [0xb] = ".xyw",
344 [0xc] = ".zw",
345 [0xd] = ".xzw",
346 [0xe] = ".yzw",
347 [0xf] = "",
348 };
349
350 static const char *const end_of_thread[2] = {
351 [0] = "",
352 [1] = "EOT"
353 };
354
355 static const char *const target_function[16] = {
356 [BRW_SFID_NULL] = "null",
357 [BRW_SFID_MATH] = "math",
358 [BRW_SFID_SAMPLER] = "sampler",
359 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
360 [BRW_SFID_DATAPORT_READ] = "read",
361 [BRW_SFID_DATAPORT_WRITE] = "write",
362 [BRW_SFID_URB] = "urb",
363 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
364 [BRW_SFID_VME] = "vme",
365 };
366
367 static const char *const target_function_gen6[16] = {
368 [BRW_SFID_NULL] = "null",
369 [BRW_SFID_MATH] = "math",
370 [BRW_SFID_SAMPLER] = "sampler",
371 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
372 [BRW_SFID_URB] = "urb",
373 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
374 [GEN6_SFID_DATAPORT_SAMPLER_CACHE] = "sampler",
375 [GEN6_SFID_DATAPORT_RENDER_CACHE] = "render",
376 [GEN6_SFID_DATAPORT_CONSTANT_CACHE] = "const",
377 [GEN7_SFID_DATAPORT_DATA_CACHE] = "data",
378 [GEN7_SFID_PIXEL_INTERPOLATOR] = "pixel interp",
379 [HSW_SFID_DATAPORT_DATA_CACHE_1] = "dp data 1",
380 [HSW_SFID_CRE] = "cre",
381 };
382
383 static const char *const dp_rc_msg_type_gen6[16] = {
384 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read",
385 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read",
386 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read",
387 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read",
388 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] =
389 "OWORD unaligned block read",
390 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read",
391 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write",
392 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write",
393 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] =
394 "OWORD dual block write",
395 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write",
396 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] =
397 "DWORD scattered write",
398 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write",
399 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write",
400 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORMc write",
401 };
402
403 static const char *const dp_dc0_msg_type_gen7[16] = {
404 [GEN7_DATAPORT_DC_OWORD_BLOCK_READ] = "DC OWORD block read",
405 [GEN7_DATAPORT_DC_UNALIGNED_OWORD_BLOCK_READ] =
406 "DC unaligned OWORD block read",
407 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_READ] = "DC OWORD dual block read",
408 [GEN7_DATAPORT_DC_DWORD_SCATTERED_READ] = "DC DWORD scattered read",
409 [GEN7_DATAPORT_DC_BYTE_SCATTERED_READ] = "DC byte scattered read",
410 [GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP] = "DC untyped atomic",
411 [GEN7_DATAPORT_DC_MEMORY_FENCE] = "DC mfence",
412 [GEN7_DATAPORT_DC_OWORD_BLOCK_WRITE] = "DC OWORD block write",
413 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_WRITE] = "DC OWORD dual block write",
414 [GEN7_DATAPORT_DC_DWORD_SCATTERED_WRITE] = "DC DWORD scatterd write",
415 [GEN7_DATAPORT_DC_BYTE_SCATTERED_WRITE] = "DC byte scattered write",
416 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
417 };
418
419 static const char *const dp_dc1_msg_type_hsw[16] = {
420 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ] = "untyped surface read",
421 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP] = "DC untyped atomic op",
422 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2] =
423 "DC untyped 4x2 atomic op",
424 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_READ] = "DC media block read",
425 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ] = "DC typed surface read",
426 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP] = "DC typed atomic",
427 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2] = "DC typed 4x2 atomic op",
428 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
429 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_WRITE] = "DC media block write",
430 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP] = "DC atomic counter op",
431 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2] =
432 "DC 4x2 atomic counter op",
433 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE] = "DC typed surface write",
434 };
435
436 static const char *const aop[16] = {
437 [BRW_AOP_AND] = "and",
438 [BRW_AOP_OR] = "or",
439 [BRW_AOP_XOR] = "xor",
440 [BRW_AOP_MOV] = "mov",
441 [BRW_AOP_INC] = "inc",
442 [BRW_AOP_DEC] = "dec",
443 [BRW_AOP_ADD] = "add",
444 [BRW_AOP_SUB] = "sub",
445 [BRW_AOP_REVSUB] = "revsub",
446 [BRW_AOP_IMAX] = "imax",
447 [BRW_AOP_IMIN] = "imin",
448 [BRW_AOP_UMAX] = "umax",
449 [BRW_AOP_UMIN] = "umin",
450 [BRW_AOP_CMPWR] = "cmpwr",
451 [BRW_AOP_PREDEC] = "predec",
452 };
453
454 static const char *const math_function[16] = {
455 [BRW_MATH_FUNCTION_INV] = "inv",
456 [BRW_MATH_FUNCTION_LOG] = "log",
457 [BRW_MATH_FUNCTION_EXP] = "exp",
458 [BRW_MATH_FUNCTION_SQRT] = "sqrt",
459 [BRW_MATH_FUNCTION_RSQ] = "rsq",
460 [BRW_MATH_FUNCTION_SIN] = "sin",
461 [BRW_MATH_FUNCTION_COS] = "cos",
462 [BRW_MATH_FUNCTION_SINCOS] = "sincos",
463 [BRW_MATH_FUNCTION_FDIV] = "fdiv",
464 [BRW_MATH_FUNCTION_POW] = "pow",
465 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] = "intdivmod",
466 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] = "intdiv",
467 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER] = "intmod",
468 [GEN8_MATH_FUNCTION_INVM] = "invm",
469 [GEN8_MATH_FUNCTION_RSQRTM] = "rsqrtm",
470 };
471
472 static const char *const math_saturate[2] = {
473 [0] = "",
474 [1] = "sat"
475 };
476
477 static const char *const math_signed[2] = {
478 [0] = "",
479 [1] = "signed"
480 };
481
482 static const char *const math_scalar[2] = {
483 [0] = "",
484 [1] = "scalar"
485 };
486
487 static const char *const math_precision[2] = {
488 [0] = "",
489 [1] = "partial_precision"
490 };
491
492 static const char *const gen5_urb_opcode[] = {
493 [0] = "urb_write",
494 [1] = "ff_sync",
495 };
496
497 static const char *const gen7_urb_opcode[] = {
498 [0] = "write HWord",
499 [1] = "write OWord",
500 [2] = "read HWord",
501 [3] = "read OWord",
502 [4] = "atomic mov", /* Gen7+ */
503 [5] = "atomic inc", /* Gen7+ */
504 [6] = "atomic add", /* Gen8+ */
505 [7] = "SIMD8 write", /* Gen8+ */
506 [8] = "SIMD8 read", /* Gen8+ */
507 /* [9-15] - reserved */
508 };
509
510 static const char *const urb_swizzle[4] = {
511 [BRW_URB_SWIZZLE_NONE] = "",
512 [BRW_URB_SWIZZLE_INTERLEAVE] = "interleave",
513 [BRW_URB_SWIZZLE_TRANSPOSE] = "transpose",
514 };
515
516 static const char *const urb_allocate[2] = {
517 [0] = "",
518 [1] = "allocate"
519 };
520
521 static const char *const urb_used[2] = {
522 [0] = "",
523 [1] = "used"
524 };
525
526 static const char *const urb_complete[2] = {
527 [0] = "",
528 [1] = "complete"
529 };
530
531 static const char *const sampler_target_format[4] = {
532 [0] = "F",
533 [2] = "UD",
534 [3] = "D"
535 };
536
537
538 static int column;
539
540 static int
541 string(FILE *file, const char *string)
542 {
543 fputs(string, file);
544 column += strlen(string);
545 return 0;
546 }
547
548 static int
549 format(FILE *f, const char *format, ...)
550 {
551 char buf[1024];
552 va_list args;
553 va_start(args, format);
554
555 vsnprintf(buf, sizeof(buf) - 1, format, args);
556 va_end(args);
557 string(f, buf);
558 return 0;
559 }
560
561 static int
562 newline(FILE *f)
563 {
564 putc('\n', f);
565 column = 0;
566 return 0;
567 }
568
569 static int
570 pad(FILE *f, int c)
571 {
572 do
573 string(f, " ");
574 while (column < c);
575 return 0;
576 }
577
578 static int
579 control(FILE *file, const char *name, const char *const ctrl[],
580 unsigned id, int *space)
581 {
582 if (!ctrl[id]) {
583 fprintf(file, "*** invalid %s value %d ", name, id);
584 return 1;
585 }
586 if (ctrl[id][0]) {
587 if (space && *space)
588 string(file, " ");
589 string(file, ctrl[id]);
590 if (space)
591 *space = 1;
592 }
593 return 0;
594 }
595
596 static int
597 print_opcode(FILE *file, int id)
598 {
599 if (!opcode_descs[id].name) {
600 format(file, "*** invalid opcode value %d ", id);
601 return 1;
602 }
603 string(file, opcode_descs[id].name);
604 return 0;
605 }
606
607 static int
608 reg(FILE *file, unsigned _reg_file, unsigned _reg_nr)
609 {
610 int err = 0;
611
612 /* Clear the Compr4 instruction compression bit. */
613 if (_reg_file == BRW_MESSAGE_REGISTER_FILE)
614 _reg_nr &= ~(1 << 7);
615
616 if (_reg_file == BRW_ARCHITECTURE_REGISTER_FILE) {
617 switch (_reg_nr & 0xf0) {
618 case BRW_ARF_NULL:
619 string(file, "null");
620 return -1;
621 case BRW_ARF_ADDRESS:
622 format(file, "a%d", _reg_nr & 0x0f);
623 break;
624 case BRW_ARF_ACCUMULATOR:
625 format(file, "acc%d", _reg_nr & 0x0f);
626 break;
627 case BRW_ARF_FLAG:
628 format(file, "f%d", _reg_nr & 0x0f);
629 break;
630 case BRW_ARF_MASK:
631 format(file, "mask%d", _reg_nr & 0x0f);
632 break;
633 case BRW_ARF_MASK_STACK:
634 format(file, "msd%d", _reg_nr & 0x0f);
635 break;
636 case BRW_ARF_STATE:
637 format(file, "sr%d", _reg_nr & 0x0f);
638 break;
639 case BRW_ARF_CONTROL:
640 format(file, "cr%d", _reg_nr & 0x0f);
641 break;
642 case BRW_ARF_NOTIFICATION_COUNT:
643 format(file, "n%d", _reg_nr & 0x0f);
644 break;
645 case BRW_ARF_IP:
646 string(file, "ip");
647 return -1;
648 break;
649 default:
650 format(file, "ARF%d", _reg_nr);
651 break;
652 }
653 } else {
654 err |= control(file, "src reg file", reg_file, _reg_file, NULL);
655 format(file, "%d", _reg_nr);
656 }
657 return err;
658 }
659
660 static int
661 dest(FILE *file, struct brw_context *brw, brw_inst *inst)
662 {
663 int err = 0;
664
665 if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
666 if (brw_inst_dst_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
667 err |= reg(file, brw_inst_dst_reg_file(brw, inst),
668 brw_inst_dst_da_reg_nr(brw, inst));
669 if (err == -1)
670 return 0;
671 if (brw_inst_dst_da1_subreg_nr(brw, inst))
672 format(file, ".%d", brw_inst_dst_da1_subreg_nr(brw, inst) /
673 reg_type_size[brw_inst_dst_reg_type(brw, inst)]);
674 string(file, "<");
675 err |= control(file, "horiz stride", horiz_stride,
676 brw_inst_dst_hstride(brw, inst), NULL);
677 string(file, ">");
678 err |= control(file, "dest reg encoding", reg_encoding,
679 brw_inst_dst_reg_type(brw, inst), NULL);
680 } else {
681 string(file, "g[a0");
682 if (brw_inst_dst_ia_subreg_nr(brw, inst))
683 format(file, ".%d", brw_inst_dst_ia_subreg_nr(brw, inst) /
684 reg_type_size[brw_inst_dst_reg_type(brw, inst)]);
685 if (brw_inst_dst_ia1_addr_imm(brw, inst))
686 format(file, " %d", brw_inst_dst_ia1_addr_imm(brw, inst));
687 string(file, "]<");
688 err |= control(file, "horiz stride", horiz_stride,
689 brw_inst_dst_hstride(brw, inst), NULL);
690 string(file, ">");
691 err |= control(file, "dest reg encoding", reg_encoding,
692 brw_inst_dst_reg_type(brw, inst), NULL);
693 }
694 } else {
695 if (brw_inst_dst_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
696 err |= reg(file, brw_inst_dst_reg_file(brw, inst),
697 brw_inst_dst_da_reg_nr(brw, inst));
698 if (err == -1)
699 return 0;
700 if (brw_inst_dst_da16_subreg_nr(brw, inst))
701 format(file, ".%d", brw_inst_dst_da16_subreg_nr(brw, inst) /
702 reg_type_size[brw_inst_dst_reg_type(brw, inst)]);
703 string(file, "<1>");
704 err |= control(file, "writemask", writemask,
705 brw_inst_da16_writemask(brw, inst), NULL);
706 err |= control(file, "dest reg encoding", reg_encoding,
707 brw_inst_dst_reg_type(brw, inst), NULL);
708 } else {
709 err = 1;
710 string(file, "Indirect align16 address mode not supported");
711 }
712 }
713
714 return 0;
715 }
716
717 static int
718 dest_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
719 {
720 int err = 0;
721 uint32_t reg_file;
722
723 if (brw->gen == 6 && brw_inst_3src_dst_reg_file(brw, inst))
724 reg_file = BRW_MESSAGE_REGISTER_FILE;
725 else
726 reg_file = BRW_GENERAL_REGISTER_FILE;
727
728 err |= reg(file, reg_file, brw_inst_3src_dst_reg_nr(brw, inst));
729 if (err == -1)
730 return 0;
731 if (brw_inst_3src_dst_subreg_nr(brw, inst))
732 format(file, ".%d", brw_inst_3src_dst_subreg_nr(brw, inst));
733 string(file, "<1>");
734 err |= control(file, "writemask", writemask,
735 brw_inst_3src_dst_writemask(brw, inst), NULL);
736 err |= control(file, "dest reg encoding", three_source_reg_encoding,
737 brw_inst_3src_dst_type(brw, inst), NULL);
738
739 return 0;
740 }
741
742 static int
743 src_align1_region(FILE *file,
744 unsigned _vert_stride, unsigned _width,
745 unsigned _horiz_stride)
746 {
747 int err = 0;
748 string(file, "<");
749 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
750 string(file, ",");
751 err |= control(file, "width", width, _width, NULL);
752 string(file, ",");
753 err |= control(file, "horiz_stride", horiz_stride, _horiz_stride, NULL);
754 string(file, ">");
755 return err;
756 }
757
758 static int
759 src_da1(FILE *file,
760 const struct brw_context *brw,
761 unsigned opcode,
762 unsigned type, unsigned _reg_file,
763 unsigned _vert_stride, unsigned _width, unsigned _horiz_stride,
764 unsigned reg_num, unsigned sub_reg_num, unsigned __abs,
765 unsigned _negate)
766 {
767 int err = 0;
768
769 if (brw->gen >= 8 && is_logic_instruction(opcode))
770 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
771 else
772 err |= control(file, "negate", m_negate, _negate, NULL);
773
774 err |= control(file, "abs", _abs, __abs, NULL);
775
776 err |= reg(file, _reg_file, reg_num);
777 if (err == -1)
778 return 0;
779 if (sub_reg_num)
780 format(file, ".%d", sub_reg_num / reg_type_size[type]); /* use formal style like spec */
781 src_align1_region(file, _vert_stride, _width, _horiz_stride);
782 err |= control(file, "src reg encoding", reg_encoding, type, NULL);
783 return err;
784 }
785
786 static int
787 src_ia1(FILE *file,
788 const struct brw_context *brw,
789 unsigned opcode,
790 unsigned type,
791 unsigned _reg_file,
792 int _addr_imm,
793 unsigned _addr_subreg_nr,
794 unsigned _negate,
795 unsigned __abs,
796 unsigned _addr_mode,
797 unsigned _horiz_stride, unsigned _width, unsigned _vert_stride)
798 {
799 int err = 0;
800
801 if (brw->gen >= 8 && is_logic_instruction(opcode))
802 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
803 else
804 err |= control(file, "negate", m_negate, _negate, NULL);
805
806 err |= control(file, "abs", _abs, __abs, NULL);
807
808 string(file, "g[a0");
809 if (_addr_subreg_nr)
810 format(file, ".%d", _addr_subreg_nr);
811 if (_addr_imm)
812 format(file, " %d", _addr_imm);
813 string(file, "]");
814 src_align1_region(file, _vert_stride, _width, _horiz_stride);
815 err |= control(file, "src reg encoding", reg_encoding, type, NULL);
816 return err;
817 }
818
819 static int
820 src_swizzle(FILE *file, unsigned swiz)
821 {
822 unsigned x = BRW_GET_SWZ(swiz, BRW_CHANNEL_X);
823 unsigned y = BRW_GET_SWZ(swiz, BRW_CHANNEL_Y);
824 unsigned z = BRW_GET_SWZ(swiz, BRW_CHANNEL_Z);
825 unsigned w = BRW_GET_SWZ(swiz, BRW_CHANNEL_W);
826 int err = 0;
827
828 if (x == y && x == z && x == w) {
829 string(file, ".");
830 err |= control(file, "channel select", chan_sel, x, NULL);
831 } else if (swiz != BRW_SWIZZLE_XYZW) {
832 string(file, ".");
833 err |= control(file, "channel select", chan_sel, x, NULL);
834 err |= control(file, "channel select", chan_sel, y, NULL);
835 err |= control(file, "channel select", chan_sel, z, NULL);
836 err |= control(file, "channel select", chan_sel, w, NULL);
837 }
838 return err;
839 }
840
841 static int
842 src_da16(FILE *file,
843 const struct brw_context *brw,
844 unsigned opcode,
845 unsigned _reg_type,
846 unsigned _reg_file,
847 unsigned _vert_stride,
848 unsigned _reg_nr,
849 unsigned _subreg_nr,
850 unsigned __abs,
851 unsigned _negate,
852 unsigned swz_x, unsigned swz_y, unsigned swz_z, unsigned swz_w)
853 {
854 int err = 0;
855
856 if (brw->gen >= 8 && is_logic_instruction(opcode))
857 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
858 else
859 err |= control(file, "negate", m_negate, _negate, NULL);
860
861 err |= control(file, "abs", _abs, __abs, NULL);
862
863 err |= reg(file, _reg_file, _reg_nr);
864 if (err == -1)
865 return 0;
866 if (_subreg_nr)
867 /* bit4 for subreg number byte addressing. Make this same meaning as
868 in da1 case, so output looks consistent. */
869 format(file, ".%d", 16 / reg_type_size[_reg_type]);
870 string(file, "<");
871 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
872 string(file, ",4,1>");
873 err |= src_swizzle(file, BRW_SWIZZLE4(swz_x, swz_y, swz_z, swz_w));
874 err |= control(file, "src da16 reg type", reg_encoding, _reg_type, NULL);
875 return err;
876 }
877
878 static int
879 src0_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
880 {
881 int err = 0;
882 unsigned src0_subreg_nr = brw_inst_3src_src0_subreg_nr(brw, inst);
883
884 err |= control(file, "negate", m_negate,
885 brw_inst_3src_src0_negate(brw, inst), NULL);
886 err |= control(file, "abs", _abs, brw_inst_3src_src0_abs(brw, inst), NULL);
887
888 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
889 brw_inst_3src_src0_reg_nr(brw, inst));
890 if (err == -1)
891 return 0;
892 if (src0_subreg_nr)
893 format(file, ".%d", src0_subreg_nr);
894 if (brw_inst_3src_src0_rep_ctrl(brw, inst))
895 string(file, "<0,1,0>");
896 else
897 string(file, "<4,4,1>");
898 err |= control(file, "src da16 reg type", three_source_reg_encoding,
899 brw_inst_3src_src_type(brw, inst), NULL);
900 err |= src_swizzle(file, brw_inst_3src_src0_swizzle(brw, inst));
901 return err;
902 }
903
904 static int
905 src1_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
906 {
907 int err = 0;
908 unsigned src1_subreg_nr = brw_inst_3src_src1_subreg_nr(brw, inst);
909
910 err |= control(file, "negate", m_negate,
911 brw_inst_3src_src1_negate(brw, inst), NULL);
912 err |= control(file, "abs", _abs, brw_inst_3src_src1_abs(brw, inst), NULL);
913
914 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
915 brw_inst_3src_src1_reg_nr(brw, inst));
916 if (err == -1)
917 return 0;
918 if (src1_subreg_nr)
919 format(file, ".%d", src1_subreg_nr);
920 if (brw_inst_3src_src1_rep_ctrl(brw, inst))
921 string(file, "<0,1,0>");
922 else
923 string(file, "<4,4,1>");
924 err |= control(file, "src da16 reg type", three_source_reg_encoding,
925 brw_inst_3src_src_type(brw, inst), NULL);
926 err |= src_swizzle(file, brw_inst_3src_src1_swizzle(brw, inst));
927 return err;
928 }
929
930
931 static int
932 src2_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
933 {
934 int err = 0;
935 unsigned src2_subreg_nr = brw_inst_3src_src2_subreg_nr(brw, inst);
936
937 err |= control(file, "negate", m_negate,
938 brw_inst_3src_src2_negate(brw, inst), NULL);
939 err |= control(file, "abs", _abs, brw_inst_3src_src2_abs(brw, inst), NULL);
940
941 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
942 brw_inst_3src_src2_reg_nr(brw, inst));
943 if (err == -1)
944 return 0;
945 if (src2_subreg_nr)
946 format(file, ".%d", src2_subreg_nr);
947 if (brw_inst_3src_src2_rep_ctrl(brw, inst))
948 string(file, "<0,1,0>");
949 else
950 string(file, "<4,4,1>");
951 err |= control(file, "src da16 reg type", three_source_reg_encoding,
952 brw_inst_3src_src_type(brw, inst), NULL);
953 err |= src_swizzle(file, brw_inst_3src_src2_swizzle(brw, inst));
954 return err;
955 }
956
957 static int
958 imm(FILE *file, struct brw_context *brw, unsigned type, brw_inst *inst)
959 {
960 switch (type) {
961 case BRW_HW_REG_TYPE_UD:
962 format(file, "0x%08xUD", brw_inst_imm_ud(brw, inst));
963 break;
964 case BRW_HW_REG_TYPE_D:
965 format(file, "%dD", brw_inst_imm_d(brw, inst));
966 break;
967 case BRW_HW_REG_TYPE_UW:
968 format(file, "0x%04xUW", (uint16_t) brw_inst_imm_ud(brw, inst));
969 break;
970 case BRW_HW_REG_TYPE_W:
971 format(file, "%dW", (int16_t) brw_inst_imm_d(brw, inst));
972 break;
973 case BRW_HW_REG_IMM_TYPE_UV:
974 format(file, "0x%08xUV", brw_inst_imm_ud(brw, inst));
975 break;
976 case BRW_HW_REG_IMM_TYPE_VF:
977 format(file, "Vector Float");
978 break;
979 case BRW_HW_REG_IMM_TYPE_V:
980 format(file, "0x%08xV", brw_inst_imm_ud(brw, inst));
981 break;
982 case BRW_HW_REG_TYPE_F:
983 format(file, "%-gF", brw_inst_imm_f(brw, inst));
984 break;
985 case GEN8_HW_REG_IMM_TYPE_DF:
986 string(file, "Double IMM");
987 break;
988 case GEN8_HW_REG_IMM_TYPE_HF:
989 string(file, "Half Float IMM");
990 break;
991 }
992 return 0;
993 }
994
995 static int
996 src0(FILE *file, struct brw_context *brw, brw_inst *inst)
997 {
998 if (brw_inst_src0_reg_file(brw, inst) == BRW_IMMEDIATE_VALUE) {
999 return imm(file, brw, brw_inst_src0_reg_type(brw, inst), inst);
1000 } else if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
1001 if (brw_inst_src0_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
1002 return src_da1(file,
1003 brw,
1004 brw_inst_opcode(brw, inst),
1005 brw_inst_src0_reg_type(brw, inst),
1006 brw_inst_src0_reg_file(brw, inst),
1007 brw_inst_src0_vstride(brw, inst),
1008 brw_inst_src0_width(brw, inst),
1009 brw_inst_src0_hstride(brw, inst),
1010 brw_inst_src0_da_reg_nr(brw, inst),
1011 brw_inst_src0_da1_subreg_nr(brw, inst),
1012 brw_inst_src0_abs(brw, inst),
1013 brw_inst_src0_negate(brw, inst));
1014 } else {
1015 return src_ia1(file,
1016 brw,
1017 brw_inst_opcode(brw, inst),
1018 brw_inst_src0_reg_type(brw, inst),
1019 brw_inst_src0_reg_file(brw, inst),
1020 brw_inst_src0_ia1_addr_imm(brw, inst),
1021 brw_inst_src0_ia_subreg_nr(brw, inst),
1022 brw_inst_src0_negate(brw, inst),
1023 brw_inst_src0_abs(brw, inst),
1024 brw_inst_src0_address_mode(brw, inst),
1025 brw_inst_src0_hstride(brw, inst),
1026 brw_inst_src0_width(brw, inst),
1027 brw_inst_src0_vstride(brw, inst));
1028 }
1029 } else {
1030 if (brw_inst_src0_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
1031 return src_da16(file,
1032 brw,
1033 brw_inst_opcode(brw, inst),
1034 brw_inst_src0_reg_type(brw, inst),
1035 brw_inst_src0_reg_file(brw, inst),
1036 brw_inst_src0_vstride(brw, inst),
1037 brw_inst_src0_da_reg_nr(brw, inst),
1038 brw_inst_src0_da16_subreg_nr(brw, inst),
1039 brw_inst_src0_abs(brw, inst),
1040 brw_inst_src0_negate(brw, inst),
1041 brw_inst_src0_da16_swiz_x(brw, inst),
1042 brw_inst_src0_da16_swiz_y(brw, inst),
1043 brw_inst_src0_da16_swiz_z(brw, inst),
1044 brw_inst_src0_da16_swiz_w(brw, inst));
1045 } else {
1046 string(file, "Indirect align16 address mode not supported");
1047 return 1;
1048 }
1049 }
1050 }
1051
1052 static int
1053 src1(FILE *file, struct brw_context *brw, brw_inst *inst)
1054 {
1055 if (brw_inst_src1_reg_file(brw, inst) == BRW_IMMEDIATE_VALUE) {
1056 return imm(file, brw, brw_inst_src1_reg_type(brw, inst), inst);
1057 } else if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
1058 if (brw_inst_src1_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
1059 return src_da1(file,
1060 brw,
1061 brw_inst_opcode(brw, inst),
1062 brw_inst_src1_reg_type(brw, inst),
1063 brw_inst_src1_reg_file(brw, inst),
1064 brw_inst_src1_vstride(brw, inst),
1065 brw_inst_src1_width(brw, inst),
1066 brw_inst_src1_hstride(brw, inst),
1067 brw_inst_src1_da_reg_nr(brw, inst),
1068 brw_inst_src1_da1_subreg_nr(brw, inst),
1069 brw_inst_src1_abs(brw, inst),
1070 brw_inst_src1_negate(brw, inst));
1071 } else {
1072 return src_ia1(file,
1073 brw,
1074 brw_inst_opcode(brw, inst),
1075 brw_inst_src1_reg_type(brw, inst),
1076 brw_inst_src1_reg_file(brw, inst),
1077 brw_inst_src1_ia1_addr_imm(brw, inst),
1078 brw_inst_src1_ia_subreg_nr(brw, inst),
1079 brw_inst_src1_negate(brw, inst),
1080 brw_inst_src1_abs(brw, inst),
1081 brw_inst_src1_address_mode(brw, inst),
1082 brw_inst_src1_hstride(brw, inst),
1083 brw_inst_src1_width(brw, inst),
1084 brw_inst_src1_vstride(brw, inst));
1085 }
1086 } else {
1087 if (brw_inst_src1_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
1088 return src_da16(file,
1089 brw,
1090 brw_inst_opcode(brw, inst),
1091 brw_inst_src1_reg_type(brw, inst),
1092 brw_inst_src1_reg_file(brw, inst),
1093 brw_inst_src1_vstride(brw, inst),
1094 brw_inst_src1_da_reg_nr(brw, inst),
1095 brw_inst_src1_da16_subreg_nr(brw, inst),
1096 brw_inst_src1_abs(brw, inst),
1097 brw_inst_src1_negate(brw, inst),
1098 brw_inst_src1_da16_swiz_x(brw, inst),
1099 brw_inst_src1_da16_swiz_y(brw, inst),
1100 brw_inst_src1_da16_swiz_z(brw, inst),
1101 brw_inst_src1_da16_swiz_w(brw, inst));
1102 } else {
1103 string(file, "Indirect align16 address mode not supported");
1104 return 1;
1105 }
1106 }
1107 }
1108
1109 static int
1110 qtr_ctrl(FILE *file, struct brw_context *brw, brw_inst *inst)
1111 {
1112 int qtr_ctl = brw_inst_qtr_control(brw, inst);
1113 int exec_size = 1 << brw_inst_exec_size(brw, inst);
1114
1115 if (exec_size == 8) {
1116 switch (qtr_ctl) {
1117 case 0:
1118 string(file, " 1Q");
1119 break;
1120 case 1:
1121 string(file, " 2Q");
1122 break;
1123 case 2:
1124 string(file, " 3Q");
1125 break;
1126 case 3:
1127 string(file, " 4Q");
1128 break;
1129 }
1130 } else if (exec_size == 16) {
1131 if (qtr_ctl < 2)
1132 string(file, " 1H");
1133 else
1134 string(file, " 2H");
1135 }
1136 return 0;
1137 }
1138
1139 int
1140 brw_disassemble_inst(FILE *file, struct brw_context *brw, brw_inst *inst,
1141 bool is_compacted)
1142 {
1143 int err = 0;
1144 int space = 0;
1145
1146 const enum opcode opcode = brw_inst_opcode(brw, inst);
1147
1148 if (brw_inst_pred_control(brw, inst)) {
1149 string(file, "(");
1150 err |= control(file, "predicate inverse", pred_inv,
1151 brw_inst_pred_inv(brw, inst), NULL);
1152 format(file, "f%d", brw->gen >= 7 ? brw_inst_flag_reg_nr(brw, inst) : 0);
1153 if (brw_inst_flag_subreg_nr(brw, inst))
1154 format(file, ".%d", brw_inst_flag_subreg_nr(brw, inst));
1155 if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
1156 err |= control(file, "predicate control align1", pred_ctrl_align1,
1157 brw_inst_pred_control(brw, inst), NULL);
1158 } else {
1159 err |= control(file, "predicate control align16", pred_ctrl_align16,
1160 brw_inst_pred_control(brw, inst), NULL);
1161 }
1162 string(file, ") ");
1163 }
1164
1165 err |= print_opcode(file, opcode);
1166 err |= control(file, "saturate", saturate, brw_inst_saturate(brw, inst),
1167 NULL);
1168
1169 err |= control(file, "debug control", debug_ctrl,
1170 brw_inst_debug_control(brw, inst), NULL);
1171
1172 if (opcode == BRW_OPCODE_MATH) {
1173 string(file, " ");
1174 err |= control(file, "function", math_function,
1175 brw_inst_math_function(brw, inst), NULL);
1176 } else if (opcode != BRW_OPCODE_SEND && opcode != BRW_OPCODE_SENDC) {
1177 err |= control(file, "conditional modifier", conditional_modifier,
1178 brw_inst_cond_modifier(brw, inst), NULL);
1179
1180 /* If we're using the conditional modifier, print which flags reg is
1181 * used for it. Note that on gen6+, the embedded-condition SEL and
1182 * control flow doesn't update flags.
1183 */
1184 if (brw_inst_cond_modifier(brw, inst) &&
1185 (brw->gen < 6 || (opcode != BRW_OPCODE_SEL &&
1186 opcode != BRW_OPCODE_IF &&
1187 opcode != BRW_OPCODE_WHILE))) {
1188 format(file, ".f%d",
1189 brw->gen >= 7 ? brw_inst_flag_reg_nr(brw, inst) : 0);
1190 if (brw_inst_flag_subreg_nr(brw, inst))
1191 format(file, ".%d", brw_inst_flag_subreg_nr(brw, inst));
1192 }
1193 }
1194
1195 if (opcode != BRW_OPCODE_NOP) {
1196 string(file, "(");
1197 err |= control(file, "execution size", exec_size,
1198 brw_inst_exec_size(brw, inst), NULL);
1199 string(file, ")");
1200 }
1201
1202 if (opcode == BRW_OPCODE_SEND && brw->gen < 6)
1203 format(file, " %d", brw_inst_base_mrf(brw, inst));
1204
1205 if (has_uip(brw, opcode)) {
1206 /* Instructions that have UIP also have JIP. */
1207 pad(file, 16);
1208 format(file, "JIP: %d", brw_inst_jip(brw, inst));
1209 pad(file, 32);
1210 format(file, "UIP: %d", brw_inst_uip(brw, inst));
1211 } else if (has_jip(brw, opcode)) {
1212 pad(file, 16);
1213 if (brw->gen >= 7) {
1214 format(file, "JIP: %d", brw_inst_jip(brw, inst));
1215 } else {
1216 format(file, "JIP: %d", brw_inst_gen6_jump_count(brw, inst));
1217 }
1218 } else if (brw->gen < 6 && (opcode == BRW_OPCODE_BREAK ||
1219 opcode == BRW_OPCODE_CONTINUE ||
1220 opcode == BRW_OPCODE_ELSE)) {
1221 pad(file, 16);
1222 format(file, "Jump: %d", brw_inst_gen4_jump_count(brw, inst));
1223 pad(file, 32);
1224 format(file, "Pop: %d", brw_inst_gen4_pop_count(brw, inst));
1225 } else if (brw->gen < 6 && (opcode == BRW_OPCODE_IF ||
1226 opcode == BRW_OPCODE_IFF ||
1227 opcode == BRW_OPCODE_HALT)) {
1228 pad(file, 16);
1229 format(file, "Jump: %d", brw_inst_gen4_pop_count(brw, inst));
1230 } else if (brw->gen < 6 && opcode == BRW_OPCODE_ENDIF) {
1231 pad(file, 16);
1232 format(file, "Pop: %d", brw_inst_gen4_pop_count(brw, inst));
1233 } else if (opcode == BRW_OPCODE_JMPI) {
1234 format(file, " %d", brw_inst_imm_d(brw, inst));
1235 } else if (opcode_descs[opcode].nsrc == 3) {
1236 pad(file, 16);
1237 err |= dest_3src(file, brw, inst);
1238
1239 pad(file, 32);
1240 err |= src0_3src(file, brw, inst);
1241
1242 pad(file, 48);
1243 err |= src1_3src(file, brw, inst);
1244
1245 pad(file, 64);
1246 err |= src2_3src(file, brw, inst);
1247 } else {
1248 if (opcode_descs[opcode].ndst > 0) {
1249 pad(file, 16);
1250 err |= dest(file, brw, inst);
1251 }
1252
1253 if (opcode_descs[opcode].nsrc > 0) {
1254 pad(file, 32);
1255 err |= src0(file, brw, inst);
1256 }
1257
1258 if (opcode_descs[opcode].nsrc > 1) {
1259 pad(file, 48);
1260 err |= src1(file, brw, inst);
1261 }
1262 }
1263
1264 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) {
1265 enum brw_message_target target = brw_inst_sfid(brw, inst);
1266
1267 newline(file);
1268 pad(file, 16);
1269 space = 0;
1270
1271 fprintf(file, " ");
1272 if (brw->gen >= 6) {
1273 err |= control(file, "target function", target_function_gen6,
1274 target, &space);
1275 } else {
1276 err |= control(file, "target function", target_function,
1277 target, &space);
1278 }
1279
1280 switch (target) {
1281 case BRW_SFID_MATH:
1282 err |= control(file, "math function", math_function,
1283 brw_inst_math_msg_function(brw, inst), &space);
1284 err |= control(file, "math saturate", math_saturate,
1285 brw_inst_math_msg_saturate(brw, inst), &space);
1286 err |= control(file, "math signed", math_signed,
1287 brw_inst_math_msg_signed_int(brw, inst), &space);
1288 err |= control(file, "math scalar", math_scalar,
1289 brw_inst_math_msg_data_type(brw, inst), &space);
1290 err |= control(file, "math precision", math_precision,
1291 brw_inst_math_msg_precision(brw, inst), &space);
1292 break;
1293 case BRW_SFID_SAMPLER:
1294 if (brw->gen >= 5) {
1295 format(file, " (%d, %d, %d, %d)",
1296 brw_inst_binding_table_index(brw, inst),
1297 brw_inst_sampler(brw, inst),
1298 brw_inst_sampler_msg_type(brw, inst),
1299 brw_inst_sampler_simd_mode(brw, inst));
1300 } else {
1301 format(file, " (%d, %d, %d, ",
1302 brw_inst_binding_table_index(brw, inst),
1303 brw_inst_sampler(brw, inst),
1304 brw_inst_sampler_msg_type(brw, inst));
1305 if (!brw->is_g4x) {
1306 err |= control(file, "sampler target format",
1307 sampler_target_format,
1308 brw_inst_sampler_return_format(brw, inst), NULL);
1309 }
1310 string(file, ")");
1311 }
1312 break;
1313 case BRW_SFID_DATAPORT_READ:
1314 if (brw->gen >= 6) {
1315 format(file, " (%d, %d, %d, %d)",
1316 brw_inst_binding_table_index(brw, inst),
1317 brw_inst_dp_msg_control(brw, inst),
1318 brw_inst_dp_msg_type(brw, inst),
1319 brw->gen >= 7 ? 0 : brw_inst_dp_write_commit(brw, inst));
1320 } else {
1321 format(file, " (%d, %d, %d)",
1322 brw_inst_binding_table_index(brw, inst),
1323 brw_inst_dp_read_msg_control(brw, inst),
1324 brw_inst_dp_read_msg_type(brw, inst));
1325 }
1326 break;
1327
1328 case BRW_SFID_DATAPORT_WRITE:
1329 if (brw->gen >= 7) {
1330 format(file, " (");
1331
1332 err |= control(file, "DP rc message type",
1333 dp_rc_msg_type_gen6,
1334 brw_inst_dp_msg_type(brw, inst), &space);
1335
1336 format(file, ", %d, %d, %d)",
1337 brw_inst_binding_table_index(brw, inst),
1338 brw_inst_dp_msg_control(brw, inst),
1339 brw_inst_dp_msg_type(brw, inst));
1340 } else if (brw->gen == 6) {
1341 format(file, " (");
1342
1343 err |= control(file, "DP rc message type",
1344 dp_rc_msg_type_gen6,
1345 brw_inst_dp_msg_type(brw, inst), &space);
1346
1347 format(file, ", %d, %d, %d, %d)",
1348 brw_inst_binding_table_index(brw, inst),
1349 brw_inst_dp_msg_control(brw, inst),
1350 brw_inst_dp_msg_type(brw, inst),
1351 brw_inst_dp_write_commit(brw, inst));
1352 } else {
1353 format(file, " (%d, %d, %d, %d)",
1354 brw_inst_binding_table_index(brw, inst),
1355 (brw_inst_rt_last(brw, inst) << 3) |
1356 brw_inst_dp_write_msg_control(brw, inst),
1357 brw_inst_dp_write_msg_type(brw, inst),
1358 brw_inst_dp_write_commit(brw, inst));
1359 }
1360 break;
1361
1362 case BRW_SFID_URB:
1363 format(file, " %d", brw_inst_urb_global_offset(brw, inst));
1364
1365 space = 1;
1366 if (brw->gen >= 7) {
1367 err |= control(file, "urb opcode", gen7_urb_opcode,
1368 brw_inst_urb_opcode(brw, inst), &space);
1369 } else if (brw->gen >= 5) {
1370 err |= control(file, "urb opcode", gen5_urb_opcode,
1371 brw_inst_urb_opcode(brw, inst), &space);
1372 }
1373 err |= control(file, "urb swizzle", urb_swizzle,
1374 brw_inst_urb_swizzle_control(brw, inst), &space);
1375 if (brw->gen < 7) {
1376 err |= control(file, "urb allocate", urb_allocate,
1377 brw_inst_urb_allocate(brw, inst), &space);
1378 err |= control(file, "urb used", urb_used,
1379 brw_inst_urb_used(brw, inst), &space);
1380 }
1381 err |= control(file, "urb complete", urb_complete,
1382 brw_inst_urb_complete(brw, inst), &space);
1383 break;
1384 case BRW_SFID_THREAD_SPAWNER:
1385 break;
1386 case GEN7_SFID_DATAPORT_DATA_CACHE:
1387 if (brw->gen >= 7) {
1388 format(file, " (");
1389
1390 err |= control(file, "DP DC0 message type",
1391 dp_dc0_msg_type_gen7,
1392 brw_inst_dp_msg_type(brw, inst), &space);
1393
1394 format(file, ", %d, ", brw_inst_binding_table_index(brw, inst));
1395
1396 switch (brw_inst_dp_msg_type(brw, inst)) {
1397 case GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP:
1398 control(file, "atomic op", aop,
1399 brw_inst_imm_ud(brw, inst) >> 8 & 0xf, &space);
1400 break;
1401 default:
1402 format(file, "%d", brw_inst_dp_msg_control(brw, inst));
1403 }
1404 format(file, ")");
1405 break;
1406 }
1407 /* FALLTHROUGH */
1408
1409 case HSW_SFID_DATAPORT_DATA_CACHE_1: {
1410 if (brw->gen >= 7) {
1411 format(file, " (");
1412
1413 unsigned msg_ctrl = brw_inst_dp_msg_control(brw, inst);
1414
1415 err |= control(file, "DP DC1 message type",
1416 dp_dc1_msg_type_hsw,
1417 brw_inst_dp_msg_type(brw, inst), &space);
1418
1419 format(file, ", Surface = %d, ",
1420 brw_inst_binding_table_index(brw, inst));
1421
1422 switch (brw_inst_dp_msg_type(brw, inst)) {
1423 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP:
1424 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP:
1425 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP:
1426 format(file, "SIMD%d,", (msg_ctrl & (1 << 4)) ? 8 : 16);
1427 /* fallthrough */
1428 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2:
1429 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2:
1430 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2:
1431 control(file, "atomic op", aop, msg_ctrl & 0xf, &space);
1432 break;
1433 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ:
1434 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE:
1435 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ:
1436 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE: {
1437 static const char *simd_modes[] = { "4x2", "16", "8" };
1438 format(file, "SIMD%s, Mask = 0x%x",
1439 simd_modes[msg_ctrl >> 4], msg_ctrl & 0xf);
1440 break;
1441 }
1442 default:
1443 format(file, "0x%x", msg_ctrl);
1444 }
1445 format(file, ")");
1446 break;
1447 }
1448 /* FALLTHROUGH */
1449 }
1450
1451 default:
1452 format(file, "unsupported target %d", target);
1453 break;
1454 }
1455 if (space)
1456 string(file, " ");
1457 format(file, "mlen %d", brw_inst_mlen(brw, inst));
1458 format(file, " rlen %d", brw_inst_rlen(brw, inst));
1459 }
1460 pad(file, 64);
1461 if (opcode != BRW_OPCODE_NOP) {
1462 string(file, "{");
1463 space = 1;
1464 err |= control(file, "access mode", access_mode,
1465 brw_inst_access_mode(brw, inst), &space);
1466 if (brw->gen >= 6) {
1467 err |= control(file, "write enable control", wectrl,
1468 brw_inst_mask_control(brw, inst), &space);
1469 } else {
1470 err |= control(file, "mask control", mask_ctrl,
1471 brw_inst_mask_control(brw, inst), &space);
1472 }
1473 err |= control(file, "dependency control", dep_ctrl,
1474 ((brw_inst_no_dd_check(brw, inst) << 1) |
1475 brw_inst_no_dd_clear(brw, inst)), &space);
1476
1477 if (brw->gen >= 6)
1478 err |= qtr_ctrl(file, brw, inst);
1479 else {
1480 if (brw_inst_qtr_control(brw, inst) == BRW_COMPRESSION_COMPRESSED &&
1481 opcode_descs[opcode].ndst > 0 &&
1482 brw_inst_dst_reg_file(brw, inst) == BRW_MESSAGE_REGISTER_FILE &&
1483 brw_inst_dst_da_reg_nr(brw, inst) & (1 << 7)) {
1484 format(file, " compr4");
1485 } else {
1486 err |= control(file, "compression control", compr_ctrl,
1487 brw_inst_qtr_control(brw, inst), &space);
1488 }
1489 }
1490
1491 err |= control(file, "compaction", cmpt_ctrl, is_compacted, &space);
1492 err |= control(file, "thread control", thread_ctrl,
1493 brw_inst_thread_control(brw, inst), &space);
1494 if (brw->gen >= 6)
1495 err |= control(file, "acc write control", accwr,
1496 brw_inst_acc_wr_control(brw, inst), &space);
1497 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC)
1498 err |= control(file, "end of thread", end_of_thread,
1499 brw_inst_eot(brw, inst), &space);
1500 if (space)
1501 string(file, " ");
1502 string(file, "}");
1503 }
1504 string(file, ";");
1505 newline(file);
1506 return err;
1507 }