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i965/disasm: Improve render target write message disassembly.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_disasm.c
1 /*
2 * Copyright © 2008 Keith Packard
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
13 *
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20 * OF THIS SOFTWARE.
21 */
22
23 #include <stdio.h>
24 #include <stdlib.h>
25 #include <string.h>
26 #include <getopt.h>
27 #include <unistd.h>
28 #include <stdarg.h>
29
30 #include "brw_context.h"
31 #include "brw_defines.h"
32 #include "brw_reg.h"
33 #include "brw_inst.h"
34
35 const struct opcode_desc opcode_descs[128] = {
36 [BRW_OPCODE_MOV] = { .name = "mov", .nsrc = 1, .ndst = 1 },
37 [BRW_OPCODE_FRC] = { .name = "frc", .nsrc = 1, .ndst = 1 },
38 [BRW_OPCODE_RNDU] = { .name = "rndu", .nsrc = 1, .ndst = 1 },
39 [BRW_OPCODE_RNDD] = { .name = "rndd", .nsrc = 1, .ndst = 1 },
40 [BRW_OPCODE_RNDE] = { .name = "rnde", .nsrc = 1, .ndst = 1 },
41 [BRW_OPCODE_RNDZ] = { .name = "rndz", .nsrc = 1, .ndst = 1 },
42 [BRW_OPCODE_NOT] = { .name = "not", .nsrc = 1, .ndst = 1 },
43 [BRW_OPCODE_LZD] = { .name = "lzd", .nsrc = 1, .ndst = 1 },
44 [BRW_OPCODE_F32TO16] = { .name = "f32to16", .nsrc = 1, .ndst = 1 },
45 [BRW_OPCODE_F16TO32] = { .name = "f16to32", .nsrc = 1, .ndst = 1 },
46 [BRW_OPCODE_BFREV] = { .name = "bfrev", .nsrc = 1, .ndst = 1 },
47 [BRW_OPCODE_FBH] = { .name = "fbh", .nsrc = 1, .ndst = 1 },
48 [BRW_OPCODE_FBL] = { .name = "fbl", .nsrc = 1, .ndst = 1 },
49 [BRW_OPCODE_CBIT] = { .name = "cbit", .nsrc = 1, .ndst = 1 },
50
51 [BRW_OPCODE_MUL] = { .name = "mul", .nsrc = 2, .ndst = 1 },
52 [BRW_OPCODE_MAC] = { .name = "mac", .nsrc = 2, .ndst = 1 },
53 [BRW_OPCODE_MACH] = { .name = "mach", .nsrc = 2, .ndst = 1 },
54 [BRW_OPCODE_LINE] = { .name = "line", .nsrc = 2, .ndst = 1 },
55 [BRW_OPCODE_PLN] = { .name = "pln", .nsrc = 2, .ndst = 1 },
56 [BRW_OPCODE_MAD] = { .name = "mad", .nsrc = 3, .ndst = 1 },
57 [BRW_OPCODE_LRP] = { .name = "lrp", .nsrc = 3, .ndst = 1 },
58 [BRW_OPCODE_SAD2] = { .name = "sad2", .nsrc = 2, .ndst = 1 },
59 [BRW_OPCODE_SADA2] = { .name = "sada2", .nsrc = 2, .ndst = 1 },
60 [BRW_OPCODE_DP4] = { .name = "dp4", .nsrc = 2, .ndst = 1 },
61 [BRW_OPCODE_DPH] = { .name = "dph", .nsrc = 2, .ndst = 1 },
62 [BRW_OPCODE_DP3] = { .name = "dp3", .nsrc = 2, .ndst = 1 },
63 [BRW_OPCODE_DP2] = { .name = "dp2", .nsrc = 2, .ndst = 1 },
64 [BRW_OPCODE_MATH] = { .name = "math", .nsrc = 2, .ndst = 1 },
65
66 [BRW_OPCODE_AVG] = { .name = "avg", .nsrc = 2, .ndst = 1 },
67 [BRW_OPCODE_ADD] = { .name = "add", .nsrc = 2, .ndst = 1 },
68 [BRW_OPCODE_SEL] = { .name = "sel", .nsrc = 2, .ndst = 1 },
69 [BRW_OPCODE_AND] = { .name = "and", .nsrc = 2, .ndst = 1 },
70 [BRW_OPCODE_OR] = { .name = "or", .nsrc = 2, .ndst = 1 },
71 [BRW_OPCODE_XOR] = { .name = "xor", .nsrc = 2, .ndst = 1 },
72 [BRW_OPCODE_SHR] = { .name = "shr", .nsrc = 2, .ndst = 1 },
73 [BRW_OPCODE_SHL] = { .name = "shl", .nsrc = 2, .ndst = 1 },
74 [BRW_OPCODE_ASR] = { .name = "asr", .nsrc = 2, .ndst = 1 },
75 [BRW_OPCODE_CMP] = { .name = "cmp", .nsrc = 2, .ndst = 1 },
76 [BRW_OPCODE_CMPN] = { .name = "cmpn", .nsrc = 2, .ndst = 1 },
77 [BRW_OPCODE_BFE] = { .name = "bfe", .nsrc = 3, .ndst = 1 },
78 [BRW_OPCODE_BFI1] = { .name = "bfi1", .nsrc = 2, .ndst = 1 },
79 [BRW_OPCODE_BFI2] = { .name = "bfi2", .nsrc = 3, .ndst = 1 },
80 [BRW_OPCODE_ADDC] = { .name = "addc", .nsrc = 2, .ndst = 1 },
81 [BRW_OPCODE_SUBB] = { .name = "subb", .nsrc = 2, .ndst = 1 },
82
83 [BRW_OPCODE_SEND] = { .name = "send", .nsrc = 1, .ndst = 1 },
84 [BRW_OPCODE_SENDC] = { .name = "sendc", .nsrc = 1, .ndst = 1 },
85 [BRW_OPCODE_NOP] = { .name = "nop", .nsrc = 0, .ndst = 0 },
86 [BRW_OPCODE_JMPI] = { .name = "jmpi", .nsrc = 0, .ndst = 0 },
87 [BRW_OPCODE_IF] = { .name = "if", .nsrc = 2, .ndst = 0 },
88 [BRW_OPCODE_IFF] = { .name = "iff", .nsrc = 2, .ndst = 1 },
89 [BRW_OPCODE_WHILE] = { .name = "while", .nsrc = 2, .ndst = 0 },
90 [BRW_OPCODE_ELSE] = { .name = "else", .nsrc = 2, .ndst = 0 },
91 [BRW_OPCODE_BREAK] = { .name = "break", .nsrc = 2, .ndst = 0 },
92 [BRW_OPCODE_CONTINUE] = { .name = "cont", .nsrc = 1, .ndst = 0 },
93 [BRW_OPCODE_HALT] = { .name = "halt", .nsrc = 1, .ndst = 0 },
94 [BRW_OPCODE_MSAVE] = { .name = "msave", .nsrc = 1, .ndst = 1 },
95 [BRW_OPCODE_PUSH] = { .name = "push", .nsrc = 1, .ndst = 1 },
96 [BRW_OPCODE_MRESTORE] = { .name = "mrest", .nsrc = 1, .ndst = 1 },
97 [BRW_OPCODE_POP] = { .name = "pop", .nsrc = 2, .ndst = 0 },
98 [BRW_OPCODE_WAIT] = { .name = "wait", .nsrc = 1, .ndst = 0 },
99 [BRW_OPCODE_DO] = { .name = "do", .nsrc = 0, .ndst = 0 },
100 [BRW_OPCODE_ENDIF] = { .name = "endif", .nsrc = 2, .ndst = 0 },
101 };
102
103 static bool
104 has_jip(struct brw_context *brw, enum opcode opcode)
105 {
106 if (brw->gen < 6)
107 return false;
108
109 return opcode == BRW_OPCODE_IF ||
110 opcode == BRW_OPCODE_ELSE ||
111 opcode == BRW_OPCODE_ENDIF ||
112 opcode == BRW_OPCODE_WHILE;
113 }
114
115 static bool
116 has_uip(struct brw_context *brw, enum opcode opcode)
117 {
118 if (brw->gen < 6)
119 return false;
120
121 return (brw->gen >= 7 && opcode == BRW_OPCODE_IF) ||
122 (brw->gen >= 8 && opcode == BRW_OPCODE_ELSE) ||
123 opcode == BRW_OPCODE_BREAK ||
124 opcode == BRW_OPCODE_CONTINUE ||
125 opcode == BRW_OPCODE_HALT;
126 }
127
128 static bool
129 is_logic_instruction(unsigned opcode)
130 {
131 return opcode == BRW_OPCODE_AND ||
132 opcode == BRW_OPCODE_NOT ||
133 opcode == BRW_OPCODE_OR ||
134 opcode == BRW_OPCODE_XOR;
135 }
136
137 const char *const conditional_modifier[16] = {
138 [BRW_CONDITIONAL_NONE] = "",
139 [BRW_CONDITIONAL_Z] = ".e",
140 [BRW_CONDITIONAL_NZ] = ".ne",
141 [BRW_CONDITIONAL_G] = ".g",
142 [BRW_CONDITIONAL_GE] = ".ge",
143 [BRW_CONDITIONAL_L] = ".l",
144 [BRW_CONDITIONAL_LE] = ".le",
145 [BRW_CONDITIONAL_R] = ".r",
146 [BRW_CONDITIONAL_O] = ".o",
147 [BRW_CONDITIONAL_U] = ".u",
148 };
149
150 static const char *const m_negate[2] = {
151 [0] = "",
152 [1] = "-",
153 };
154
155 static const char *const _abs[2] = {
156 [0] = "",
157 [1] = "(abs)",
158 };
159
160 static const char *const m_bitnot[2] = { "", "~" };
161
162 static const char *const vert_stride[16] = {
163 [0] = "0",
164 [1] = "1",
165 [2] = "2",
166 [3] = "4",
167 [4] = "8",
168 [5] = "16",
169 [6] = "32",
170 [15] = "VxH",
171 };
172
173 static const char *const width[8] = {
174 [0] = "1",
175 [1] = "2",
176 [2] = "4",
177 [3] = "8",
178 [4] = "16",
179 };
180
181 static const char *const horiz_stride[4] = {
182 [0] = "0",
183 [1] = "1",
184 [2] = "2",
185 [3] = "4"
186 };
187
188 static const char *const chan_sel[4] = {
189 [0] = "x",
190 [1] = "y",
191 [2] = "z",
192 [3] = "w",
193 };
194
195 static const char *const debug_ctrl[2] = {
196 [0] = "",
197 [1] = ".breakpoint"
198 };
199
200 static const char *const saturate[2] = {
201 [0] = "",
202 [1] = ".sat"
203 };
204
205 static const char *const cmpt_ctrl[2] = {
206 [0] = "",
207 [1] = "compacted"
208 };
209
210 static const char *const accwr[2] = {
211 [0] = "",
212 [1] = "AccWrEnable"
213 };
214
215 static const char *const wectrl[2] = {
216 [0] = "WE_normal",
217 [1] = "WE_all"
218 };
219
220 static const char *const exec_size[8] = {
221 [0] = "1",
222 [1] = "2",
223 [2] = "4",
224 [3] = "8",
225 [4] = "16",
226 [5] = "32"
227 };
228
229 static const char *const pred_inv[2] = {
230 [0] = "+",
231 [1] = "-"
232 };
233
234 static const char *const pred_ctrl_align16[16] = {
235 [1] = "",
236 [2] = ".x",
237 [3] = ".y",
238 [4] = ".z",
239 [5] = ".w",
240 [6] = ".any4h",
241 [7] = ".all4h",
242 };
243
244 static const char *const pred_ctrl_align1[16] = {
245 [BRW_PREDICATE_NORMAL] = "",
246 [BRW_PREDICATE_ALIGN1_ANYV] = ".anyv",
247 [BRW_PREDICATE_ALIGN1_ALLV] = ".allv",
248 [BRW_PREDICATE_ALIGN1_ANY2H] = ".any2h",
249 [BRW_PREDICATE_ALIGN1_ALL2H] = ".all2h",
250 [BRW_PREDICATE_ALIGN1_ANY4H] = ".any4h",
251 [BRW_PREDICATE_ALIGN1_ALL4H] = ".all4h",
252 [BRW_PREDICATE_ALIGN1_ANY8H] = ".any8h",
253 [BRW_PREDICATE_ALIGN1_ALL8H] = ".all8h",
254 [BRW_PREDICATE_ALIGN1_ANY16H] = ".any16h",
255 [BRW_PREDICATE_ALIGN1_ANY16H] = ".all16h",
256 [BRW_PREDICATE_ALIGN1_ANY32H] = ".any32h",
257 [BRW_PREDICATE_ALIGN1_ANY32H] = ".all32h",
258 };
259
260 static const char *const thread_ctrl[4] = {
261 [BRW_THREAD_NORMAL] = "",
262 [BRW_THREAD_ATOMIC] = "atomic",
263 [BRW_THREAD_SWITCH] = "switch",
264 };
265
266 static const char *const compr_ctrl[4] = {
267 [0] = "",
268 [1] = "sechalf",
269 [2] = "compr",
270 [3] = "compr4",
271 };
272
273 static const char *const dep_ctrl[4] = {
274 [0] = "",
275 [1] = "NoDDClr",
276 [2] = "NoDDChk",
277 [3] = "NoDDClr,NoDDChk",
278 };
279
280 static const char *const mask_ctrl[4] = {
281 [0] = "",
282 [1] = "nomask",
283 };
284
285 static const char *const access_mode[2] = {
286 [0] = "align1",
287 [1] = "align16",
288 };
289
290 static const char * const reg_encoding[] = {
291 [BRW_HW_REG_TYPE_UD] = "UD",
292 [BRW_HW_REG_TYPE_D] = "D",
293 [BRW_HW_REG_TYPE_UW] = "UW",
294 [BRW_HW_REG_TYPE_W] = "W",
295 [BRW_HW_REG_NON_IMM_TYPE_UB] = "UB",
296 [BRW_HW_REG_NON_IMM_TYPE_B] = "B",
297 [GEN7_HW_REG_NON_IMM_TYPE_DF] = "DF",
298 [BRW_HW_REG_TYPE_F] = "F",
299 [GEN8_HW_REG_TYPE_UQ] = "UQ",
300 [GEN8_HW_REG_TYPE_Q] = "Q",
301 [GEN8_HW_REG_NON_IMM_TYPE_HF] = "HF",
302 };
303
304 static const char *const three_source_reg_encoding[] = {
305 [BRW_3SRC_TYPE_F] = "F",
306 [BRW_3SRC_TYPE_D] = "D",
307 [BRW_3SRC_TYPE_UD] = "UD",
308 };
309
310 const int reg_type_size[] = {
311 [BRW_HW_REG_TYPE_UD] = 4,
312 [BRW_HW_REG_TYPE_D] = 4,
313 [BRW_HW_REG_TYPE_UW] = 2,
314 [BRW_HW_REG_TYPE_W] = 2,
315 [BRW_HW_REG_NON_IMM_TYPE_UB] = 1,
316 [BRW_HW_REG_NON_IMM_TYPE_B] = 1,
317 [GEN7_HW_REG_NON_IMM_TYPE_DF] = 8,
318 [BRW_HW_REG_TYPE_F] = 4,
319 [GEN8_HW_REG_TYPE_UQ] = 8,
320 [GEN8_HW_REG_TYPE_Q] = 8,
321 [GEN8_HW_REG_NON_IMM_TYPE_HF] = 2,
322 };
323
324 static const char *const reg_file[4] = {
325 [0] = "A",
326 [1] = "g",
327 [2] = "m",
328 [3] = "imm",
329 };
330
331 static const char *const writemask[16] = {
332 [0x0] = ".",
333 [0x1] = ".x",
334 [0x2] = ".y",
335 [0x3] = ".xy",
336 [0x4] = ".z",
337 [0x5] = ".xz",
338 [0x6] = ".yz",
339 [0x7] = ".xyz",
340 [0x8] = ".w",
341 [0x9] = ".xw",
342 [0xa] = ".yw",
343 [0xb] = ".xyw",
344 [0xc] = ".zw",
345 [0xd] = ".xzw",
346 [0xe] = ".yzw",
347 [0xf] = "",
348 };
349
350 static const char *const end_of_thread[2] = {
351 [0] = "",
352 [1] = "EOT"
353 };
354
355 /* SFIDs on Gen4-5 */
356 static const char *const gen4_sfid[16] = {
357 [BRW_SFID_NULL] = "null",
358 [BRW_SFID_MATH] = "math",
359 [BRW_SFID_SAMPLER] = "sampler",
360 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
361 [BRW_SFID_DATAPORT_READ] = "read",
362 [BRW_SFID_DATAPORT_WRITE] = "write",
363 [BRW_SFID_URB] = "urb",
364 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
365 [BRW_SFID_VME] = "vme",
366 };
367
368 static const char *const gen6_sfid[16] = {
369 [BRW_SFID_NULL] = "null",
370 [BRW_SFID_MATH] = "math",
371 [BRW_SFID_SAMPLER] = "sampler",
372 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
373 [BRW_SFID_URB] = "urb",
374 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
375 [GEN6_SFID_DATAPORT_SAMPLER_CACHE] = "sampler",
376 [GEN6_SFID_DATAPORT_RENDER_CACHE] = "render",
377 [GEN6_SFID_DATAPORT_CONSTANT_CACHE] = "const",
378 [GEN7_SFID_DATAPORT_DATA_CACHE] = "data",
379 [GEN7_SFID_PIXEL_INTERPOLATOR] = "pixel interp",
380 [HSW_SFID_DATAPORT_DATA_CACHE_1] = "dp data 1",
381 [HSW_SFID_CRE] = "cre",
382 };
383
384 static const char *const dp_write_port_msg_type[8] = {
385 [0b000] = "OWord block write",
386 [0b001] = "OWord dual block write",
387 [0b010] = "media block write",
388 [0b011] = "DWord scattered write",
389 [0b100] = "RT write",
390 [0b101] = "streamed VB write",
391 [0b110] = "RT UNORM write", /* G45+ */
392 [0b111] = "flush render cache",
393 };
394
395 static const char *const dp_rc_msg_type_gen6[16] = {
396 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read",
397 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read",
398 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read",
399 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read",
400 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] =
401 "OWORD unaligned block read",
402 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read",
403 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write",
404 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write",
405 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] =
406 "OWORD dual block write",
407 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write",
408 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] =
409 "DWORD scattered write",
410 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write",
411 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write",
412 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORM write",
413 };
414
415 static const char *const m_rt_write_subtype[] = {
416 [0b000] = "SIMD16",
417 [0b001] = "SIMD16/RepData",
418 [0b010] = "SIMD8/DualSrcLow",
419 [0b011] = "SIMD8/DualSrcHigh",
420 [0b100] = "SIMD8",
421 [0b101] = "SIMD8/ImageWrite", /* Gen6+ */
422 [0b111] = "SIMD16/RepData-111", /* no idea how this is different than 1 */
423 };
424
425 static const char *const dp_dc0_msg_type_gen7[16] = {
426 [GEN7_DATAPORT_DC_OWORD_BLOCK_READ] = "DC OWORD block read",
427 [GEN7_DATAPORT_DC_UNALIGNED_OWORD_BLOCK_READ] =
428 "DC unaligned OWORD block read",
429 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_READ] = "DC OWORD dual block read",
430 [GEN7_DATAPORT_DC_DWORD_SCATTERED_READ] = "DC DWORD scattered read",
431 [GEN7_DATAPORT_DC_BYTE_SCATTERED_READ] = "DC byte scattered read",
432 [GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP] = "DC untyped atomic",
433 [GEN7_DATAPORT_DC_MEMORY_FENCE] = "DC mfence",
434 [GEN7_DATAPORT_DC_OWORD_BLOCK_WRITE] = "DC OWORD block write",
435 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_WRITE] = "DC OWORD dual block write",
436 [GEN7_DATAPORT_DC_DWORD_SCATTERED_WRITE] = "DC DWORD scatterd write",
437 [GEN7_DATAPORT_DC_BYTE_SCATTERED_WRITE] = "DC byte scattered write",
438 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
439 };
440
441 static const char *const dp_dc1_msg_type_hsw[16] = {
442 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ] = "untyped surface read",
443 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP] = "DC untyped atomic op",
444 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2] =
445 "DC untyped 4x2 atomic op",
446 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_READ] = "DC media block read",
447 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ] = "DC typed surface read",
448 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP] = "DC typed atomic",
449 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2] = "DC typed 4x2 atomic op",
450 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
451 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_WRITE] = "DC media block write",
452 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP] = "DC atomic counter op",
453 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2] =
454 "DC 4x2 atomic counter op",
455 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE] = "DC typed surface write",
456 };
457
458 static const char *const aop[16] = {
459 [BRW_AOP_AND] = "and",
460 [BRW_AOP_OR] = "or",
461 [BRW_AOP_XOR] = "xor",
462 [BRW_AOP_MOV] = "mov",
463 [BRW_AOP_INC] = "inc",
464 [BRW_AOP_DEC] = "dec",
465 [BRW_AOP_ADD] = "add",
466 [BRW_AOP_SUB] = "sub",
467 [BRW_AOP_REVSUB] = "revsub",
468 [BRW_AOP_IMAX] = "imax",
469 [BRW_AOP_IMIN] = "imin",
470 [BRW_AOP_UMAX] = "umax",
471 [BRW_AOP_UMIN] = "umin",
472 [BRW_AOP_CMPWR] = "cmpwr",
473 [BRW_AOP_PREDEC] = "predec",
474 };
475
476 static const char *const math_function[16] = {
477 [BRW_MATH_FUNCTION_INV] = "inv",
478 [BRW_MATH_FUNCTION_LOG] = "log",
479 [BRW_MATH_FUNCTION_EXP] = "exp",
480 [BRW_MATH_FUNCTION_SQRT] = "sqrt",
481 [BRW_MATH_FUNCTION_RSQ] = "rsq",
482 [BRW_MATH_FUNCTION_SIN] = "sin",
483 [BRW_MATH_FUNCTION_COS] = "cos",
484 [BRW_MATH_FUNCTION_SINCOS] = "sincos",
485 [BRW_MATH_FUNCTION_FDIV] = "fdiv",
486 [BRW_MATH_FUNCTION_POW] = "pow",
487 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] = "intdivmod",
488 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] = "intdiv",
489 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER] = "intmod",
490 [GEN8_MATH_FUNCTION_INVM] = "invm",
491 [GEN8_MATH_FUNCTION_RSQRTM] = "rsqrtm",
492 };
493
494 static const char *const math_saturate[2] = {
495 [0] = "",
496 [1] = "sat"
497 };
498
499 static const char *const math_signed[2] = {
500 [0] = "",
501 [1] = "signed"
502 };
503
504 static const char *const math_scalar[2] = {
505 [0] = "",
506 [1] = "scalar"
507 };
508
509 static const char *const math_precision[2] = {
510 [0] = "",
511 [1] = "partial_precision"
512 };
513
514 static const char *const gen5_urb_opcode[] = {
515 [0] = "urb_write",
516 [1] = "ff_sync",
517 };
518
519 static const char *const gen7_urb_opcode[] = {
520 [0] = "write HWord",
521 [1] = "write OWord",
522 [2] = "read HWord",
523 [3] = "read OWord",
524 [4] = "atomic mov", /* Gen7+ */
525 [5] = "atomic inc", /* Gen7+ */
526 [6] = "atomic add", /* Gen8+ */
527 [7] = "SIMD8 write", /* Gen8+ */
528 [8] = "SIMD8 read", /* Gen8+ */
529 /* [9-15] - reserved */
530 };
531
532 static const char *const urb_swizzle[4] = {
533 [BRW_URB_SWIZZLE_NONE] = "",
534 [BRW_URB_SWIZZLE_INTERLEAVE] = "interleave",
535 [BRW_URB_SWIZZLE_TRANSPOSE] = "transpose",
536 };
537
538 static const char *const urb_allocate[2] = {
539 [0] = "",
540 [1] = "allocate"
541 };
542
543 static const char *const urb_used[2] = {
544 [0] = "",
545 [1] = "used"
546 };
547
548 static const char *const urb_complete[2] = {
549 [0] = "",
550 [1] = "complete"
551 };
552
553 static const char *const sampler_target_format[4] = {
554 [0] = "F",
555 [2] = "UD",
556 [3] = "D"
557 };
558
559
560 static int column;
561
562 static int
563 string(FILE *file, const char *string)
564 {
565 fputs(string, file);
566 column += strlen(string);
567 return 0;
568 }
569
570 static int
571 format(FILE *f, const char *format, ...)
572 {
573 char buf[1024];
574 va_list args;
575 va_start(args, format);
576
577 vsnprintf(buf, sizeof(buf) - 1, format, args);
578 va_end(args);
579 string(f, buf);
580 return 0;
581 }
582
583 static int
584 newline(FILE *f)
585 {
586 putc('\n', f);
587 column = 0;
588 return 0;
589 }
590
591 static int
592 pad(FILE *f, int c)
593 {
594 do
595 string(f, " ");
596 while (column < c);
597 return 0;
598 }
599
600 static int
601 control(FILE *file, const char *name, const char *const ctrl[],
602 unsigned id, int *space)
603 {
604 if (!ctrl[id]) {
605 fprintf(file, "*** invalid %s value %d ", name, id);
606 return 1;
607 }
608 if (ctrl[id][0]) {
609 if (space && *space)
610 string(file, " ");
611 string(file, ctrl[id]);
612 if (space)
613 *space = 1;
614 }
615 return 0;
616 }
617
618 static int
619 print_opcode(FILE *file, int id)
620 {
621 if (!opcode_descs[id].name) {
622 format(file, "*** invalid opcode value %d ", id);
623 return 1;
624 }
625 string(file, opcode_descs[id].name);
626 return 0;
627 }
628
629 static int
630 reg(FILE *file, unsigned _reg_file, unsigned _reg_nr)
631 {
632 int err = 0;
633
634 /* Clear the Compr4 instruction compression bit. */
635 if (_reg_file == BRW_MESSAGE_REGISTER_FILE)
636 _reg_nr &= ~(1 << 7);
637
638 if (_reg_file == BRW_ARCHITECTURE_REGISTER_FILE) {
639 switch (_reg_nr & 0xf0) {
640 case BRW_ARF_NULL:
641 string(file, "null");
642 return -1;
643 case BRW_ARF_ADDRESS:
644 format(file, "a%d", _reg_nr & 0x0f);
645 break;
646 case BRW_ARF_ACCUMULATOR:
647 format(file, "acc%d", _reg_nr & 0x0f);
648 break;
649 case BRW_ARF_FLAG:
650 format(file, "f%d", _reg_nr & 0x0f);
651 break;
652 case BRW_ARF_MASK:
653 format(file, "mask%d", _reg_nr & 0x0f);
654 break;
655 case BRW_ARF_MASK_STACK:
656 format(file, "msd%d", _reg_nr & 0x0f);
657 break;
658 case BRW_ARF_STATE:
659 format(file, "sr%d", _reg_nr & 0x0f);
660 break;
661 case BRW_ARF_CONTROL:
662 format(file, "cr%d", _reg_nr & 0x0f);
663 break;
664 case BRW_ARF_NOTIFICATION_COUNT:
665 format(file, "n%d", _reg_nr & 0x0f);
666 break;
667 case BRW_ARF_IP:
668 string(file, "ip");
669 return -1;
670 break;
671 default:
672 format(file, "ARF%d", _reg_nr);
673 break;
674 }
675 } else {
676 err |= control(file, "src reg file", reg_file, _reg_file, NULL);
677 format(file, "%d", _reg_nr);
678 }
679 return err;
680 }
681
682 static int
683 dest(FILE *file, struct brw_context *brw, brw_inst *inst)
684 {
685 int err = 0;
686
687 if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
688 if (brw_inst_dst_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
689 err |= reg(file, brw_inst_dst_reg_file(brw, inst),
690 brw_inst_dst_da_reg_nr(brw, inst));
691 if (err == -1)
692 return 0;
693 if (brw_inst_dst_da1_subreg_nr(brw, inst))
694 format(file, ".%d", brw_inst_dst_da1_subreg_nr(brw, inst) /
695 reg_type_size[brw_inst_dst_reg_type(brw, inst)]);
696 string(file, "<");
697 err |= control(file, "horiz stride", horiz_stride,
698 brw_inst_dst_hstride(brw, inst), NULL);
699 string(file, ">");
700 err |= control(file, "dest reg encoding", reg_encoding,
701 brw_inst_dst_reg_type(brw, inst), NULL);
702 } else {
703 string(file, "g[a0");
704 if (brw_inst_dst_ia_subreg_nr(brw, inst))
705 format(file, ".%d", brw_inst_dst_ia_subreg_nr(brw, inst) /
706 reg_type_size[brw_inst_dst_reg_type(brw, inst)]);
707 if (brw_inst_dst_ia1_addr_imm(brw, inst))
708 format(file, " %d", brw_inst_dst_ia1_addr_imm(brw, inst));
709 string(file, "]<");
710 err |= control(file, "horiz stride", horiz_stride,
711 brw_inst_dst_hstride(brw, inst), NULL);
712 string(file, ">");
713 err |= control(file, "dest reg encoding", reg_encoding,
714 brw_inst_dst_reg_type(brw, inst), NULL);
715 }
716 } else {
717 if (brw_inst_dst_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
718 err |= reg(file, brw_inst_dst_reg_file(brw, inst),
719 brw_inst_dst_da_reg_nr(brw, inst));
720 if (err == -1)
721 return 0;
722 if (brw_inst_dst_da16_subreg_nr(brw, inst))
723 format(file, ".%d", brw_inst_dst_da16_subreg_nr(brw, inst) /
724 reg_type_size[brw_inst_dst_reg_type(brw, inst)]);
725 string(file, "<1>");
726 err |= control(file, "writemask", writemask,
727 brw_inst_da16_writemask(brw, inst), NULL);
728 err |= control(file, "dest reg encoding", reg_encoding,
729 brw_inst_dst_reg_type(brw, inst), NULL);
730 } else {
731 err = 1;
732 string(file, "Indirect align16 address mode not supported");
733 }
734 }
735
736 return 0;
737 }
738
739 static int
740 dest_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
741 {
742 int err = 0;
743 uint32_t reg_file;
744
745 if (brw->gen == 6 && brw_inst_3src_dst_reg_file(brw, inst))
746 reg_file = BRW_MESSAGE_REGISTER_FILE;
747 else
748 reg_file = BRW_GENERAL_REGISTER_FILE;
749
750 err |= reg(file, reg_file, brw_inst_3src_dst_reg_nr(brw, inst));
751 if (err == -1)
752 return 0;
753 if (brw_inst_3src_dst_subreg_nr(brw, inst))
754 format(file, ".%d", brw_inst_3src_dst_subreg_nr(brw, inst));
755 string(file, "<1>");
756 err |= control(file, "writemask", writemask,
757 brw_inst_3src_dst_writemask(brw, inst), NULL);
758 err |= control(file, "dest reg encoding", three_source_reg_encoding,
759 brw_inst_3src_dst_type(brw, inst), NULL);
760
761 return 0;
762 }
763
764 static int
765 src_align1_region(FILE *file,
766 unsigned _vert_stride, unsigned _width,
767 unsigned _horiz_stride)
768 {
769 int err = 0;
770 string(file, "<");
771 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
772 string(file, ",");
773 err |= control(file, "width", width, _width, NULL);
774 string(file, ",");
775 err |= control(file, "horiz_stride", horiz_stride, _horiz_stride, NULL);
776 string(file, ">");
777 return err;
778 }
779
780 static int
781 src_da1(FILE *file,
782 const struct brw_context *brw,
783 unsigned opcode,
784 unsigned type, unsigned _reg_file,
785 unsigned _vert_stride, unsigned _width, unsigned _horiz_stride,
786 unsigned reg_num, unsigned sub_reg_num, unsigned __abs,
787 unsigned _negate)
788 {
789 int err = 0;
790
791 if (brw->gen >= 8 && is_logic_instruction(opcode))
792 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
793 else
794 err |= control(file, "negate", m_negate, _negate, NULL);
795
796 err |= control(file, "abs", _abs, __abs, NULL);
797
798 err |= reg(file, _reg_file, reg_num);
799 if (err == -1)
800 return 0;
801 if (sub_reg_num)
802 format(file, ".%d", sub_reg_num / reg_type_size[type]); /* use formal style like spec */
803 src_align1_region(file, _vert_stride, _width, _horiz_stride);
804 err |= control(file, "src reg encoding", reg_encoding, type, NULL);
805 return err;
806 }
807
808 static int
809 src_ia1(FILE *file,
810 const struct brw_context *brw,
811 unsigned opcode,
812 unsigned type,
813 unsigned _reg_file,
814 int _addr_imm,
815 unsigned _addr_subreg_nr,
816 unsigned _negate,
817 unsigned __abs,
818 unsigned _addr_mode,
819 unsigned _horiz_stride, unsigned _width, unsigned _vert_stride)
820 {
821 int err = 0;
822
823 if (brw->gen >= 8 && is_logic_instruction(opcode))
824 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
825 else
826 err |= control(file, "negate", m_negate, _negate, NULL);
827
828 err |= control(file, "abs", _abs, __abs, NULL);
829
830 string(file, "g[a0");
831 if (_addr_subreg_nr)
832 format(file, ".%d", _addr_subreg_nr);
833 if (_addr_imm)
834 format(file, " %d", _addr_imm);
835 string(file, "]");
836 src_align1_region(file, _vert_stride, _width, _horiz_stride);
837 err |= control(file, "src reg encoding", reg_encoding, type, NULL);
838 return err;
839 }
840
841 static int
842 src_swizzle(FILE *file, unsigned swiz)
843 {
844 unsigned x = BRW_GET_SWZ(swiz, BRW_CHANNEL_X);
845 unsigned y = BRW_GET_SWZ(swiz, BRW_CHANNEL_Y);
846 unsigned z = BRW_GET_SWZ(swiz, BRW_CHANNEL_Z);
847 unsigned w = BRW_GET_SWZ(swiz, BRW_CHANNEL_W);
848 int err = 0;
849
850 if (x == y && x == z && x == w) {
851 string(file, ".");
852 err |= control(file, "channel select", chan_sel, x, NULL);
853 } else if (swiz != BRW_SWIZZLE_XYZW) {
854 string(file, ".");
855 err |= control(file, "channel select", chan_sel, x, NULL);
856 err |= control(file, "channel select", chan_sel, y, NULL);
857 err |= control(file, "channel select", chan_sel, z, NULL);
858 err |= control(file, "channel select", chan_sel, w, NULL);
859 }
860 return err;
861 }
862
863 static int
864 src_da16(FILE *file,
865 const struct brw_context *brw,
866 unsigned opcode,
867 unsigned _reg_type,
868 unsigned _reg_file,
869 unsigned _vert_stride,
870 unsigned _reg_nr,
871 unsigned _subreg_nr,
872 unsigned __abs,
873 unsigned _negate,
874 unsigned swz_x, unsigned swz_y, unsigned swz_z, unsigned swz_w)
875 {
876 int err = 0;
877
878 if (brw->gen >= 8 && is_logic_instruction(opcode))
879 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
880 else
881 err |= control(file, "negate", m_negate, _negate, NULL);
882
883 err |= control(file, "abs", _abs, __abs, NULL);
884
885 err |= reg(file, _reg_file, _reg_nr);
886 if (err == -1)
887 return 0;
888 if (_subreg_nr)
889 /* bit4 for subreg number byte addressing. Make this same meaning as
890 in da1 case, so output looks consistent. */
891 format(file, ".%d", 16 / reg_type_size[_reg_type]);
892 string(file, "<");
893 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
894 string(file, ",4,1>");
895 err |= src_swizzle(file, BRW_SWIZZLE4(swz_x, swz_y, swz_z, swz_w));
896 err |= control(file, "src da16 reg type", reg_encoding, _reg_type, NULL);
897 return err;
898 }
899
900 static int
901 src0_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
902 {
903 int err = 0;
904 unsigned src0_subreg_nr = brw_inst_3src_src0_subreg_nr(brw, inst);
905
906 err |= control(file, "negate", m_negate,
907 brw_inst_3src_src0_negate(brw, inst), NULL);
908 err |= control(file, "abs", _abs, brw_inst_3src_src0_abs(brw, inst), NULL);
909
910 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
911 brw_inst_3src_src0_reg_nr(brw, inst));
912 if (err == -1)
913 return 0;
914 if (src0_subreg_nr)
915 format(file, ".%d", src0_subreg_nr);
916 if (brw_inst_3src_src0_rep_ctrl(brw, inst))
917 string(file, "<0,1,0>");
918 else
919 string(file, "<4,4,1>");
920 err |= control(file, "src da16 reg type", three_source_reg_encoding,
921 brw_inst_3src_src_type(brw, inst), NULL);
922 err |= src_swizzle(file, brw_inst_3src_src0_swizzle(brw, inst));
923 return err;
924 }
925
926 static int
927 src1_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
928 {
929 int err = 0;
930 unsigned src1_subreg_nr = brw_inst_3src_src1_subreg_nr(brw, inst);
931
932 err |= control(file, "negate", m_negate,
933 brw_inst_3src_src1_negate(brw, inst), NULL);
934 err |= control(file, "abs", _abs, brw_inst_3src_src1_abs(brw, inst), NULL);
935
936 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
937 brw_inst_3src_src1_reg_nr(brw, inst));
938 if (err == -1)
939 return 0;
940 if (src1_subreg_nr)
941 format(file, ".%d", src1_subreg_nr);
942 if (brw_inst_3src_src1_rep_ctrl(brw, inst))
943 string(file, "<0,1,0>");
944 else
945 string(file, "<4,4,1>");
946 err |= control(file, "src da16 reg type", three_source_reg_encoding,
947 brw_inst_3src_src_type(brw, inst), NULL);
948 err |= src_swizzle(file, brw_inst_3src_src1_swizzle(brw, inst));
949 return err;
950 }
951
952
953 static int
954 src2_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
955 {
956 int err = 0;
957 unsigned src2_subreg_nr = brw_inst_3src_src2_subreg_nr(brw, inst);
958
959 err |= control(file, "negate", m_negate,
960 brw_inst_3src_src2_negate(brw, inst), NULL);
961 err |= control(file, "abs", _abs, brw_inst_3src_src2_abs(brw, inst), NULL);
962
963 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
964 brw_inst_3src_src2_reg_nr(brw, inst));
965 if (err == -1)
966 return 0;
967 if (src2_subreg_nr)
968 format(file, ".%d", src2_subreg_nr);
969 if (brw_inst_3src_src2_rep_ctrl(brw, inst))
970 string(file, "<0,1,0>");
971 else
972 string(file, "<4,4,1>");
973 err |= control(file, "src da16 reg type", three_source_reg_encoding,
974 brw_inst_3src_src_type(brw, inst), NULL);
975 err |= src_swizzle(file, brw_inst_3src_src2_swizzle(brw, inst));
976 return err;
977 }
978
979 static int
980 imm(FILE *file, struct brw_context *brw, unsigned type, brw_inst *inst)
981 {
982 switch (type) {
983 case BRW_HW_REG_TYPE_UD:
984 format(file, "0x%08xUD", brw_inst_imm_ud(brw, inst));
985 break;
986 case BRW_HW_REG_TYPE_D:
987 format(file, "%dD", brw_inst_imm_d(brw, inst));
988 break;
989 case BRW_HW_REG_TYPE_UW:
990 format(file, "0x%04xUW", (uint16_t) brw_inst_imm_ud(brw, inst));
991 break;
992 case BRW_HW_REG_TYPE_W:
993 format(file, "%dW", (int16_t) brw_inst_imm_d(brw, inst));
994 break;
995 case BRW_HW_REG_IMM_TYPE_UV:
996 format(file, "0x%08xUV", brw_inst_imm_ud(brw, inst));
997 break;
998 case BRW_HW_REG_IMM_TYPE_VF:
999 format(file, "Vector Float");
1000 break;
1001 case BRW_HW_REG_IMM_TYPE_V:
1002 format(file, "0x%08xV", brw_inst_imm_ud(brw, inst));
1003 break;
1004 case BRW_HW_REG_TYPE_F:
1005 format(file, "%-gF", brw_inst_imm_f(brw, inst));
1006 break;
1007 case GEN8_HW_REG_IMM_TYPE_DF:
1008 string(file, "Double IMM");
1009 break;
1010 case GEN8_HW_REG_IMM_TYPE_HF:
1011 string(file, "Half Float IMM");
1012 break;
1013 }
1014 return 0;
1015 }
1016
1017 static int
1018 src0(FILE *file, struct brw_context *brw, brw_inst *inst)
1019 {
1020 if (brw_inst_src0_reg_file(brw, inst) == BRW_IMMEDIATE_VALUE) {
1021 return imm(file, brw, brw_inst_src0_reg_type(brw, inst), inst);
1022 } else if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
1023 if (brw_inst_src0_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
1024 return src_da1(file,
1025 brw,
1026 brw_inst_opcode(brw, inst),
1027 brw_inst_src0_reg_type(brw, inst),
1028 brw_inst_src0_reg_file(brw, inst),
1029 brw_inst_src0_vstride(brw, inst),
1030 brw_inst_src0_width(brw, inst),
1031 brw_inst_src0_hstride(brw, inst),
1032 brw_inst_src0_da_reg_nr(brw, inst),
1033 brw_inst_src0_da1_subreg_nr(brw, inst),
1034 brw_inst_src0_abs(brw, inst),
1035 brw_inst_src0_negate(brw, inst));
1036 } else {
1037 return src_ia1(file,
1038 brw,
1039 brw_inst_opcode(brw, inst),
1040 brw_inst_src0_reg_type(brw, inst),
1041 brw_inst_src0_reg_file(brw, inst),
1042 brw_inst_src0_ia1_addr_imm(brw, inst),
1043 brw_inst_src0_ia_subreg_nr(brw, inst),
1044 brw_inst_src0_negate(brw, inst),
1045 brw_inst_src0_abs(brw, inst),
1046 brw_inst_src0_address_mode(brw, inst),
1047 brw_inst_src0_hstride(brw, inst),
1048 brw_inst_src0_width(brw, inst),
1049 brw_inst_src0_vstride(brw, inst));
1050 }
1051 } else {
1052 if (brw_inst_src0_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
1053 return src_da16(file,
1054 brw,
1055 brw_inst_opcode(brw, inst),
1056 brw_inst_src0_reg_type(brw, inst),
1057 brw_inst_src0_reg_file(brw, inst),
1058 brw_inst_src0_vstride(brw, inst),
1059 brw_inst_src0_da_reg_nr(brw, inst),
1060 brw_inst_src0_da16_subreg_nr(brw, inst),
1061 brw_inst_src0_abs(brw, inst),
1062 brw_inst_src0_negate(brw, inst),
1063 brw_inst_src0_da16_swiz_x(brw, inst),
1064 brw_inst_src0_da16_swiz_y(brw, inst),
1065 brw_inst_src0_da16_swiz_z(brw, inst),
1066 brw_inst_src0_da16_swiz_w(brw, inst));
1067 } else {
1068 string(file, "Indirect align16 address mode not supported");
1069 return 1;
1070 }
1071 }
1072 }
1073
1074 static int
1075 src1(FILE *file, struct brw_context *brw, brw_inst *inst)
1076 {
1077 if (brw_inst_src1_reg_file(brw, inst) == BRW_IMMEDIATE_VALUE) {
1078 return imm(file, brw, brw_inst_src1_reg_type(brw, inst), inst);
1079 } else if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
1080 if (brw_inst_src1_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
1081 return src_da1(file,
1082 brw,
1083 brw_inst_opcode(brw, inst),
1084 brw_inst_src1_reg_type(brw, inst),
1085 brw_inst_src1_reg_file(brw, inst),
1086 brw_inst_src1_vstride(brw, inst),
1087 brw_inst_src1_width(brw, inst),
1088 brw_inst_src1_hstride(brw, inst),
1089 brw_inst_src1_da_reg_nr(brw, inst),
1090 brw_inst_src1_da1_subreg_nr(brw, inst),
1091 brw_inst_src1_abs(brw, inst),
1092 brw_inst_src1_negate(brw, inst));
1093 } else {
1094 return src_ia1(file,
1095 brw,
1096 brw_inst_opcode(brw, inst),
1097 brw_inst_src1_reg_type(brw, inst),
1098 brw_inst_src1_reg_file(brw, inst),
1099 brw_inst_src1_ia1_addr_imm(brw, inst),
1100 brw_inst_src1_ia_subreg_nr(brw, inst),
1101 brw_inst_src1_negate(brw, inst),
1102 brw_inst_src1_abs(brw, inst),
1103 brw_inst_src1_address_mode(brw, inst),
1104 brw_inst_src1_hstride(brw, inst),
1105 brw_inst_src1_width(brw, inst),
1106 brw_inst_src1_vstride(brw, inst));
1107 }
1108 } else {
1109 if (brw_inst_src1_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
1110 return src_da16(file,
1111 brw,
1112 brw_inst_opcode(brw, inst),
1113 brw_inst_src1_reg_type(brw, inst),
1114 brw_inst_src1_reg_file(brw, inst),
1115 brw_inst_src1_vstride(brw, inst),
1116 brw_inst_src1_da_reg_nr(brw, inst),
1117 brw_inst_src1_da16_subreg_nr(brw, inst),
1118 brw_inst_src1_abs(brw, inst),
1119 brw_inst_src1_negate(brw, inst),
1120 brw_inst_src1_da16_swiz_x(brw, inst),
1121 brw_inst_src1_da16_swiz_y(brw, inst),
1122 brw_inst_src1_da16_swiz_z(brw, inst),
1123 brw_inst_src1_da16_swiz_w(brw, inst));
1124 } else {
1125 string(file, "Indirect align16 address mode not supported");
1126 return 1;
1127 }
1128 }
1129 }
1130
1131 static int
1132 qtr_ctrl(FILE *file, struct brw_context *brw, brw_inst *inst)
1133 {
1134 int qtr_ctl = brw_inst_qtr_control(brw, inst);
1135 int exec_size = 1 << brw_inst_exec_size(brw, inst);
1136
1137 if (exec_size == 8) {
1138 switch (qtr_ctl) {
1139 case 0:
1140 string(file, " 1Q");
1141 break;
1142 case 1:
1143 string(file, " 2Q");
1144 break;
1145 case 2:
1146 string(file, " 3Q");
1147 break;
1148 case 3:
1149 string(file, " 4Q");
1150 break;
1151 }
1152 } else if (exec_size == 16) {
1153 if (qtr_ctl < 2)
1154 string(file, " 1H");
1155 else
1156 string(file, " 2H");
1157 }
1158 return 0;
1159 }
1160
1161 int
1162 brw_disassemble_inst(FILE *file, struct brw_context *brw, brw_inst *inst,
1163 bool is_compacted)
1164 {
1165 int err = 0;
1166 int space = 0;
1167
1168 const enum opcode opcode = brw_inst_opcode(brw, inst);
1169
1170 if (brw_inst_pred_control(brw, inst)) {
1171 string(file, "(");
1172 err |= control(file, "predicate inverse", pred_inv,
1173 brw_inst_pred_inv(brw, inst), NULL);
1174 format(file, "f%d", brw->gen >= 7 ? brw_inst_flag_reg_nr(brw, inst) : 0);
1175 if (brw_inst_flag_subreg_nr(brw, inst))
1176 format(file, ".%d", brw_inst_flag_subreg_nr(brw, inst));
1177 if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
1178 err |= control(file, "predicate control align1", pred_ctrl_align1,
1179 brw_inst_pred_control(brw, inst), NULL);
1180 } else {
1181 err |= control(file, "predicate control align16", pred_ctrl_align16,
1182 brw_inst_pred_control(brw, inst), NULL);
1183 }
1184 string(file, ") ");
1185 }
1186
1187 err |= print_opcode(file, opcode);
1188 err |= control(file, "saturate", saturate, brw_inst_saturate(brw, inst),
1189 NULL);
1190
1191 err |= control(file, "debug control", debug_ctrl,
1192 brw_inst_debug_control(brw, inst), NULL);
1193
1194 if (opcode == BRW_OPCODE_MATH) {
1195 string(file, " ");
1196 err |= control(file, "function", math_function,
1197 brw_inst_math_function(brw, inst), NULL);
1198 } else if (opcode != BRW_OPCODE_SEND && opcode != BRW_OPCODE_SENDC) {
1199 err |= control(file, "conditional modifier", conditional_modifier,
1200 brw_inst_cond_modifier(brw, inst), NULL);
1201
1202 /* If we're using the conditional modifier, print which flags reg is
1203 * used for it. Note that on gen6+, the embedded-condition SEL and
1204 * control flow doesn't update flags.
1205 */
1206 if (brw_inst_cond_modifier(brw, inst) &&
1207 (brw->gen < 6 || (opcode != BRW_OPCODE_SEL &&
1208 opcode != BRW_OPCODE_IF &&
1209 opcode != BRW_OPCODE_WHILE))) {
1210 format(file, ".f%d",
1211 brw->gen >= 7 ? brw_inst_flag_reg_nr(brw, inst) : 0);
1212 if (brw_inst_flag_subreg_nr(brw, inst))
1213 format(file, ".%d", brw_inst_flag_subreg_nr(brw, inst));
1214 }
1215 }
1216
1217 if (opcode != BRW_OPCODE_NOP) {
1218 string(file, "(");
1219 err |= control(file, "execution size", exec_size,
1220 brw_inst_exec_size(brw, inst), NULL);
1221 string(file, ")");
1222 }
1223
1224 if (opcode == BRW_OPCODE_SEND && brw->gen < 6)
1225 format(file, " %d", brw_inst_base_mrf(brw, inst));
1226
1227 if (has_uip(brw, opcode)) {
1228 /* Instructions that have UIP also have JIP. */
1229 pad(file, 16);
1230 format(file, "JIP: %d", brw_inst_jip(brw, inst));
1231 pad(file, 32);
1232 format(file, "UIP: %d", brw_inst_uip(brw, inst));
1233 } else if (has_jip(brw, opcode)) {
1234 pad(file, 16);
1235 if (brw->gen >= 7) {
1236 format(file, "JIP: %d", brw_inst_jip(brw, inst));
1237 } else {
1238 format(file, "JIP: %d", brw_inst_gen6_jump_count(brw, inst));
1239 }
1240 } else if (brw->gen < 6 && (opcode == BRW_OPCODE_BREAK ||
1241 opcode == BRW_OPCODE_CONTINUE ||
1242 opcode == BRW_OPCODE_ELSE)) {
1243 pad(file, 16);
1244 format(file, "Jump: %d", brw_inst_gen4_jump_count(brw, inst));
1245 pad(file, 32);
1246 format(file, "Pop: %d", brw_inst_gen4_pop_count(brw, inst));
1247 } else if (brw->gen < 6 && (opcode == BRW_OPCODE_IF ||
1248 opcode == BRW_OPCODE_IFF ||
1249 opcode == BRW_OPCODE_HALT)) {
1250 pad(file, 16);
1251 format(file, "Jump: %d", brw_inst_gen4_pop_count(brw, inst));
1252 } else if (brw->gen < 6 && opcode == BRW_OPCODE_ENDIF) {
1253 pad(file, 16);
1254 format(file, "Pop: %d", brw_inst_gen4_pop_count(brw, inst));
1255 } else if (opcode == BRW_OPCODE_JMPI) {
1256 format(file, " %d", brw_inst_imm_d(brw, inst));
1257 } else if (opcode_descs[opcode].nsrc == 3) {
1258 pad(file, 16);
1259 err |= dest_3src(file, brw, inst);
1260
1261 pad(file, 32);
1262 err |= src0_3src(file, brw, inst);
1263
1264 pad(file, 48);
1265 err |= src1_3src(file, brw, inst);
1266
1267 pad(file, 64);
1268 err |= src2_3src(file, brw, inst);
1269 } else {
1270 if (opcode_descs[opcode].ndst > 0) {
1271 pad(file, 16);
1272 err |= dest(file, brw, inst);
1273 }
1274
1275 if (opcode_descs[opcode].nsrc > 0) {
1276 pad(file, 32);
1277 err |= src0(file, brw, inst);
1278 }
1279
1280 if (opcode_descs[opcode].nsrc > 1) {
1281 pad(file, 48);
1282 err |= src1(file, brw, inst);
1283 }
1284 }
1285
1286 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) {
1287 enum brw_message_target sfid = brw_inst_sfid(brw, inst);
1288
1289 newline(file);
1290 pad(file, 16);
1291 space = 0;
1292
1293 fprintf(file, " ");
1294 err |= control(file, "SFID", brw->gen >= 6 ? gen6_sfid : gen4_sfid,
1295 sfid, &space);
1296
1297 switch (sfid) {
1298 case BRW_SFID_MATH:
1299 err |= control(file, "math function", math_function,
1300 brw_inst_math_msg_function(brw, inst), &space);
1301 err |= control(file, "math saturate", math_saturate,
1302 brw_inst_math_msg_saturate(brw, inst), &space);
1303 err |= control(file, "math signed", math_signed,
1304 brw_inst_math_msg_signed_int(brw, inst), &space);
1305 err |= control(file, "math scalar", math_scalar,
1306 brw_inst_math_msg_data_type(brw, inst), &space);
1307 err |= control(file, "math precision", math_precision,
1308 brw_inst_math_msg_precision(brw, inst), &space);
1309 break;
1310 case BRW_SFID_SAMPLER:
1311 if (brw->gen >= 5) {
1312 format(file, " (%d, %d, %d, %d)",
1313 brw_inst_binding_table_index(brw, inst),
1314 brw_inst_sampler(brw, inst),
1315 brw_inst_sampler_msg_type(brw, inst),
1316 brw_inst_sampler_simd_mode(brw, inst));
1317 } else {
1318 format(file, " (%d, %d, %d, ",
1319 brw_inst_binding_table_index(brw, inst),
1320 brw_inst_sampler(brw, inst),
1321 brw_inst_sampler_msg_type(brw, inst));
1322 if (!brw->is_g4x) {
1323 err |= control(file, "sampler target format",
1324 sampler_target_format,
1325 brw_inst_sampler_return_format(brw, inst), NULL);
1326 }
1327 string(file, ")");
1328 }
1329 break;
1330 case GEN6_SFID_DATAPORT_SAMPLER_CACHE:
1331 /* aka BRW_SFID_DATAPORT_READ on Gen4-5 */
1332 if (brw->gen >= 6) {
1333 format(file, " (%d, %d, %d, %d)",
1334 brw_inst_binding_table_index(brw, inst),
1335 brw_inst_dp_msg_control(brw, inst),
1336 brw_inst_dp_msg_type(brw, inst),
1337 brw->gen >= 7 ? 0 : brw_inst_dp_write_commit(brw, inst));
1338 } else {
1339 format(file, " (%d, %d, %d)",
1340 brw_inst_binding_table_index(brw, inst),
1341 brw_inst_dp_read_msg_control(brw, inst),
1342 brw_inst_dp_read_msg_type(brw, inst));
1343 }
1344 break;
1345
1346 case GEN6_SFID_DATAPORT_RENDER_CACHE: {
1347 /* aka BRW_SFID_DATAPORT_WRITE on Gen4-5 */
1348 unsigned msg_type = brw_inst_dp_write_msg_type(brw, inst);
1349
1350 err |= control(file, "DP rc message type",
1351 brw->gen >= 6 ? dp_rc_msg_type_gen6
1352 : dp_write_port_msg_type,
1353 msg_type, &space);
1354
1355 bool is_rt_write = msg_type ==
1356 (brw->gen >= 6 ? GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
1357 : BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE);
1358
1359 if (is_rt_write) {
1360 err |= control(file, "RT message type", m_rt_write_subtype,
1361 brw_inst_rt_message_type(brw, inst), &space);
1362 if (brw->gen >= 6 && brw_inst_rt_slot_group(brw, inst))
1363 string(file, " Hi");
1364 if (brw_inst_rt_last(brw, inst))
1365 string(file, " LastRT");
1366 if (brw->gen < 7 && brw_inst_dp_write_commit(brw, inst))
1367 string(file, " WriteCommit");
1368 } else {
1369 format(file, " MsgCtrl = 0x%x",
1370 brw_inst_dp_write_msg_control(brw, inst));
1371 }
1372
1373 format(file, " Surface = %d", brw_inst_binding_table_index(brw, inst));
1374 break;
1375 }
1376
1377 case BRW_SFID_URB:
1378 format(file, " %d", brw_inst_urb_global_offset(brw, inst));
1379
1380 space = 1;
1381 if (brw->gen >= 7) {
1382 err |= control(file, "urb opcode", gen7_urb_opcode,
1383 brw_inst_urb_opcode(brw, inst), &space);
1384 } else if (brw->gen >= 5) {
1385 err |= control(file, "urb opcode", gen5_urb_opcode,
1386 brw_inst_urb_opcode(brw, inst), &space);
1387 }
1388 err |= control(file, "urb swizzle", urb_swizzle,
1389 brw_inst_urb_swizzle_control(brw, inst), &space);
1390 if (brw->gen < 7) {
1391 err |= control(file, "urb allocate", urb_allocate,
1392 brw_inst_urb_allocate(brw, inst), &space);
1393 err |= control(file, "urb used", urb_used,
1394 brw_inst_urb_used(brw, inst), &space);
1395 }
1396 err |= control(file, "urb complete", urb_complete,
1397 brw_inst_urb_complete(brw, inst), &space);
1398 break;
1399 case BRW_SFID_THREAD_SPAWNER:
1400 break;
1401 case GEN7_SFID_DATAPORT_DATA_CACHE:
1402 if (brw->gen >= 7) {
1403 format(file, " (");
1404
1405 err |= control(file, "DP DC0 message type",
1406 dp_dc0_msg_type_gen7,
1407 brw_inst_dp_msg_type(brw, inst), &space);
1408
1409 format(file, ", %d, ", brw_inst_binding_table_index(brw, inst));
1410
1411 switch (brw_inst_dp_msg_type(brw, inst)) {
1412 case GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP:
1413 control(file, "atomic op", aop,
1414 brw_inst_imm_ud(brw, inst) >> 8 & 0xf, &space);
1415 break;
1416 default:
1417 format(file, "%d", brw_inst_dp_msg_control(brw, inst));
1418 }
1419 format(file, ")");
1420 break;
1421 }
1422 /* FALLTHROUGH */
1423
1424 case HSW_SFID_DATAPORT_DATA_CACHE_1: {
1425 if (brw->gen >= 7) {
1426 format(file, " (");
1427
1428 unsigned msg_ctrl = brw_inst_dp_msg_control(brw, inst);
1429
1430 err |= control(file, "DP DC1 message type",
1431 dp_dc1_msg_type_hsw,
1432 brw_inst_dp_msg_type(brw, inst), &space);
1433
1434 format(file, ", Surface = %d, ",
1435 brw_inst_binding_table_index(brw, inst));
1436
1437 switch (brw_inst_dp_msg_type(brw, inst)) {
1438 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP:
1439 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP:
1440 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP:
1441 format(file, "SIMD%d,", (msg_ctrl & (1 << 4)) ? 8 : 16);
1442 /* fallthrough */
1443 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2:
1444 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2:
1445 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2:
1446 control(file, "atomic op", aop, msg_ctrl & 0xf, &space);
1447 break;
1448 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ:
1449 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE:
1450 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ:
1451 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE: {
1452 static const char *simd_modes[] = { "4x2", "16", "8" };
1453 format(file, "SIMD%s, Mask = 0x%x",
1454 simd_modes[msg_ctrl >> 4], msg_ctrl & 0xf);
1455 break;
1456 }
1457 default:
1458 format(file, "0x%x", msg_ctrl);
1459 }
1460 format(file, ")");
1461 break;
1462 }
1463 /* FALLTHROUGH */
1464 }
1465
1466 default:
1467 format(file, "unsupported shared function ID %d", sfid);
1468 break;
1469 }
1470 if (space)
1471 string(file, " ");
1472 format(file, "mlen %d", brw_inst_mlen(brw, inst));
1473 format(file, " rlen %d", brw_inst_rlen(brw, inst));
1474 }
1475 pad(file, 64);
1476 if (opcode != BRW_OPCODE_NOP) {
1477 string(file, "{");
1478 space = 1;
1479 err |= control(file, "access mode", access_mode,
1480 brw_inst_access_mode(brw, inst), &space);
1481 if (brw->gen >= 6) {
1482 err |= control(file, "write enable control", wectrl,
1483 brw_inst_mask_control(brw, inst), &space);
1484 } else {
1485 err |= control(file, "mask control", mask_ctrl,
1486 brw_inst_mask_control(brw, inst), &space);
1487 }
1488 err |= control(file, "dependency control", dep_ctrl,
1489 ((brw_inst_no_dd_check(brw, inst) << 1) |
1490 brw_inst_no_dd_clear(brw, inst)), &space);
1491
1492 if (brw->gen >= 6)
1493 err |= qtr_ctrl(file, brw, inst);
1494 else {
1495 if (brw_inst_qtr_control(brw, inst) == BRW_COMPRESSION_COMPRESSED &&
1496 opcode_descs[opcode].ndst > 0 &&
1497 brw_inst_dst_reg_file(brw, inst) == BRW_MESSAGE_REGISTER_FILE &&
1498 brw_inst_dst_da_reg_nr(brw, inst) & (1 << 7)) {
1499 format(file, " compr4");
1500 } else {
1501 err |= control(file, "compression control", compr_ctrl,
1502 brw_inst_qtr_control(brw, inst), &space);
1503 }
1504 }
1505
1506 err |= control(file, "compaction", cmpt_ctrl, is_compacted, &space);
1507 err |= control(file, "thread control", thread_ctrl,
1508 brw_inst_thread_control(brw, inst), &space);
1509 if (brw->gen >= 6)
1510 err |= control(file, "acc write control", accwr,
1511 brw_inst_acc_wr_control(brw, inst), &space);
1512 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC)
1513 err |= control(file, "end of thread", end_of_thread,
1514 brw_inst_eot(brw, inst), &space);
1515 if (space)
1516 string(file, " ");
1517 string(file, "}");
1518 }
1519 string(file, ";");
1520 newline(file);
1521 return err;
1522 }