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Merge remote-tracking branch 'mesa-public/master' into vulkan
[mesa.git] / src / mesa / drivers / dri / i965 / brw_disasm.c
1 /*
2 * Copyright © 2008 Keith Packard
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
13 *
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20 * OF THIS SOFTWARE.
21 */
22
23 #include <stdio.h>
24 #include <stdlib.h>
25 #include <string.h>
26 #include <getopt.h>
27 #include <unistd.h>
28 #include <stdarg.h>
29
30 #include "brw_context.h"
31 #include "brw_defines.h"
32 #include "brw_reg.h"
33 #include "brw_inst.h"
34
35 const struct opcode_desc opcode_descs[128] = {
36 [BRW_OPCODE_MOV] = { .name = "mov", .nsrc = 1, .ndst = 1 },
37 [BRW_OPCODE_FRC] = { .name = "frc", .nsrc = 1, .ndst = 1 },
38 [BRW_OPCODE_RNDU] = { .name = "rndu", .nsrc = 1, .ndst = 1 },
39 [BRW_OPCODE_RNDD] = { .name = "rndd", .nsrc = 1, .ndst = 1 },
40 [BRW_OPCODE_RNDE] = { .name = "rnde", .nsrc = 1, .ndst = 1 },
41 [BRW_OPCODE_RNDZ] = { .name = "rndz", .nsrc = 1, .ndst = 1 },
42 [BRW_OPCODE_NOT] = { .name = "not", .nsrc = 1, .ndst = 1 },
43 [BRW_OPCODE_LZD] = { .name = "lzd", .nsrc = 1, .ndst = 1 },
44 [BRW_OPCODE_F32TO16] = { .name = "f32to16", .nsrc = 1, .ndst = 1 },
45 [BRW_OPCODE_F16TO32] = { .name = "f16to32", .nsrc = 1, .ndst = 1 },
46 [BRW_OPCODE_BFREV] = { .name = "bfrev", .nsrc = 1, .ndst = 1 },
47 [BRW_OPCODE_FBH] = { .name = "fbh", .nsrc = 1, .ndst = 1 },
48 [BRW_OPCODE_FBL] = { .name = "fbl", .nsrc = 1, .ndst = 1 },
49 [BRW_OPCODE_CBIT] = { .name = "cbit", .nsrc = 1, .ndst = 1 },
50
51 [BRW_OPCODE_MUL] = { .name = "mul", .nsrc = 2, .ndst = 1 },
52 [BRW_OPCODE_MAC] = { .name = "mac", .nsrc = 2, .ndst = 1 },
53 [BRW_OPCODE_MACH] = { .name = "mach", .nsrc = 2, .ndst = 1 },
54 [BRW_OPCODE_LINE] = { .name = "line", .nsrc = 2, .ndst = 1 },
55 [BRW_OPCODE_PLN] = { .name = "pln", .nsrc = 2, .ndst = 1 },
56 [BRW_OPCODE_MAD] = { .name = "mad", .nsrc = 3, .ndst = 1 },
57 [BRW_OPCODE_LRP] = { .name = "lrp", .nsrc = 3, .ndst = 1 },
58 [BRW_OPCODE_SAD2] = { .name = "sad2", .nsrc = 2, .ndst = 1 },
59 [BRW_OPCODE_SADA2] = { .name = "sada2", .nsrc = 2, .ndst = 1 },
60 [BRW_OPCODE_DP4] = { .name = "dp4", .nsrc = 2, .ndst = 1 },
61 [BRW_OPCODE_DPH] = { .name = "dph", .nsrc = 2, .ndst = 1 },
62 [BRW_OPCODE_DP3] = { .name = "dp3", .nsrc = 2, .ndst = 1 },
63 [BRW_OPCODE_DP2] = { .name = "dp2", .nsrc = 2, .ndst = 1 },
64 [BRW_OPCODE_MATH] = { .name = "math", .nsrc = 2, .ndst = 1 },
65
66 [BRW_OPCODE_AVG] = { .name = "avg", .nsrc = 2, .ndst = 1 },
67 [BRW_OPCODE_ADD] = { .name = "add", .nsrc = 2, .ndst = 1 },
68 [BRW_OPCODE_SEL] = { .name = "sel", .nsrc = 2, .ndst = 1 },
69 [BRW_OPCODE_AND] = { .name = "and", .nsrc = 2, .ndst = 1 },
70 [BRW_OPCODE_OR] = { .name = "or", .nsrc = 2, .ndst = 1 },
71 [BRW_OPCODE_XOR] = { .name = "xor", .nsrc = 2, .ndst = 1 },
72 [BRW_OPCODE_SHR] = { .name = "shr", .nsrc = 2, .ndst = 1 },
73 [BRW_OPCODE_SHL] = { .name = "shl", .nsrc = 2, .ndst = 1 },
74 [BRW_OPCODE_ASR] = { .name = "asr", .nsrc = 2, .ndst = 1 },
75 [BRW_OPCODE_CMP] = { .name = "cmp", .nsrc = 2, .ndst = 1 },
76 [BRW_OPCODE_CMPN] = { .name = "cmpn", .nsrc = 2, .ndst = 1 },
77 [BRW_OPCODE_CSEL] = { .name = "csel", .nsrc = 3, .ndst = 1 },
78 [BRW_OPCODE_BFE] = { .name = "bfe", .nsrc = 3, .ndst = 1 },
79 [BRW_OPCODE_BFI1] = { .name = "bfi1", .nsrc = 2, .ndst = 1 },
80 [BRW_OPCODE_BFI2] = { .name = "bfi2", .nsrc = 3, .ndst = 1 },
81 [BRW_OPCODE_ADDC] = { .name = "addc", .nsrc = 2, .ndst = 1 },
82 [BRW_OPCODE_SUBB] = { .name = "subb", .nsrc = 2, .ndst = 1 },
83
84 [BRW_OPCODE_SEND] = { .name = "send", .nsrc = 1, .ndst = 1 },
85 [BRW_OPCODE_SENDC] = { .name = "sendc", .nsrc = 1, .ndst = 1 },
86 [BRW_OPCODE_NOP] = { .name = "nop", .nsrc = 0, .ndst = 0 },
87 [BRW_OPCODE_NENOP] = { .name = "nenop", .nsrc = 0, .ndst = 0 },
88 [BRW_OPCODE_JMPI] = { .name = "jmpi", .nsrc = 0, .ndst = 0 },
89 [BRW_OPCODE_IF] = { .name = "if", .nsrc = 2, .ndst = 0 },
90 [BRW_OPCODE_IFF] = { .name = "iff", .nsrc = 2, .ndst = 1 },
91 [BRW_OPCODE_WHILE] = { .name = "while", .nsrc = 2, .ndst = 0 },
92 [BRW_OPCODE_ELSE] = { .name = "else", .nsrc = 2, .ndst = 0 },
93 [BRW_OPCODE_BREAK] = { .name = "break", .nsrc = 2, .ndst = 0 },
94 [BRW_OPCODE_CONTINUE] = { .name = "cont", .nsrc = 1, .ndst = 0 },
95 [BRW_OPCODE_HALT] = { .name = "halt", .nsrc = 1, .ndst = 0 },
96 [BRW_OPCODE_MSAVE] = { .name = "msave", .nsrc = 1, .ndst = 1 },
97 [BRW_OPCODE_PUSH] = { .name = "push", .nsrc = 1, .ndst = 1 },
98 [BRW_OPCODE_MRESTORE] = { .name = "mrest", .nsrc = 1, .ndst = 1 },
99 [BRW_OPCODE_POP] = { .name = "pop", .nsrc = 2, .ndst = 0 },
100 [BRW_OPCODE_WAIT] = { .name = "wait", .nsrc = 1, .ndst = 0 },
101 [BRW_OPCODE_DO] = { .name = "do", .nsrc = 0, .ndst = 0 },
102 [BRW_OPCODE_ENDIF] = { .name = "endif", .nsrc = 2, .ndst = 0 },
103 };
104
105 static bool
106 has_jip(const struct brw_device_info *devinfo, enum opcode opcode)
107 {
108 if (devinfo->gen < 6)
109 return false;
110
111 return opcode == BRW_OPCODE_IF ||
112 opcode == BRW_OPCODE_ELSE ||
113 opcode == BRW_OPCODE_ENDIF ||
114 opcode == BRW_OPCODE_WHILE ||
115 opcode == BRW_OPCODE_BREAK ||
116 opcode == BRW_OPCODE_CONTINUE ||
117 opcode == BRW_OPCODE_HALT;
118 }
119
120 static bool
121 has_uip(const struct brw_device_info *devinfo, enum opcode opcode)
122 {
123 if (devinfo->gen < 6)
124 return false;
125
126 return (devinfo->gen >= 7 && opcode == BRW_OPCODE_IF) ||
127 (devinfo->gen >= 8 && opcode == BRW_OPCODE_ELSE) ||
128 opcode == BRW_OPCODE_BREAK ||
129 opcode == BRW_OPCODE_CONTINUE ||
130 opcode == BRW_OPCODE_HALT;
131 }
132
133 static bool
134 has_branch_ctrl(const struct brw_device_info *devinfo, enum opcode opcode)
135 {
136 if (devinfo->gen < 8)
137 return false;
138
139 return opcode == BRW_OPCODE_IF ||
140 opcode == BRW_OPCODE_ELSE ||
141 opcode == BRW_OPCODE_GOTO;
142 }
143
144 static bool
145 is_logic_instruction(unsigned opcode)
146 {
147 return opcode == BRW_OPCODE_AND ||
148 opcode == BRW_OPCODE_NOT ||
149 opcode == BRW_OPCODE_OR ||
150 opcode == BRW_OPCODE_XOR;
151 }
152
153 const char *const conditional_modifier[16] = {
154 [BRW_CONDITIONAL_NONE] = "",
155 [BRW_CONDITIONAL_Z] = ".z",
156 [BRW_CONDITIONAL_NZ] = ".nz",
157 [BRW_CONDITIONAL_G] = ".g",
158 [BRW_CONDITIONAL_GE] = ".ge",
159 [BRW_CONDITIONAL_L] = ".l",
160 [BRW_CONDITIONAL_LE] = ".le",
161 [BRW_CONDITIONAL_R] = ".r",
162 [BRW_CONDITIONAL_O] = ".o",
163 [BRW_CONDITIONAL_U] = ".u",
164 };
165
166 static const char *const m_negate[2] = {
167 [0] = "",
168 [1] = "-",
169 };
170
171 static const char *const _abs[2] = {
172 [0] = "",
173 [1] = "(abs)",
174 };
175
176 static const char *const m_bitnot[2] = { "", "~" };
177
178 static const char *const vert_stride[16] = {
179 [0] = "0",
180 [1] = "1",
181 [2] = "2",
182 [3] = "4",
183 [4] = "8",
184 [5] = "16",
185 [6] = "32",
186 [15] = "VxH",
187 };
188
189 static const char *const width[8] = {
190 [0] = "1",
191 [1] = "2",
192 [2] = "4",
193 [3] = "8",
194 [4] = "16",
195 };
196
197 static const char *const horiz_stride[4] = {
198 [0] = "0",
199 [1] = "1",
200 [2] = "2",
201 [3] = "4"
202 };
203
204 static const char *const chan_sel[4] = {
205 [0] = "x",
206 [1] = "y",
207 [2] = "z",
208 [3] = "w",
209 };
210
211 static const char *const debug_ctrl[2] = {
212 [0] = "",
213 [1] = ".breakpoint"
214 };
215
216 static const char *const saturate[2] = {
217 [0] = "",
218 [1] = ".sat"
219 };
220
221 static const char *const cmpt_ctrl[2] = {
222 [0] = "",
223 [1] = "compacted"
224 };
225
226 static const char *const accwr[2] = {
227 [0] = "",
228 [1] = "AccWrEnable"
229 };
230
231 static const char *const branch_ctrl[2] = {
232 [0] = "",
233 [1] = "BranchCtrl"
234 };
235
236 static const char *const wectrl[2] = {
237 [0] = "",
238 [1] = "WE_all"
239 };
240
241 static const char *const exec_size[8] = {
242 [0] = "1",
243 [1] = "2",
244 [2] = "4",
245 [3] = "8",
246 [4] = "16",
247 [5] = "32"
248 };
249
250 static const char *const pred_inv[2] = {
251 [0] = "+",
252 [1] = "-"
253 };
254
255 const char *const pred_ctrl_align16[16] = {
256 [1] = "",
257 [2] = ".x",
258 [3] = ".y",
259 [4] = ".z",
260 [5] = ".w",
261 [6] = ".any4h",
262 [7] = ".all4h",
263 };
264
265 static const char *const pred_ctrl_align1[16] = {
266 [BRW_PREDICATE_NORMAL] = "",
267 [BRW_PREDICATE_ALIGN1_ANYV] = ".anyv",
268 [BRW_PREDICATE_ALIGN1_ALLV] = ".allv",
269 [BRW_PREDICATE_ALIGN1_ANY2H] = ".any2h",
270 [BRW_PREDICATE_ALIGN1_ALL2H] = ".all2h",
271 [BRW_PREDICATE_ALIGN1_ANY4H] = ".any4h",
272 [BRW_PREDICATE_ALIGN1_ALL4H] = ".all4h",
273 [BRW_PREDICATE_ALIGN1_ANY8H] = ".any8h",
274 [BRW_PREDICATE_ALIGN1_ALL8H] = ".all8h",
275 [BRW_PREDICATE_ALIGN1_ANY16H] = ".any16h",
276 [BRW_PREDICATE_ALIGN1_ALL16H] = ".all16h",
277 [BRW_PREDICATE_ALIGN1_ANY32H] = ".any32h",
278 [BRW_PREDICATE_ALIGN1_ALL32H] = ".all32h",
279 };
280
281 static const char *const thread_ctrl[4] = {
282 [BRW_THREAD_NORMAL] = "",
283 [BRW_THREAD_ATOMIC] = "atomic",
284 [BRW_THREAD_SWITCH] = "switch",
285 };
286
287 static const char *const compr_ctrl[4] = {
288 [0] = "",
289 [1] = "sechalf",
290 [2] = "compr",
291 [3] = "compr4",
292 };
293
294 static const char *const dep_ctrl[4] = {
295 [0] = "",
296 [1] = "NoDDClr",
297 [2] = "NoDDChk",
298 [3] = "NoDDClr,NoDDChk",
299 };
300
301 static const char *const mask_ctrl[4] = {
302 [0] = "",
303 [1] = "nomask",
304 };
305
306 static const char *const access_mode[2] = {
307 [0] = "align1",
308 [1] = "align16",
309 };
310
311 static const char * const reg_encoding[] = {
312 [BRW_HW_REG_TYPE_UD] = "UD",
313 [BRW_HW_REG_TYPE_D] = "D",
314 [BRW_HW_REG_TYPE_UW] = "UW",
315 [BRW_HW_REG_TYPE_W] = "W",
316 [BRW_HW_REG_NON_IMM_TYPE_UB] = "UB",
317 [BRW_HW_REG_NON_IMM_TYPE_B] = "B",
318 [GEN7_HW_REG_NON_IMM_TYPE_DF] = "DF",
319 [BRW_HW_REG_TYPE_F] = "F",
320 [GEN8_HW_REG_TYPE_UQ] = "UQ",
321 [GEN8_HW_REG_TYPE_Q] = "Q",
322 [GEN8_HW_REG_NON_IMM_TYPE_HF] = "HF",
323 };
324
325 static const char *const three_source_reg_encoding[] = {
326 [BRW_3SRC_TYPE_F] = "F",
327 [BRW_3SRC_TYPE_D] = "D",
328 [BRW_3SRC_TYPE_UD] = "UD",
329 };
330
331 const int reg_type_size[] = {
332 [BRW_HW_REG_TYPE_UD] = 4,
333 [BRW_HW_REG_TYPE_D] = 4,
334 [BRW_HW_REG_TYPE_UW] = 2,
335 [BRW_HW_REG_TYPE_W] = 2,
336 [BRW_HW_REG_NON_IMM_TYPE_UB] = 1,
337 [BRW_HW_REG_NON_IMM_TYPE_B] = 1,
338 [GEN7_HW_REG_NON_IMM_TYPE_DF] = 8,
339 [BRW_HW_REG_TYPE_F] = 4,
340 [GEN8_HW_REG_TYPE_UQ] = 8,
341 [GEN8_HW_REG_TYPE_Q] = 8,
342 [GEN8_HW_REG_NON_IMM_TYPE_HF] = 2,
343 };
344
345 static const char *const reg_file[4] = {
346 [0] = "A",
347 [1] = "g",
348 [2] = "m",
349 [3] = "imm",
350 };
351
352 static const char *const writemask[16] = {
353 [0x0] = ".",
354 [0x1] = ".x",
355 [0x2] = ".y",
356 [0x3] = ".xy",
357 [0x4] = ".z",
358 [0x5] = ".xz",
359 [0x6] = ".yz",
360 [0x7] = ".xyz",
361 [0x8] = ".w",
362 [0x9] = ".xw",
363 [0xa] = ".yw",
364 [0xb] = ".xyw",
365 [0xc] = ".zw",
366 [0xd] = ".xzw",
367 [0xe] = ".yzw",
368 [0xf] = "",
369 };
370
371 static const char *const end_of_thread[2] = {
372 [0] = "",
373 [1] = "EOT"
374 };
375
376 /* SFIDs on Gen4-5 */
377 static const char *const gen4_sfid[16] = {
378 [BRW_SFID_NULL] = "null",
379 [BRW_SFID_MATH] = "math",
380 [BRW_SFID_SAMPLER] = "sampler",
381 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
382 [BRW_SFID_DATAPORT_READ] = "read",
383 [BRW_SFID_DATAPORT_WRITE] = "write",
384 [BRW_SFID_URB] = "urb",
385 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
386 [BRW_SFID_VME] = "vme",
387 };
388
389 static const char *const gen6_sfid[16] = {
390 [BRW_SFID_NULL] = "null",
391 [BRW_SFID_MATH] = "math",
392 [BRW_SFID_SAMPLER] = "sampler",
393 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
394 [BRW_SFID_URB] = "urb",
395 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
396 [GEN6_SFID_DATAPORT_SAMPLER_CACHE] = "sampler",
397 [GEN6_SFID_DATAPORT_RENDER_CACHE] = "render",
398 [GEN6_SFID_DATAPORT_CONSTANT_CACHE] = "const",
399 [GEN7_SFID_DATAPORT_DATA_CACHE] = "data",
400 [GEN7_SFID_PIXEL_INTERPOLATOR] = "pixel interp",
401 [HSW_SFID_DATAPORT_DATA_CACHE_1] = "dp data 1",
402 [HSW_SFID_CRE] = "cre",
403 };
404
405 static const char *const gen7_gateway_subfuncid[8] = {
406 [BRW_MESSAGE_GATEWAY_SFID_OPEN_GATEWAY] = "open",
407 [BRW_MESSAGE_GATEWAY_SFID_CLOSE_GATEWAY] = "close",
408 [BRW_MESSAGE_GATEWAY_SFID_FORWARD_MSG] = "forward msg",
409 [BRW_MESSAGE_GATEWAY_SFID_GET_TIMESTAMP] = "get timestamp",
410 [BRW_MESSAGE_GATEWAY_SFID_BARRIER_MSG] = "barrier msg",
411 [BRW_MESSAGE_GATEWAY_SFID_UPDATE_GATEWAY_STATE] = "update state",
412 [BRW_MESSAGE_GATEWAY_SFID_MMIO_READ_WRITE] = "mmio read/write",
413 };
414
415 static const char *const gen4_dp_read_port_msg_type[4] = {
416 [0b00] = "OWord Block Read",
417 [0b01] = "OWord Dual Block Read",
418 [0b10] = "Media Block Read",
419 [0b11] = "DWord Scattered Read",
420 };
421
422 static const char *const g45_dp_read_port_msg_type[8] = {
423 [0b000] = "OWord Block Read",
424 [0b010] = "OWord Dual Block Read",
425 [0b100] = "Media Block Read",
426 [0b110] = "DWord Scattered Read",
427 [0b001] = "Render Target UNORM Read",
428 [0b011] = "AVC Loop Filter Read",
429 };
430
431 static const char *const dp_write_port_msg_type[8] = {
432 [0b000] = "OWord block write",
433 [0b001] = "OWord dual block write",
434 [0b010] = "media block write",
435 [0b011] = "DWord scattered write",
436 [0b100] = "RT write",
437 [0b101] = "streamed VB write",
438 [0b110] = "RT UNORM write", /* G45+ */
439 [0b111] = "flush render cache",
440 };
441
442 static const char *const dp_rc_msg_type_gen6[16] = {
443 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read",
444 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read",
445 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read",
446 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read",
447 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] =
448 "OWORD unaligned block read",
449 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read",
450 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write",
451 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write",
452 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] =
453 "OWORD dual block write",
454 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write",
455 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] =
456 "DWORD scattered write",
457 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write",
458 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write",
459 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORM write",
460 };
461
462 static const char *const m_rt_write_subtype[] = {
463 [0b000] = "SIMD16",
464 [0b001] = "SIMD16/RepData",
465 [0b010] = "SIMD8/DualSrcLow",
466 [0b011] = "SIMD8/DualSrcHigh",
467 [0b100] = "SIMD8",
468 [0b101] = "SIMD8/ImageWrite", /* Gen6+ */
469 [0b111] = "SIMD16/RepData-111", /* no idea how this is different than 1 */
470 };
471
472 static const char *const dp_dc0_msg_type_gen7[16] = {
473 [GEN7_DATAPORT_DC_OWORD_BLOCK_READ] = "DC OWORD block read",
474 [GEN7_DATAPORT_DC_UNALIGNED_OWORD_BLOCK_READ] =
475 "DC unaligned OWORD block read",
476 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_READ] = "DC OWORD dual block read",
477 [GEN7_DATAPORT_DC_DWORD_SCATTERED_READ] = "DC DWORD scattered read",
478 [GEN7_DATAPORT_DC_BYTE_SCATTERED_READ] = "DC byte scattered read",
479 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_READ] = "DC untyped surface read",
480 [GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP] = "DC untyped atomic",
481 [GEN7_DATAPORT_DC_MEMORY_FENCE] = "DC mfence",
482 [GEN7_DATAPORT_DC_OWORD_BLOCK_WRITE] = "DC OWORD block write",
483 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_WRITE] = "DC OWORD dual block write",
484 [GEN7_DATAPORT_DC_DWORD_SCATTERED_WRITE] = "DC DWORD scatterd write",
485 [GEN7_DATAPORT_DC_BYTE_SCATTERED_WRITE] = "DC byte scattered write",
486 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
487 };
488
489 static const char *const dp_dc1_msg_type_hsw[16] = {
490 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ] = "untyped surface read",
491 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP] = "DC untyped atomic op",
492 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2] =
493 "DC untyped 4x2 atomic op",
494 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_READ] = "DC media block read",
495 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ] = "DC typed surface read",
496 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP] = "DC typed atomic",
497 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2] = "DC typed 4x2 atomic op",
498 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
499 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_WRITE] = "DC media block write",
500 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP] = "DC atomic counter op",
501 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2] =
502 "DC 4x2 atomic counter op",
503 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE] = "DC typed surface write",
504 };
505
506 static const char *const aop[16] = {
507 [BRW_AOP_AND] = "and",
508 [BRW_AOP_OR] = "or",
509 [BRW_AOP_XOR] = "xor",
510 [BRW_AOP_MOV] = "mov",
511 [BRW_AOP_INC] = "inc",
512 [BRW_AOP_DEC] = "dec",
513 [BRW_AOP_ADD] = "add",
514 [BRW_AOP_SUB] = "sub",
515 [BRW_AOP_REVSUB] = "revsub",
516 [BRW_AOP_IMAX] = "imax",
517 [BRW_AOP_IMIN] = "imin",
518 [BRW_AOP_UMAX] = "umax",
519 [BRW_AOP_UMIN] = "umin",
520 [BRW_AOP_CMPWR] = "cmpwr",
521 [BRW_AOP_PREDEC] = "predec",
522 };
523
524 static const char * const pixel_interpolator_msg_types[4] = {
525 [GEN7_PIXEL_INTERPOLATOR_LOC_SHARED_OFFSET] = "per_message_offset",
526 [GEN7_PIXEL_INTERPOLATOR_LOC_SAMPLE] = "sample_position",
527 [GEN7_PIXEL_INTERPOLATOR_LOC_CENTROID] = "centroid",
528 [GEN7_PIXEL_INTERPOLATOR_LOC_PER_SLOT_OFFSET] = "per_slot_offset",
529 };
530
531 static const char *const math_function[16] = {
532 [BRW_MATH_FUNCTION_INV] = "inv",
533 [BRW_MATH_FUNCTION_LOG] = "log",
534 [BRW_MATH_FUNCTION_EXP] = "exp",
535 [BRW_MATH_FUNCTION_SQRT] = "sqrt",
536 [BRW_MATH_FUNCTION_RSQ] = "rsq",
537 [BRW_MATH_FUNCTION_SIN] = "sin",
538 [BRW_MATH_FUNCTION_COS] = "cos",
539 [BRW_MATH_FUNCTION_SINCOS] = "sincos",
540 [BRW_MATH_FUNCTION_FDIV] = "fdiv",
541 [BRW_MATH_FUNCTION_POW] = "pow",
542 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] = "intdivmod",
543 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] = "intdiv",
544 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER] = "intmod",
545 [GEN8_MATH_FUNCTION_INVM] = "invm",
546 [GEN8_MATH_FUNCTION_RSQRTM] = "rsqrtm",
547 };
548
549 static const char *const math_saturate[2] = {
550 [0] = "",
551 [1] = "sat"
552 };
553
554 static const char *const math_signed[2] = {
555 [0] = "",
556 [1] = "signed"
557 };
558
559 static const char *const math_scalar[2] = {
560 [0] = "",
561 [1] = "scalar"
562 };
563
564 static const char *const math_precision[2] = {
565 [0] = "",
566 [1] = "partial_precision"
567 };
568
569 static const char *const gen5_urb_opcode[] = {
570 [0] = "urb_write",
571 [1] = "ff_sync",
572 };
573
574 static const char *const gen7_urb_opcode[] = {
575 [BRW_URB_OPCODE_WRITE_HWORD] = "write HWord",
576 [BRW_URB_OPCODE_WRITE_OWORD] = "write OWord",
577 [BRW_URB_OPCODE_READ_HWORD] = "read HWord",
578 [BRW_URB_OPCODE_READ_OWORD] = "read OWord",
579 [GEN7_URB_OPCODE_ATOMIC_MOV] = "atomic mov", /* Gen7+ */
580 [GEN7_URB_OPCODE_ATOMIC_INC] = "atomic inc", /* Gen7+ */
581 [GEN8_URB_OPCODE_ATOMIC_ADD] = "atomic add", /* Gen8+ */
582 [GEN8_URB_OPCODE_SIMD8_WRITE] = "SIMD8 write", /* Gen8+ */
583 [GEN8_URB_OPCODE_SIMD8_READ] = "SIMD8 read", /* Gen8+ */
584 /* [9-15] - reserved */
585 };
586
587 static const char *const urb_swizzle[4] = {
588 [BRW_URB_SWIZZLE_NONE] = "",
589 [BRW_URB_SWIZZLE_INTERLEAVE] = "interleave",
590 [BRW_URB_SWIZZLE_TRANSPOSE] = "transpose",
591 };
592
593 static const char *const urb_allocate[2] = {
594 [0] = "",
595 [1] = "allocate"
596 };
597
598 static const char *const urb_used[2] = {
599 [0] = "",
600 [1] = "used"
601 };
602
603 static const char *const urb_complete[2] = {
604 [0] = "",
605 [1] = "complete"
606 };
607
608 static const char *const gen5_sampler_msg_type[] = {
609 [GEN5_SAMPLER_MESSAGE_SAMPLE] = "sample",
610 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS] = "sample_b",
611 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD] = "sample_l",
612 [GEN5_SAMPLER_MESSAGE_SAMPLE_COMPARE] = "sample_c",
613 [GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS] = "sample_d",
614 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS_COMPARE] = "sample_b_c",
615 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE] = "sample_l_c",
616 [GEN5_SAMPLER_MESSAGE_SAMPLE_LD] = "ld",
617 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4] = "gather4",
618 [GEN5_SAMPLER_MESSAGE_LOD] = "lod",
619 [GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO] = "resinfo",
620 [GEN6_SAMPLER_MESSAGE_SAMPLE_SAMPLEINFO] = "sampleinfo",
621 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_C] = "gather4_c",
622 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO] = "gather4_po",
623 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO_C] = "gather4_po_c",
624 [HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE] = "sample_d_c",
625 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS] = "ld_mcs",
626 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DMS] = "ld2dms",
627 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS] = "ld2dss",
628 };
629
630 static const char *const gen5_sampler_simd_mode[4] = {
631 [BRW_SAMPLER_SIMD_MODE_SIMD4X2] = "SIMD4x2",
632 [BRW_SAMPLER_SIMD_MODE_SIMD8] = "SIMD8",
633 [BRW_SAMPLER_SIMD_MODE_SIMD16] = "SIMD16",
634 [BRW_SAMPLER_SIMD_MODE_SIMD32_64] = "SIMD32/64",
635 };
636
637 static const char *const sampler_target_format[4] = {
638 [0] = "F",
639 [2] = "UD",
640 [3] = "D"
641 };
642
643
644 static int column;
645
646 static int
647 string(FILE *file, const char *string)
648 {
649 fputs(string, file);
650 column += strlen(string);
651 return 0;
652 }
653
654 static int
655 format(FILE *f, const char *format, ...) PRINTFLIKE(2, 3);
656
657 static int
658 format(FILE *f, const char *format, ...)
659 {
660 char buf[1024];
661 va_list args;
662 va_start(args, format);
663
664 vsnprintf(buf, sizeof(buf) - 1, format, args);
665 va_end(args);
666 string(f, buf);
667 return 0;
668 }
669
670 static int
671 newline(FILE *f)
672 {
673 putc('\n', f);
674 column = 0;
675 return 0;
676 }
677
678 static int
679 pad(FILE *f, int c)
680 {
681 do
682 string(f, " ");
683 while (column < c);
684 return 0;
685 }
686
687 static int
688 control(FILE *file, const char *name, const char *const ctrl[],
689 unsigned id, int *space)
690 {
691 if (!ctrl[id]) {
692 fprintf(file, "*** invalid %s value %d ", name, id);
693 return 1;
694 }
695 if (ctrl[id][0]) {
696 if (space && *space)
697 string(file, " ");
698 string(file, ctrl[id]);
699 if (space)
700 *space = 1;
701 }
702 return 0;
703 }
704
705 static int
706 print_opcode(FILE *file, int id)
707 {
708 if (!opcode_descs[id].name) {
709 format(file, "*** invalid opcode value %d ", id);
710 return 1;
711 }
712 string(file, opcode_descs[id].name);
713 return 0;
714 }
715
716 static int
717 reg(FILE *file, unsigned _reg_file, unsigned _reg_nr)
718 {
719 int err = 0;
720
721 /* Clear the Compr4 instruction compression bit. */
722 if (_reg_file == BRW_MESSAGE_REGISTER_FILE)
723 _reg_nr &= ~(1 << 7);
724
725 if (_reg_file == BRW_ARCHITECTURE_REGISTER_FILE) {
726 switch (_reg_nr & 0xf0) {
727 case BRW_ARF_NULL:
728 string(file, "null");
729 break;
730 case BRW_ARF_ADDRESS:
731 format(file, "a%d", _reg_nr & 0x0f);
732 break;
733 case BRW_ARF_ACCUMULATOR:
734 format(file, "acc%d", _reg_nr & 0x0f);
735 break;
736 case BRW_ARF_FLAG:
737 format(file, "f%d", _reg_nr & 0x0f);
738 break;
739 case BRW_ARF_MASK:
740 format(file, "mask%d", _reg_nr & 0x0f);
741 break;
742 case BRW_ARF_MASK_STACK:
743 format(file, "msd%d", _reg_nr & 0x0f);
744 break;
745 case BRW_ARF_STATE:
746 format(file, "sr%d", _reg_nr & 0x0f);
747 break;
748 case BRW_ARF_CONTROL:
749 format(file, "cr%d", _reg_nr & 0x0f);
750 break;
751 case BRW_ARF_NOTIFICATION_COUNT:
752 format(file, "n%d", _reg_nr & 0x0f);
753 break;
754 case BRW_ARF_IP:
755 string(file, "ip");
756 return -1;
757 break;
758 case BRW_ARF_TDR:
759 format(file, "tdr0");
760 return -1;
761 case BRW_ARF_TIMESTAMP:
762 format(file, "tm%d", _reg_nr & 0x0f);
763 break;
764 default:
765 format(file, "ARF%d", _reg_nr);
766 break;
767 }
768 } else {
769 err |= control(file, "src reg file", reg_file, _reg_file, NULL);
770 format(file, "%d", _reg_nr);
771 }
772 return err;
773 }
774
775 static int
776 dest(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
777 {
778 int err = 0;
779
780 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
781 if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
782 err |= reg(file, brw_inst_dst_reg_file(devinfo, inst),
783 brw_inst_dst_da_reg_nr(devinfo, inst));
784 if (err == -1)
785 return 0;
786 if (brw_inst_dst_da1_subreg_nr(devinfo, inst))
787 format(file, ".%ld", brw_inst_dst_da1_subreg_nr(devinfo, inst) /
788 reg_type_size[brw_inst_dst_reg_type(devinfo, inst)]);
789 string(file, "<");
790 err |= control(file, "horiz stride", horiz_stride,
791 brw_inst_dst_hstride(devinfo, inst), NULL);
792 string(file, ">");
793 err |= control(file, "dest reg encoding", reg_encoding,
794 brw_inst_dst_reg_type(devinfo, inst), NULL);
795 } else {
796 string(file, "g[a0");
797 if (brw_inst_dst_ia_subreg_nr(devinfo, inst))
798 format(file, ".%ld", brw_inst_dst_ia_subreg_nr(devinfo, inst) /
799 reg_type_size[brw_inst_dst_reg_type(devinfo, inst)]);
800 if (brw_inst_dst_ia1_addr_imm(devinfo, inst))
801 format(file, " %d", brw_inst_dst_ia1_addr_imm(devinfo, inst));
802 string(file, "]<");
803 err |= control(file, "horiz stride", horiz_stride,
804 brw_inst_dst_hstride(devinfo, inst), NULL);
805 string(file, ">");
806 err |= control(file, "dest reg encoding", reg_encoding,
807 brw_inst_dst_reg_type(devinfo, inst), NULL);
808 }
809 } else {
810 if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
811 err |= reg(file, brw_inst_dst_reg_file(devinfo, inst),
812 brw_inst_dst_da_reg_nr(devinfo, inst));
813 if (err == -1)
814 return 0;
815 if (brw_inst_dst_da16_subreg_nr(devinfo, inst))
816 format(file, ".%ld", brw_inst_dst_da16_subreg_nr(devinfo, inst) /
817 reg_type_size[brw_inst_dst_reg_type(devinfo, inst)]);
818 string(file, "<1>");
819 err |= control(file, "writemask", writemask,
820 brw_inst_da16_writemask(devinfo, inst), NULL);
821 err |= control(file, "dest reg encoding", reg_encoding,
822 brw_inst_dst_reg_type(devinfo, inst), NULL);
823 } else {
824 err = 1;
825 string(file, "Indirect align16 address mode not supported");
826 }
827 }
828
829 return 0;
830 }
831
832 static int
833 dest_3src(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
834 {
835 int err = 0;
836 uint32_t reg_file;
837
838 if (devinfo->gen == 6 && brw_inst_3src_dst_reg_file(devinfo, inst))
839 reg_file = BRW_MESSAGE_REGISTER_FILE;
840 else
841 reg_file = BRW_GENERAL_REGISTER_FILE;
842
843 err |= reg(file, reg_file, brw_inst_3src_dst_reg_nr(devinfo, inst));
844 if (err == -1)
845 return 0;
846 if (brw_inst_3src_dst_subreg_nr(devinfo, inst))
847 format(file, ".%ld", brw_inst_3src_dst_subreg_nr(devinfo, inst));
848 string(file, "<1>");
849 err |= control(file, "writemask", writemask,
850 brw_inst_3src_dst_writemask(devinfo, inst), NULL);
851 err |= control(file, "dest reg encoding", three_source_reg_encoding,
852 brw_inst_3src_dst_type(devinfo, inst), NULL);
853
854 return 0;
855 }
856
857 static int
858 src_align1_region(FILE *file,
859 unsigned _vert_stride, unsigned _width,
860 unsigned _horiz_stride)
861 {
862 int err = 0;
863 string(file, "<");
864 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
865 string(file, ",");
866 err |= control(file, "width", width, _width, NULL);
867 string(file, ",");
868 err |= control(file, "horiz_stride", horiz_stride, _horiz_stride, NULL);
869 string(file, ">");
870 return err;
871 }
872
873 static int
874 src_da1(FILE *file,
875 const struct brw_device_info *devinfo,
876 unsigned opcode,
877 unsigned type, unsigned _reg_file,
878 unsigned _vert_stride, unsigned _width, unsigned _horiz_stride,
879 unsigned reg_num, unsigned sub_reg_num, unsigned __abs,
880 unsigned _negate)
881 {
882 int err = 0;
883
884 if (devinfo->gen >= 8 && is_logic_instruction(opcode))
885 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
886 else
887 err |= control(file, "negate", m_negate, _negate, NULL);
888
889 err |= control(file, "abs", _abs, __abs, NULL);
890
891 err |= reg(file, _reg_file, reg_num);
892 if (err == -1)
893 return 0;
894 if (sub_reg_num)
895 format(file, ".%d", sub_reg_num / reg_type_size[type]); /* use formal style like spec */
896 src_align1_region(file, _vert_stride, _width, _horiz_stride);
897 err |= control(file, "src reg encoding", reg_encoding, type, NULL);
898 return err;
899 }
900
901 static int
902 src_ia1(FILE *file,
903 const struct brw_device_info *devinfo,
904 unsigned opcode,
905 unsigned type,
906 unsigned _reg_file,
907 int _addr_imm,
908 unsigned _addr_subreg_nr,
909 unsigned _negate,
910 unsigned __abs,
911 unsigned _horiz_stride, unsigned _width, unsigned _vert_stride)
912 {
913 int err = 0;
914
915 if (devinfo->gen >= 8 && is_logic_instruction(opcode))
916 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
917 else
918 err |= control(file, "negate", m_negate, _negate, NULL);
919
920 err |= control(file, "abs", _abs, __abs, NULL);
921
922 string(file, "g[a0");
923 if (_addr_subreg_nr)
924 format(file, ".%d", _addr_subreg_nr);
925 if (_addr_imm)
926 format(file, " %d", _addr_imm);
927 string(file, "]");
928 src_align1_region(file, _vert_stride, _width, _horiz_stride);
929 err |= control(file, "src reg encoding", reg_encoding, type, NULL);
930 return err;
931 }
932
933 static int
934 src_swizzle(FILE *file, unsigned swiz)
935 {
936 unsigned x = BRW_GET_SWZ(swiz, BRW_CHANNEL_X);
937 unsigned y = BRW_GET_SWZ(swiz, BRW_CHANNEL_Y);
938 unsigned z = BRW_GET_SWZ(swiz, BRW_CHANNEL_Z);
939 unsigned w = BRW_GET_SWZ(swiz, BRW_CHANNEL_W);
940 int err = 0;
941
942 if (x == y && x == z && x == w) {
943 string(file, ".");
944 err |= control(file, "channel select", chan_sel, x, NULL);
945 } else if (swiz != BRW_SWIZZLE_XYZW) {
946 string(file, ".");
947 err |= control(file, "channel select", chan_sel, x, NULL);
948 err |= control(file, "channel select", chan_sel, y, NULL);
949 err |= control(file, "channel select", chan_sel, z, NULL);
950 err |= control(file, "channel select", chan_sel, w, NULL);
951 }
952 return err;
953 }
954
955 static int
956 src_da16(FILE *file,
957 const struct brw_device_info *devinfo,
958 unsigned opcode,
959 unsigned _reg_type,
960 unsigned _reg_file,
961 unsigned _vert_stride,
962 unsigned _reg_nr,
963 unsigned _subreg_nr,
964 unsigned __abs,
965 unsigned _negate,
966 unsigned swz_x, unsigned swz_y, unsigned swz_z, unsigned swz_w)
967 {
968 int err = 0;
969
970 if (devinfo->gen >= 8 && is_logic_instruction(opcode))
971 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
972 else
973 err |= control(file, "negate", m_negate, _negate, NULL);
974
975 err |= control(file, "abs", _abs, __abs, NULL);
976
977 err |= reg(file, _reg_file, _reg_nr);
978 if (err == -1)
979 return 0;
980 if (_subreg_nr)
981 /* bit4 for subreg number byte addressing. Make this same meaning as
982 in da1 case, so output looks consistent. */
983 format(file, ".%d", 16 / reg_type_size[_reg_type]);
984 string(file, "<");
985 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
986 string(file, ",4,1>");
987 err |= src_swizzle(file, BRW_SWIZZLE4(swz_x, swz_y, swz_z, swz_w));
988 err |= control(file, "src da16 reg type", reg_encoding, _reg_type, NULL);
989 return err;
990 }
991
992 static int
993 src0_3src(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
994 {
995 int err = 0;
996 unsigned src0_subreg_nr = brw_inst_3src_src0_subreg_nr(devinfo, inst);
997
998 err |= control(file, "negate", m_negate,
999 brw_inst_3src_src0_negate(devinfo, inst), NULL);
1000 err |= control(file, "abs", _abs, brw_inst_3src_src0_abs(devinfo, inst), NULL);
1001
1002 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
1003 brw_inst_3src_src0_reg_nr(devinfo, inst));
1004 if (err == -1)
1005 return 0;
1006 if (src0_subreg_nr || brw_inst_3src_src0_rep_ctrl(devinfo, inst))
1007 format(file, ".%d", src0_subreg_nr);
1008 if (brw_inst_3src_src0_rep_ctrl(devinfo, inst))
1009 string(file, "<0,1,0>");
1010 else {
1011 string(file, "<4,4,1>");
1012 err |= src_swizzle(file, brw_inst_3src_src0_swizzle(devinfo, inst));
1013 }
1014 err |= control(file, "src da16 reg type", three_source_reg_encoding,
1015 brw_inst_3src_src_type(devinfo, inst), NULL);
1016 return err;
1017 }
1018
1019 static int
1020 src1_3src(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
1021 {
1022 int err = 0;
1023 unsigned src1_subreg_nr = brw_inst_3src_src1_subreg_nr(devinfo, inst);
1024
1025 err |= control(file, "negate", m_negate,
1026 brw_inst_3src_src1_negate(devinfo, inst), NULL);
1027 err |= control(file, "abs", _abs, brw_inst_3src_src1_abs(devinfo, inst), NULL);
1028
1029 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
1030 brw_inst_3src_src1_reg_nr(devinfo, inst));
1031 if (err == -1)
1032 return 0;
1033 if (src1_subreg_nr || brw_inst_3src_src1_rep_ctrl(devinfo, inst))
1034 format(file, ".%d", src1_subreg_nr);
1035 if (brw_inst_3src_src1_rep_ctrl(devinfo, inst))
1036 string(file, "<0,1,0>");
1037 else {
1038 string(file, "<4,4,1>");
1039 err |= src_swizzle(file, brw_inst_3src_src1_swizzle(devinfo, inst));
1040 }
1041 err |= control(file, "src da16 reg type", three_source_reg_encoding,
1042 brw_inst_3src_src_type(devinfo, inst), NULL);
1043 return err;
1044 }
1045
1046
1047 static int
1048 src2_3src(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
1049 {
1050 int err = 0;
1051 unsigned src2_subreg_nr = brw_inst_3src_src2_subreg_nr(devinfo, inst);
1052
1053 err |= control(file, "negate", m_negate,
1054 brw_inst_3src_src2_negate(devinfo, inst), NULL);
1055 err |= control(file, "abs", _abs, brw_inst_3src_src2_abs(devinfo, inst), NULL);
1056
1057 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
1058 brw_inst_3src_src2_reg_nr(devinfo, inst));
1059 if (err == -1)
1060 return 0;
1061 if (src2_subreg_nr || brw_inst_3src_src2_rep_ctrl(devinfo, inst))
1062 format(file, ".%d", src2_subreg_nr);
1063 if (brw_inst_3src_src2_rep_ctrl(devinfo, inst))
1064 string(file, "<0,1,0>");
1065 else {
1066 string(file, "<4,4,1>");
1067 err |= src_swizzle(file, brw_inst_3src_src2_swizzle(devinfo, inst));
1068 }
1069 err |= control(file, "src da16 reg type", three_source_reg_encoding,
1070 brw_inst_3src_src_type(devinfo, inst), NULL);
1071 return err;
1072 }
1073
1074 static int
1075 imm(FILE *file, const struct brw_device_info *devinfo, unsigned type, brw_inst *inst)
1076 {
1077 switch (type) {
1078 case BRW_HW_REG_TYPE_UD:
1079 format(file, "0x%08xUD", brw_inst_imm_ud(devinfo, inst));
1080 break;
1081 case BRW_HW_REG_TYPE_D:
1082 format(file, "%dD", brw_inst_imm_d(devinfo, inst));
1083 break;
1084 case BRW_HW_REG_TYPE_UW:
1085 format(file, "0x%04xUW", (uint16_t) brw_inst_imm_ud(devinfo, inst));
1086 break;
1087 case BRW_HW_REG_TYPE_W:
1088 format(file, "%dW", (int16_t) brw_inst_imm_d(devinfo, inst));
1089 break;
1090 case BRW_HW_REG_IMM_TYPE_UV:
1091 format(file, "0x%08xUV", brw_inst_imm_ud(devinfo, inst));
1092 break;
1093 case BRW_HW_REG_IMM_TYPE_VF:
1094 format(file, "[%-gF, %-gF, %-gF, %-gF]VF",
1095 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst)),
1096 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 8),
1097 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 16),
1098 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 24));
1099 break;
1100 case BRW_HW_REG_IMM_TYPE_V:
1101 format(file, "0x%08xV", brw_inst_imm_ud(devinfo, inst));
1102 break;
1103 case BRW_HW_REG_TYPE_F:
1104 format(file, "%-gF", brw_inst_imm_f(devinfo, inst));
1105 break;
1106 case GEN8_HW_REG_IMM_TYPE_DF:
1107 string(file, "Double IMM");
1108 break;
1109 case GEN8_HW_REG_IMM_TYPE_HF:
1110 string(file, "Half Float IMM");
1111 break;
1112 }
1113 return 0;
1114 }
1115
1116 static int
1117 src0(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
1118 {
1119 if (brw_inst_src0_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) {
1120 return imm(file, devinfo, brw_inst_src0_reg_type(devinfo, inst), inst);
1121 } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
1122 if (brw_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1123 return src_da1(file,
1124 devinfo,
1125 brw_inst_opcode(devinfo, inst),
1126 brw_inst_src0_reg_type(devinfo, inst),
1127 brw_inst_src0_reg_file(devinfo, inst),
1128 brw_inst_src0_vstride(devinfo, inst),
1129 brw_inst_src0_width(devinfo, inst),
1130 brw_inst_src0_hstride(devinfo, inst),
1131 brw_inst_src0_da_reg_nr(devinfo, inst),
1132 brw_inst_src0_da1_subreg_nr(devinfo, inst),
1133 brw_inst_src0_abs(devinfo, inst),
1134 brw_inst_src0_negate(devinfo, inst));
1135 } else {
1136 return src_ia1(file,
1137 devinfo,
1138 brw_inst_opcode(devinfo, inst),
1139 brw_inst_src0_reg_type(devinfo, inst),
1140 brw_inst_src0_reg_file(devinfo, inst),
1141 brw_inst_src0_ia1_addr_imm(devinfo, inst),
1142 brw_inst_src0_ia_subreg_nr(devinfo, inst),
1143 brw_inst_src0_negate(devinfo, inst),
1144 brw_inst_src0_abs(devinfo, inst),
1145 brw_inst_src0_hstride(devinfo, inst),
1146 brw_inst_src0_width(devinfo, inst),
1147 brw_inst_src0_vstride(devinfo, inst));
1148 }
1149 } else {
1150 if (brw_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1151 return src_da16(file,
1152 devinfo,
1153 brw_inst_opcode(devinfo, inst),
1154 brw_inst_src0_reg_type(devinfo, inst),
1155 brw_inst_src0_reg_file(devinfo, inst),
1156 brw_inst_src0_vstride(devinfo, inst),
1157 brw_inst_src0_da_reg_nr(devinfo, inst),
1158 brw_inst_src0_da16_subreg_nr(devinfo, inst),
1159 brw_inst_src0_abs(devinfo, inst),
1160 brw_inst_src0_negate(devinfo, inst),
1161 brw_inst_src0_da16_swiz_x(devinfo, inst),
1162 brw_inst_src0_da16_swiz_y(devinfo, inst),
1163 brw_inst_src0_da16_swiz_z(devinfo, inst),
1164 brw_inst_src0_da16_swiz_w(devinfo, inst));
1165 } else {
1166 string(file, "Indirect align16 address mode not supported");
1167 return 1;
1168 }
1169 }
1170 }
1171
1172 static int
1173 src1(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
1174 {
1175 if (brw_inst_src1_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) {
1176 return imm(file, devinfo, brw_inst_src1_reg_type(devinfo, inst), inst);
1177 } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
1178 if (brw_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1179 return src_da1(file,
1180 devinfo,
1181 brw_inst_opcode(devinfo, inst),
1182 brw_inst_src1_reg_type(devinfo, inst),
1183 brw_inst_src1_reg_file(devinfo, inst),
1184 brw_inst_src1_vstride(devinfo, inst),
1185 brw_inst_src1_width(devinfo, inst),
1186 brw_inst_src1_hstride(devinfo, inst),
1187 brw_inst_src1_da_reg_nr(devinfo, inst),
1188 brw_inst_src1_da1_subreg_nr(devinfo, inst),
1189 brw_inst_src1_abs(devinfo, inst),
1190 brw_inst_src1_negate(devinfo, inst));
1191 } else {
1192 return src_ia1(file,
1193 devinfo,
1194 brw_inst_opcode(devinfo, inst),
1195 brw_inst_src1_reg_type(devinfo, inst),
1196 brw_inst_src1_reg_file(devinfo, inst),
1197 brw_inst_src1_ia1_addr_imm(devinfo, inst),
1198 brw_inst_src1_ia_subreg_nr(devinfo, inst),
1199 brw_inst_src1_negate(devinfo, inst),
1200 brw_inst_src1_abs(devinfo, inst),
1201 brw_inst_src1_hstride(devinfo, inst),
1202 brw_inst_src1_width(devinfo, inst),
1203 brw_inst_src1_vstride(devinfo, inst));
1204 }
1205 } else {
1206 if (brw_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1207 return src_da16(file,
1208 devinfo,
1209 brw_inst_opcode(devinfo, inst),
1210 brw_inst_src1_reg_type(devinfo, inst),
1211 brw_inst_src1_reg_file(devinfo, inst),
1212 brw_inst_src1_vstride(devinfo, inst),
1213 brw_inst_src1_da_reg_nr(devinfo, inst),
1214 brw_inst_src1_da16_subreg_nr(devinfo, inst),
1215 brw_inst_src1_abs(devinfo, inst),
1216 brw_inst_src1_negate(devinfo, inst),
1217 brw_inst_src1_da16_swiz_x(devinfo, inst),
1218 brw_inst_src1_da16_swiz_y(devinfo, inst),
1219 brw_inst_src1_da16_swiz_z(devinfo, inst),
1220 brw_inst_src1_da16_swiz_w(devinfo, inst));
1221 } else {
1222 string(file, "Indirect align16 address mode not supported");
1223 return 1;
1224 }
1225 }
1226 }
1227
1228 static int
1229 qtr_ctrl(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
1230 {
1231 int qtr_ctl = brw_inst_qtr_control(devinfo, inst);
1232 int exec_size = 1 << brw_inst_exec_size(devinfo, inst);
1233
1234 if (exec_size == 8) {
1235 switch (qtr_ctl) {
1236 case 0:
1237 string(file, " 1Q");
1238 break;
1239 case 1:
1240 string(file, " 2Q");
1241 break;
1242 case 2:
1243 string(file, " 3Q");
1244 break;
1245 case 3:
1246 string(file, " 4Q");
1247 break;
1248 }
1249 } else if (exec_size == 16) {
1250 if (qtr_ctl < 2)
1251 string(file, " 1H");
1252 else
1253 string(file, " 2H");
1254 }
1255 return 0;
1256 }
1257
1258 #ifdef DEBUG
1259 static __attribute__((__unused__)) int
1260 brw_disassemble_imm(const struct brw_device_info *devinfo,
1261 uint32_t dw3, uint32_t dw2, uint32_t dw1, uint32_t dw0)
1262 {
1263 brw_inst inst;
1264 inst.data[0] = (((uint64_t) dw1) << 32) | ((uint64_t) dw0);
1265 inst.data[1] = (((uint64_t) dw3) << 32) | ((uint64_t) dw2);
1266 return brw_disassemble_inst(stderr, devinfo, &inst, false);
1267 }
1268 #endif
1269
1270 int
1271 brw_disassemble_inst(FILE *file, const struct brw_device_info *devinfo,
1272 brw_inst *inst, bool is_compacted)
1273 {
1274 int err = 0;
1275 int space = 0;
1276
1277 const enum opcode opcode = brw_inst_opcode(devinfo, inst);
1278
1279 if (brw_inst_pred_control(devinfo, inst)) {
1280 string(file, "(");
1281 err |= control(file, "predicate inverse", pred_inv,
1282 brw_inst_pred_inv(devinfo, inst), NULL);
1283 format(file, "f%ld", devinfo->gen >= 7 ? brw_inst_flag_reg_nr(devinfo, inst) : 0);
1284 if (brw_inst_flag_subreg_nr(devinfo, inst))
1285 format(file, ".%ld", brw_inst_flag_subreg_nr(devinfo, inst));
1286 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
1287 err |= control(file, "predicate control align1", pred_ctrl_align1,
1288 brw_inst_pred_control(devinfo, inst), NULL);
1289 } else {
1290 err |= control(file, "predicate control align16", pred_ctrl_align16,
1291 brw_inst_pred_control(devinfo, inst), NULL);
1292 }
1293 string(file, ") ");
1294 }
1295
1296 err |= print_opcode(file, opcode);
1297 err |= control(file, "saturate", saturate, brw_inst_saturate(devinfo, inst),
1298 NULL);
1299
1300 err |= control(file, "debug control", debug_ctrl,
1301 brw_inst_debug_control(devinfo, inst), NULL);
1302
1303 if (opcode == BRW_OPCODE_MATH) {
1304 string(file, " ");
1305 err |= control(file, "function", math_function,
1306 brw_inst_math_function(devinfo, inst), NULL);
1307 } else if (opcode != BRW_OPCODE_SEND && opcode != BRW_OPCODE_SENDC) {
1308 err |= control(file, "conditional modifier", conditional_modifier,
1309 brw_inst_cond_modifier(devinfo, inst), NULL);
1310
1311 /* If we're using the conditional modifier, print which flags reg is
1312 * used for it. Note that on gen6+, the embedded-condition SEL and
1313 * control flow doesn't update flags.
1314 */
1315 if (brw_inst_cond_modifier(devinfo, inst) &&
1316 (devinfo->gen < 6 || (opcode != BRW_OPCODE_SEL &&
1317 opcode != BRW_OPCODE_IF &&
1318 opcode != BRW_OPCODE_WHILE))) {
1319 format(file, ".f%ld",
1320 devinfo->gen >= 7 ? brw_inst_flag_reg_nr(devinfo, inst) : 0);
1321 if (brw_inst_flag_subreg_nr(devinfo, inst))
1322 format(file, ".%ld", brw_inst_flag_subreg_nr(devinfo, inst));
1323 }
1324 }
1325
1326 if (opcode != BRW_OPCODE_NOP && opcode != BRW_OPCODE_NENOP) {
1327 string(file, "(");
1328 err |= control(file, "execution size", exec_size,
1329 brw_inst_exec_size(devinfo, inst), NULL);
1330 string(file, ")");
1331 }
1332
1333 if (opcode == BRW_OPCODE_SEND && devinfo->gen < 6)
1334 format(file, " %ld", brw_inst_base_mrf(devinfo, inst));
1335
1336 if (has_uip(devinfo, opcode)) {
1337 /* Instructions that have UIP also have JIP. */
1338 pad(file, 16);
1339 format(file, "JIP: %d", brw_inst_jip(devinfo, inst));
1340 pad(file, 32);
1341 format(file, "UIP: %d", brw_inst_uip(devinfo, inst));
1342 } else if (has_jip(devinfo, opcode)) {
1343 pad(file, 16);
1344 if (devinfo->gen >= 7) {
1345 format(file, "JIP: %d", brw_inst_jip(devinfo, inst));
1346 } else {
1347 format(file, "JIP: %d", brw_inst_gen6_jump_count(devinfo, inst));
1348 }
1349 } else if (devinfo->gen < 6 && (opcode == BRW_OPCODE_BREAK ||
1350 opcode == BRW_OPCODE_CONTINUE ||
1351 opcode == BRW_OPCODE_ELSE)) {
1352 pad(file, 16);
1353 format(file, "Jump: %d", brw_inst_gen4_jump_count(devinfo, inst));
1354 pad(file, 32);
1355 format(file, "Pop: %ld", brw_inst_gen4_pop_count(devinfo, inst));
1356 } else if (devinfo->gen < 6 && (opcode == BRW_OPCODE_IF ||
1357 opcode == BRW_OPCODE_IFF ||
1358 opcode == BRW_OPCODE_HALT)) {
1359 pad(file, 16);
1360 format(file, "Jump: %d", brw_inst_gen4_jump_count(devinfo, inst));
1361 } else if (devinfo->gen < 6 && opcode == BRW_OPCODE_ENDIF) {
1362 pad(file, 16);
1363 format(file, "Pop: %ld", brw_inst_gen4_pop_count(devinfo, inst));
1364 } else if (opcode == BRW_OPCODE_JMPI) {
1365 pad(file, 16);
1366 err |= src1(file, devinfo, inst);
1367 } else if (opcode_descs[opcode].nsrc == 3) {
1368 pad(file, 16);
1369 err |= dest_3src(file, devinfo, inst);
1370
1371 pad(file, 32);
1372 err |= src0_3src(file, devinfo, inst);
1373
1374 pad(file, 48);
1375 err |= src1_3src(file, devinfo, inst);
1376
1377 pad(file, 64);
1378 err |= src2_3src(file, devinfo, inst);
1379 } else {
1380 if (opcode_descs[opcode].ndst > 0) {
1381 pad(file, 16);
1382 err |= dest(file, devinfo, inst);
1383 }
1384
1385 if (opcode_descs[opcode].nsrc > 0) {
1386 pad(file, 32);
1387 err |= src0(file, devinfo, inst);
1388 }
1389
1390 if (opcode_descs[opcode].nsrc > 1) {
1391 pad(file, 48);
1392 err |= src1(file, devinfo, inst);
1393 }
1394 }
1395
1396 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) {
1397 enum brw_message_target sfid = brw_inst_sfid(devinfo, inst);
1398
1399 if (brw_inst_src1_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE) {
1400 /* show the indirect descriptor source */
1401 pad(file, 48);
1402 err |= src1(file, devinfo, inst);
1403 }
1404
1405 newline(file);
1406 pad(file, 16);
1407 space = 0;
1408
1409 fprintf(file, " ");
1410 err |= control(file, "SFID", devinfo->gen >= 6 ? gen6_sfid : gen4_sfid,
1411 sfid, &space);
1412
1413
1414 if (brw_inst_src1_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE) {
1415 format(file, " indirect");
1416 } else {
1417 switch (sfid) {
1418 case BRW_SFID_MATH:
1419 err |= control(file, "math function", math_function,
1420 brw_inst_math_msg_function(devinfo, inst), &space);
1421 err |= control(file, "math saturate", math_saturate,
1422 brw_inst_math_msg_saturate(devinfo, inst), &space);
1423 err |= control(file, "math signed", math_signed,
1424 brw_inst_math_msg_signed_int(devinfo, inst), &space);
1425 err |= control(file, "math scalar", math_scalar,
1426 brw_inst_math_msg_data_type(devinfo, inst), &space);
1427 err |= control(file, "math precision", math_precision,
1428 brw_inst_math_msg_precision(devinfo, inst), &space);
1429 break;
1430 case BRW_SFID_SAMPLER:
1431 if (devinfo->gen >= 5) {
1432 err |= control(file, "sampler message", gen5_sampler_msg_type,
1433 brw_inst_sampler_msg_type(devinfo, inst), &space);
1434 err |= control(file, "sampler simd mode", gen5_sampler_simd_mode,
1435 brw_inst_sampler_simd_mode(devinfo, inst), &space);
1436 format(file, " Surface = %ld Sampler = %ld",
1437 brw_inst_binding_table_index(devinfo, inst),
1438 brw_inst_sampler(devinfo, inst));
1439 } else {
1440 format(file, " (%ld, %ld, %ld, ",
1441 brw_inst_binding_table_index(devinfo, inst),
1442 brw_inst_sampler(devinfo, inst),
1443 brw_inst_sampler_msg_type(devinfo, inst));
1444 if (!devinfo->is_g4x) {
1445 err |= control(file, "sampler target format",
1446 sampler_target_format,
1447 brw_inst_sampler_return_format(devinfo, inst), NULL);
1448 }
1449 string(file, ")");
1450 }
1451 break;
1452 case GEN6_SFID_DATAPORT_SAMPLER_CACHE:
1453 /* aka BRW_SFID_DATAPORT_READ on Gen4-5 */
1454 if (devinfo->gen >= 6) {
1455 format(file, " (%ld, %ld, %ld, %ld)",
1456 brw_inst_binding_table_index(devinfo, inst),
1457 brw_inst_dp_msg_control(devinfo, inst),
1458 brw_inst_dp_msg_type(devinfo, inst),
1459 devinfo->gen >= 7 ? 0 : brw_inst_dp_write_commit(devinfo, inst));
1460 } else {
1461 bool is_965 = devinfo->gen == 4 && !devinfo->is_g4x;
1462 err |= control(file, "DP read message type",
1463 is_965 ? gen4_dp_read_port_msg_type :
1464 g45_dp_read_port_msg_type,
1465 brw_inst_dp_read_msg_type(devinfo, inst),
1466 &space);
1467
1468 format(file, " MsgCtrl = 0x%lx",
1469 brw_inst_dp_read_msg_control(devinfo, inst));
1470
1471 format(file, " Surface = %ld", brw_inst_binding_table_index(devinfo, inst));
1472 }
1473 break;
1474
1475 case GEN6_SFID_DATAPORT_RENDER_CACHE: {
1476 /* aka BRW_SFID_DATAPORT_WRITE on Gen4-5 */
1477 unsigned msg_type = brw_inst_dp_write_msg_type(devinfo, inst);
1478
1479 err |= control(file, "DP rc message type",
1480 devinfo->gen >= 6 ? dp_rc_msg_type_gen6
1481 : dp_write_port_msg_type,
1482 msg_type, &space);
1483
1484 bool is_rt_write = msg_type ==
1485 (devinfo->gen >= 6 ? GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
1486 : BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE);
1487
1488 if (is_rt_write) {
1489 err |= control(file, "RT message type", m_rt_write_subtype,
1490 brw_inst_rt_message_type(devinfo, inst), &space);
1491 if (devinfo->gen >= 6 && brw_inst_rt_slot_group(devinfo, inst))
1492 string(file, " Hi");
1493 if (brw_inst_rt_last(devinfo, inst))
1494 string(file, " LastRT");
1495 if (devinfo->gen < 7 && brw_inst_dp_write_commit(devinfo, inst))
1496 string(file, " WriteCommit");
1497 } else {
1498 format(file, " MsgCtrl = 0x%lx",
1499 brw_inst_dp_write_msg_control(devinfo, inst));
1500 }
1501
1502 format(file, " Surface = %ld", brw_inst_binding_table_index(devinfo, inst));
1503 break;
1504 }
1505
1506 case BRW_SFID_URB:
1507 format(file, " %ld", brw_inst_urb_global_offset(devinfo, inst));
1508
1509 space = 1;
1510 if (devinfo->gen >= 7) {
1511 err |= control(file, "urb opcode", gen7_urb_opcode,
1512 brw_inst_urb_opcode(devinfo, inst), &space);
1513 } else if (devinfo->gen >= 5) {
1514 err |= control(file, "urb opcode", gen5_urb_opcode,
1515 brw_inst_urb_opcode(devinfo, inst), &space);
1516 }
1517 err |= control(file, "urb swizzle", urb_swizzle,
1518 brw_inst_urb_swizzle_control(devinfo, inst), &space);
1519 if (devinfo->gen < 7) {
1520 err |= control(file, "urb allocate", urb_allocate,
1521 brw_inst_urb_allocate(devinfo, inst), &space);
1522 err |= control(file, "urb used", urb_used,
1523 brw_inst_urb_used(devinfo, inst), &space);
1524 }
1525 if (devinfo->gen < 8) {
1526 err |= control(file, "urb complete", urb_complete,
1527 brw_inst_urb_complete(devinfo, inst), &space);
1528 }
1529 break;
1530 case BRW_SFID_THREAD_SPAWNER:
1531 break;
1532
1533 case BRW_SFID_MESSAGE_GATEWAY:
1534 format(file, " (%s)",
1535 gen7_gateway_subfuncid[brw_inst_gateway_subfuncid(devinfo, inst)]);
1536 break;
1537
1538 case GEN7_SFID_DATAPORT_DATA_CACHE:
1539 if (devinfo->gen >= 7) {
1540 format(file, " (");
1541
1542 err |= control(file, "DP DC0 message type",
1543 dp_dc0_msg_type_gen7,
1544 brw_inst_dp_msg_type(devinfo, inst), &space);
1545
1546 format(file, ", %ld, ", brw_inst_binding_table_index(devinfo, inst));
1547
1548 switch (brw_inst_dp_msg_type(devinfo, inst)) {
1549 case GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP:
1550 control(file, "atomic op", aop,
1551 brw_inst_imm_ud(devinfo, inst) >> 8 & 0xf, &space);
1552 break;
1553 default:
1554 format(file, "%ld", brw_inst_dp_msg_control(devinfo, inst));
1555 }
1556 format(file, ")");
1557 break;
1558 }
1559 /* FALLTHROUGH */
1560
1561 case HSW_SFID_DATAPORT_DATA_CACHE_1: {
1562 if (devinfo->gen >= 7) {
1563 format(file, " (");
1564
1565 unsigned msg_ctrl = brw_inst_dp_msg_control(devinfo, inst);
1566
1567 err |= control(file, "DP DC1 message type",
1568 dp_dc1_msg_type_hsw,
1569 brw_inst_dp_msg_type(devinfo, inst), &space);
1570
1571 format(file, ", Surface = %ld, ",
1572 brw_inst_binding_table_index(devinfo, inst));
1573
1574 switch (brw_inst_dp_msg_type(devinfo, inst)) {
1575 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP:
1576 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP:
1577 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP:
1578 format(file, "SIMD%d,", (msg_ctrl & (1 << 4)) ? 8 : 16);
1579 /* fallthrough */
1580 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2:
1581 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2:
1582 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2:
1583 control(file, "atomic op", aop, msg_ctrl & 0xf, &space);
1584 break;
1585 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ:
1586 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE:
1587 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ:
1588 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE: {
1589 static const char *simd_modes[] = { "4x2", "16", "8" };
1590 format(file, "SIMD%s, Mask = 0x%x",
1591 simd_modes[msg_ctrl >> 4], msg_ctrl & 0xf);
1592 break;
1593 }
1594 default:
1595 format(file, "0x%x", msg_ctrl);
1596 }
1597 format(file, ")");
1598 break;
1599 }
1600 /* FALLTHROUGH */
1601 }
1602
1603 case GEN7_SFID_PIXEL_INTERPOLATOR:
1604 if (devinfo->gen >= 7) {
1605 format(file, " (%s, %s, 0x%02lx)",
1606 brw_inst_pi_nopersp(devinfo, inst) ? "linear" : "persp",
1607 pixel_interpolator_msg_types[brw_inst_pi_message_type(devinfo, inst)],
1608 brw_inst_pi_message_data(devinfo, inst));
1609 break;
1610 }
1611 /* FALLTHROUGH */
1612
1613 default:
1614 format(file, "unsupported shared function ID %d", sfid);
1615 break;
1616 }
1617
1618 if (space)
1619 string(file, " ");
1620 format(file, "mlen %ld", brw_inst_mlen(devinfo, inst));
1621 format(file, " rlen %ld", brw_inst_rlen(devinfo, inst));
1622 }
1623 }
1624 pad(file, 64);
1625 if (opcode != BRW_OPCODE_NOP && opcode != BRW_OPCODE_NENOP) {
1626 string(file, "{");
1627 space = 1;
1628 err |= control(file, "access mode", access_mode,
1629 brw_inst_access_mode(devinfo, inst), &space);
1630 if (devinfo->gen >= 6) {
1631 err |= control(file, "write enable control", wectrl,
1632 brw_inst_mask_control(devinfo, inst), &space);
1633 } else {
1634 err |= control(file, "mask control", mask_ctrl,
1635 brw_inst_mask_control(devinfo, inst), &space);
1636 }
1637 err |= control(file, "dependency control", dep_ctrl,
1638 ((brw_inst_no_dd_check(devinfo, inst) << 1) |
1639 brw_inst_no_dd_clear(devinfo, inst)), &space);
1640
1641 if (devinfo->gen >= 6)
1642 err |= qtr_ctrl(file, devinfo, inst);
1643 else {
1644 if (brw_inst_qtr_control(devinfo, inst) == BRW_COMPRESSION_COMPRESSED &&
1645 opcode_descs[opcode].ndst > 0 &&
1646 brw_inst_dst_reg_file(devinfo, inst) == BRW_MESSAGE_REGISTER_FILE &&
1647 brw_inst_dst_da_reg_nr(devinfo, inst) & (1 << 7)) {
1648 format(file, " compr4");
1649 } else {
1650 err |= control(file, "compression control", compr_ctrl,
1651 brw_inst_qtr_control(devinfo, inst), &space);
1652 }
1653 }
1654
1655 err |= control(file, "compaction", cmpt_ctrl, is_compacted, &space);
1656 err |= control(file, "thread control", thread_ctrl,
1657 brw_inst_thread_control(devinfo, inst), &space);
1658 if (has_branch_ctrl(devinfo, opcode)) {
1659 err |= control(file, "branch ctrl", branch_ctrl,
1660 brw_inst_branch_control(devinfo, inst), &space);
1661 } else if (devinfo->gen >= 6) {
1662 err |= control(file, "acc write control", accwr,
1663 brw_inst_acc_wr_control(devinfo, inst), &space);
1664 }
1665 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC)
1666 err |= control(file, "end of thread", end_of_thread,
1667 brw_inst_eot(devinfo, inst), &space);
1668 if (space)
1669 string(file, " ");
1670 string(file, "}");
1671 }
1672 string(file, ";");
1673 newline(file);
1674 return err;
1675 }