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i965/disasm: Properly disassemble jump targets on Gen4-5.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_disasm.c
1 /*
2 * Copyright © 2008 Keith Packard
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
13 *
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20 * OF THIS SOFTWARE.
21 */
22
23 #include <stdio.h>
24 #include <stdlib.h>
25 #include <string.h>
26 #include <getopt.h>
27 #include <unistd.h>
28 #include <stdarg.h>
29
30 #include "brw_context.h"
31 #include "brw_defines.h"
32 #include "brw_reg.h"
33 #include "brw_inst.h"
34
35 const struct opcode_desc opcode_descs[128] = {
36 [BRW_OPCODE_MOV] = { .name = "mov", .nsrc = 1, .ndst = 1 },
37 [BRW_OPCODE_FRC] = { .name = "frc", .nsrc = 1, .ndst = 1 },
38 [BRW_OPCODE_RNDU] = { .name = "rndu", .nsrc = 1, .ndst = 1 },
39 [BRW_OPCODE_RNDD] = { .name = "rndd", .nsrc = 1, .ndst = 1 },
40 [BRW_OPCODE_RNDE] = { .name = "rnde", .nsrc = 1, .ndst = 1 },
41 [BRW_OPCODE_RNDZ] = { .name = "rndz", .nsrc = 1, .ndst = 1 },
42 [BRW_OPCODE_NOT] = { .name = "not", .nsrc = 1, .ndst = 1 },
43 [BRW_OPCODE_LZD] = { .name = "lzd", .nsrc = 1, .ndst = 1 },
44 [BRW_OPCODE_F32TO16] = { .name = "f32to16", .nsrc = 1, .ndst = 1 },
45 [BRW_OPCODE_F16TO32] = { .name = "f16to32", .nsrc = 1, .ndst = 1 },
46 [BRW_OPCODE_BFREV] = { .name = "bfrev", .nsrc = 1, .ndst = 1 },
47 [BRW_OPCODE_FBH] = { .name = "fbh", .nsrc = 1, .ndst = 1 },
48 [BRW_OPCODE_FBL] = { .name = "fbl", .nsrc = 1, .ndst = 1 },
49 [BRW_OPCODE_CBIT] = { .name = "cbit", .nsrc = 1, .ndst = 1 },
50
51 [BRW_OPCODE_MUL] = { .name = "mul", .nsrc = 2, .ndst = 1 },
52 [BRW_OPCODE_MAC] = { .name = "mac", .nsrc = 2, .ndst = 1 },
53 [BRW_OPCODE_MACH] = { .name = "mach", .nsrc = 2, .ndst = 1 },
54 [BRW_OPCODE_LINE] = { .name = "line", .nsrc = 2, .ndst = 1 },
55 [BRW_OPCODE_PLN] = { .name = "pln", .nsrc = 2, .ndst = 1 },
56 [BRW_OPCODE_MAD] = { .name = "mad", .nsrc = 3, .ndst = 1 },
57 [BRW_OPCODE_LRP] = { .name = "lrp", .nsrc = 3, .ndst = 1 },
58 [BRW_OPCODE_SAD2] = { .name = "sad2", .nsrc = 2, .ndst = 1 },
59 [BRW_OPCODE_SADA2] = { .name = "sada2", .nsrc = 2, .ndst = 1 },
60 [BRW_OPCODE_DP4] = { .name = "dp4", .nsrc = 2, .ndst = 1 },
61 [BRW_OPCODE_DPH] = { .name = "dph", .nsrc = 2, .ndst = 1 },
62 [BRW_OPCODE_DP3] = { .name = "dp3", .nsrc = 2, .ndst = 1 },
63 [BRW_OPCODE_DP2] = { .name = "dp2", .nsrc = 2, .ndst = 1 },
64 [BRW_OPCODE_MATH] = { .name = "math", .nsrc = 2, .ndst = 1 },
65
66 [BRW_OPCODE_AVG] = { .name = "avg", .nsrc = 2, .ndst = 1 },
67 [BRW_OPCODE_ADD] = { .name = "add", .nsrc = 2, .ndst = 1 },
68 [BRW_OPCODE_SEL] = { .name = "sel", .nsrc = 2, .ndst = 1 },
69 [BRW_OPCODE_AND] = { .name = "and", .nsrc = 2, .ndst = 1 },
70 [BRW_OPCODE_OR] = { .name = "or", .nsrc = 2, .ndst = 1 },
71 [BRW_OPCODE_XOR] = { .name = "xor", .nsrc = 2, .ndst = 1 },
72 [BRW_OPCODE_SHR] = { .name = "shr", .nsrc = 2, .ndst = 1 },
73 [BRW_OPCODE_SHL] = { .name = "shl", .nsrc = 2, .ndst = 1 },
74 [BRW_OPCODE_ASR] = { .name = "asr", .nsrc = 2, .ndst = 1 },
75 [BRW_OPCODE_CMP] = { .name = "cmp", .nsrc = 2, .ndst = 1 },
76 [BRW_OPCODE_CMPN] = { .name = "cmpn", .nsrc = 2, .ndst = 1 },
77 [BRW_OPCODE_BFE] = { .name = "bfe", .nsrc = 3, .ndst = 1 },
78 [BRW_OPCODE_BFI1] = { .name = "bfi1", .nsrc = 2, .ndst = 1 },
79 [BRW_OPCODE_BFI2] = { .name = "bfi2", .nsrc = 3, .ndst = 1 },
80 [BRW_OPCODE_ADDC] = { .name = "addc", .nsrc = 2, .ndst = 1 },
81 [BRW_OPCODE_SUBB] = { .name = "subb", .nsrc = 2, .ndst = 1 },
82
83 [BRW_OPCODE_SEND] = { .name = "send", .nsrc = 1, .ndst = 1 },
84 [BRW_OPCODE_SENDC] = { .name = "sendc", .nsrc = 1, .ndst = 1 },
85 [BRW_OPCODE_NOP] = { .name = "nop", .nsrc = 0, .ndst = 0 },
86 [BRW_OPCODE_JMPI] = { .name = "jmpi", .nsrc = 0, .ndst = 0 },
87 [BRW_OPCODE_IF] = { .name = "if", .nsrc = 2, .ndst = 0 },
88 [BRW_OPCODE_IFF] = { .name = "iff", .nsrc = 2, .ndst = 1 },
89 [BRW_OPCODE_WHILE] = { .name = "while", .nsrc = 2, .ndst = 0 },
90 [BRW_OPCODE_ELSE] = { .name = "else", .nsrc = 2, .ndst = 0 },
91 [BRW_OPCODE_BREAK] = { .name = "break", .nsrc = 2, .ndst = 0 },
92 [BRW_OPCODE_CONTINUE] = { .name = "cont", .nsrc = 1, .ndst = 0 },
93 [BRW_OPCODE_HALT] = { .name = "halt", .nsrc = 1, .ndst = 0 },
94 [BRW_OPCODE_MSAVE] = { .name = "msave", .nsrc = 1, .ndst = 1 },
95 [BRW_OPCODE_PUSH] = { .name = "push", .nsrc = 1, .ndst = 1 },
96 [BRW_OPCODE_MRESTORE] = { .name = "mrest", .nsrc = 1, .ndst = 1 },
97 [BRW_OPCODE_POP] = { .name = "pop", .nsrc = 2, .ndst = 0 },
98 [BRW_OPCODE_WAIT] = { .name = "wait", .nsrc = 1, .ndst = 0 },
99 [BRW_OPCODE_DO] = { .name = "do", .nsrc = 0, .ndst = 0 },
100 [BRW_OPCODE_ENDIF] = { .name = "endif", .nsrc = 2, .ndst = 0 },
101 };
102
103 static bool
104 has_jip(struct brw_context *brw, enum opcode opcode)
105 {
106 if (brw->gen < 6)
107 return false;
108
109 return opcode == BRW_OPCODE_IF ||
110 opcode == BRW_OPCODE_ELSE ||
111 opcode == BRW_OPCODE_ENDIF ||
112 opcode == BRW_OPCODE_WHILE;
113 }
114
115 static bool
116 has_uip(struct brw_context *brw, enum opcode opcode)
117 {
118 if (brw->gen < 6)
119 return false;
120
121 return (brw->gen >= 7 && opcode == BRW_OPCODE_IF) ||
122 opcode == BRW_OPCODE_BREAK ||
123 opcode == BRW_OPCODE_CONTINUE ||
124 opcode == BRW_OPCODE_HALT;
125 }
126
127 const char *const conditional_modifier[16] = {
128 [BRW_CONDITIONAL_NONE] = "",
129 [BRW_CONDITIONAL_Z] = ".e",
130 [BRW_CONDITIONAL_NZ] = ".ne",
131 [BRW_CONDITIONAL_G] = ".g",
132 [BRW_CONDITIONAL_GE] = ".ge",
133 [BRW_CONDITIONAL_L] = ".l",
134 [BRW_CONDITIONAL_LE] = ".le",
135 [BRW_CONDITIONAL_R] = ".r",
136 [BRW_CONDITIONAL_O] = ".o",
137 [BRW_CONDITIONAL_U] = ".u",
138 };
139
140 static const char *const m_negate[2] = {
141 [0] = "",
142 [1] = "-",
143 };
144
145 static const char *const _abs[2] = {
146 [0] = "",
147 [1] = "(abs)",
148 };
149
150 static const char *const vert_stride[16] = {
151 [0] = "0",
152 [1] = "1",
153 [2] = "2",
154 [3] = "4",
155 [4] = "8",
156 [5] = "16",
157 [6] = "32",
158 [15] = "VxH",
159 };
160
161 static const char *const width[8] = {
162 [0] = "1",
163 [1] = "2",
164 [2] = "4",
165 [3] = "8",
166 [4] = "16",
167 };
168
169 static const char *const horiz_stride[4] = {
170 [0] = "0",
171 [1] = "1",
172 [2] = "2",
173 [3] = "4"
174 };
175
176 static const char *const chan_sel[4] = {
177 [0] = "x",
178 [1] = "y",
179 [2] = "z",
180 [3] = "w",
181 };
182
183 static const char *const debug_ctrl[2] = {
184 [0] = "",
185 [1] = ".breakpoint"
186 };
187
188 static const char *const saturate[2] = {
189 [0] = "",
190 [1] = ".sat"
191 };
192
193 static const char *const cmpt_ctrl[2] = {
194 [0] = "",
195 [1] = "compacted"
196 };
197
198 static const char *const accwr[2] = {
199 [0] = "",
200 [1] = "AccWrEnable"
201 };
202
203 static const char *const wectrl[2] = {
204 [0] = "WE_normal",
205 [1] = "WE_all"
206 };
207
208 static const char *const exec_size[8] = {
209 [0] = "1",
210 [1] = "2",
211 [2] = "4",
212 [3] = "8",
213 [4] = "16",
214 [5] = "32"
215 };
216
217 static const char *const pred_inv[2] = {
218 [0] = "+",
219 [1] = "-"
220 };
221
222 static const char *const pred_ctrl_align16[16] = {
223 [1] = "",
224 [2] = ".x",
225 [3] = ".y",
226 [4] = ".z",
227 [5] = ".w",
228 [6] = ".any4h",
229 [7] = ".all4h",
230 };
231
232 static const char *const pred_ctrl_align1[16] = {
233 [1] = "",
234 [2] = ".anyv",
235 [3] = ".allv",
236 [4] = ".any2h",
237 [5] = ".all2h",
238 [6] = ".any4h",
239 [7] = ".all4h",
240 [8] = ".any8h",
241 [9] = ".all8h",
242 [10] = ".any16h",
243 [11] = ".all16h",
244 };
245
246 static const char *const thread_ctrl[4] = {
247 [0] = "",
248 [2] = "switch"
249 };
250
251 static const char *const compr_ctrl[4] = {
252 [0] = "",
253 [1] = "sechalf",
254 [2] = "compr",
255 [3] = "compr4",
256 };
257
258 static const char *const dep_ctrl[4] = {
259 [0] = "",
260 [1] = "NoDDClr",
261 [2] = "NoDDChk",
262 [3] = "NoDDClr,NoDDChk",
263 };
264
265 static const char *const mask_ctrl[4] = {
266 [0] = "",
267 [1] = "nomask",
268 };
269
270 static const char *const access_mode[2] = {
271 [0] = "align1",
272 [1] = "align16",
273 };
274
275 static const char * const reg_encoding[] = {
276 [BRW_HW_REG_TYPE_UD] = "UD",
277 [BRW_HW_REG_TYPE_D] = "D",
278 [BRW_HW_REG_TYPE_UW] = "UW",
279 [BRW_HW_REG_TYPE_W] = "W",
280 [BRW_HW_REG_NON_IMM_TYPE_UB] = "UB",
281 [BRW_HW_REG_NON_IMM_TYPE_B] = "B",
282 [GEN7_HW_REG_NON_IMM_TYPE_DF] = "DF",
283 [BRW_HW_REG_TYPE_F] = "F",
284 [GEN8_HW_REG_TYPE_UQ] = "UQ",
285 [GEN8_HW_REG_TYPE_Q] = "Q",
286 [GEN8_HW_REG_NON_IMM_TYPE_HF] = "HF",
287 };
288
289 static const char *const three_source_reg_encoding[] = {
290 [BRW_3SRC_TYPE_F] = "F",
291 [BRW_3SRC_TYPE_D] = "D",
292 [BRW_3SRC_TYPE_UD] = "UD",
293 };
294
295 const int reg_type_size[] = {
296 [BRW_HW_REG_TYPE_UD] = 4,
297 [BRW_HW_REG_TYPE_D] = 4,
298 [BRW_HW_REG_TYPE_UW] = 2,
299 [BRW_HW_REG_TYPE_W] = 2,
300 [BRW_HW_REG_NON_IMM_TYPE_UB] = 1,
301 [BRW_HW_REG_NON_IMM_TYPE_B] = 1,
302 [GEN7_HW_REG_NON_IMM_TYPE_DF] = 8,
303 [BRW_HW_REG_TYPE_F] = 4,
304 [GEN8_HW_REG_TYPE_UQ] = 8,
305 [GEN8_HW_REG_TYPE_Q] = 8,
306 [GEN8_HW_REG_NON_IMM_TYPE_HF] = 2,
307 };
308
309 static const char *const reg_file[4] = {
310 [0] = "A",
311 [1] = "g",
312 [2] = "m",
313 [3] = "imm",
314 };
315
316 static const char *const writemask[16] = {
317 [0x0] = ".",
318 [0x1] = ".x",
319 [0x2] = ".y",
320 [0x3] = ".xy",
321 [0x4] = ".z",
322 [0x5] = ".xz",
323 [0x6] = ".yz",
324 [0x7] = ".xyz",
325 [0x8] = ".w",
326 [0x9] = ".xw",
327 [0xa] = ".yw",
328 [0xb] = ".xyw",
329 [0xc] = ".zw",
330 [0xd] = ".xzw",
331 [0xe] = ".yzw",
332 [0xf] = "",
333 };
334
335 static const char *const end_of_thread[2] = {
336 [0] = "",
337 [1] = "EOT"
338 };
339
340 static const char *const target_function[16] = {
341 [BRW_SFID_NULL] = "null",
342 [BRW_SFID_MATH] = "math",
343 [BRW_SFID_SAMPLER] = "sampler",
344 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
345 [BRW_SFID_DATAPORT_READ] = "read",
346 [BRW_SFID_DATAPORT_WRITE] = "write",
347 [BRW_SFID_URB] = "urb",
348 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
349 [BRW_SFID_VME] = "vme",
350 };
351
352 static const char *const target_function_gen6[16] = {
353 [BRW_SFID_NULL] = "null",
354 [BRW_SFID_MATH] = "math",
355 [BRW_SFID_SAMPLER] = "sampler",
356 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
357 [BRW_SFID_URB] = "urb",
358 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
359 [GEN6_SFID_DATAPORT_SAMPLER_CACHE] = "sampler",
360 [GEN6_SFID_DATAPORT_RENDER_CACHE] = "render",
361 [GEN6_SFID_DATAPORT_CONSTANT_CACHE] = "const",
362 [GEN7_SFID_DATAPORT_DATA_CACHE] = "data",
363 [GEN7_SFID_PIXEL_INTERPOLATOR] = "pixel interp",
364 [HSW_SFID_DATAPORT_DATA_CACHE_1] = "dp data 1",
365 [HSW_SFID_CRE] = "cre",
366 };
367
368 static const char *const dp_rc_msg_type_gen6[16] = {
369 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read",
370 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read",
371 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read",
372 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read",
373 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] =
374 "OWORD unaligned block read",
375 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read",
376 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write",
377 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write",
378 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] =
379 "OWORD dual block write",
380 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write",
381 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] =
382 "DWORD scattered write",
383 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write",
384 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write",
385 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORMc write",
386 };
387
388 static const char *const dp_dc0_msg_type_gen7[16] = {
389 [GEN7_DATAPORT_DC_OWORD_BLOCK_READ] = "DC OWORD block read",
390 [GEN7_DATAPORT_DC_UNALIGNED_OWORD_BLOCK_READ] =
391 "DC unaligned OWORD block read",
392 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_READ] = "DC OWORD dual block read",
393 [GEN7_DATAPORT_DC_DWORD_SCATTERED_READ] = "DC DWORD scattered read",
394 [GEN7_DATAPORT_DC_BYTE_SCATTERED_READ] = "DC byte scattered read",
395 [GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP] = "DC untyped atomic",
396 [GEN7_DATAPORT_DC_MEMORY_FENCE] = "DC mfence",
397 [GEN7_DATAPORT_DC_OWORD_BLOCK_WRITE] = "DC OWORD block write",
398 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_WRITE] = "DC OWORD dual block write",
399 [GEN7_DATAPORT_DC_DWORD_SCATTERED_WRITE] = "DC DWORD scatterd write",
400 [GEN7_DATAPORT_DC_BYTE_SCATTERED_WRITE] = "DC byte scattered write",
401 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
402 };
403
404 static const char *const dp_dc1_msg_type_hsw[16] = {
405 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ] = "untyped surface read",
406 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP] = "DC untyped atomic op",
407 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2] =
408 "DC untyped 4x2 atomic op",
409 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_READ] = "DC media block read",
410 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ] = "DC typed surface read",
411 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP] = "DC typed atomic",
412 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2] = "DC typed 4x2 atomic op",
413 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
414 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_WRITE] = "DC media block write",
415 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP] = "DC atomic counter op",
416 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2] =
417 "DC 4x2 atomic counter op",
418 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE] = "DC typed surface write",
419 };
420
421 static const char *const aop[16] = {
422 [BRW_AOP_AND] = "and",
423 [BRW_AOP_OR] = "or",
424 [BRW_AOP_XOR] = "xor",
425 [BRW_AOP_MOV] = "mov",
426 [BRW_AOP_INC] = "inc",
427 [BRW_AOP_DEC] = "dec",
428 [BRW_AOP_ADD] = "add",
429 [BRW_AOP_SUB] = "sub",
430 [BRW_AOP_REVSUB] = "revsub",
431 [BRW_AOP_IMAX] = "imax",
432 [BRW_AOP_IMIN] = "imin",
433 [BRW_AOP_UMAX] = "umax",
434 [BRW_AOP_UMIN] = "umin",
435 [BRW_AOP_CMPWR] = "cmpwr",
436 [BRW_AOP_PREDEC] = "predec",
437 };
438
439 static const char *const math_function[16] = {
440 [BRW_MATH_FUNCTION_INV] = "inv",
441 [BRW_MATH_FUNCTION_LOG] = "log",
442 [BRW_MATH_FUNCTION_EXP] = "exp",
443 [BRW_MATH_FUNCTION_SQRT] = "sqrt",
444 [BRW_MATH_FUNCTION_RSQ] = "rsq",
445 [BRW_MATH_FUNCTION_SIN] = "sin",
446 [BRW_MATH_FUNCTION_COS] = "cos",
447 [BRW_MATH_FUNCTION_SINCOS] = "sincos",
448 [BRW_MATH_FUNCTION_FDIV] = "fdiv",
449 [BRW_MATH_FUNCTION_POW] = "pow",
450 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] = "intdivmod",
451 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] = "intdiv",
452 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER] = "intmod",
453 };
454
455 static const char *const math_saturate[2] = {
456 [0] = "",
457 [1] = "sat"
458 };
459
460 static const char *const math_signed[2] = {
461 [0] = "",
462 [1] = "signed"
463 };
464
465 static const char *const math_scalar[2] = {
466 [0] = "",
467 [1] = "scalar"
468 };
469
470 static const char *const math_precision[2] = {
471 [0] = "",
472 [1] = "partial_precision"
473 };
474
475 static const char *const urb_opcode[2] = {
476 [0] = "urb_write",
477 [1] = "ff_sync",
478 };
479
480 static const char *const urb_swizzle[4] = {
481 [BRW_URB_SWIZZLE_NONE] = "",
482 [BRW_URB_SWIZZLE_INTERLEAVE] = "interleave",
483 [BRW_URB_SWIZZLE_TRANSPOSE] = "transpose",
484 };
485
486 static const char *const urb_allocate[2] = {
487 [0] = "",
488 [1] = "allocate"
489 };
490
491 static const char *const urb_used[2] = {
492 [0] = "",
493 [1] = "used"
494 };
495
496 static const char *const urb_complete[2] = {
497 [0] = "",
498 [1] = "complete"
499 };
500
501 static const char *const sampler_target_format[4] = {
502 [0] = "F",
503 [2] = "UD",
504 [3] = "D"
505 };
506
507
508 static int column;
509
510 static int
511 string(FILE *file, const char *string)
512 {
513 fputs(string, file);
514 column += strlen(string);
515 return 0;
516 }
517
518 static int
519 format(FILE *f, const char *format, ...)
520 {
521 char buf[1024];
522 va_list args;
523 va_start(args, format);
524
525 vsnprintf(buf, sizeof(buf) - 1, format, args);
526 va_end(args);
527 string(f, buf);
528 return 0;
529 }
530
531 static int
532 newline(FILE *f)
533 {
534 putc('\n', f);
535 column = 0;
536 return 0;
537 }
538
539 static int
540 pad(FILE *f, int c)
541 {
542 do
543 string(f, " ");
544 while (column < c);
545 return 0;
546 }
547
548 static int
549 control(FILE *file, const char *name, const char *const ctrl[],
550 unsigned id, int *space)
551 {
552 if (!ctrl[id]) {
553 fprintf(file, "*** invalid %s value %d ", name, id);
554 return 1;
555 }
556 if (ctrl[id][0]) {
557 if (space && *space)
558 string(file, " ");
559 string(file, ctrl[id]);
560 if (space)
561 *space = 1;
562 }
563 return 0;
564 }
565
566 static int
567 print_opcode(FILE *file, int id)
568 {
569 if (!opcode_descs[id].name) {
570 format(file, "*** invalid opcode value %d ", id);
571 return 1;
572 }
573 string(file, opcode_descs[id].name);
574 return 0;
575 }
576
577 static int
578 reg(FILE *file, unsigned _reg_file, unsigned _reg_nr)
579 {
580 int err = 0;
581
582 /* Clear the Compr4 instruction compression bit. */
583 if (_reg_file == BRW_MESSAGE_REGISTER_FILE)
584 _reg_nr &= ~(1 << 7);
585
586 if (_reg_file == BRW_ARCHITECTURE_REGISTER_FILE) {
587 switch (_reg_nr & 0xf0) {
588 case BRW_ARF_NULL:
589 string(file, "null");
590 return -1;
591 case BRW_ARF_ADDRESS:
592 format(file, "a%d", _reg_nr & 0x0f);
593 break;
594 case BRW_ARF_ACCUMULATOR:
595 format(file, "acc%d", _reg_nr & 0x0f);
596 break;
597 case BRW_ARF_FLAG:
598 format(file, "f%d", _reg_nr & 0x0f);
599 break;
600 case BRW_ARF_MASK:
601 format(file, "mask%d", _reg_nr & 0x0f);
602 break;
603 case BRW_ARF_MASK_STACK:
604 format(file, "msd%d", _reg_nr & 0x0f);
605 break;
606 case BRW_ARF_STATE:
607 format(file, "sr%d", _reg_nr & 0x0f);
608 break;
609 case BRW_ARF_CONTROL:
610 format(file, "cr%d", _reg_nr & 0x0f);
611 break;
612 case BRW_ARF_NOTIFICATION_COUNT:
613 format(file, "n%d", _reg_nr & 0x0f);
614 break;
615 case BRW_ARF_IP:
616 string(file, "ip");
617 return -1;
618 break;
619 default:
620 format(file, "ARF%d", _reg_nr);
621 break;
622 }
623 } else {
624 err |= control(file, "src reg file", reg_file, _reg_file, NULL);
625 format(file, "%d", _reg_nr);
626 }
627 return err;
628 }
629
630 static int
631 dest(FILE *file, struct brw_context *brw, brw_inst *inst)
632 {
633 int err = 0;
634
635 if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
636 if (brw_inst_dst_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
637 err |= reg(file, brw_inst_dst_reg_file(brw, inst),
638 brw_inst_dst_da_reg_nr(brw, inst));
639 if (err == -1)
640 return 0;
641 if (brw_inst_dst_da1_subreg_nr(brw, inst))
642 format(file, ".%d", brw_inst_dst_da1_subreg_nr(brw, inst) /
643 reg_type_size[brw_inst_dst_reg_type(brw, inst)]);
644 string(file, "<");
645 err |= control(file, "horiz stride", horiz_stride,
646 brw_inst_dst_hstride(brw, inst), NULL);
647 string(file, ">");
648 err |= control(file, "dest reg encoding", reg_encoding,
649 brw_inst_dst_reg_type(brw, inst), NULL);
650 } else {
651 string(file, "g[a0");
652 if (brw_inst_dst_ia_subreg_nr(brw, inst))
653 format(file, ".%d", brw_inst_dst_ia_subreg_nr(brw, inst) /
654 reg_type_size[brw_inst_dst_reg_type(brw, inst)]);
655 if (brw_inst_dst_ia1_addr_imm(brw, inst))
656 format(file, " %d", brw_inst_dst_ia1_addr_imm(brw, inst));
657 string(file, "]<");
658 err |= control(file, "horiz stride", horiz_stride,
659 brw_inst_dst_hstride(brw, inst), NULL);
660 string(file, ">");
661 err |= control(file, "dest reg encoding", reg_encoding,
662 brw_inst_dst_reg_type(brw, inst), NULL);
663 }
664 } else {
665 if (brw_inst_dst_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
666 err |= reg(file, brw_inst_dst_reg_file(brw, inst),
667 brw_inst_dst_da_reg_nr(brw, inst));
668 if (err == -1)
669 return 0;
670 if (brw_inst_dst_da16_subreg_nr(brw, inst))
671 format(file, ".%d", brw_inst_dst_da16_subreg_nr(brw, inst) /
672 reg_type_size[brw_inst_dst_reg_type(brw, inst)]);
673 string(file, "<1>");
674 err |= control(file, "writemask", writemask,
675 brw_inst_da16_writemask(brw, inst), NULL);
676 err |= control(file, "dest reg encoding", reg_encoding,
677 brw_inst_dst_reg_type(brw, inst), NULL);
678 } else {
679 err = 1;
680 string(file, "Indirect align16 address mode not supported");
681 }
682 }
683
684 return 0;
685 }
686
687 static int
688 dest_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
689 {
690 int err = 0;
691 uint32_t reg_file;
692
693 if (brw->gen == 6 && brw_inst_3src_dst_reg_file(brw, inst))
694 reg_file = BRW_MESSAGE_REGISTER_FILE;
695 else
696 reg_file = BRW_GENERAL_REGISTER_FILE;
697
698 err |= reg(file, reg_file, brw_inst_3src_dst_reg_nr(brw, inst));
699 if (err == -1)
700 return 0;
701 if (brw_inst_3src_dst_subreg_nr(brw, inst))
702 format(file, ".%d", brw_inst_3src_dst_subreg_nr(brw, inst));
703 string(file, "<1>");
704 err |= control(file, "writemask", writemask,
705 brw_inst_3src_dst_writemask(brw, inst), NULL);
706 err |= control(file, "dest reg encoding", three_source_reg_encoding,
707 brw_inst_3src_dst_type(brw, inst), NULL);
708
709 return 0;
710 }
711
712 static int
713 src_align1_region(FILE *file,
714 unsigned _vert_stride, unsigned _width,
715 unsigned _horiz_stride)
716 {
717 int err = 0;
718 string(file, "<");
719 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
720 string(file, ",");
721 err |= control(file, "width", width, _width, NULL);
722 string(file, ",");
723 err |= control(file, "horiz_stride", horiz_stride, _horiz_stride, NULL);
724 string(file, ">");
725 return err;
726 }
727
728 static int
729 src_da1(FILE *file, unsigned type, unsigned _reg_file,
730 unsigned _vert_stride, unsigned _width, unsigned _horiz_stride,
731 unsigned reg_num, unsigned sub_reg_num, unsigned __abs,
732 unsigned _negate)
733 {
734 int err = 0;
735 err |= control(file, "negate", m_negate, _negate, NULL);
736 err |= control(file, "abs", _abs, __abs, NULL);
737
738 err |= reg(file, _reg_file, reg_num);
739 if (err == -1)
740 return 0;
741 if (sub_reg_num)
742 format(file, ".%d", sub_reg_num / reg_type_size[type]); /* use formal style like spec */
743 src_align1_region(file, _vert_stride, _width, _horiz_stride);
744 err |= control(file, "src reg encoding", reg_encoding, type, NULL);
745 return err;
746 }
747
748 static int
749 src_ia1(FILE *file,
750 unsigned type,
751 unsigned _reg_file,
752 int _addr_imm,
753 unsigned _addr_subreg_nr,
754 unsigned _negate,
755 unsigned __abs,
756 unsigned _addr_mode,
757 unsigned _horiz_stride, unsigned _width, unsigned _vert_stride)
758 {
759 int err = 0;
760 err |= control(file, "negate", m_negate, _negate, NULL);
761 err |= control(file, "abs", _abs, __abs, NULL);
762
763 string(file, "g[a0");
764 if (_addr_subreg_nr)
765 format(file, ".%d", _addr_subreg_nr);
766 if (_addr_imm)
767 format(file, " %d", _addr_imm);
768 string(file, "]");
769 src_align1_region(file, _vert_stride, _width, _horiz_stride);
770 err |= control(file, "src reg encoding", reg_encoding, type, NULL);
771 return err;
772 }
773
774 static int
775 src_da16(FILE *file,
776 unsigned _reg_type,
777 unsigned _reg_file,
778 unsigned _vert_stride,
779 unsigned _reg_nr,
780 unsigned _subreg_nr,
781 unsigned __abs,
782 unsigned _negate,
783 unsigned swz_x, unsigned swz_y, unsigned swz_z, unsigned swz_w)
784 {
785 int err = 0;
786 err |= control(file, "negate", m_negate, _negate, NULL);
787 err |= control(file, "abs", _abs, __abs, NULL);
788
789 err |= reg(file, _reg_file, _reg_nr);
790 if (err == -1)
791 return 0;
792 if (_subreg_nr)
793 /* bit4 for subreg number byte addressing. Make this same meaning as
794 in da1 case, so output looks consistent. */
795 format(file, ".%d", 16 / reg_type_size[_reg_type]);
796 string(file, "<");
797 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
798 string(file, ",4,1>");
799 /*
800 * Three kinds of swizzle display:
801 * identity - nothing printed
802 * 1->all - print the single channel
803 * 1->1 - print the mapping
804 */
805 if (swz_x == BRW_CHANNEL_X &&
806 swz_y == BRW_CHANNEL_Y &&
807 swz_z == BRW_CHANNEL_Z && swz_w == BRW_CHANNEL_W) {
808 ;
809 } else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w) {
810 string(file, ".");
811 err |= control(file, "channel select", chan_sel, swz_x, NULL);
812 } else {
813 string(file, ".");
814 err |= control(file, "channel select", chan_sel, swz_x, NULL);
815 err |= control(file, "channel select", chan_sel, swz_y, NULL);
816 err |= control(file, "channel select", chan_sel, swz_z, NULL);
817 err |= control(file, "channel select", chan_sel, swz_w, NULL);
818 }
819 err |= control(file, "src da16 reg type", reg_encoding, _reg_type, NULL);
820 return err;
821 }
822
823 static int
824 src0_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
825 {
826 int err = 0;
827 unsigned swz = brw_inst_3src_src0_swizzle(brw, inst);
828 unsigned swz_x = BRW_GET_SWZ(swz, BRW_CHANNEL_X);
829 unsigned swz_y = BRW_GET_SWZ(swz, BRW_CHANNEL_Y);
830 unsigned swz_z = BRW_GET_SWZ(swz, BRW_CHANNEL_Z);
831 unsigned swz_w = BRW_GET_SWZ(swz, BRW_CHANNEL_W);
832 unsigned src0_subreg_nr = brw_inst_3src_src0_subreg_nr(brw, inst);
833
834 err |= control(file, "negate", m_negate,
835 brw_inst_3src_src0_negate(brw, inst), NULL);
836 err |= control(file, "abs", _abs, brw_inst_3src_src0_abs(brw, inst), NULL);
837
838 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
839 brw_inst_3src_src0_reg_nr(brw, inst));
840 if (err == -1)
841 return 0;
842 if (src0_subreg_nr)
843 format(file, ".%d", src0_subreg_nr);
844 if (brw_inst_3src_src0_rep_ctrl(brw, inst))
845 string(file, "<0,1,0>");
846 else
847 string(file, "<4,4,1>");
848 err |= control(file, "src da16 reg type", three_source_reg_encoding,
849 brw_inst_3src_src_type(brw, inst), NULL);
850 /*
851 * Three kinds of swizzle display:
852 * identity - nothing printed
853 * 1->all - print the single channel
854 * 1->1 - print the mapping
855 */
856 if (swz == BRW_SWIZZLE_XYZW) {
857 ;
858 } else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w) {
859 string(file, ".");
860 err |= control(file, "channel select", chan_sel, swz_x, NULL);
861 } else {
862 string(file, ".");
863 err |= control(file, "channel select", chan_sel, swz_x, NULL);
864 err |= control(file, "channel select", chan_sel, swz_y, NULL);
865 err |= control(file, "channel select", chan_sel, swz_z, NULL);
866 err |= control(file, "channel select", chan_sel, swz_w, NULL);
867 }
868 return err;
869 }
870
871 static int
872 src1_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
873 {
874 int err = 0;
875 unsigned swz = brw_inst_3src_src1_swizzle(brw, inst);
876 unsigned swz_x = BRW_GET_SWZ(swz, BRW_CHANNEL_X);
877 unsigned swz_y = BRW_GET_SWZ(swz, BRW_CHANNEL_Y);
878 unsigned swz_z = BRW_GET_SWZ(swz, BRW_CHANNEL_Z);
879 unsigned swz_w = BRW_GET_SWZ(swz, BRW_CHANNEL_W);
880 unsigned src1_subreg_nr = brw_inst_3src_src1_subreg_nr(brw, inst);
881
882 err |= control(file, "negate", m_negate,
883 brw_inst_3src_src1_negate(brw, inst), NULL);
884 err |= control(file, "abs", _abs, brw_inst_3src_src1_abs(brw, inst), NULL);
885
886 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
887 brw_inst_3src_src1_reg_nr(brw, inst));
888 if (err == -1)
889 return 0;
890 if (src1_subreg_nr)
891 format(file, ".%d", src1_subreg_nr);
892 if (brw_inst_3src_src1_rep_ctrl(brw, inst))
893 string(file, "<0,1,0>");
894 else
895 string(file, "<4,4,1>");
896 err |= control(file, "src da16 reg type", three_source_reg_encoding,
897 brw_inst_3src_src_type(brw, inst), NULL);
898 /*
899 * Three kinds of swizzle display:
900 * identity - nothing printed
901 * 1->all - print the single channel
902 * 1->1 - print the mapping
903 */
904 if (swz == BRW_SWIZZLE_XYZW) {
905 ;
906 } else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w) {
907 string(file, ".");
908 err |= control(file, "channel select", chan_sel, swz_x, NULL);
909 } else {
910 string(file, ".");
911 err |= control(file, "channel select", chan_sel, swz_x, NULL);
912 err |= control(file, "channel select", chan_sel, swz_y, NULL);
913 err |= control(file, "channel select", chan_sel, swz_z, NULL);
914 err |= control(file, "channel select", chan_sel, swz_w, NULL);
915 }
916 return err;
917 }
918
919
920 static int
921 src2_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
922 {
923 int err = 0;
924 unsigned swz = brw_inst_3src_src2_swizzle(brw, inst);
925 unsigned swz_x = BRW_GET_SWZ(swz, BRW_CHANNEL_X);
926 unsigned swz_y = BRW_GET_SWZ(swz, BRW_CHANNEL_Y);
927 unsigned swz_z = BRW_GET_SWZ(swz, BRW_CHANNEL_Z);
928 unsigned swz_w = BRW_GET_SWZ(swz, BRW_CHANNEL_W);
929 unsigned src2_subreg_nr = brw_inst_3src_src2_subreg_nr(brw, inst);
930
931 err |= control(file, "negate", m_negate,
932 brw_inst_3src_src2_negate(brw, inst), NULL);
933 err |= control(file, "abs", _abs, brw_inst_3src_src2_abs(brw, inst), NULL);
934
935 err |= reg(file, BRW_GENERAL_REGISTER_FILE,
936 brw_inst_3src_src2_reg_nr(brw, inst));
937 if (err == -1)
938 return 0;
939 if (src2_subreg_nr)
940 format(file, ".%d", src2_subreg_nr);
941 if (brw_inst_3src_src2_rep_ctrl(brw, inst))
942 string(file, "<0,1,0>");
943 else
944 string(file, "<4,4,1>");
945 err |= control(file, "src da16 reg type", three_source_reg_encoding,
946 brw_inst_3src_src_type(brw, inst), NULL);
947 /*
948 * Three kinds of swizzle display:
949 * identity - nothing printed
950 * 1->all - print the single channel
951 * 1->1 - print the mapping
952 */
953 if (swz == BRW_SWIZZLE_XYZW) {
954 ;
955 } else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w) {
956 string(file, ".");
957 err |= control(file, "channel select", chan_sel, swz_x, NULL);
958 } else {
959 string(file, ".");
960 err |= control(file, "channel select", chan_sel, swz_x, NULL);
961 err |= control(file, "channel select", chan_sel, swz_y, NULL);
962 err |= control(file, "channel select", chan_sel, swz_z, NULL);
963 err |= control(file, "channel select", chan_sel, swz_w, NULL);
964 }
965 return err;
966 }
967
968 static int
969 imm(FILE *file, struct brw_context *brw, unsigned type, brw_inst *inst)
970 {
971 switch (type) {
972 case BRW_HW_REG_TYPE_UD:
973 format(file, "0x%08xUD", brw_inst_imm_ud(brw, inst));
974 break;
975 case BRW_HW_REG_TYPE_D:
976 format(file, "%dD", brw_inst_imm_d(brw, inst));
977 break;
978 case BRW_HW_REG_TYPE_UW:
979 format(file, "0x%04xUW", (uint16_t) brw_inst_imm_ud(brw, inst));
980 break;
981 case BRW_HW_REG_TYPE_W:
982 format(file, "%dW", (int16_t) brw_inst_imm_d(brw, inst));
983 break;
984 case BRW_HW_REG_IMM_TYPE_UV:
985 format(file, "0x%08xUV", brw_inst_imm_ud(brw, inst));
986 break;
987 case BRW_HW_REG_IMM_TYPE_VF:
988 format(file, "Vector Float");
989 break;
990 case BRW_HW_REG_IMM_TYPE_V:
991 format(file, "0x%08xV", brw_inst_imm_ud(brw, inst));
992 break;
993 case BRW_HW_REG_TYPE_F:
994 format(file, "%-gF", brw_inst_imm_f(brw, inst));
995 }
996 return 0;
997 }
998
999 static int
1000 src0(FILE *file, struct brw_context *brw, brw_inst *inst)
1001 {
1002 if (brw_inst_src0_reg_file(brw, inst) == BRW_IMMEDIATE_VALUE) {
1003 return imm(file, brw, brw_inst_src0_reg_type(brw, inst), inst);
1004 } else if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
1005 if (brw_inst_src0_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
1006 return src_da1(file,
1007 brw_inst_src0_reg_type(brw, inst),
1008 brw_inst_src0_reg_file(brw, inst),
1009 brw_inst_src0_vstride(brw, inst),
1010 brw_inst_src0_width(brw, inst),
1011 brw_inst_src0_hstride(brw, inst),
1012 brw_inst_src0_da_reg_nr(brw, inst),
1013 brw_inst_src0_da1_subreg_nr(brw, inst),
1014 brw_inst_src0_abs(brw, inst),
1015 brw_inst_src0_negate(brw, inst));
1016 } else {
1017 return src_ia1(file,
1018 brw_inst_src0_reg_type(brw, inst),
1019 brw_inst_src0_reg_file(brw, inst),
1020 brw_inst_src0_ia1_addr_imm(brw, inst),
1021 brw_inst_src0_ia_subreg_nr(brw, inst),
1022 brw_inst_src0_negate(brw, inst),
1023 brw_inst_src0_abs(brw, inst),
1024 brw_inst_src0_address_mode(brw, inst),
1025 brw_inst_src0_hstride(brw, inst),
1026 brw_inst_src0_width(brw, inst),
1027 brw_inst_src0_vstride(brw, inst));
1028 }
1029 } else {
1030 if (brw_inst_src0_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
1031 return src_da16(file,
1032 brw_inst_src0_reg_type(brw, inst),
1033 brw_inst_src0_reg_file(brw, inst),
1034 brw_inst_src0_vstride(brw, inst),
1035 brw_inst_src0_da_reg_nr(brw, inst),
1036 brw_inst_src0_da16_subreg_nr(brw, inst),
1037 brw_inst_src0_abs(brw, inst),
1038 brw_inst_src0_negate(brw, inst),
1039 brw_inst_src0_da16_swiz_x(brw, inst),
1040 brw_inst_src0_da16_swiz_y(brw, inst),
1041 brw_inst_src0_da16_swiz_z(brw, inst),
1042 brw_inst_src0_da16_swiz_w(brw, inst));
1043 } else {
1044 string(file, "Indirect align16 address mode not supported");
1045 return 1;
1046 }
1047 }
1048 }
1049
1050 static int
1051 src1(FILE *file, struct brw_context *brw, brw_inst *inst)
1052 {
1053 if (brw_inst_src1_reg_file(brw, inst) == BRW_IMMEDIATE_VALUE) {
1054 return imm(file, brw, brw_inst_src1_reg_type(brw, inst), inst);
1055 } else if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
1056 if (brw_inst_src1_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
1057 return src_da1(file,
1058 brw_inst_src1_reg_type(brw, inst),
1059 brw_inst_src1_reg_file(brw, inst),
1060 brw_inst_src1_vstride(brw, inst),
1061 brw_inst_src1_width(brw, inst),
1062 brw_inst_src1_hstride(brw, inst),
1063 brw_inst_src1_da_reg_nr(brw, inst),
1064 brw_inst_src1_da1_subreg_nr(brw, inst),
1065 brw_inst_src1_abs(brw, inst),
1066 brw_inst_src1_negate(brw, inst));
1067 } else {
1068 return src_ia1(file,
1069 brw_inst_src1_reg_type(brw, inst),
1070 brw_inst_src1_reg_file(brw, inst),
1071 brw_inst_src1_ia1_addr_imm(brw, inst),
1072 brw_inst_src1_ia_subreg_nr(brw, inst),
1073 brw_inst_src1_negate(brw, inst),
1074 brw_inst_src1_abs(brw, inst),
1075 brw_inst_src1_address_mode(brw, inst),
1076 brw_inst_src1_hstride(brw, inst),
1077 brw_inst_src1_width(brw, inst),
1078 brw_inst_src1_vstride(brw, inst));
1079 }
1080 } else {
1081 if (brw_inst_src1_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
1082 return src_da16(file,
1083 brw_inst_src1_reg_type(brw, inst),
1084 brw_inst_src1_reg_file(brw, inst),
1085 brw_inst_src1_vstride(brw, inst),
1086 brw_inst_src1_da_reg_nr(brw, inst),
1087 brw_inst_src1_da16_subreg_nr(brw, inst),
1088 brw_inst_src1_abs(brw, inst),
1089 brw_inst_src1_negate(brw, inst),
1090 brw_inst_src1_da16_swiz_x(brw, inst),
1091 brw_inst_src1_da16_swiz_y(brw, inst),
1092 brw_inst_src1_da16_swiz_z(brw, inst),
1093 brw_inst_src1_da16_swiz_w(brw, inst));
1094 } else {
1095 string(file, "Indirect align16 address mode not supported");
1096 return 1;
1097 }
1098 }
1099 }
1100
1101 static int
1102 qtr_ctrl(FILE *file, struct brw_context *brw, brw_inst *inst)
1103 {
1104 int qtr_ctl = brw_inst_qtr_control(brw, inst);
1105 int exec_size = 1 << brw_inst_exec_size(brw, inst);
1106
1107 if (exec_size == 8) {
1108 switch (qtr_ctl) {
1109 case 0:
1110 string(file, " 1Q");
1111 break;
1112 case 1:
1113 string(file, " 2Q");
1114 break;
1115 case 2:
1116 string(file, " 3Q");
1117 break;
1118 case 3:
1119 string(file, " 4Q");
1120 break;
1121 }
1122 } else if (exec_size == 16) {
1123 if (qtr_ctl < 2)
1124 string(file, " 1H");
1125 else
1126 string(file, " 2H");
1127 }
1128 return 0;
1129 }
1130
1131 int
1132 brw_disassemble_inst(FILE *file, struct brw_context *brw, brw_inst *inst,
1133 bool is_compacted)
1134 {
1135 int err = 0;
1136 int space = 0;
1137
1138 const enum opcode opcode = brw_inst_opcode(brw, inst);
1139
1140 if (brw_inst_pred_control(brw, inst)) {
1141 string(file, "(");
1142 err |= control(file, "predicate inverse", pred_inv,
1143 brw_inst_pred_inv(brw, inst), NULL);
1144 format(file, "f%d", brw->gen >= 7 ? brw_inst_flag_reg_nr(brw, inst) : 0);
1145 if (brw_inst_flag_subreg_nr(brw, inst))
1146 format(file, ".%d", brw_inst_flag_subreg_nr(brw, inst));
1147 if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
1148 err |= control(file, "predicate control align1", pred_ctrl_align1,
1149 brw_inst_pred_control(brw, inst), NULL);
1150 } else {
1151 err |= control(file, "predicate control align16", pred_ctrl_align16,
1152 brw_inst_pred_control(brw, inst), NULL);
1153 }
1154 string(file, ") ");
1155 }
1156
1157 err |= print_opcode(file, opcode);
1158 err |= control(file, "saturate", saturate, brw_inst_saturate(brw, inst),
1159 NULL);
1160
1161 err |= control(file, "debug control", debug_ctrl,
1162 brw_inst_debug_control(brw, inst), NULL);
1163
1164 if (opcode == BRW_OPCODE_MATH) {
1165 string(file, " ");
1166 err |= control(file, "function", math_function,
1167 brw_inst_math_function(brw, inst), NULL);
1168 } else if (opcode != BRW_OPCODE_SEND && opcode != BRW_OPCODE_SENDC) {
1169 err |= control(file, "conditional modifier", conditional_modifier,
1170 brw_inst_cond_modifier(brw, inst), NULL);
1171
1172 /* If we're using the conditional modifier, print which flags reg is
1173 * used for it. Note that on gen6+, the embedded-condition SEL and
1174 * control flow doesn't update flags.
1175 */
1176 if (brw_inst_cond_modifier(brw, inst) &&
1177 (brw->gen < 6 || (opcode != BRW_OPCODE_SEL &&
1178 opcode != BRW_OPCODE_IF &&
1179 opcode != BRW_OPCODE_WHILE))) {
1180 format(file, ".f%d",
1181 brw->gen >= 7 ? brw_inst_flag_reg_nr(brw, inst) : 0);
1182 if (brw_inst_flag_subreg_nr(brw, inst))
1183 format(file, ".%d", brw_inst_flag_subreg_nr(brw, inst));
1184 }
1185 }
1186
1187 if (opcode != BRW_OPCODE_NOP) {
1188 string(file, "(");
1189 err |= control(file, "execution size", exec_size,
1190 brw_inst_exec_size(brw, inst), NULL);
1191 string(file, ")");
1192 }
1193
1194 if (opcode == BRW_OPCODE_SEND && brw->gen < 6)
1195 format(file, " %d", brw_inst_base_mrf(brw, inst));
1196
1197 if (has_uip(brw, opcode)) {
1198 /* Instructions that have UIP also have JIP. */
1199 pad(file, 16);
1200 format(file, "JIP: %d", brw_inst_jip(brw, inst));
1201 pad(file, 32);
1202 format(file, "UIP: %d", brw_inst_uip(brw, inst));
1203 } else if (has_jip(brw, opcode)) {
1204 pad(file, 16);
1205 if (brw->gen >= 7) {
1206 format(file, "JIP: %d", brw_inst_jip(brw, inst));
1207 } else {
1208 format(file, "JIP: %d", brw_inst_gen6_jump_count(brw, inst));
1209 }
1210 } else if (brw->gen < 6 && (opcode == BRW_OPCODE_BREAK ||
1211 opcode == BRW_OPCODE_CONTINUE ||
1212 opcode == BRW_OPCODE_ELSE)) {
1213 pad(file, 16);
1214 format(file, "Jump: %d", brw_inst_gen4_jump_count(brw, inst));
1215 pad(file, 32);
1216 format(file, "Pop: %d", brw_inst_gen4_pop_count(brw, inst));
1217 } else if (brw->gen < 6 && (opcode == BRW_OPCODE_IF ||
1218 opcode == BRW_OPCODE_IFF ||
1219 opcode == BRW_OPCODE_HALT)) {
1220 pad(file, 16);
1221 format(file, "Jump: %d", brw_inst_gen4_pop_count(brw, inst));
1222 } else if (brw->gen < 6 && opcode == BRW_OPCODE_ENDIF) {
1223 pad(file, 16);
1224 format(file, "Pop: %d", brw_inst_gen4_pop_count(brw, inst));
1225 } else if (opcode == BRW_OPCODE_JMPI) {
1226 format(file, " %d", brw_inst_imm_d(brw, inst));
1227 } else if (opcode_descs[opcode].nsrc == 3) {
1228 pad(file, 16);
1229 err |= dest_3src(file, brw, inst);
1230
1231 pad(file, 32);
1232 err |= src0_3src(file, brw, inst);
1233
1234 pad(file, 48);
1235 err |= src1_3src(file, brw, inst);
1236
1237 pad(file, 64);
1238 err |= src2_3src(file, brw, inst);
1239 } else {
1240 if (opcode_descs[opcode].ndst > 0) {
1241 pad(file, 16);
1242 err |= dest(file, brw, inst);
1243 }
1244
1245 if (opcode_descs[opcode].nsrc > 0) {
1246 pad(file, 32);
1247 err |= src0(file, brw, inst);
1248 }
1249
1250 if (opcode_descs[opcode].nsrc > 1) {
1251 pad(file, 48);
1252 err |= src1(file, brw, inst);
1253 }
1254 }
1255
1256 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) {
1257 enum brw_message_target target = brw_inst_sfid(brw, inst);
1258
1259 newline(file);
1260 pad(file, 16);
1261 space = 0;
1262
1263 fprintf(file, " ");
1264 if (brw->gen >= 6) {
1265 err |= control(file, "target function", target_function_gen6,
1266 target, &space);
1267 } else {
1268 err |= control(file, "target function", target_function,
1269 target, &space);
1270 }
1271
1272 switch (target) {
1273 case BRW_SFID_MATH:
1274 err |= control(file, "math function", math_function,
1275 brw_inst_math_msg_function(brw, inst), &space);
1276 err |= control(file, "math saturate", math_saturate,
1277 brw_inst_math_msg_saturate(brw, inst), &space);
1278 err |= control(file, "math signed", math_signed,
1279 brw_inst_math_msg_signed_int(brw, inst), &space);
1280 err |= control(file, "math scalar", math_scalar,
1281 brw_inst_math_msg_data_type(brw, inst), &space);
1282 err |= control(file, "math precision", math_precision,
1283 brw_inst_math_msg_precision(brw, inst), &space);
1284 break;
1285 case BRW_SFID_SAMPLER:
1286 if (brw->gen >= 5) {
1287 format(file, " (%d, %d, %d, %d)",
1288 brw_inst_binding_table_index(brw, inst),
1289 brw_inst_sampler(brw, inst),
1290 brw_inst_sampler_msg_type(brw, inst),
1291 brw_inst_sampler_simd_mode(brw, inst));
1292 } else {
1293 format(file, " (%d, %d, %d, ",
1294 brw_inst_binding_table_index(brw, inst),
1295 brw_inst_sampler(brw, inst),
1296 brw_inst_sampler_msg_type(brw, inst));
1297 if (!brw->is_g4x) {
1298 err |= control(file, "sampler target format",
1299 sampler_target_format,
1300 brw_inst_sampler_return_format(brw, inst), NULL);
1301 }
1302 string(file, ")");
1303 }
1304 break;
1305 case BRW_SFID_DATAPORT_READ:
1306 if (brw->gen >= 6) {
1307 format(file, " (%d, %d, %d, %d)",
1308 brw_inst_binding_table_index(brw, inst),
1309 brw_inst_dp_msg_control(brw, inst),
1310 brw_inst_dp_msg_type(brw, inst),
1311 brw->gen >= 7 ? 0 : brw_inst_dp_write_commit(brw, inst));
1312 } else {
1313 format(file, " (%d, %d, %d)",
1314 brw_inst_binding_table_index(brw, inst),
1315 brw_inst_dp_read_msg_control(brw, inst),
1316 brw_inst_dp_read_msg_type(brw, inst));
1317 }
1318 break;
1319
1320 case BRW_SFID_DATAPORT_WRITE:
1321 if (brw->gen >= 7) {
1322 format(file, " (");
1323
1324 err |= control(file, "DP rc message type",
1325 dp_rc_msg_type_gen6,
1326 brw_inst_dp_msg_type(brw, inst), &space);
1327
1328 format(file, ", %d, %d, %d)",
1329 brw_inst_binding_table_index(brw, inst),
1330 brw_inst_dp_msg_control(brw, inst),
1331 brw_inst_dp_msg_type(brw, inst));
1332 } else if (brw->gen == 6) {
1333 format(file, " (");
1334
1335 err |= control(file, "DP rc message type",
1336 dp_rc_msg_type_gen6,
1337 brw_inst_dp_msg_type(brw, inst), &space);
1338
1339 format(file, ", %d, %d, %d, %d)",
1340 brw_inst_binding_table_index(brw, inst),
1341 brw_inst_dp_msg_control(brw, inst),
1342 brw_inst_dp_msg_type(brw, inst),
1343 brw_inst_dp_write_commit(brw, inst));
1344 } else {
1345 format(file, " (%d, %d, %d, %d)",
1346 brw_inst_binding_table_index(brw, inst),
1347 (brw_inst_rt_last(brw, inst) << 3) |
1348 brw_inst_dp_write_msg_control(brw, inst),
1349 brw_inst_dp_write_msg_type(brw, inst),
1350 brw_inst_dp_write_commit(brw, inst));
1351 }
1352 break;
1353
1354 case BRW_SFID_URB:
1355 format(file, " %d", brw_inst_urb_global_offset(brw, inst));
1356
1357 space = 1;
1358 if (brw->gen >= 5) {
1359 err |= control(file, "urb opcode", urb_opcode,
1360 brw_inst_urb_opcode(brw, inst), &space);
1361 }
1362 err |= control(file, "urb swizzle", urb_swizzle,
1363 brw_inst_urb_swizzle_control(brw, inst), &space);
1364 if (brw->gen < 7) {
1365 err |= control(file, "urb allocate", urb_allocate,
1366 brw_inst_urb_allocate(brw, inst), &space);
1367 err |= control(file, "urb used", urb_used,
1368 brw_inst_urb_used(brw, inst), &space);
1369 }
1370 err |= control(file, "urb complete", urb_complete,
1371 brw_inst_urb_complete(brw, inst), &space);
1372 break;
1373 case BRW_SFID_THREAD_SPAWNER:
1374 break;
1375 case GEN7_SFID_DATAPORT_DATA_CACHE:
1376 if (brw->gen >= 7) {
1377 format(file, " (");
1378
1379 err |= control(file, "DP DC0 message type",
1380 dp_dc0_msg_type_gen7,
1381 brw_inst_dp_msg_type(brw, inst), &space);
1382
1383 format(file, ", %d, ", brw_inst_binding_table_index(brw, inst));
1384
1385 switch (brw_inst_dp_msg_type(brw, inst)) {
1386 case GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP:
1387 control(file, "atomic op", aop,
1388 brw_inst_imm_ud(brw, inst) >> 8 & 0xf, &space);
1389 break;
1390 default:
1391 format(file, "%d", brw_inst_dp_msg_control(brw, inst));
1392 }
1393 format(file, ")");
1394 break;
1395 }
1396 /* FALLTHROUGH */
1397
1398 case HSW_SFID_DATAPORT_DATA_CACHE_1:
1399 if (brw->gen >= 7) {
1400 format(file, " (");
1401
1402 err |= control(file, "DP DC1 message type",
1403 dp_dc1_msg_type_hsw,
1404 brw_inst_dp_msg_type(brw, inst), &space);
1405
1406 format(file, ", %d, ", brw_inst_binding_table_index(brw, inst));
1407
1408 switch (brw_inst_dp_msg_type(brw, inst)) {
1409 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP:
1410 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2:
1411 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP:
1412 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2:
1413 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP:
1414 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2:
1415 control(file, "atomic op", aop,
1416 brw_inst_imm_ud(brw, inst) >> 8 & 0xf, &space);
1417 break;
1418 default:
1419 format(file, "%d", brw_inst_dp_msg_control(brw, inst));
1420 }
1421 format(file, ")");
1422 break;
1423 }
1424 /* FALLTHROUGH */
1425
1426 default:
1427 format(file, "unsupported target %d", target);
1428 break;
1429 }
1430 if (space)
1431 string(file, " ");
1432 format(file, "mlen %d", brw_inst_mlen(brw, inst));
1433 format(file, " rlen %d", brw_inst_rlen(brw, inst));
1434 }
1435 pad(file, 64);
1436 if (opcode != BRW_OPCODE_NOP) {
1437 string(file, "{");
1438 space = 1;
1439 err |= control(file, "access mode", access_mode,
1440 brw_inst_access_mode(brw, inst), &space);
1441 if (brw->gen >= 6) {
1442 err |= control(file, "write enable control", wectrl,
1443 brw_inst_mask_control(brw, inst), &space);
1444 } else {
1445 err |= control(file, "mask control", mask_ctrl,
1446 brw_inst_mask_control(brw, inst), &space);
1447 }
1448 err |= control(file, "dependency control", dep_ctrl,
1449 ((brw_inst_no_dd_check(brw, inst) << 1) |
1450 brw_inst_no_dd_clear(brw, inst)), &space);
1451
1452 if (brw->gen >= 6)
1453 err |= qtr_ctrl(file, brw, inst);
1454 else {
1455 if (brw_inst_qtr_control(brw, inst) == BRW_COMPRESSION_COMPRESSED &&
1456 opcode_descs[opcode].ndst > 0 &&
1457 brw_inst_dst_reg_file(brw, inst) == BRW_MESSAGE_REGISTER_FILE &&
1458 brw_inst_dst_da_reg_nr(brw, inst) & (1 << 7)) {
1459 format(file, " compr4");
1460 } else {
1461 err |= control(file, "compression control", compr_ctrl,
1462 brw_inst_qtr_control(brw, inst), &space);
1463 }
1464 }
1465
1466 err |= control(file, "compaction", cmpt_ctrl, is_compacted, &space);
1467 err |= control(file, "thread control", thread_ctrl,
1468 brw_inst_thread_control(brw, inst), &space);
1469 if (brw->gen >= 6)
1470 err |= control(file, "acc write control", accwr,
1471 brw_inst_acc_wr_control(brw, inst), &space);
1472 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC)
1473 err |= control(file, "end of thread", end_of_thread,
1474 brw_inst_eot(brw, inst), &space);
1475 if (space)
1476 string(file, " ");
1477 string(file, "}");
1478 }
1479 string(file, ";");
1480 newline(file);
1481 return err;
1482 }