3651b93e161a5518605e1372e8a35f4f626162fa
[mesa.git] / src / mesa / drivers / dri / i965 / brw_draw.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #include <sys/errno.h>
29
30 #include "main/glheader.h"
31 #include "main/context.h"
32 #include "main/condrender.h"
33 #include "main/samplerobj.h"
34 #include "main/state.h"
35 #include "main/enums.h"
36 #include "main/macros.h"
37 #include "main/transformfeedback.h"
38 #include "tnl/tnl.h"
39 #include "vbo/vbo_context.h"
40 #include "swrast/swrast.h"
41 #include "swrast_setup/swrast_setup.h"
42 #include "drivers/common/meta.h"
43
44 #include "brw_blorp.h"
45 #include "brw_draw.h"
46 #include "brw_defines.h"
47 #include "brw_context.h"
48 #include "brw_state.h"
49
50 #include "intel_batchbuffer.h"
51 #include "intel_fbo.h"
52 #include "intel_mipmap_tree.h"
53 #include "intel_regions.h"
54
55 #define FILE_DEBUG_FLAG DEBUG_PRIMS
56
57 static GLuint prim_to_hw_prim[GL_POLYGON+1] = {
58 _3DPRIM_POINTLIST,
59 _3DPRIM_LINELIST,
60 _3DPRIM_LINELOOP,
61 _3DPRIM_LINESTRIP,
62 _3DPRIM_TRILIST,
63 _3DPRIM_TRISTRIP,
64 _3DPRIM_TRIFAN,
65 _3DPRIM_QUADLIST,
66 _3DPRIM_QUADSTRIP,
67 _3DPRIM_POLYGON
68 };
69
70
71 static const GLenum reduced_prim[GL_POLYGON+1] = {
72 GL_POINTS,
73 GL_LINES,
74 GL_LINES,
75 GL_LINES,
76 GL_TRIANGLES,
77 GL_TRIANGLES,
78 GL_TRIANGLES,
79 GL_TRIANGLES,
80 GL_TRIANGLES,
81 GL_TRIANGLES
82 };
83
84
85 /* When the primitive changes, set a state bit and re-validate. Not
86 * the nicest and would rather deal with this by having all the
87 * programs be immune to the active primitive (ie. cope with all
88 * possibilities). That may not be realistic however.
89 */
90 static void brw_set_prim(struct brw_context *brw,
91 const struct _mesa_prim *prim)
92 {
93 struct gl_context *ctx = &brw->intel.ctx;
94 uint32_t hw_prim = prim_to_hw_prim[prim->mode];
95
96 DBG("PRIM: %s\n", _mesa_lookup_enum_by_nr(prim->mode));
97
98 /* Slight optimization to avoid the GS program when not needed:
99 */
100 if (prim->mode == GL_QUAD_STRIP &&
101 ctx->Light.ShadeModel != GL_FLAT &&
102 ctx->Polygon.FrontMode == GL_FILL &&
103 ctx->Polygon.BackMode == GL_FILL)
104 hw_prim = _3DPRIM_TRISTRIP;
105
106 if (prim->mode == GL_QUADS && prim->count == 4 &&
107 ctx->Light.ShadeModel != GL_FLAT &&
108 ctx->Polygon.FrontMode == GL_FILL &&
109 ctx->Polygon.BackMode == GL_FILL) {
110 hw_prim = _3DPRIM_TRIFAN;
111 }
112
113 if (hw_prim != brw->primitive) {
114 brw->primitive = hw_prim;
115 brw->state.dirty.brw |= BRW_NEW_PRIMITIVE;
116
117 if (reduced_prim[prim->mode] != brw->reduced_primitive) {
118 brw->reduced_primitive = reduced_prim[prim->mode];
119 brw->state.dirty.brw |= BRW_NEW_REDUCED_PRIMITIVE;
120 }
121 }
122 }
123
124 static void gen6_set_prim(struct brw_context *brw,
125 const struct _mesa_prim *prim)
126 {
127 uint32_t hw_prim;
128
129 DBG("PRIM: %s\n", _mesa_lookup_enum_by_nr(prim->mode));
130
131 hw_prim = prim_to_hw_prim[prim->mode];
132
133 if (hw_prim != brw->primitive) {
134 brw->primitive = hw_prim;
135 brw->state.dirty.brw |= BRW_NEW_PRIMITIVE;
136 }
137 }
138
139
140 /**
141 * The hardware is capable of removing dangling vertices on its own; however,
142 * prior to Gen6, we sometimes convert quads into trifans (and quad strips
143 * into tristrips), since pre-Gen6 hardware requires a GS to render quads.
144 * This function manually trims dangling vertices from a draw call involving
145 * quads so that those dangling vertices won't get drawn when we convert to
146 * trifans/tristrips.
147 */
148 static GLuint trim(GLenum prim, GLuint length)
149 {
150 if (prim == GL_QUAD_STRIP)
151 return length > 3 ? (length - length % 2) : 0;
152 else if (prim == GL_QUADS)
153 return length - length % 4;
154 else
155 return length;
156 }
157
158
159 static void brw_emit_prim(struct brw_context *brw,
160 const struct _mesa_prim *prim,
161 uint32_t hw_prim)
162 {
163 struct intel_context *intel = &brw->intel;
164 int verts_per_instance;
165 int vertex_access_type;
166 int start_vertex_location;
167 int base_vertex_location;
168
169 DBG("PRIM: %s %d %d\n", _mesa_lookup_enum_by_nr(prim->mode),
170 prim->start, prim->count);
171
172 start_vertex_location = prim->start;
173 base_vertex_location = prim->basevertex;
174 if (prim->indexed) {
175 vertex_access_type = GEN4_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM;
176 start_vertex_location += brw->ib.start_vertex_offset;
177 base_vertex_location += brw->vb.start_vertex_bias;
178 } else {
179 vertex_access_type = GEN4_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL;
180 start_vertex_location += brw->vb.start_vertex_bias;
181 }
182
183 /* We only need to trim the primitive count on pre-Gen6. */
184 if (intel->gen < 6)
185 verts_per_instance = trim(prim->mode, prim->count);
186 else
187 verts_per_instance = prim->count;
188
189 /* If nothing to emit, just return. */
190 if (verts_per_instance == 0)
191 return;
192
193 /* If we're set to always flush, do it before and after the primitive emit.
194 * We want to catch both missed flushes that hurt instruction/state cache
195 * and missed flushes of the render cache as it heads to other parts of
196 * the besides the draw code.
197 */
198 if (brw->always_flush_cache) {
199 intel_batchbuffer_emit_mi_flush(brw);
200 }
201
202 BEGIN_BATCH(6);
203 OUT_BATCH(CMD_3D_PRIM << 16 | (6 - 2) |
204 hw_prim << GEN4_3DPRIM_TOPOLOGY_TYPE_SHIFT |
205 vertex_access_type);
206 OUT_BATCH(verts_per_instance);
207 OUT_BATCH(start_vertex_location);
208 OUT_BATCH(prim->num_instances);
209 OUT_BATCH(prim->base_instance);
210 OUT_BATCH(base_vertex_location);
211 ADVANCE_BATCH();
212
213 brw->batch.need_workaround_flush = true;
214
215 if (brw->always_flush_cache) {
216 intel_batchbuffer_emit_mi_flush(brw);
217 }
218 }
219
220 static void gen7_emit_prim(struct brw_context *brw,
221 const struct _mesa_prim *prim,
222 uint32_t hw_prim)
223 {
224 int verts_per_instance;
225 int vertex_access_type;
226 int start_vertex_location;
227 int base_vertex_location;
228
229 DBG("PRIM: %s %d %d\n", _mesa_lookup_enum_by_nr(prim->mode),
230 prim->start, prim->count);
231
232 start_vertex_location = prim->start;
233 base_vertex_location = prim->basevertex;
234 if (prim->indexed) {
235 vertex_access_type = GEN7_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM;
236 start_vertex_location += brw->ib.start_vertex_offset;
237 base_vertex_location += brw->vb.start_vertex_bias;
238 } else {
239 vertex_access_type = GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL;
240 start_vertex_location += brw->vb.start_vertex_bias;
241 }
242
243 verts_per_instance = prim->count;
244
245 /* If nothing to emit, just return. */
246 if (verts_per_instance == 0)
247 return;
248
249 /* If we're set to always flush, do it before and after the primitive emit.
250 * We want to catch both missed flushes that hurt instruction/state cache
251 * and missed flushes of the render cache as it heads to other parts of
252 * the besides the draw code.
253 */
254 if (brw->always_flush_cache) {
255 intel_batchbuffer_emit_mi_flush(brw);
256 }
257
258 BEGIN_BATCH(7);
259 OUT_BATCH(CMD_3D_PRIM << 16 | (7 - 2));
260 OUT_BATCH(hw_prim | vertex_access_type);
261 OUT_BATCH(verts_per_instance);
262 OUT_BATCH(start_vertex_location);
263 OUT_BATCH(prim->num_instances);
264 OUT_BATCH(prim->base_instance);
265 OUT_BATCH(base_vertex_location);
266 ADVANCE_BATCH();
267
268 if (brw->always_flush_cache) {
269 intel_batchbuffer_emit_mi_flush(brw);
270 }
271 }
272
273
274 static void brw_merge_inputs( struct brw_context *brw,
275 const struct gl_client_array *arrays[])
276 {
277 GLuint i;
278
279 for (i = 0; i < brw->vb.nr_buffers; i++) {
280 drm_intel_bo_unreference(brw->vb.buffers[i].bo);
281 brw->vb.buffers[i].bo = NULL;
282 }
283 brw->vb.nr_buffers = 0;
284
285 for (i = 0; i < VERT_ATTRIB_MAX; i++) {
286 brw->vb.inputs[i].buffer = -1;
287 brw->vb.inputs[i].glarray = arrays[i];
288 brw->vb.inputs[i].attrib = (gl_vert_attrib) i;
289 }
290 }
291
292 /*
293 * \brief Resolve buffers before drawing.
294 *
295 * Resolve the depth buffer's HiZ buffer and resolve the depth buffer of each
296 * enabled depth texture.
297 *
298 * (In the future, this will also perform MSAA resolves).
299 */
300 static void
301 brw_predraw_resolve_buffers(struct brw_context *brw)
302 {
303 struct gl_context *ctx = &brw->intel.ctx;
304 struct intel_renderbuffer *depth_irb;
305 struct intel_texture_object *tex_obj;
306
307 /* Resolve the depth buffer's HiZ buffer. */
308 depth_irb = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH);
309 if (depth_irb)
310 intel_renderbuffer_resolve_hiz(brw, depth_irb);
311
312 /* Resolve depth buffer of each enabled depth texture, and color buffer of
313 * each fast-clear-enabled color texture.
314 */
315 for (int i = 0; i < BRW_MAX_TEX_UNIT; i++) {
316 if (!ctx->Texture.Unit[i]._ReallyEnabled)
317 continue;
318 tex_obj = intel_texture_object(ctx->Texture.Unit[i]._Current);
319 if (!tex_obj || !tex_obj->mt)
320 continue;
321 intel_miptree_all_slices_resolve_depth(brw, tex_obj->mt);
322 intel_miptree_resolve_color(brw, tex_obj->mt);
323 }
324 }
325
326 /**
327 * \brief Call this after drawing to mark which buffers need resolving
328 *
329 * If the depth buffer was written to and if it has an accompanying HiZ
330 * buffer, then mark that it needs a depth resolve.
331 *
332 * If the color buffer is a multisample window system buffer, then
333 * mark that it needs a downsample.
334 */
335 static void brw_postdraw_set_buffers_need_resolve(struct brw_context *brw)
336 {
337 struct gl_context *ctx = &brw->intel.ctx;
338 struct gl_framebuffer *fb = ctx->DrawBuffer;
339
340 struct intel_renderbuffer *front_irb = NULL;
341 struct intel_renderbuffer *back_irb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
342 struct intel_renderbuffer *depth_irb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
343
344 if (brw->is_front_buffer_rendering)
345 front_irb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
346
347 if (front_irb)
348 intel_renderbuffer_set_needs_downsample(front_irb);
349 if (back_irb)
350 intel_renderbuffer_set_needs_downsample(back_irb);
351 if (depth_irb && ctx->Depth.Mask)
352 intel_renderbuffer_set_needs_depth_resolve(depth_irb);
353 }
354
355 /* May fail if out of video memory for texture or vbo upload, or on
356 * fallback conditions.
357 */
358 static bool brw_try_draw_prims( struct gl_context *ctx,
359 const struct gl_client_array *arrays[],
360 const struct _mesa_prim *prim,
361 GLuint nr_prims,
362 const struct _mesa_index_buffer *ib,
363 GLuint min_index,
364 GLuint max_index )
365 {
366 struct intel_context *intel = intel_context(ctx);
367 struct brw_context *brw = brw_context(ctx);
368 bool retval = true;
369 GLuint i;
370 bool fail_next = false;
371
372 if (ctx->NewState)
373 _mesa_update_state( ctx );
374
375 /* We have to validate the textures *before* checking for fallbacks;
376 * otherwise, the software fallback won't be able to rely on the
377 * texture state, the firstLevel and lastLevel fields won't be
378 * set in the intel texture object (they'll both be 0), and the
379 * software fallback will segfault if it attempts to access any
380 * texture level other than level 0.
381 */
382 brw_validate_textures( brw );
383
384 intel_prepare_render(brw);
385
386 /* This workaround has to happen outside of brw_upload_state() because it
387 * may flush the batchbuffer for a blit, affecting the state flags.
388 */
389 brw_workaround_depthstencil_alignment(brw, 0);
390
391 /* Resolves must occur after updating renderbuffers, updating context state,
392 * and finalizing textures but before setting up any hardware state for
393 * this draw call.
394 */
395 brw_predraw_resolve_buffers(brw);
396
397 /* Bind all inputs, derive varying and size information:
398 */
399 brw_merge_inputs( brw, arrays );
400
401 brw->ib.ib = ib;
402 brw->state.dirty.brw |= BRW_NEW_INDICES;
403
404 brw->vb.min_index = min_index;
405 brw->vb.max_index = max_index;
406 brw->state.dirty.brw |= BRW_NEW_VERTICES;
407
408 for (i = 0; i < nr_prims; i++) {
409 int estimated_max_prim_size;
410
411 estimated_max_prim_size = 512; /* batchbuffer commands */
412 estimated_max_prim_size += (BRW_MAX_TEX_UNIT *
413 (sizeof(struct brw_sampler_state) +
414 sizeof(struct gen5_sampler_default_color)));
415 estimated_max_prim_size += 1024; /* gen6 VS push constants */
416 estimated_max_prim_size += 1024; /* gen6 WM push constants */
417 estimated_max_prim_size += 512; /* misc. pad */
418
419 /* Flush the batch if it's approaching full, so that we don't wrap while
420 * we've got validated state that needs to be in the same batch as the
421 * primitives.
422 */
423 intel_batchbuffer_require_space(brw, estimated_max_prim_size, false);
424 intel_batchbuffer_save_state(brw);
425
426 if (brw->num_instances != prim->num_instances) {
427 brw->num_instances = prim->num_instances;
428 brw->state.dirty.brw |= BRW_NEW_VERTICES;
429 }
430 if (brw->basevertex != prim->basevertex) {
431 brw->basevertex = prim->basevertex;
432 brw->state.dirty.brw |= BRW_NEW_VERTICES;
433 }
434 if (intel->gen < 6)
435 brw_set_prim(brw, &prim[i]);
436 else
437 gen6_set_prim(brw, &prim[i]);
438
439 retry:
440 /* Note that before the loop, brw->state.dirty.brw was set to != 0, and
441 * that the state updated in the loop outside of this block is that in
442 * *_set_prim or intel_batchbuffer_flush(), which only impacts
443 * brw->state.dirty.brw.
444 */
445 if (brw->state.dirty.brw) {
446 brw->no_batch_wrap = true;
447 brw_upload_state(brw);
448 }
449
450 if (intel->gen >= 7)
451 gen7_emit_prim(brw, &prim[i], brw->primitive);
452 else
453 brw_emit_prim(brw, &prim[i], brw->primitive);
454
455 brw->no_batch_wrap = false;
456
457 if (dri_bufmgr_check_aperture_space(&brw->batch.bo, 1)) {
458 if (!fail_next) {
459 intel_batchbuffer_reset_to_saved(brw);
460 intel_batchbuffer_flush(brw);
461 fail_next = true;
462 goto retry;
463 } else {
464 if (intel_batchbuffer_flush(brw) == -ENOSPC) {
465 static bool warned = false;
466
467 if (!warned) {
468 fprintf(stderr, "i965: Single primitive emit exceeded"
469 "available aperture space\n");
470 warned = true;
471 }
472
473 retval = false;
474 }
475 }
476 }
477 }
478
479 if (brw->always_flush_batch)
480 intel_batchbuffer_flush(brw);
481
482 brw_state_cache_check_size(brw);
483 brw_postdraw_set_buffers_need_resolve(brw);
484
485 return retval;
486 }
487
488 void brw_draw_prims( struct gl_context *ctx,
489 const struct _mesa_prim *prim,
490 GLuint nr_prims,
491 const struct _mesa_index_buffer *ib,
492 GLboolean index_bounds_valid,
493 GLuint min_index,
494 GLuint max_index,
495 struct gl_transform_feedback_object *tfb_vertcount )
496 {
497 struct brw_context *brw = brw_context(ctx);
498 const struct gl_client_array **arrays = ctx->Array._DrawArrays;
499
500 if (!_mesa_check_conditional_render(ctx))
501 return;
502
503 /* Handle primitive restart if needed */
504 if (brw_handle_primitive_restart(ctx, prim, nr_prims, ib)) {
505 /* The draw was handled, so we can exit now */
506 return;
507 }
508
509 /* If we're going to have to upload any of the user's vertex arrays, then
510 * get the minimum and maximum of their index buffer so we know what range
511 * to upload.
512 */
513 if (!vbo_all_varyings_in_vbos(arrays) && !index_bounds_valid)
514 vbo_get_minmax_indices(ctx, prim, ib, &min_index, &max_index, nr_prims);
515
516 /* Do GL_SELECT and GL_FEEDBACK rendering using swrast, even though it
517 * won't support all the extensions we support.
518 */
519 if (ctx->RenderMode != GL_RENDER) {
520 perf_debug("%s render mode not supported in hardware\n",
521 _mesa_lookup_enum_by_nr(ctx->RenderMode));
522 _swsetup_Wakeup(ctx);
523 _tnl_wakeup(ctx);
524 _tnl_draw_prims(ctx, arrays, prim, nr_prims, ib, min_index, max_index);
525 return;
526 }
527
528 /* Try drawing with the hardware, but don't do anything else if we can't
529 * manage it. swrast doesn't support our featureset, so we can't fall back
530 * to it.
531 */
532 brw_try_draw_prims(ctx, arrays, prim, nr_prims, ib, min_index, max_index);
533 }
534
535 void brw_draw_init( struct brw_context *brw )
536 {
537 struct gl_context *ctx = &brw->intel.ctx;
538 struct vbo_context *vbo = vbo_context(ctx);
539 int i;
540
541 /* Register our drawing function:
542 */
543 vbo->draw_prims = brw_draw_prims;
544
545 for (i = 0; i < VERT_ATTRIB_MAX; i++)
546 brw->vb.inputs[i].buffer = -1;
547 brw->vb.nr_buffers = 0;
548 brw->vb.nr_enabled = 0;
549 }
550
551 void brw_draw_destroy( struct brw_context *brw )
552 {
553 int i;
554
555 for (i = 0; i < brw->vb.nr_buffers; i++) {
556 drm_intel_bo_unreference(brw->vb.buffers[i].bo);
557 brw->vb.buffers[i].bo = NULL;
558 }
559 brw->vb.nr_buffers = 0;
560
561 for (i = 0; i < brw->vb.nr_enabled; i++) {
562 brw->vb.enabled[i]->buffer = -1;
563 }
564 brw->vb.nr_enabled = 0;
565
566 drm_intel_bo_unreference(brw->ib.bo);
567 brw->ib.bo = NULL;
568 }