1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
28 #include <sys/errno.h>
30 #include "main/glheader.h"
31 #include "main/context.h"
32 #include "main/condrender.h"
33 #include "main/samplerobj.h"
34 #include "main/state.h"
35 #include "main/enums.h"
36 #include "main/macros.h"
37 #include "main/transformfeedback.h"
39 #include "vbo/vbo_context.h"
40 #include "swrast/swrast.h"
41 #include "swrast_setup/swrast_setup.h"
42 #include "drivers/common/meta.h"
44 #include "brw_blorp.h"
46 #include "brw_defines.h"
47 #include "brw_context.h"
48 #include "brw_state.h"
50 #include "intel_batchbuffer.h"
51 #include "intel_fbo.h"
52 #include "intel_mipmap_tree.h"
53 #include "intel_regions.h"
55 #define FILE_DEBUG_FLAG DEBUG_PRIMS
57 static GLuint prim_to_hw_prim
[GL_POLYGON
+1] = {
71 static const GLenum reduced_prim
[GL_POLYGON
+1] = {
85 /* When the primitive changes, set a state bit and re-validate. Not
86 * the nicest and would rather deal with this by having all the
87 * programs be immune to the active primitive (ie. cope with all
88 * possibilities). That may not be realistic however.
90 static void brw_set_prim(struct brw_context
*brw
,
91 const struct _mesa_prim
*prim
)
93 struct gl_context
*ctx
= &brw
->intel
.ctx
;
94 uint32_t hw_prim
= prim_to_hw_prim
[prim
->mode
];
96 DBG("PRIM: %s\n", _mesa_lookup_enum_by_nr(prim
->mode
));
98 /* Slight optimization to avoid the GS program when not needed:
100 if (prim
->mode
== GL_QUAD_STRIP
&&
101 ctx
->Light
.ShadeModel
!= GL_FLAT
&&
102 ctx
->Polygon
.FrontMode
== GL_FILL
&&
103 ctx
->Polygon
.BackMode
== GL_FILL
)
104 hw_prim
= _3DPRIM_TRISTRIP
;
106 if (prim
->mode
== GL_QUADS
&& prim
->count
== 4 &&
107 ctx
->Light
.ShadeModel
!= GL_FLAT
&&
108 ctx
->Polygon
.FrontMode
== GL_FILL
&&
109 ctx
->Polygon
.BackMode
== GL_FILL
) {
110 hw_prim
= _3DPRIM_TRIFAN
;
113 if (hw_prim
!= brw
->primitive
) {
114 brw
->primitive
= hw_prim
;
115 brw
->state
.dirty
.brw
|= BRW_NEW_PRIMITIVE
;
117 if (reduced_prim
[prim
->mode
] != brw
->intel
.reduced_primitive
) {
118 brw
->intel
.reduced_primitive
= reduced_prim
[prim
->mode
];
119 brw
->state
.dirty
.brw
|= BRW_NEW_REDUCED_PRIMITIVE
;
124 static void gen6_set_prim(struct brw_context
*brw
,
125 const struct _mesa_prim
*prim
)
129 DBG("PRIM: %s\n", _mesa_lookup_enum_by_nr(prim
->mode
));
131 hw_prim
= prim_to_hw_prim
[prim
->mode
];
133 if (hw_prim
!= brw
->primitive
) {
134 brw
->primitive
= hw_prim
;
135 brw
->state
.dirty
.brw
|= BRW_NEW_PRIMITIVE
;
141 * The hardware is capable of removing dangling vertices on its own; however,
142 * prior to Gen6, we sometimes convert quads into trifans (and quad strips
143 * into tristrips), since pre-Gen6 hardware requires a GS to render quads.
144 * This function manually trims dangling vertices from a draw call involving
145 * quads so that those dangling vertices won't get drawn when we convert to
148 static GLuint
trim(GLenum prim
, GLuint length
)
150 if (prim
== GL_QUAD_STRIP
)
151 return length
> 3 ? (length
- length
% 2) : 0;
152 else if (prim
== GL_QUADS
)
153 return length
- length
% 4;
159 static void brw_emit_prim(struct brw_context
*brw
,
160 const struct _mesa_prim
*prim
,
163 struct intel_context
*intel
= &brw
->intel
;
164 int verts_per_instance
;
165 int vertex_access_type
;
166 int start_vertex_location
;
167 int base_vertex_location
;
169 DBG("PRIM: %s %d %d\n", _mesa_lookup_enum_by_nr(prim
->mode
),
170 prim
->start
, prim
->count
);
172 start_vertex_location
= prim
->start
;
173 base_vertex_location
= prim
->basevertex
;
175 vertex_access_type
= GEN4_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM
;
176 start_vertex_location
+= brw
->ib
.start_vertex_offset
;
177 base_vertex_location
+= brw
->vb
.start_vertex_bias
;
179 vertex_access_type
= GEN4_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL
;
180 start_vertex_location
+= brw
->vb
.start_vertex_bias
;
183 /* We only need to trim the primitive count on pre-Gen6. */
185 verts_per_instance
= trim(prim
->mode
, prim
->count
);
187 verts_per_instance
= prim
->count
;
189 /* If nothing to emit, just return. */
190 if (verts_per_instance
== 0)
193 /* If we're set to always flush, do it before and after the primitive emit.
194 * We want to catch both missed flushes that hurt instruction/state cache
195 * and missed flushes of the render cache as it heads to other parts of
196 * the besides the draw code.
198 if (intel
->always_flush_cache
) {
199 intel_batchbuffer_emit_mi_flush(brw
);
203 OUT_BATCH(CMD_3D_PRIM
<< 16 | (6 - 2) |
204 hw_prim
<< GEN4_3DPRIM_TOPOLOGY_TYPE_SHIFT
|
206 OUT_BATCH(verts_per_instance
);
207 OUT_BATCH(start_vertex_location
);
208 OUT_BATCH(prim
->num_instances
);
209 OUT_BATCH(prim
->base_instance
);
210 OUT_BATCH(base_vertex_location
);
213 intel
->batch
.need_workaround_flush
= true;
215 if (intel
->always_flush_cache
) {
216 intel_batchbuffer_emit_mi_flush(brw
);
220 static void gen7_emit_prim(struct brw_context
*brw
,
221 const struct _mesa_prim
*prim
,
224 struct intel_context
*intel
= &brw
->intel
;
225 int verts_per_instance
;
226 int vertex_access_type
;
227 int start_vertex_location
;
228 int base_vertex_location
;
230 DBG("PRIM: %s %d %d\n", _mesa_lookup_enum_by_nr(prim
->mode
),
231 prim
->start
, prim
->count
);
233 start_vertex_location
= prim
->start
;
234 base_vertex_location
= prim
->basevertex
;
236 vertex_access_type
= GEN7_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM
;
237 start_vertex_location
+= brw
->ib
.start_vertex_offset
;
238 base_vertex_location
+= brw
->vb
.start_vertex_bias
;
240 vertex_access_type
= GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL
;
241 start_vertex_location
+= brw
->vb
.start_vertex_bias
;
244 verts_per_instance
= prim
->count
;
246 /* If nothing to emit, just return. */
247 if (verts_per_instance
== 0)
250 /* If we're set to always flush, do it before and after the primitive emit.
251 * We want to catch both missed flushes that hurt instruction/state cache
252 * and missed flushes of the render cache as it heads to other parts of
253 * the besides the draw code.
255 if (intel
->always_flush_cache
) {
256 intel_batchbuffer_emit_mi_flush(brw
);
260 OUT_BATCH(CMD_3D_PRIM
<< 16 | (7 - 2));
261 OUT_BATCH(hw_prim
| vertex_access_type
);
262 OUT_BATCH(verts_per_instance
);
263 OUT_BATCH(start_vertex_location
);
264 OUT_BATCH(prim
->num_instances
);
265 OUT_BATCH(prim
->base_instance
);
266 OUT_BATCH(base_vertex_location
);
269 if (intel
->always_flush_cache
) {
270 intel_batchbuffer_emit_mi_flush(brw
);
275 static void brw_merge_inputs( struct brw_context
*brw
,
276 const struct gl_client_array
*arrays
[])
280 for (i
= 0; i
< brw
->vb
.nr_buffers
; i
++) {
281 drm_intel_bo_unreference(brw
->vb
.buffers
[i
].bo
);
282 brw
->vb
.buffers
[i
].bo
= NULL
;
284 brw
->vb
.nr_buffers
= 0;
286 for (i
= 0; i
< VERT_ATTRIB_MAX
; i
++) {
287 brw
->vb
.inputs
[i
].buffer
= -1;
288 brw
->vb
.inputs
[i
].glarray
= arrays
[i
];
289 brw
->vb
.inputs
[i
].attrib
= (gl_vert_attrib
) i
;
294 * \brief Resolve buffers before drawing.
296 * Resolve the depth buffer's HiZ buffer and resolve the depth buffer of each
297 * enabled depth texture.
299 * (In the future, this will also perform MSAA resolves).
302 brw_predraw_resolve_buffers(struct brw_context
*brw
)
304 struct gl_context
*ctx
= &brw
->intel
.ctx
;
305 struct intel_renderbuffer
*depth_irb
;
306 struct intel_texture_object
*tex_obj
;
308 /* Resolve the depth buffer's HiZ buffer. */
309 depth_irb
= intel_get_renderbuffer(ctx
->DrawBuffer
, BUFFER_DEPTH
);
311 intel_renderbuffer_resolve_hiz(brw
, depth_irb
);
313 /* Resolve depth buffer of each enabled depth texture, and color buffer of
314 * each fast-clear-enabled color texture.
316 for (int i
= 0; i
< BRW_MAX_TEX_UNIT
; i
++) {
317 if (!ctx
->Texture
.Unit
[i
]._ReallyEnabled
)
319 tex_obj
= intel_texture_object(ctx
->Texture
.Unit
[i
]._Current
);
320 if (!tex_obj
|| !tex_obj
->mt
)
322 intel_miptree_all_slices_resolve_depth(brw
, tex_obj
->mt
);
323 intel_miptree_resolve_color(brw
, tex_obj
->mt
);
328 * \brief Call this after drawing to mark which buffers need resolving
330 * If the depth buffer was written to and if it has an accompanying HiZ
331 * buffer, then mark that it needs a depth resolve.
333 * If the color buffer is a multisample window system buffer, then
334 * mark that it needs a downsample.
336 static void brw_postdraw_set_buffers_need_resolve(struct brw_context
*brw
)
338 struct gl_context
*ctx
= &brw
->intel
.ctx
;
339 struct gl_framebuffer
*fb
= ctx
->DrawBuffer
;
341 struct intel_renderbuffer
*front_irb
= NULL
;
342 struct intel_renderbuffer
*back_irb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
343 struct intel_renderbuffer
*depth_irb
= intel_get_renderbuffer(fb
, BUFFER_DEPTH
);
345 if (brw
->is_front_buffer_rendering
)
346 front_irb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
349 intel_renderbuffer_set_needs_downsample(front_irb
);
351 intel_renderbuffer_set_needs_downsample(back_irb
);
352 if (depth_irb
&& ctx
->Depth
.Mask
)
353 intel_renderbuffer_set_needs_depth_resolve(depth_irb
);
356 /* May fail if out of video memory for texture or vbo upload, or on
357 * fallback conditions.
359 static bool brw_try_draw_prims( struct gl_context
*ctx
,
360 const struct gl_client_array
*arrays
[],
361 const struct _mesa_prim
*prim
,
363 const struct _mesa_index_buffer
*ib
,
367 struct intel_context
*intel
= intel_context(ctx
);
368 struct brw_context
*brw
= brw_context(ctx
);
371 bool fail_next
= false;
374 _mesa_update_state( ctx
);
376 /* We have to validate the textures *before* checking for fallbacks;
377 * otherwise, the software fallback won't be able to rely on the
378 * texture state, the firstLevel and lastLevel fields won't be
379 * set in the intel texture object (they'll both be 0), and the
380 * software fallback will segfault if it attempts to access any
381 * texture level other than level 0.
383 brw_validate_textures( brw
);
385 intel_prepare_render(brw
);
387 /* This workaround has to happen outside of brw_upload_state() because it
388 * may flush the batchbuffer for a blit, affecting the state flags.
390 brw_workaround_depthstencil_alignment(brw
, 0);
392 /* Resolves must occur after updating renderbuffers, updating context state,
393 * and finalizing textures but before setting up any hardware state for
396 brw_predraw_resolve_buffers(brw
);
398 /* Bind all inputs, derive varying and size information:
400 brw_merge_inputs( brw
, arrays
);
403 brw
->state
.dirty
.brw
|= BRW_NEW_INDICES
;
405 brw
->vb
.min_index
= min_index
;
406 brw
->vb
.max_index
= max_index
;
407 brw
->state
.dirty
.brw
|= BRW_NEW_VERTICES
;
409 for (i
= 0; i
< nr_prims
; i
++) {
410 int estimated_max_prim_size
;
412 estimated_max_prim_size
= 512; /* batchbuffer commands */
413 estimated_max_prim_size
+= (BRW_MAX_TEX_UNIT
*
414 (sizeof(struct brw_sampler_state
) +
415 sizeof(struct gen5_sampler_default_color
)));
416 estimated_max_prim_size
+= 1024; /* gen6 VS push constants */
417 estimated_max_prim_size
+= 1024; /* gen6 WM push constants */
418 estimated_max_prim_size
+= 512; /* misc. pad */
420 /* Flush the batch if it's approaching full, so that we don't wrap while
421 * we've got validated state that needs to be in the same batch as the
424 intel_batchbuffer_require_space(brw
, estimated_max_prim_size
, false);
425 intel_batchbuffer_save_state(brw
);
427 if (brw
->num_instances
!= prim
->num_instances
) {
428 brw
->num_instances
= prim
->num_instances
;
429 brw
->state
.dirty
.brw
|= BRW_NEW_VERTICES
;
431 if (brw
->basevertex
!= prim
->basevertex
) {
432 brw
->basevertex
= prim
->basevertex
;
433 brw
->state
.dirty
.brw
|= BRW_NEW_VERTICES
;
436 brw_set_prim(brw
, &prim
[i
]);
438 gen6_set_prim(brw
, &prim
[i
]);
441 /* Note that before the loop, brw->state.dirty.brw was set to != 0, and
442 * that the state updated in the loop outside of this block is that in
443 * *_set_prim or intel_batchbuffer_flush(), which only impacts
444 * brw->state.dirty.brw.
446 if (brw
->state
.dirty
.brw
) {
447 intel
->no_batch_wrap
= true;
448 brw_upload_state(brw
);
452 gen7_emit_prim(brw
, &prim
[i
], brw
->primitive
);
454 brw_emit_prim(brw
, &prim
[i
], brw
->primitive
);
456 intel
->no_batch_wrap
= false;
458 if (dri_bufmgr_check_aperture_space(&intel
->batch
.bo
, 1)) {
460 intel_batchbuffer_reset_to_saved(brw
);
461 intel_batchbuffer_flush(brw
);
465 if (intel_batchbuffer_flush(brw
) == -ENOSPC
) {
466 static bool warned
= false;
469 fprintf(stderr
, "i965: Single primitive emit exceeded"
470 "available aperture space\n");
480 if (intel
->always_flush_batch
)
481 intel_batchbuffer_flush(brw
);
483 brw_state_cache_check_size(brw
);
484 brw_postdraw_set_buffers_need_resolve(brw
);
489 void brw_draw_prims( struct gl_context
*ctx
,
490 const struct _mesa_prim
*prim
,
492 const struct _mesa_index_buffer
*ib
,
493 GLboolean index_bounds_valid
,
496 struct gl_transform_feedback_object
*tfb_vertcount
)
498 struct intel_context
*intel
= intel_context(ctx
);
499 const struct gl_client_array
**arrays
= ctx
->Array
._DrawArrays
;
501 if (!_mesa_check_conditional_render(ctx
))
504 /* Handle primitive restart if needed */
505 if (brw_handle_primitive_restart(ctx
, prim
, nr_prims
, ib
)) {
506 /* The draw was handled, so we can exit now */
510 /* If we're going to have to upload any of the user's vertex arrays, then
511 * get the minimum and maximum of their index buffer so we know what range
514 if (!vbo_all_varyings_in_vbos(arrays
) && !index_bounds_valid
)
515 vbo_get_minmax_indices(ctx
, prim
, ib
, &min_index
, &max_index
, nr_prims
);
517 /* Do GL_SELECT and GL_FEEDBACK rendering using swrast, even though it
518 * won't support all the extensions we support.
520 if (ctx
->RenderMode
!= GL_RENDER
) {
521 perf_debug("%s render mode not supported in hardware\n",
522 _mesa_lookup_enum_by_nr(ctx
->RenderMode
));
523 _swsetup_Wakeup(ctx
);
525 _tnl_draw_prims(ctx
, arrays
, prim
, nr_prims
, ib
, min_index
, max_index
);
529 /* Try drawing with the hardware, but don't do anything else if we can't
530 * manage it. swrast doesn't support our featureset, so we can't fall back
533 brw_try_draw_prims(ctx
, arrays
, prim
, nr_prims
, ib
, min_index
, max_index
);
536 void brw_draw_init( struct brw_context
*brw
)
538 struct gl_context
*ctx
= &brw
->intel
.ctx
;
539 struct vbo_context
*vbo
= vbo_context(ctx
);
542 /* Register our drawing function:
544 vbo
->draw_prims
= brw_draw_prims
;
546 for (i
= 0; i
< VERT_ATTRIB_MAX
; i
++)
547 brw
->vb
.inputs
[i
].buffer
= -1;
548 brw
->vb
.nr_buffers
= 0;
549 brw
->vb
.nr_enabled
= 0;
552 void brw_draw_destroy( struct brw_context
*brw
)
556 for (i
= 0; i
< brw
->vb
.nr_buffers
; i
++) {
557 drm_intel_bo_unreference(brw
->vb
.buffers
[i
].bo
);
558 brw
->vb
.buffers
[i
].bo
= NULL
;
560 brw
->vb
.nr_buffers
= 0;
562 for (i
= 0; i
< brw
->vb
.nr_enabled
; i
++) {
563 brw
->vb
.enabled
[i
]->buffer
= -1;
565 brw
->vb
.nr_enabled
= 0;
567 drm_intel_bo_unreference(brw
->ib
.bo
);