1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
28 #include <sys/errno.h>
30 #include "main/glheader.h"
31 #include "main/context.h"
32 #include "main/condrender.h"
33 #include "main/samplerobj.h"
34 #include "main/state.h"
35 #include "main/enums.h"
36 #include "main/macros.h"
37 #include "main/transformfeedback.h"
39 #include "vbo/vbo_context.h"
40 #include "swrast/swrast.h"
41 #include "swrast_setup/swrast_setup.h"
42 #include "drivers/common/meta.h"
45 #include "brw_defines.h"
46 #include "brw_context.h"
47 #include "brw_state.h"
49 #include "intel_batchbuffer.h"
50 #include "intel_fbo.h"
51 #include "intel_mipmap_tree.h"
52 #include "intel_regions.h"
54 #define FILE_DEBUG_FLAG DEBUG_PRIMS
56 static GLuint prim_to_hw_prim
[GL_POLYGON
+1] = {
70 static const GLenum reduced_prim
[GL_POLYGON
+1] = {
84 /* When the primitive changes, set a state bit and re-validate. Not
85 * the nicest and would rather deal with this by having all the
86 * programs be immune to the active primitive (ie. cope with all
87 * possibilities). That may not be realistic however.
89 static void brw_set_prim(struct brw_context
*brw
,
90 const struct _mesa_prim
*prim
)
92 struct gl_context
*ctx
= &brw
->intel
.ctx
;
93 uint32_t hw_prim
= prim_to_hw_prim
[prim
->mode
];
95 DBG("PRIM: %s\n", _mesa_lookup_enum_by_nr(prim
->mode
));
97 /* Slight optimization to avoid the GS program when not needed:
99 if (prim
->mode
== GL_QUAD_STRIP
&&
100 ctx
->Light
.ShadeModel
!= GL_FLAT
&&
101 ctx
->Polygon
.FrontMode
== GL_FILL
&&
102 ctx
->Polygon
.BackMode
== GL_FILL
)
103 hw_prim
= _3DPRIM_TRISTRIP
;
105 if (prim
->mode
== GL_QUADS
&& prim
->count
== 4 &&
106 ctx
->Light
.ShadeModel
!= GL_FLAT
&&
107 ctx
->Polygon
.FrontMode
== GL_FILL
&&
108 ctx
->Polygon
.BackMode
== GL_FILL
) {
109 hw_prim
= _3DPRIM_TRIFAN
;
112 if (hw_prim
!= brw
->primitive
) {
113 brw
->primitive
= hw_prim
;
114 brw
->state
.dirty
.brw
|= BRW_NEW_PRIMITIVE
;
116 if (reduced_prim
[prim
->mode
] != brw
->intel
.reduced_primitive
) {
117 brw
->intel
.reduced_primitive
= reduced_prim
[prim
->mode
];
118 brw
->state
.dirty
.brw
|= BRW_NEW_REDUCED_PRIMITIVE
;
123 static void gen6_set_prim(struct brw_context
*brw
,
124 const struct _mesa_prim
*prim
)
128 DBG("PRIM: %s\n", _mesa_lookup_enum_by_nr(prim
->mode
));
130 hw_prim
= prim_to_hw_prim
[prim
->mode
];
132 if (hw_prim
!= brw
->primitive
) {
133 brw
->primitive
= hw_prim
;
134 brw
->state
.dirty
.brw
|= BRW_NEW_PRIMITIVE
;
139 static GLuint
trim(GLenum prim
, GLuint length
)
141 if (prim
== GL_QUAD_STRIP
)
142 return length
> 3 ? (length
- length
% 2) : 0;
143 else if (prim
== GL_QUADS
)
144 return length
- length
% 4;
150 static void brw_emit_prim(struct brw_context
*brw
,
151 const struct _mesa_prim
*prim
,
154 struct intel_context
*intel
= &brw
->intel
;
155 int verts_per_instance
;
156 int vertex_access_type
;
157 int start_vertex_location
;
158 int base_vertex_location
;
160 DBG("PRIM: %s %d %d\n", _mesa_lookup_enum_by_nr(prim
->mode
),
161 prim
->start
, prim
->count
);
163 start_vertex_location
= prim
->start
;
164 base_vertex_location
= prim
->basevertex
;
166 vertex_access_type
= GEN4_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM
;
167 start_vertex_location
+= brw
->ib
.start_vertex_offset
;
168 base_vertex_location
+= brw
->vb
.start_vertex_bias
;
170 vertex_access_type
= GEN4_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL
;
171 start_vertex_location
+= brw
->vb
.start_vertex_bias
;
174 verts_per_instance
= trim(prim
->mode
, prim
->count
);
176 /* If nothing to emit, just return. */
177 if (verts_per_instance
== 0)
180 /* If we're set to always flush, do it before and after the primitive emit.
181 * We want to catch both missed flushes that hurt instruction/state cache
182 * and missed flushes of the render cache as it heads to other parts of
183 * the besides the draw code.
185 if (intel
->always_flush_cache
) {
186 intel_batchbuffer_emit_mi_flush(intel
);
190 OUT_BATCH(CMD_3D_PRIM
<< 16 | (6 - 2) |
191 hw_prim
<< GEN4_3DPRIM_TOPOLOGY_TYPE_SHIFT
|
193 OUT_BATCH(verts_per_instance
);
194 OUT_BATCH(start_vertex_location
);
195 OUT_BATCH(prim
->num_instances
);
196 OUT_BATCH(prim
->base_instance
);
197 OUT_BATCH(base_vertex_location
);
200 intel
->batch
.need_workaround_flush
= true;
202 if (intel
->always_flush_cache
) {
203 intel_batchbuffer_emit_mi_flush(intel
);
207 static void gen7_emit_prim(struct brw_context
*brw
,
208 const struct _mesa_prim
*prim
,
211 struct intel_context
*intel
= &brw
->intel
;
212 int verts_per_instance
;
213 int vertex_access_type
;
214 int start_vertex_location
;
215 int base_vertex_location
;
217 DBG("PRIM: %s %d %d\n", _mesa_lookup_enum_by_nr(prim
->mode
),
218 prim
->start
, prim
->count
);
220 start_vertex_location
= prim
->start
;
221 base_vertex_location
= prim
->basevertex
;
223 vertex_access_type
= GEN7_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM
;
224 start_vertex_location
+= brw
->ib
.start_vertex_offset
;
225 base_vertex_location
+= brw
->vb
.start_vertex_bias
;
227 vertex_access_type
= GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL
;
228 start_vertex_location
+= brw
->vb
.start_vertex_bias
;
231 verts_per_instance
= trim(prim
->mode
, prim
->count
);
233 /* If nothing to emit, just return. */
234 if (verts_per_instance
== 0)
237 /* If we're set to always flush, do it before and after the primitive emit.
238 * We want to catch both missed flushes that hurt instruction/state cache
239 * and missed flushes of the render cache as it heads to other parts of
240 * the besides the draw code.
242 if (intel
->always_flush_cache
) {
243 intel_batchbuffer_emit_mi_flush(intel
);
247 OUT_BATCH(CMD_3D_PRIM
<< 16 | (7 - 2));
248 OUT_BATCH(hw_prim
| vertex_access_type
);
249 OUT_BATCH(verts_per_instance
);
250 OUT_BATCH(start_vertex_location
);
251 OUT_BATCH(prim
->num_instances
);
252 OUT_BATCH(prim
->base_instance
);
253 OUT_BATCH(base_vertex_location
);
256 if (intel
->always_flush_cache
) {
257 intel_batchbuffer_emit_mi_flush(intel
);
262 static void brw_merge_inputs( struct brw_context
*brw
,
263 const struct gl_client_array
*arrays
[])
265 struct brw_vertex_info old
= brw
->vb
.info
;
268 for (i
= 0; i
< brw
->vb
.nr_buffers
; i
++) {
269 drm_intel_bo_unreference(brw
->vb
.buffers
[i
].bo
);
270 brw
->vb
.buffers
[i
].bo
= NULL
;
272 brw
->vb
.nr_buffers
= 0;
274 memset(&brw
->vb
.info
, 0, sizeof(brw
->vb
.info
));
276 for (i
= 0; i
< VERT_ATTRIB_MAX
; i
++) {
277 brw
->vb
.inputs
[i
].buffer
= -1;
278 brw
->vb
.inputs
[i
].glarray
= arrays
[i
];
279 brw
->vb
.inputs
[i
].attrib
= (gl_vert_attrib
) i
;
281 if (arrays
[i
]->StrideB
!= 0)
282 brw
->vb
.info
.sizes
[i
/16] |= (brw
->vb
.inputs
[i
].glarray
->Size
- 1) <<
286 /* Raise statechanges if input sizes have changed. */
287 if (memcmp(brw
->vb
.info
.sizes
, old
.sizes
, sizeof(old
.sizes
)) != 0)
288 brw
->state
.dirty
.brw
|= BRW_NEW_INPUT_DIMENSIONS
;
292 * \brief Resolve buffers before drawing.
294 * Resolve the depth buffer's HiZ buffer and resolve the depth buffer of each
295 * enabled depth texture.
297 * (In the future, this will also perform MSAA resolves).
300 brw_predraw_resolve_buffers(struct brw_context
*brw
)
302 struct gl_context
*ctx
= &brw
->intel
.ctx
;
303 struct intel_context
*intel
= &brw
->intel
;
304 struct intel_renderbuffer
*depth_irb
;
305 struct intel_texture_object
*tex_obj
;
307 /* Resolve the depth buffer's HiZ buffer. */
308 depth_irb
= intel_get_renderbuffer(ctx
->DrawBuffer
, BUFFER_DEPTH
);
310 intel_renderbuffer_resolve_hiz(intel
, depth_irb
);
312 /* Resolve depth buffer of each enabled depth texture. */
313 for (int i
= 0; i
< BRW_MAX_TEX_UNIT
; i
++) {
314 if (!ctx
->Texture
.Unit
[i
]._ReallyEnabled
)
316 tex_obj
= intel_texture_object(ctx
->Texture
.Unit
[i
]._Current
);
317 if (!tex_obj
|| !tex_obj
->mt
)
319 intel_miptree_all_slices_resolve_depth(intel
, tex_obj
->mt
);
324 * \brief Call this after drawing to mark which buffers need resolving
326 * If the depth buffer was written to and if it has an accompanying HiZ
327 * buffer, then mark that it needs a depth resolve.
329 * If the color buffer is a multisample window system buffer, then
330 * mark that it needs a downsample.
332 static void brw_postdraw_set_buffers_need_resolve(struct brw_context
*brw
)
334 struct intel_context
*intel
= &brw
->intel
;
335 struct gl_context
*ctx
= &brw
->intel
.ctx
;
336 struct gl_framebuffer
*fb
= ctx
->DrawBuffer
;
338 struct intel_renderbuffer
*front_irb
= NULL
;
339 struct intel_renderbuffer
*back_irb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
340 struct intel_renderbuffer
*depth_irb
= intel_get_renderbuffer(fb
, BUFFER_DEPTH
);
342 if (intel
->is_front_buffer_rendering
)
343 front_irb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
346 intel_renderbuffer_set_needs_downsample(front_irb
);
348 intel_renderbuffer_set_needs_downsample(back_irb
);
349 if (depth_irb
&& ctx
->Depth
.Mask
)
350 intel_renderbuffer_set_needs_depth_resolve(depth_irb
);
354 verts_per_prim(GLenum mode
)
363 case GL_TRIANGLE_STRIP
:
364 case GL_TRIANGLE_FAN
:
372 "unknown prim type in transform feedback primitive count");
378 * Update internal counters based on the the drawing operation described in
382 brw_update_primitive_count(struct brw_context
*brw
,
383 const struct _mesa_prim
*prim
)
386 = vbo_count_tessellated_primitives(prim
->mode
, prim
->count
,
387 prim
->num_instances
);
388 brw
->sol
.primitives_generated
+= count
;
389 if (_mesa_is_xfb_active_and_unpaused(&brw
->intel
.ctx
)) {
390 /* Update brw->sol.svbi_0_max_index to reflect the amount by which the
391 * hardware is going to increment SVBI 0 when this drawing operation
392 * occurs. This is necessary because the kernel does not (yet) save and
393 * restore GPU registers when context switching, so we'll need to be
394 * able to reload SVBI 0 with the correct value in case we have to start
395 * a new batch buffer.
397 unsigned verts
= verts_per_prim(prim
->mode
);
398 uint32_t space_avail
=
399 (brw
->sol
.svbi_0_max_index
- brw
->sol
.svbi_0_starting_index
) / verts
;
400 uint32_t primitives_written
= MIN2 (space_avail
, count
);
401 brw
->sol
.svbi_0_starting_index
+= verts
* primitives_written
;
403 /* And update the TRANSFORM_FEEDBACK_PRIMITIVES_WRITTEN query. */
404 brw
->sol
.primitives_written
+= primitives_written
;
408 /* May fail if out of video memory for texture or vbo upload, or on
409 * fallback conditions.
411 static bool brw_try_draw_prims( struct gl_context
*ctx
,
412 const struct gl_client_array
*arrays
[],
413 const struct _mesa_prim
*prim
,
415 const struct _mesa_index_buffer
*ib
,
419 struct intel_context
*intel
= intel_context(ctx
);
420 struct brw_context
*brw
= brw_context(ctx
);
423 bool fail_next
= false;
426 _mesa_update_state( ctx
);
428 /* We have to validate the textures *before* checking for fallbacks;
429 * otherwise, the software fallback won't be able to rely on the
430 * texture state, the firstLevel and lastLevel fields won't be
431 * set in the intel texture object (they'll both be 0), and the
432 * software fallback will segfault if it attempts to access any
433 * texture level other than level 0.
435 brw_validate_textures( brw
);
437 intel_prepare_render(intel
);
439 /* This workaround has to happen outside of brw_upload_state() because it
440 * may flush the batchbuffer for a blit, affecting the state flags.
442 brw_workaround_depthstencil_alignment(brw
, 0);
444 /* Resolves must occur after updating renderbuffers, updating context state,
445 * and finalizing textures but before setting up any hardware state for
448 brw_predraw_resolve_buffers(brw
);
450 /* Bind all inputs, derive varying and size information:
452 brw_merge_inputs( brw
, arrays
);
455 brw
->state
.dirty
.brw
|= BRW_NEW_INDICES
;
457 brw
->vb
.min_index
= min_index
;
458 brw
->vb
.max_index
= max_index
;
459 brw
->state
.dirty
.brw
|= BRW_NEW_VERTICES
;
461 for (i
= 0; i
< nr_prims
; i
++) {
462 int estimated_max_prim_size
;
464 estimated_max_prim_size
= 512; /* batchbuffer commands */
465 estimated_max_prim_size
+= (BRW_MAX_TEX_UNIT
*
466 (sizeof(struct brw_sampler_state
) +
467 sizeof(struct gen5_sampler_default_color
)));
468 estimated_max_prim_size
+= 1024; /* gen6 VS push constants */
469 estimated_max_prim_size
+= 1024; /* gen6 WM push constants */
470 estimated_max_prim_size
+= 512; /* misc. pad */
472 /* Flush the batch if it's approaching full, so that we don't wrap while
473 * we've got validated state that needs to be in the same batch as the
476 intel_batchbuffer_require_space(intel
, estimated_max_prim_size
, false);
477 intel_batchbuffer_save_state(intel
);
479 if (brw
->num_instances
!= prim
->num_instances
) {
480 brw
->num_instances
= prim
->num_instances
;
481 brw
->state
.dirty
.brw
|= BRW_NEW_VERTICES
;
483 if (brw
->basevertex
!= prim
->basevertex
) {
484 brw
->basevertex
= prim
->basevertex
;
485 brw
->state
.dirty
.brw
|= BRW_NEW_VERTICES
;
488 brw_set_prim(brw
, &prim
[i
]);
490 gen6_set_prim(brw
, &prim
[i
]);
493 /* Note that before the loop, brw->state.dirty.brw was set to != 0, and
494 * that the state updated in the loop outside of this block is that in
495 * *_set_prim or intel_batchbuffer_flush(), which only impacts
496 * brw->state.dirty.brw.
498 if (brw
->state
.dirty
.brw
) {
499 intel
->no_batch_wrap
= true;
500 brw_upload_state(brw
);
504 gen7_emit_prim(brw
, &prim
[i
], brw
->primitive
);
506 brw_emit_prim(brw
, &prim
[i
], brw
->primitive
);
508 intel
->no_batch_wrap
= false;
510 if (dri_bufmgr_check_aperture_space(&intel
->batch
.bo
, 1)) {
512 intel_batchbuffer_reset_to_saved(intel
);
513 intel_batchbuffer_flush(intel
);
517 if (intel_batchbuffer_flush(intel
) == -ENOSPC
) {
518 static bool warned
= false;
521 fprintf(stderr
, "i965: Single primitive emit exceeded"
522 "available aperture space\n");
531 if (!_mesa_meta_in_progress(ctx
))
532 brw_update_primitive_count(brw
, &prim
[i
]);
535 if (intel
->always_flush_batch
)
536 intel_batchbuffer_flush(intel
);
538 brw_state_cache_check_size(brw
);
539 brw_postdraw_set_buffers_need_resolve(brw
);
544 void brw_draw_prims( struct gl_context
*ctx
,
545 const struct _mesa_prim
*prim
,
547 const struct _mesa_index_buffer
*ib
,
548 GLboolean index_bounds_valid
,
551 struct gl_transform_feedback_object
*tfb_vertcount
)
553 struct intel_context
*intel
= intel_context(ctx
);
554 const struct gl_client_array
**arrays
= ctx
->Array
._DrawArrays
;
556 if (!_mesa_check_conditional_render(ctx
))
559 /* Handle primitive restart if needed */
560 if (brw_handle_primitive_restart(ctx
, prim
, nr_prims
, ib
)) {
561 /* The draw was handled, so we can exit now */
565 /* If we're going to have to upload any of the user's vertex arrays, then
566 * get the minimum and maximum of their index buffer so we know what range
569 if (!vbo_all_varyings_in_vbos(arrays
) && !index_bounds_valid
)
570 vbo_get_minmax_indices(ctx
, prim
, ib
, &min_index
, &max_index
, nr_prims
);
572 /* Do GL_SELECT and GL_FEEDBACK rendering using swrast, even though it
573 * won't support all the extensions we support.
575 if (ctx
->RenderMode
!= GL_RENDER
) {
576 perf_debug("%s render mode not supported in hardware\n",
577 _mesa_lookup_enum_by_nr(ctx
->RenderMode
));
578 _swsetup_Wakeup(ctx
);
580 _tnl_draw_prims(ctx
, arrays
, prim
, nr_prims
, ib
, min_index
, max_index
);
584 /* Try drawing with the hardware, but don't do anything else if we can't
585 * manage it. swrast doesn't support our featureset, so we can't fall back
588 brw_try_draw_prims(ctx
, arrays
, prim
, nr_prims
, ib
, min_index
, max_index
);
591 void brw_draw_init( struct brw_context
*brw
)
593 struct gl_context
*ctx
= &brw
->intel
.ctx
;
594 struct vbo_context
*vbo
= vbo_context(ctx
);
597 /* Register our drawing function:
599 vbo
->draw_prims
= brw_draw_prims
;
601 for (i
= 0; i
< VERT_ATTRIB_MAX
; i
++)
602 brw
->vb
.inputs
[i
].buffer
= -1;
603 brw
->vb
.nr_buffers
= 0;
604 brw
->vb
.nr_enabled
= 0;
607 void brw_draw_destroy( struct brw_context
*brw
)
611 for (i
= 0; i
< brw
->vb
.nr_buffers
; i
++) {
612 drm_intel_bo_unreference(brw
->vb
.buffers
[i
].bo
);
613 brw
->vb
.buffers
[i
].bo
= NULL
;
615 brw
->vb
.nr_buffers
= 0;
617 for (i
= 0; i
< brw
->vb
.nr_enabled
; i
++) {
618 brw
->vb
.enabled
[i
]->buffer
= -1;
620 brw
->vb
.nr_enabled
= 0;
622 drm_intel_bo_unreference(brw
->ib
.bo
);