i965: Remove unused structures for command packets.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_draw.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include "main/glheader.h"
30 #include "main/context.h"
31 #include "main/condrender.h"
32 #include "main/samplerobj.h"
33 #include "main/state.h"
34 #include "main/enums.h"
35 #include "tnl/tnl.h"
36 #include "vbo/vbo_context.h"
37 #include "swrast/swrast.h"
38 #include "swrast_setup/swrast_setup.h"
39
40 #include "brw_draw.h"
41 #include "brw_defines.h"
42 #include "brw_context.h"
43 #include "brw_state.h"
44
45 #include "intel_batchbuffer.h"
46
47 #define FILE_DEBUG_FLAG DEBUG_PRIMS
48
49 static GLuint prim_to_hw_prim[GL_POLYGON+1] = {
50 _3DPRIM_POINTLIST,
51 _3DPRIM_LINELIST,
52 _3DPRIM_LINELOOP,
53 _3DPRIM_LINESTRIP,
54 _3DPRIM_TRILIST,
55 _3DPRIM_TRISTRIP,
56 _3DPRIM_TRIFAN,
57 _3DPRIM_QUADLIST,
58 _3DPRIM_QUADSTRIP,
59 _3DPRIM_POLYGON
60 };
61
62
63 static const GLenum reduced_prim[GL_POLYGON+1] = {
64 GL_POINTS,
65 GL_LINES,
66 GL_LINES,
67 GL_LINES,
68 GL_TRIANGLES,
69 GL_TRIANGLES,
70 GL_TRIANGLES,
71 GL_TRIANGLES,
72 GL_TRIANGLES,
73 GL_TRIANGLES
74 };
75
76
77 /* When the primitive changes, set a state bit and re-validate. Not
78 * the nicest and would rather deal with this by having all the
79 * programs be immune to the active primitive (ie. cope with all
80 * possibilities). That may not be realistic however.
81 */
82 static GLuint brw_set_prim(struct brw_context *brw,
83 const struct _mesa_prim *prim)
84 {
85 struct gl_context *ctx = &brw->intel.ctx;
86 GLenum mode = prim->mode;
87
88 DBG("PRIM: %s\n", _mesa_lookup_enum_by_nr(prim->mode));
89
90 /* Slight optimization to avoid the GS program when not needed:
91 */
92 if (mode == GL_QUAD_STRIP &&
93 ctx->Light.ShadeModel != GL_FLAT &&
94 ctx->Polygon.FrontMode == GL_FILL &&
95 ctx->Polygon.BackMode == GL_FILL)
96 mode = GL_TRIANGLE_STRIP;
97
98 if (prim->mode == GL_QUADS && prim->count == 4 &&
99 ctx->Light.ShadeModel != GL_FLAT &&
100 ctx->Polygon.FrontMode == GL_FILL &&
101 ctx->Polygon.BackMode == GL_FILL) {
102 mode = GL_TRIANGLE_FAN;
103 }
104
105 if (mode != brw->primitive) {
106 brw->primitive = mode;
107 brw->state.dirty.brw |= BRW_NEW_PRIMITIVE;
108
109 if (reduced_prim[mode] != brw->intel.reduced_primitive) {
110 brw->intel.reduced_primitive = reduced_prim[mode];
111 brw->state.dirty.brw |= BRW_NEW_REDUCED_PRIMITIVE;
112 }
113 }
114
115 return prim_to_hw_prim[mode];
116 }
117
118
119 static GLuint trim(GLenum prim, GLuint length)
120 {
121 if (prim == GL_QUAD_STRIP)
122 return length > 3 ? (length - length % 2) : 0;
123 else if (prim == GL_QUADS)
124 return length - length % 4;
125 else
126 return length;
127 }
128
129
130 static void brw_emit_prim(struct brw_context *brw,
131 const struct _mesa_prim *prim,
132 uint32_t hw_prim)
133 {
134 struct intel_context *intel = &brw->intel;
135 int verts_per_instance;
136 int vertex_access_type;
137 int start_vertex_location;
138 int base_vertex_location;
139
140 DBG("PRIM: %s %d %d\n", _mesa_lookup_enum_by_nr(prim->mode),
141 prim->start, prim->count);
142
143 start_vertex_location = prim->start;
144 base_vertex_location = prim->basevertex;
145 if (prim->indexed) {
146 vertex_access_type = GEN4_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM;
147 start_vertex_location += brw->ib.start_vertex_offset;
148 base_vertex_location += brw->vb.start_vertex_bias;
149 } else {
150 vertex_access_type = GEN4_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL;
151 start_vertex_location += brw->vb.start_vertex_bias;
152 }
153
154 verts_per_instance = trim(prim->mode, prim->count);
155
156 /* If nothing to emit, just return. */
157 if (verts_per_instance == 0)
158 return;
159
160 /* If we're set to always flush, do it before and after the primitive emit.
161 * We want to catch both missed flushes that hurt instruction/state cache
162 * and missed flushes of the render cache as it heads to other parts of
163 * the besides the draw code.
164 */
165 if (intel->always_flush_cache) {
166 intel_batchbuffer_emit_mi_flush(intel);
167 }
168
169 BEGIN_BATCH(6);
170 OUT_BATCH(CMD_3D_PRIM << 16 | (6 - 2) |
171 hw_prim << GEN4_3DPRIM_TOPOLOGY_TYPE_SHIFT |
172 vertex_access_type);
173 OUT_BATCH(verts_per_instance);
174 OUT_BATCH(start_vertex_location);
175 OUT_BATCH(1); // instance count
176 OUT_BATCH(0); // start instance location
177 OUT_BATCH(base_vertex_location);
178 ADVANCE_BATCH();
179
180 intel->batch.need_workaround_flush = true;
181
182 if (intel->always_flush_cache) {
183 intel_batchbuffer_emit_mi_flush(intel);
184 }
185 }
186
187 static void gen7_emit_prim(struct brw_context *brw,
188 const struct _mesa_prim *prim,
189 uint32_t hw_prim)
190 {
191 struct intel_context *intel = &brw->intel;
192 int verts_per_instance;
193 int vertex_access_type;
194 int start_vertex_location;
195 int base_vertex_location;
196
197 DBG("PRIM: %s %d %d\n", _mesa_lookup_enum_by_nr(prim->mode),
198 prim->start, prim->count);
199
200 start_vertex_location = prim->start;
201 base_vertex_location = prim->basevertex;
202 if (prim->indexed) {
203 vertex_access_type = GEN7_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM;
204 start_vertex_location += brw->ib.start_vertex_offset;
205 base_vertex_location += brw->vb.start_vertex_bias;
206 } else {
207 vertex_access_type = GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL;
208 start_vertex_location += brw->vb.start_vertex_bias;
209 }
210
211 verts_per_instance = trim(prim->mode, prim->count);
212
213 /* If nothing to emit, just return. */
214 if (verts_per_instance == 0)
215 return;
216
217 /* If we're set to always flush, do it before and after the primitive emit.
218 * We want to catch both missed flushes that hurt instruction/state cache
219 * and missed flushes of the render cache as it heads to other parts of
220 * the besides the draw code.
221 */
222 if (intel->always_flush_cache) {
223 intel_batchbuffer_emit_mi_flush(intel);
224 }
225
226 BEGIN_BATCH(7);
227 OUT_BATCH(CMD_3D_PRIM << 16 | (7 - 2));
228 OUT_BATCH(hw_prim | vertex_access_type);
229 OUT_BATCH(verts_per_instance);
230 OUT_BATCH(start_vertex_location);
231 OUT_BATCH(1); // instance count
232 OUT_BATCH(0); // start instance location
233 OUT_BATCH(base_vertex_location);
234 ADVANCE_BATCH();
235
236 if (intel->always_flush_cache) {
237 intel_batchbuffer_emit_mi_flush(intel);
238 }
239 }
240
241
242 static void brw_merge_inputs( struct brw_context *brw,
243 const struct gl_client_array *arrays[])
244 {
245 struct brw_vertex_info old = brw->vb.info;
246 GLuint i;
247
248 for (i = 0; i < brw->vb.nr_buffers; i++) {
249 drm_intel_bo_unreference(brw->vb.buffers[i].bo);
250 brw->vb.buffers[i].bo = NULL;
251 }
252 brw->vb.nr_buffers = 0;
253
254 memset(&brw->vb.info, 0, sizeof(brw->vb.info));
255
256 for (i = 0; i < VERT_ATTRIB_MAX; i++) {
257 brw->vb.inputs[i].buffer = -1;
258 brw->vb.inputs[i].glarray = arrays[i];
259 brw->vb.inputs[i].attrib = (gl_vert_attrib) i;
260
261 if (arrays[i]->StrideB != 0)
262 brw->vb.info.sizes[i/16] |= (brw->vb.inputs[i].glarray->Size - 1) <<
263 ((i%16) * 2);
264 }
265
266 /* Raise statechanges if input sizes have changed. */
267 if (memcmp(brw->vb.info.sizes, old.sizes, sizeof(old.sizes)) != 0)
268 brw->state.dirty.brw |= BRW_NEW_INPUT_DIMENSIONS;
269 }
270
271 /* May fail if out of video memory for texture or vbo upload, or on
272 * fallback conditions.
273 */
274 static GLboolean brw_try_draw_prims( struct gl_context *ctx,
275 const struct gl_client_array *arrays[],
276 const struct _mesa_prim *prim,
277 GLuint nr_prims,
278 const struct _mesa_index_buffer *ib,
279 GLuint min_index,
280 GLuint max_index )
281 {
282 struct intel_context *intel = intel_context(ctx);
283 struct brw_context *brw = brw_context(ctx);
284 GLboolean retval = GL_FALSE;
285 GLboolean warn = GL_FALSE;
286 GLuint i;
287
288 if (ctx->NewState)
289 _mesa_update_state( ctx );
290
291 /* We have to validate the textures *before* checking for fallbacks;
292 * otherwise, the software fallback won't be able to rely on the
293 * texture state, the firstLevel and lastLevel fields won't be
294 * set in the intel texture object (they'll both be 0), and the
295 * software fallback will segfault if it attempts to access any
296 * texture level other than level 0.
297 */
298 brw_validate_textures( brw );
299
300 /* Bind all inputs, derive varying and size information:
301 */
302 brw_merge_inputs( brw, arrays );
303
304 brw->ib.ib = ib;
305 brw->state.dirty.brw |= BRW_NEW_INDICES;
306
307 brw->vb.min_index = min_index;
308 brw->vb.max_index = max_index;
309 brw->state.dirty.brw |= BRW_NEW_VERTICES;
310
311 /* Have to validate state quite late. Will rebuild tnl_program,
312 * which depends on varying information.
313 *
314 * Note this is where brw->vs->prog_data.inputs_read is calculated,
315 * so can't access it earlier.
316 */
317
318 intel_prepare_render(intel);
319
320 for (i = 0; i < nr_prims; i++) {
321 uint32_t hw_prim;
322 int estimated_max_prim_size;
323
324 estimated_max_prim_size = 512; /* batchbuffer commands */
325 estimated_max_prim_size += (BRW_MAX_TEX_UNIT *
326 (sizeof(struct brw_sampler_state) +
327 sizeof(struct gen5_sampler_default_color)));
328 estimated_max_prim_size += 1024; /* gen6 VS push constants */
329 estimated_max_prim_size += 1024; /* gen6 WM push constants */
330 estimated_max_prim_size += 512; /* misc. pad */
331
332 /* Flush the batch if it's approaching full, so that we don't wrap while
333 * we've got validated state that needs to be in the same batch as the
334 * primitives.
335 */
336 intel_batchbuffer_require_space(intel, estimated_max_prim_size, false);
337
338 hw_prim = brw_set_prim(brw, &prim[i]);
339 if (brw->state.dirty.brw) {
340 brw_validate_state(brw);
341
342 /* Various fallback checks: */
343 if (brw->intel.Fallback)
344 goto out;
345
346 /* Check that we can fit our state in with our existing batchbuffer, or
347 * flush otherwise.
348 */
349 if (dri_bufmgr_check_aperture_space(brw->state.validated_bos,
350 brw->state.validated_bo_count)) {
351 static GLboolean warned;
352 intel_batchbuffer_flush(intel);
353
354 /* Validate the state after we flushed the batch (which would have
355 * changed the set of dirty state). If we still fail to
356 * check_aperture, warn of what's happening, but attempt to continue
357 * on since it may succeed anyway, and the user would probably rather
358 * see a failure and a warning than a fallback.
359 */
360 brw_validate_state(brw);
361 if (!warned &&
362 dri_bufmgr_check_aperture_space(brw->state.validated_bos,
363 brw->state.validated_bo_count)) {
364 warn = GL_TRUE;
365 warned = GL_TRUE;
366 }
367 }
368
369 intel->no_batch_wrap = GL_TRUE;
370 brw_upload_state(brw);
371 }
372
373 if (intel->gen >= 7)
374 gen7_emit_prim(brw, &prim[i], hw_prim);
375 else
376 brw_emit_prim(brw, &prim[i], hw_prim);
377
378 intel->no_batch_wrap = GL_FALSE;
379
380 retval = GL_TRUE;
381 }
382
383 if (intel->always_flush_batch)
384 intel_batchbuffer_flush(intel);
385 out:
386
387 brw_state_cache_check_size(brw);
388
389 if (warn)
390 fprintf(stderr, "i965: Single primitive emit potentially exceeded "
391 "available aperture space\n");
392
393 if (!retval)
394 DBG("%s failed\n", __FUNCTION__);
395
396 return retval;
397 }
398
399 void brw_draw_prims( struct gl_context *ctx,
400 const struct gl_client_array *arrays[],
401 const struct _mesa_prim *prim,
402 GLuint nr_prims,
403 const struct _mesa_index_buffer *ib,
404 GLboolean index_bounds_valid,
405 GLuint min_index,
406 GLuint max_index )
407 {
408 GLboolean retval;
409
410 if (!_mesa_check_conditional_render(ctx))
411 return;
412
413 if (!vbo_all_varyings_in_vbos(arrays)) {
414 if (!index_bounds_valid)
415 vbo_get_minmax_index(ctx, prim, ib, &min_index, &max_index);
416
417 /* Decide if we want to rebase. If so we end up recursing once
418 * only into this function.
419 */
420 if (min_index != 0 && !vbo_any_varyings_in_vbos(arrays)) {
421 vbo_rebase_prims(ctx, arrays,
422 prim, nr_prims,
423 ib, min_index, max_index,
424 brw_draw_prims );
425 return;
426 }
427 }
428
429 /* Make a first attempt at drawing:
430 */
431 retval = brw_try_draw_prims(ctx, arrays, prim, nr_prims, ib, min_index, max_index);
432
433 /* Otherwise, we really are out of memory. Pass the drawing
434 * command to the software tnl module and which will in turn call
435 * swrast to do the drawing.
436 */
437 if (!retval) {
438 _swsetup_Wakeup(ctx);
439 _tnl_wakeup(ctx);
440 _tnl_draw_prims(ctx, arrays, prim, nr_prims, ib, min_index, max_index);
441 }
442
443 }
444
445 void brw_draw_init( struct brw_context *brw )
446 {
447 struct gl_context *ctx = &brw->intel.ctx;
448 struct vbo_context *vbo = vbo_context(ctx);
449 int i;
450
451 /* Register our drawing function:
452 */
453 vbo->draw_prims = brw_draw_prims;
454
455 for (i = 0; i < VERT_ATTRIB_MAX; i++)
456 brw->vb.inputs[i].buffer = -1;
457 brw->vb.nr_buffers = 0;
458 brw->vb.nr_enabled = 0;
459 }
460
461 void brw_draw_destroy( struct brw_context *brw )
462 {
463 int i;
464
465 for (i = 0; i < brw->vb.nr_buffers; i++) {
466 drm_intel_bo_unreference(brw->vb.buffers[i].bo);
467 brw->vb.buffers[i].bo = NULL;
468 }
469 brw->vb.nr_buffers = 0;
470
471 for (i = 0; i < brw->vb.nr_enabled; i++) {
472 brw->vb.enabled[i]->buffer = -1;
473 }
474 brw->vb.nr_enabled = 0;
475
476 drm_intel_bo_unreference(brw->ib.bo);
477 brw->ib.bo = NULL;
478 }