Merge commit 'origin/master' into drm-gem
[mesa.git] / src / mesa / drivers / dri / i965 / brw_draw_upload.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #include <stdlib.h>
29
30 #include "glheader.h"
31 #include "context.h"
32 #include "state.h"
33 #include "api_validate.h"
34 #include "enums.h"
35
36 #include "brw_draw.h"
37 #include "brw_defines.h"
38 #include "brw_context.h"
39 #include "brw_state.h"
40 #include "brw_fallback.h"
41
42 #include "intel_ioctl.h"
43 #include "intel_batchbuffer.h"
44 #include "intel_buffer_objects.h"
45 #include "intel_tex.h"
46
47 static GLuint double_types[5] = {
48 0,
49 BRW_SURFACEFORMAT_R64_FLOAT,
50 BRW_SURFACEFORMAT_R64G64_FLOAT,
51 BRW_SURFACEFORMAT_R64G64B64_FLOAT,
52 BRW_SURFACEFORMAT_R64G64B64A64_FLOAT
53 };
54
55 static GLuint float_types[5] = {
56 0,
57 BRW_SURFACEFORMAT_R32_FLOAT,
58 BRW_SURFACEFORMAT_R32G32_FLOAT,
59 BRW_SURFACEFORMAT_R32G32B32_FLOAT,
60 BRW_SURFACEFORMAT_R32G32B32A32_FLOAT
61 };
62
63 static GLuint uint_types_norm[5] = {
64 0,
65 BRW_SURFACEFORMAT_R32_UNORM,
66 BRW_SURFACEFORMAT_R32G32_UNORM,
67 BRW_SURFACEFORMAT_R32G32B32_UNORM,
68 BRW_SURFACEFORMAT_R32G32B32A32_UNORM
69 };
70
71 static GLuint uint_types_scale[5] = {
72 0,
73 BRW_SURFACEFORMAT_R32_USCALED,
74 BRW_SURFACEFORMAT_R32G32_USCALED,
75 BRW_SURFACEFORMAT_R32G32B32_USCALED,
76 BRW_SURFACEFORMAT_R32G32B32A32_USCALED
77 };
78
79 static GLuint int_types_norm[5] = {
80 0,
81 BRW_SURFACEFORMAT_R32_SNORM,
82 BRW_SURFACEFORMAT_R32G32_SNORM,
83 BRW_SURFACEFORMAT_R32G32B32_SNORM,
84 BRW_SURFACEFORMAT_R32G32B32A32_SNORM
85 };
86
87 static GLuint int_types_scale[5] = {
88 0,
89 BRW_SURFACEFORMAT_R32_SSCALED,
90 BRW_SURFACEFORMAT_R32G32_SSCALED,
91 BRW_SURFACEFORMAT_R32G32B32_SSCALED,
92 BRW_SURFACEFORMAT_R32G32B32A32_SSCALED
93 };
94
95 static GLuint ushort_types_norm[5] = {
96 0,
97 BRW_SURFACEFORMAT_R16_UNORM,
98 BRW_SURFACEFORMAT_R16G16_UNORM,
99 BRW_SURFACEFORMAT_R16G16B16_UNORM,
100 BRW_SURFACEFORMAT_R16G16B16A16_UNORM
101 };
102
103 static GLuint ushort_types_scale[5] = {
104 0,
105 BRW_SURFACEFORMAT_R16_USCALED,
106 BRW_SURFACEFORMAT_R16G16_USCALED,
107 BRW_SURFACEFORMAT_R16G16B16_USCALED,
108 BRW_SURFACEFORMAT_R16G16B16A16_USCALED
109 };
110
111 static GLuint short_types_norm[5] = {
112 0,
113 BRW_SURFACEFORMAT_R16_SNORM,
114 BRW_SURFACEFORMAT_R16G16_SNORM,
115 BRW_SURFACEFORMAT_R16G16B16_SNORM,
116 BRW_SURFACEFORMAT_R16G16B16A16_SNORM
117 };
118
119 static GLuint short_types_scale[5] = {
120 0,
121 BRW_SURFACEFORMAT_R16_SSCALED,
122 BRW_SURFACEFORMAT_R16G16_SSCALED,
123 BRW_SURFACEFORMAT_R16G16B16_SSCALED,
124 BRW_SURFACEFORMAT_R16G16B16A16_SSCALED
125 };
126
127 static GLuint ubyte_types_norm[5] = {
128 0,
129 BRW_SURFACEFORMAT_R8_UNORM,
130 BRW_SURFACEFORMAT_R8G8_UNORM,
131 BRW_SURFACEFORMAT_R8G8B8_UNORM,
132 BRW_SURFACEFORMAT_R8G8B8A8_UNORM
133 };
134
135 static GLuint ubyte_types_scale[5] = {
136 0,
137 BRW_SURFACEFORMAT_R8_USCALED,
138 BRW_SURFACEFORMAT_R8G8_USCALED,
139 BRW_SURFACEFORMAT_R8G8B8_USCALED,
140 BRW_SURFACEFORMAT_R8G8B8A8_USCALED
141 };
142
143 static GLuint byte_types_norm[5] = {
144 0,
145 BRW_SURFACEFORMAT_R8_SNORM,
146 BRW_SURFACEFORMAT_R8G8_SNORM,
147 BRW_SURFACEFORMAT_R8G8B8_SNORM,
148 BRW_SURFACEFORMAT_R8G8B8A8_SNORM
149 };
150
151 static GLuint byte_types_scale[5] = {
152 0,
153 BRW_SURFACEFORMAT_R8_SSCALED,
154 BRW_SURFACEFORMAT_R8G8_SSCALED,
155 BRW_SURFACEFORMAT_R8G8B8_SSCALED,
156 BRW_SURFACEFORMAT_R8G8B8A8_SSCALED
157 };
158
159
160 static GLuint get_surface_type( GLenum type, GLuint size, GLboolean normalized )
161 {
162 if (INTEL_DEBUG & DEBUG_VERTS)
163 _mesa_printf("type %s size %d normalized %d\n",
164 _mesa_lookup_enum_by_nr(type), size, normalized);
165
166 if (normalized) {
167 switch (type) {
168 case GL_DOUBLE: return double_types[size];
169 case GL_FLOAT: return float_types[size];
170 case GL_INT: return int_types_norm[size];
171 case GL_SHORT: return short_types_norm[size];
172 case GL_BYTE: return byte_types_norm[size];
173 case GL_UNSIGNED_INT: return uint_types_norm[size];
174 case GL_UNSIGNED_SHORT: return ushort_types_norm[size];
175 case GL_UNSIGNED_BYTE: return ubyte_types_norm[size];
176 default: assert(0); return 0;
177 }
178 }
179 else {
180 switch (type) {
181 case GL_DOUBLE: return double_types[size];
182 case GL_FLOAT: return float_types[size];
183 case GL_INT: return int_types_scale[size];
184 case GL_SHORT: return short_types_scale[size];
185 case GL_BYTE: return byte_types_scale[size];
186 case GL_UNSIGNED_INT: return uint_types_scale[size];
187 case GL_UNSIGNED_SHORT: return ushort_types_scale[size];
188 case GL_UNSIGNED_BYTE: return ubyte_types_scale[size];
189 default: assert(0); return 0;
190 }
191 }
192 }
193
194
195 static GLuint get_size( GLenum type )
196 {
197 switch (type) {
198 case GL_DOUBLE: return sizeof(GLdouble);
199 case GL_FLOAT: return sizeof(GLfloat);
200 case GL_INT: return sizeof(GLint);
201 case GL_SHORT: return sizeof(GLshort);
202 case GL_BYTE: return sizeof(GLbyte);
203 case GL_UNSIGNED_INT: return sizeof(GLuint);
204 case GL_UNSIGNED_SHORT: return sizeof(GLushort);
205 case GL_UNSIGNED_BYTE: return sizeof(GLubyte);
206 default: return 0;
207 }
208 }
209
210 static GLuint get_index_type(GLenum type)
211 {
212 switch (type) {
213 case GL_UNSIGNED_BYTE: return BRW_INDEX_BYTE;
214 case GL_UNSIGNED_SHORT: return BRW_INDEX_WORD;
215 case GL_UNSIGNED_INT: return BRW_INDEX_DWORD;
216 default: assert(0); return 0;
217 }
218 }
219
220 static void copy_strided_array( GLubyte *dest,
221 const GLubyte *src,
222 GLuint size,
223 GLuint stride,
224 GLuint count )
225 {
226 if (size == stride)
227 memcpy(dest, src, count * size);
228 else {
229 GLuint i;
230
231 for (i = 0; i < count; i++) {
232 memcpy(dest, src, size);
233 src += stride;
234 dest += size;
235 }
236 }
237 }
238
239 static void wrap_buffers( struct brw_context *brw,
240 GLuint size )
241 {
242 if (size < BRW_UPLOAD_INIT_SIZE)
243 size = BRW_UPLOAD_INIT_SIZE;
244
245 brw->vb.upload.offset = 0;
246
247 if (brw->vb.upload.bo != NULL)
248 dri_bo_unreference(brw->vb.upload.bo);
249 brw->vb.upload.bo = dri_bo_alloc(brw->intel.bufmgr, "temporary VBO",
250 size, 1);
251
252 /* Set the internal VBO\ to no-backing-store. We only use them as a
253 * temporary within a brw_try_draw_prims while the lock is held.
254 */
255 /* DON'T DO THIS AS IF WE HAVE TO RE-ORG MEMORY WE NEED SOMEWHERE WITH
256 FAKE TO PUSH THIS STUFF */
257 // if (!brw->intel.ttm)
258 // dri_bo_fake_disable_backing_store(brw->vb.upload.bo, NULL, NULL);
259 }
260
261 static void get_space( struct brw_context *brw,
262 GLuint size,
263 dri_bo **bo_return,
264 GLuint *offset_return )
265 {
266 size = ALIGN(size, 64);
267
268 if (brw->vb.upload.bo == NULL ||
269 brw->vb.upload.offset + size > brw->vb.upload.bo->size) {
270 wrap_buffers(brw, size);
271 }
272
273 dri_bo_reference(brw->vb.upload.bo);
274 *bo_return = brw->vb.upload.bo;
275 *offset_return = brw->vb.upload.offset;
276
277 brw->vb.upload.offset += size;
278 }
279
280 static void
281 copy_array_to_vbo_array( struct brw_context *brw,
282 struct brw_vertex_element *element,
283 GLuint dst_stride)
284 {
285 GLuint size = element->count * dst_stride;
286
287 get_space(brw, size, &element->bo, &element->offset);
288
289 if (element->glarray->StrideB == 0) {
290 assert(element->count == 1);
291 element->stride = 0;
292 } else {
293 element->stride = dst_stride;
294 }
295
296 dri_bo_map(element->bo, GL_TRUE);
297 copy_strided_array((unsigned char *)element->bo->virtual + element->offset,
298 element->glarray->Ptr,
299 dst_stride,
300 element->glarray->StrideB,
301 element->count);
302 dri_bo_unmap(element->bo);
303 }
304
305 int brw_prepare_vertices( struct brw_context *brw,
306 GLuint min_index,
307 GLuint max_index )
308 {
309 GLcontext *ctx = &brw->intel.ctx;
310 struct intel_context *intel = intel_context(ctx);
311 GLuint tmp = brw->vs.prog_data->inputs_read;
312 GLuint i;
313 const unsigned char *ptr = NULL;
314 GLuint interleave = 0;
315 int ret = 0;
316
317 struct brw_vertex_element *enabled[VERT_ATTRIB_MAX];
318 GLuint nr_enabled = 0;
319
320 struct brw_vertex_element *upload[VERT_ATTRIB_MAX];
321 GLuint nr_uploads = 0;
322
323 /* First build an array of pointers to ve's in vb.inputs_read
324 */
325 if (0)
326 _mesa_printf("%s %d..%d\n", __FUNCTION__, min_index, max_index);
327
328 /* Accumulate the list of enabled arrays. */
329 while (tmp) {
330 GLuint i = _mesa_ffsll(tmp)-1;
331 struct brw_vertex_element *input = &brw->vb.inputs[i];
332
333 tmp &= ~(1<<i);
334 enabled[nr_enabled++] = input;
335 }
336
337 /* XXX: In the rare cases where this happens we fallback all
338 * the way to software rasterization, although a tnl fallback
339 * would be sufficient. I don't know of *any* real world
340 * cases with > 17 vertex attributes enabled, so it probably
341 * isn't an issue at this point.
342 */
343 if (nr_enabled >= BRW_VEP_MAX)
344 return -1;
345
346 for (i = 0; i < nr_enabled; i++) {
347 struct brw_vertex_element *input = enabled[i];
348
349 input->element_size = get_size(input->glarray->Type) * input->glarray->Size;
350 input->count = input->glarray->StrideB ? max_index + 1 - min_index : 1;
351
352 if (input->glarray->BufferObj->Name != 0) {
353 struct intel_buffer_object *intel_buffer =
354 intel_buffer_object(input->glarray->BufferObj);
355
356 /* Named buffer object: Just reference its contents directly. */
357 input->bo = intel_bufferobj_buffer(intel, intel_buffer,
358 INTEL_READ);
359 dri_bo_reference(input->bo);
360 input->offset = (unsigned long)input->glarray->Ptr;
361 input->stride = input->glarray->StrideB;
362
363 ret |= dri_bufmgr_check_aperture_space(input->bo);
364 } else {
365 /* Queue the buffer object up to be uploaded in the next pass,
366 * when we've decided if we're doing interleaved or not.
367 */
368 if (i == 0) {
369 /* Position array not properly enabled:
370 */
371 if (input->glarray->StrideB == 0)
372 return -1;
373
374 interleave = input->glarray->StrideB;
375 ptr = input->glarray->Ptr;
376 }
377 else if (interleave != input->glarray->StrideB ||
378 (const unsigned char *)input->glarray->Ptr - ptr < 0 ||
379 (const unsigned char *)input->glarray->Ptr - ptr > interleave)
380 {
381 interleave = 0;
382 }
383
384 upload[nr_uploads++] = input;
385
386 /* We rebase drawing to start at element zero only when
387 * varyings are not in vbos, which means we can end up
388 * uploading non-varying arrays (stride != 0) when min_index
389 * is zero. This doesn't matter as the amount to upload is
390 * the same for these arrays whether the draw call is rebased
391 * or not - we just have to upload the one element.
392 */
393 assert(min_index == 0 || input->glarray->StrideB == 0);
394 }
395 }
396
397 /* Handle any arrays to be uploaded. */
398 if (nr_uploads > 1 && interleave && interleave <= 256) {
399 /* All uploads are interleaved, so upload the arrays together as
400 * interleaved. First, upload the contents and set up upload[0].
401 */
402 copy_array_to_vbo_array(brw, upload[0], interleave);
403
404 ret |= dri_bufmgr_check_aperture_space(upload[0]->bo);
405 for (i = 1; i < nr_uploads; i++) {
406 /* Then, just point upload[i] at upload[0]'s buffer. */
407 upload[i]->stride = interleave;
408 upload[i]->offset = upload[0]->offset +
409 ((const unsigned char *)upload[i]->glarray->Ptr - ptr);
410 upload[i]->bo = upload[0]->bo;
411 dri_bo_reference(upload[i]->bo);
412 }
413 }
414 else {
415 /* Upload non-interleaved arrays */
416 for (i = 0; i < nr_uploads; i++) {
417 copy_array_to_vbo_array(brw, upload[i], upload[i]->element_size);
418 if (upload[i]->bo) {
419 ret |= dri_bufmgr_check_aperture_space(upload[i]->bo);
420 }
421 }
422 }
423
424
425 if (ret)
426 return 1;
427
428
429 return 0;
430 }
431
432 void brw_emit_vertices( struct brw_context *brw,
433 GLuint min_index,
434 GLuint max_index )
435 {
436 GLcontext *ctx = &brw->intel.ctx;
437 struct intel_context *intel = intel_context(ctx);
438 GLuint tmp = brw->vs.prog_data->inputs_read;
439 struct brw_vertex_element *enabled[VERT_ATTRIB_MAX];
440 GLuint i;
441 GLuint nr_enabled = 0;
442
443 /* Accumulate the list of enabled arrays. */
444 while (tmp) {
445 i = _mesa_ffsll(tmp)-1;
446 struct brw_vertex_element *input = &brw->vb.inputs[i];
447
448 tmp &= ~(1<<i);
449 enabled[nr_enabled++] = input;
450 }
451
452
453 /* Now emit VB and VEP state packets.
454 *
455 * This still defines a hardware VB for each input, even if they
456 * are interleaved or from the same VBO. TBD if this makes a
457 * performance difference.
458 */
459 BEGIN_BATCH(1 + nr_enabled * 4, IGNORE_CLIPRECTS);
460 OUT_BATCH((CMD_VERTEX_BUFFER << 16) |
461 ((1 + nr_enabled * 4) - 2));
462
463 for (i = 0; i < nr_enabled; i++) {
464 struct brw_vertex_element *input = enabled[i];
465
466 OUT_BATCH((i << BRW_VB0_INDEX_SHIFT) |
467 BRW_VB0_ACCESS_VERTEXDATA |
468 (input->stride << BRW_VB0_PITCH_SHIFT));
469 OUT_RELOC(input->bo,
470 DRM_GEM_DOMAIN_I915_VERTEX, 0,
471 input->offset);
472 OUT_BATCH(max_index);
473 OUT_BATCH(0); /* Instance data step rate */
474
475 /* Unreference the buffer so it can get freed, now that we won't
476 * touch it any more.
477 */
478 dri_bo_unreference(input->bo);
479 input->bo = NULL;
480 }
481 ADVANCE_BATCH();
482
483 BEGIN_BATCH(1 + nr_enabled * 2, IGNORE_CLIPRECTS);
484 OUT_BATCH((CMD_VERTEX_ELEMENT << 16) | ((1 + nr_enabled * 2) - 2));
485 for (i = 0; i < nr_enabled; i++) {
486 struct brw_vertex_element *input = enabled[i];
487 uint32_t format = get_surface_type(input->glarray->Type,
488 input->glarray->Size,
489 input->glarray->Normalized);
490 uint32_t comp0 = BRW_VE1_COMPONENT_STORE_SRC;
491 uint32_t comp1 = BRW_VE1_COMPONENT_STORE_SRC;
492 uint32_t comp2 = BRW_VE1_COMPONENT_STORE_SRC;
493 uint32_t comp3 = BRW_VE1_COMPONENT_STORE_SRC;
494
495 switch (input->glarray->Size) {
496 case 0: comp0 = BRW_VE1_COMPONENT_STORE_0;
497 case 1: comp1 = BRW_VE1_COMPONENT_STORE_0;
498 case 2: comp2 = BRW_VE1_COMPONENT_STORE_0;
499 case 3: comp3 = BRW_VE1_COMPONENT_STORE_1_FLT;
500 break;
501 }
502
503 OUT_BATCH((i << BRW_VE0_INDEX_SHIFT) |
504 BRW_VE0_VALID |
505 (format << BRW_VE0_FORMAT_SHIFT) |
506 (0 << BRW_VE0_SRC_OFFSET_SHIFT));
507 OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
508 (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
509 (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
510 (comp3 << BRW_VE1_COMPONENT_3_SHIFT) |
511 ((i * 4) << BRW_VE1_DST_OFFSET_SHIFT));
512 }
513 ADVANCE_BATCH();
514 }
515
516 int brw_prepare_indices( struct brw_context *brw,
517 const struct _mesa_index_buffer *index_buffer,
518 dri_bo **bo_return,
519 GLuint *offset_return)
520 {
521 GLcontext *ctx = &brw->intel.ctx;
522 struct intel_context *intel = &brw->intel;
523 GLuint ib_size = get_size(index_buffer->type) * index_buffer->count;
524 dri_bo *bo;
525 struct gl_buffer_object *bufferobj = index_buffer->obj;
526 GLuint offset = (GLuint)index_buffer->ptr;
527 int ret;
528
529 /* Turn into a proper VBO:
530 */
531 if (!bufferobj->Name) {
532
533 /* Get new bufferobj, offset:
534 */
535 get_space(brw, ib_size, &bo, &offset);
536
537 /* Straight upload
538 */
539 dri_bo_subdata(bo, offset, ib_size, index_buffer->ptr);
540 } else {
541 /* If the index buffer isn't aligned to its element size, we have to
542 * rebase it into a temporary.
543 */
544 if ((get_size(index_buffer->type) - 1) & offset) {
545 GLubyte *map = ctx->Driver.MapBuffer(ctx,
546 GL_ELEMENT_ARRAY_BUFFER_ARB,
547 GL_DYNAMIC_DRAW_ARB,
548 bufferobj);
549 map += offset;
550
551 get_space(brw, ib_size, &bo, &offset);
552
553 dri_bo_subdata(bo, offset, ib_size, map);
554
555 ctx->Driver.UnmapBuffer(ctx, GL_ELEMENT_ARRAY_BUFFER_ARB, bufferobj);
556 } else {
557 bo = intel_bufferobj_buffer(intel, intel_buffer_object(bufferobj),
558 INTEL_READ);
559 dri_bo_reference(bo);
560 }
561 }
562
563 *bo_return = bo;
564 *offset_return = offset;
565 ret = dri_bufmgr_check_aperture_space(bo);
566 return ret;
567 }
568
569 void brw_emit_indices(struct brw_context *brw,
570 const struct _mesa_index_buffer *index_buffer,
571 dri_bo *bo,
572 GLuint offset)
573 {
574 struct intel_context *intel = &brw->intel;
575 GLuint ib_size = get_size(index_buffer->type) * index_buffer->count;
576 /* Emit the indexbuffer packet:
577 */
578 {
579 struct brw_indexbuffer ib;
580
581 memset(&ib, 0, sizeof(ib));
582
583 ib.header.bits.opcode = CMD_INDEX_BUFFER;
584 ib.header.bits.length = sizeof(ib)/4 - 2;
585 ib.header.bits.index_format = get_index_type(index_buffer->type);
586 ib.header.bits.cut_index_enable = 0;
587
588
589 BEGIN_BATCH(4, IGNORE_CLIPRECTS);
590 OUT_BATCH( ib.header.dword );
591 OUT_RELOC( bo,
592 DRM_GEM_DOMAIN_I915_VERTEX, 0,
593 offset);
594 OUT_RELOC( bo,
595 DRM_GEM_DOMAIN_I915_VERTEX, 0,
596 offset + ib_size);
597 OUT_BATCH( 0 );
598 ADVANCE_BATCH();
599
600 dri_bo_unreference(bo);
601 }
602 }
603