src/mesa/drivers/dri/i965/brw_draw_upload.c

   1 /*
   2  * Copyright 2003 VMware, Inc.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sublicense, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the
  14  * next paragraph) shall be included in all copies or substantial portions
  15  * of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  18  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  21  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  22  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  23  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24  */
  25
  26 #include "main/bufferobj.h"
  27 #include "main/context.h"
  28 #include "main/enums.h"
  29 #include "main/macros.h"
  30 #include "main/glformats.h"
  31
  32 #include "brw_draw.h"
  33 #include "brw_defines.h"
  34 #include "brw_context.h"
  35 #include "brw_state.h"
  36
  37 #include "intel_batchbuffer.h"
  38 #include "intel_buffer_objects.h"
  39
  40 static const GLuint double_types_float[5] = {
  41    0,
  42    BRW_SURFACEFORMAT_R64_FLOAT,
  43    BRW_SURFACEFORMAT_R64G64_FLOAT,
  44    BRW_SURFACEFORMAT_R64G64B64_FLOAT,
  45    BRW_SURFACEFORMAT_R64G64B64A64_FLOAT
  46 };
  47
  48 static const GLuint double_types_passthru[5] = {
  49    0,
  50    BRW_SURFACEFORMAT_R64_PASSTHRU,
  51    BRW_SURFACEFORMAT_R64G64_PASSTHRU,
  52    BRW_SURFACEFORMAT_R64G64B64_PASSTHRU,
  53    BRW_SURFACEFORMAT_R64G64B64A64_PASSTHRU
  54 };
  55
  56 static const GLuint float_types[5] = {
  57    0,
  58    BRW_SURFACEFORMAT_R32_FLOAT,
  59    BRW_SURFACEFORMAT_R32G32_FLOAT,
  60    BRW_SURFACEFORMAT_R32G32B32_FLOAT,
  61    BRW_SURFACEFORMAT_R32G32B32A32_FLOAT
  62 };
  63
  64 static const GLuint half_float_types[5] = {
  65    0,
  66    BRW_SURFACEFORMAT_R16_FLOAT,
  67    BRW_SURFACEFORMAT_R16G16_FLOAT,
  68    BRW_SURFACEFORMAT_R16G16B16_FLOAT,
  69    BRW_SURFACEFORMAT_R16G16B16A16_FLOAT
  70 };
  71
  72 static const GLuint fixed_point_types[5] = {
  73    0,
  74    BRW_SURFACEFORMAT_R32_SFIXED,
  75    BRW_SURFACEFORMAT_R32G32_SFIXED,
  76    BRW_SURFACEFORMAT_R32G32B32_SFIXED,
  77    BRW_SURFACEFORMAT_R32G32B32A32_SFIXED,
  78 };
  79
  80 static const GLuint uint_types_direct[5] = {
  81    0,
  82    BRW_SURFACEFORMAT_R32_UINT,
  83    BRW_SURFACEFORMAT_R32G32_UINT,
  84    BRW_SURFACEFORMAT_R32G32B32_UINT,
  85    BRW_SURFACEFORMAT_R32G32B32A32_UINT
  86 };
  87
  88 static const GLuint uint_types_norm[5] = {
  89    0,
  90    BRW_SURFACEFORMAT_R32_UNORM,
  91    BRW_SURFACEFORMAT_R32G32_UNORM,
  92    BRW_SURFACEFORMAT_R32G32B32_UNORM,
  93    BRW_SURFACEFORMAT_R32G32B32A32_UNORM
  94 };
  95
  96 static const GLuint uint_types_scale[5] = {
  97    0,
  98    BRW_SURFACEFORMAT_R32_USCALED,
  99    BRW_SURFACEFORMAT_R32G32_USCALED,
 100    BRW_SURFACEFORMAT_R32G32B32_USCALED,
 101    BRW_SURFACEFORMAT_R32G32B32A32_USCALED
 102 };
 103
 104 static const GLuint int_types_direct[5] = {
 105    0,
 106    BRW_SURFACEFORMAT_R32_SINT,
 107    BRW_SURFACEFORMAT_R32G32_SINT,
 108    BRW_SURFACEFORMAT_R32G32B32_SINT,
 109    BRW_SURFACEFORMAT_R32G32B32A32_SINT
 110 };
 111
 112 static const GLuint int_types_norm[5] = {
 113    0,
 114    BRW_SURFACEFORMAT_R32_SNORM,
 115    BRW_SURFACEFORMAT_R32G32_SNORM,
 116    BRW_SURFACEFORMAT_R32G32B32_SNORM,
 117    BRW_SURFACEFORMAT_R32G32B32A32_SNORM
 118 };
 119
 120 static const GLuint int_types_scale[5] = {
 121    0,
 122    BRW_SURFACEFORMAT_R32_SSCALED,
 123    BRW_SURFACEFORMAT_R32G32_SSCALED,
 124    BRW_SURFACEFORMAT_R32G32B32_SSCALED,
 125    BRW_SURFACEFORMAT_R32G32B32A32_SSCALED
 126 };
 127
 128 static const GLuint ushort_types_direct[5] = {
 129    0,
 130    BRW_SURFACEFORMAT_R16_UINT,
 131    BRW_SURFACEFORMAT_R16G16_UINT,
 132    BRW_SURFACEFORMAT_R16G16B16_UINT,
 133    BRW_SURFACEFORMAT_R16G16B16A16_UINT
 134 };
 135
 136 static const GLuint ushort_types_norm[5] = {
 137    0,
 138    BRW_SURFACEFORMAT_R16_UNORM,
 139    BRW_SURFACEFORMAT_R16G16_UNORM,
 140    BRW_SURFACEFORMAT_R16G16B16_UNORM,
 141    BRW_SURFACEFORMAT_R16G16B16A16_UNORM
 142 };
 143
 144 static const GLuint ushort_types_scale[5] = {
 145    0,
 146    BRW_SURFACEFORMAT_R16_USCALED,
 147    BRW_SURFACEFORMAT_R16G16_USCALED,
 148    BRW_SURFACEFORMAT_R16G16B16_USCALED,
 149    BRW_SURFACEFORMAT_R16G16B16A16_USCALED
 150 };
 151
 152 static const GLuint short_types_direct[5] = {
 153    0,
 154    BRW_SURFACEFORMAT_R16_SINT,
 155    BRW_SURFACEFORMAT_R16G16_SINT,
 156    BRW_SURFACEFORMAT_R16G16B16_SINT,
 157    BRW_SURFACEFORMAT_R16G16B16A16_SINT
 158 };
 159
 160 static const GLuint short_types_norm[5] = {
 161    0,
 162    BRW_SURFACEFORMAT_R16_SNORM,
 163    BRW_SURFACEFORMAT_R16G16_SNORM,
 164    BRW_SURFACEFORMAT_R16G16B16_SNORM,
 165    BRW_SURFACEFORMAT_R16G16B16A16_SNORM
 166 };
 167
 168 static const GLuint short_types_scale[5] = {
 169    0,
 170    BRW_SURFACEFORMAT_R16_SSCALED,
 171    BRW_SURFACEFORMAT_R16G16_SSCALED,
 172    BRW_SURFACEFORMAT_R16G16B16_SSCALED,
 173    BRW_SURFACEFORMAT_R16G16B16A16_SSCALED
 174 };
 175
 176 static const GLuint ubyte_types_direct[5] = {
 177    0,
 178    BRW_SURFACEFORMAT_R8_UINT,
 179    BRW_SURFACEFORMAT_R8G8_UINT,
 180    BRW_SURFACEFORMAT_R8G8B8_UINT,
 181    BRW_SURFACEFORMAT_R8G8B8A8_UINT
 182 };
 183
 184 static const GLuint ubyte_types_norm[5] = {
 185    0,
 186    BRW_SURFACEFORMAT_R8_UNORM,
 187    BRW_SURFACEFORMAT_R8G8_UNORM,
 188    BRW_SURFACEFORMAT_R8G8B8_UNORM,
 189    BRW_SURFACEFORMAT_R8G8B8A8_UNORM
 190 };
 191
 192 static const GLuint ubyte_types_scale[5] = {
 193    0,
 194    BRW_SURFACEFORMAT_R8_USCALED,
 195    BRW_SURFACEFORMAT_R8G8_USCALED,
 196    BRW_SURFACEFORMAT_R8G8B8_USCALED,
 197    BRW_SURFACEFORMAT_R8G8B8A8_USCALED
 198 };
 199
 200 static const GLuint byte_types_direct[5] = {
 201    0,
 202    BRW_SURFACEFORMAT_R8_SINT,
 203    BRW_SURFACEFORMAT_R8G8_SINT,
 204    BRW_SURFACEFORMAT_R8G8B8_SINT,
 205    BRW_SURFACEFORMAT_R8G8B8A8_SINT
 206 };
 207
 208 static const GLuint byte_types_norm[5] = {
 209    0,
 210    BRW_SURFACEFORMAT_R8_SNORM,
 211    BRW_SURFACEFORMAT_R8G8_SNORM,
 212    BRW_SURFACEFORMAT_R8G8B8_SNORM,
 213    BRW_SURFACEFORMAT_R8G8B8A8_SNORM
 214 };
 215
 216 static const GLuint byte_types_scale[5] = {
 217    0,
 218    BRW_SURFACEFORMAT_R8_SSCALED,
 219    BRW_SURFACEFORMAT_R8G8_SSCALED,
 220    BRW_SURFACEFORMAT_R8G8B8_SSCALED,
 221    BRW_SURFACEFORMAT_R8G8B8A8_SSCALED
 222 };
 223
 224 static GLuint
 225 double_types(struct brw_context *brw,
 226              int size,
 227              GLboolean doubles)
 228 {
 229    /* From the BDW PRM, Volume 2d, page 588 (VERTEX_ELEMENT_STATE):
 230     * "When SourceElementFormat is set to one of the *64*_PASSTHRU formats,
 231     * 64-bit components are stored in the URB without any conversion."
 232     * Also included on BDW PRM, Volume 7, page 470, table "Source Element
 233     * Formats Supported in VF Unit"
 234     * Previous PRMs don't include those references.
 235     */
 236    return (brw->gen >= 8 && doubles
 237            ? double_types_passthru[size]
 238            : double_types_float[size]);
 239 }
 240
 241 /**
 242  * Given vertex array type/size/format/normalized info, return
 243  * the appopriate hardware surface type.
 244  * Format will be GL_RGBA or possibly GL_BGRA for GLubyte[4] color arrays.
 245  */
 246 unsigned
 247 brw_get_vertex_surface_type(struct brw_context *brw,
 248                             const struct gl_client_array *glarray)
 249 {
 250    int size = glarray->Size;
 251    const bool is_ivybridge_or_older =
 252       brw->gen <= 7 && !brw->is_baytrail && !brw->is_haswell;
 253
 254    if (unlikely(INTEL_DEBUG & DEBUG_VERTS))
 255       fprintf(stderr, "type %s size %d normalized %d\n",
 256               _mesa_enum_to_string(glarray->Type),
 257               glarray->Size, glarray->Normalized);
 258
 259    if (glarray->Integer) {
 260       assert(glarray->Format == GL_RGBA); /* sanity check */
 261       switch (glarray->Type) {
 262       case GL_INT: return int_types_direct[size];
 263       case GL_SHORT:
 264          if (is_ivybridge_or_older && size == 3)
 265             return short_types_direct[4];
 266          else
 267             return short_types_direct[size];
 268       case GL_BYTE:
 269          if (is_ivybridge_or_older && size == 3)
 270             return byte_types_direct[4];
 271          else
 272             return byte_types_direct[size];
 273       case GL_UNSIGNED_INT: return uint_types_direct[size];
 274       case GL_UNSIGNED_SHORT:
 275          if (is_ivybridge_or_older && size == 3)
 276             return ushort_types_direct[4];
 277          else
 278             return ushort_types_direct[size];
 279       case GL_UNSIGNED_BYTE:
 280          if (is_ivybridge_or_older && size == 3)
 281             return ubyte_types_direct[4];
 282          else
 283             return ubyte_types_direct[size];
 284       default: unreachable("not reached");
 285       }
 286    } else if (glarray->Type == GL_UNSIGNED_INT_10F_11F_11F_REV) {
 287       return BRW_SURFACEFORMAT_R11G11B10_FLOAT;
 288    } else if (glarray->Normalized) {
 289       switch (glarray->Type) {
 290       case GL_DOUBLE: return double_types(brw, size, glarray->Doubles);
 291       case GL_FLOAT: return float_types[size];
 292       case GL_HALF_FLOAT:
 293          if (brw->gen < 6 && size == 3)
 294             return half_float_types[4];
 295          else
 296             return half_float_types[size];
 297       case GL_INT: return int_types_norm[size];
 298       case GL_SHORT: return short_types_norm[size];
 299       case GL_BYTE: return byte_types_norm[size];
 300       case GL_UNSIGNED_INT: return uint_types_norm[size];
 301       case GL_UNSIGNED_SHORT: return ushort_types_norm[size];
 302       case GL_UNSIGNED_BYTE:
 303          if (glarray->Format == GL_BGRA) {
 304             /* See GL_EXT_vertex_array_bgra */
 305             assert(size == 4);
 306             return BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
 307          }
 308          else {
 309             return ubyte_types_norm[size];
 310          }
 311       case GL_FIXED:
 312          if (brw->gen >= 8 || brw->is_haswell)
 313             return fixed_point_types[size];
 314
 315          /* This produces GL_FIXED inputs as values between INT32_MIN and
 316           * INT32_MAX, which will be scaled down by 1/65536 by the VS.
 317           */
 318          return int_types_scale[size];
 319       /* See GL_ARB_vertex_type_2_10_10_10_rev.
 320        * W/A: Pre-Haswell, the hardware doesn't really support the formats we'd
 321        * like to use here, so upload everything as UINT and fix
 322        * it in the shader
 323        */
 324       case GL_INT_2_10_10_10_REV:
 325          assert(size == 4);
 326          if (brw->gen >= 8 || brw->is_haswell) {
 327             return glarray->Format == GL_BGRA
 328                ? BRW_SURFACEFORMAT_B10G10R10A2_SNORM
 329                : BRW_SURFACEFORMAT_R10G10B10A2_SNORM;
 330          }
 331          return BRW_SURFACEFORMAT_R10G10B10A2_UINT;
 332       case GL_UNSIGNED_INT_2_10_10_10_REV:
 333          assert(size == 4);
 334          if (brw->gen >= 8 || brw->is_haswell) {
 335             return glarray->Format == GL_BGRA
 336                ? BRW_SURFACEFORMAT_B10G10R10A2_UNORM
 337                : BRW_SURFACEFORMAT_R10G10B10A2_UNORM;
 338          }
 339          return BRW_SURFACEFORMAT_R10G10B10A2_UINT;
 340       default: unreachable("not reached");
 341       }
 342    }
 343    else {
 344       /* See GL_ARB_vertex_type_2_10_10_10_rev.
 345        * W/A: the hardware doesn't really support the formats we'd
 346        * like to use here, so upload everything as UINT and fix
 347        * it in the shader
 348        */
 349       if (glarray->Type == GL_INT_2_10_10_10_REV) {
 350          assert(size == 4);
 351          if (brw->gen >= 8 || brw->is_haswell) {
 352             return glarray->Format == GL_BGRA
 353                ? BRW_SURFACEFORMAT_B10G10R10A2_SSCALED
 354                : BRW_SURFACEFORMAT_R10G10B10A2_SSCALED;
 355          }
 356          return BRW_SURFACEFORMAT_R10G10B10A2_UINT;
 357       } else if (glarray->Type == GL_UNSIGNED_INT_2_10_10_10_REV) {
 358          assert(size == 4);
 359          if (brw->gen >= 8 || brw->is_haswell) {
 360             return glarray->Format == GL_BGRA
 361                ? BRW_SURFACEFORMAT_B10G10R10A2_USCALED
 362                : BRW_SURFACEFORMAT_R10G10B10A2_USCALED;
 363          }
 364          return BRW_SURFACEFORMAT_R10G10B10A2_UINT;
 365       }
 366       assert(glarray->Format == GL_RGBA); /* sanity check */
 367       switch (glarray->Type) {
 368       case GL_DOUBLE: return double_types(brw, size, glarray->Doubles);
 369       case GL_FLOAT: return float_types[size];
 370       case GL_HALF_FLOAT:
 371          if (brw->gen < 6 && size == 3)
 372             return half_float_types[4];
 373          else
 374             return half_float_types[size];
 375       case GL_INT: return int_types_scale[size];
 376       case GL_SHORT: return short_types_scale[size];
 377       case GL_BYTE: return byte_types_scale[size];
 378       case GL_UNSIGNED_INT: return uint_types_scale[size];
 379       case GL_UNSIGNED_SHORT: return ushort_types_scale[size];
 380       case GL_UNSIGNED_BYTE: return ubyte_types_scale[size];
 381       case GL_FIXED:
 382          if (brw->gen >= 8 || brw->is_haswell)
 383             return fixed_point_types[size];
 384
 385          /* This produces GL_FIXED inputs as values between INT32_MIN and
 386           * INT32_MAX, which will be scaled down by 1/65536 by the VS.
 387           */
 388          return int_types_scale[size];
 389       default: unreachable("not reached");
 390       }
 391    }
 392 }
 393
 394 static void
 395 copy_array_to_vbo_array(struct brw_context *brw,
 396                         struct brw_vertex_element *element,
 397                         int min, int max,
 398                         struct brw_vertex_buffer *buffer,
 399                         GLuint dst_stride)
 400 {
 401    const int src_stride = element->glarray->StrideB;
 402
 403    /* If the source stride is zero, we just want to upload the current
 404     * attribute once and set the buffer's stride to 0.  There's no need
 405     * to replicate it out.
 406     */
 407    if (src_stride == 0) {
 408       intel_upload_data(brw, element->glarray->Ptr,
 409                         element->glarray->_ElementSize,
 410                         element->glarray->_ElementSize,
 411                         &buffer->bo, &buffer->offset);
 412
 413       buffer->stride = 0;
 414       buffer->size = element->glarray->_ElementSize;
 415       return;
 416    }
 417
 418    const unsigned char *src = element->glarray->Ptr + min * src_stride;
 419    int count = max - min + 1;
 420    GLuint size = count * dst_stride;
 421    uint8_t *dst = intel_upload_space(brw, size, dst_stride,
 422                                      &buffer->bo, &buffer->offset);
 423
 424    if (dst_stride == src_stride) {
 425       memcpy(dst, src, size);
 426    } else {
 427       while (count--) {
 428          memcpy(dst, src, dst_stride);
 429          src += src_stride;
 430          dst += dst_stride;
 431       }
 432    }
 433    buffer->stride = dst_stride;
 434    buffer->size = size;
 435 }
 436
 437 void
 438 brw_prepare_vertices(struct brw_context *brw)
 439 {
 440    struct gl_context *ctx = &brw->ctx;
 441    /* BRW_NEW_VS_PROG_DATA */
 442    GLbitfield64 vs_inputs = brw->vs.prog_data->inputs_read;
 443    const unsigned char *ptr = NULL;
 444    GLuint interleaved = 0;
 445    unsigned int min_index = brw->vb.min_index + brw->basevertex;
 446    unsigned int max_index = brw->vb.max_index + brw->basevertex;
 447    unsigned i;
 448    int delta, j;
 449
 450    struct brw_vertex_element *upload[VERT_ATTRIB_MAX];
 451    GLuint nr_uploads = 0;
 452
 453    /* _NEW_POLYGON
 454     *
 455     * On gen6+, edge flags don't end up in the VUE (either in or out of the
 456     * VS).  Instead, they're uploaded as the last vertex element, and the data
 457     * is passed sideband through the fixed function units.  So, we need to
 458     * prepare the vertex buffer for it, but it's not present in inputs_read.
 459     */
 460    if (brw->gen >= 6 && (ctx->Polygon.FrontMode != GL_FILL ||
 461                            ctx->Polygon.BackMode != GL_FILL)) {
 462       vs_inputs |= VERT_BIT_EDGEFLAG;
 463    }
 464
 465    if (0)
 466       fprintf(stderr, "%s %d..%d\n", __func__, min_index, max_index);
 467
 468    /* Accumulate the list of enabled arrays. */
 469    brw->vb.nr_enabled = 0;
 470    while (vs_inputs) {
 471       GLuint index = ffsll(vs_inputs) - 1;
 472       struct brw_vertex_element *input = &brw->vb.inputs[index];
 473
 474       vs_inputs &= ~BITFIELD64_BIT(index);
 475       brw->vb.enabled[brw->vb.nr_enabled++] = input;
 476    }
 477
 478    if (brw->vb.nr_enabled == 0)
 479       return;
 480
 481    if (brw->vb.nr_buffers)
 482       return;
 483
 484    /* The range of data in a given buffer represented as [min, max) */
 485    struct intel_buffer_object *enabled_buffer[VERT_ATTRIB_MAX];
 486    uint32_t buffer_range_start[VERT_ATTRIB_MAX];
 487    uint32_t buffer_range_end[VERT_ATTRIB_MAX];
 488
 489    for (i = j = 0; i < brw->vb.nr_enabled; i++) {
 490       struct brw_vertex_element *input = brw->vb.enabled[i];
 491       const struct gl_client_array *glarray = input->glarray;
 492
 493       if (_mesa_is_bufferobj(glarray->BufferObj)) {
 494          struct intel_buffer_object *intel_buffer =
 495             intel_buffer_object(glarray->BufferObj);
 496
 497          const uint32_t offset = (uintptr_t)glarray->Ptr;
 498
 499          /* Start with the worst case */
 500          uint32_t start = 0;
 501          uint32_t range = intel_buffer->Base.Size;
 502          if (glarray->InstanceDivisor) {
 503             if (brw->num_instances) {
 504                start = offset + glarray->StrideB * brw->baseinstance;
 505                range = (glarray->StrideB * ((brw->num_instances - 1) /
 506                                             glarray->InstanceDivisor) +
 507                         glarray->_ElementSize);
 508             }
 509          } else {
 510             if (brw->vb.index_bounds_valid) {
 511                start = offset + min_index * glarray->StrideB;
 512                range = (glarray->StrideB * (max_index - min_index) +
 513                         glarray->_ElementSize);
 514             }
 515          }
 516
 517          /* If we have a VB set to be uploaded for this buffer object
 518           * already, reuse that VB state so that we emit fewer
 519           * relocations.
 520           */
 521          unsigned k;
 522          for (k = 0; k < i; k++) {
 523             const struct gl_client_array *other = brw->vb.enabled[k]->glarray;
 524             if (glarray->BufferObj == other->BufferObj &&
 525                 glarray->StrideB == other->StrideB &&
 526                 glarray->InstanceDivisor == other->InstanceDivisor &&
 527                 (uintptr_t)(glarray->Ptr - other->Ptr) < glarray->StrideB)
 528             {
 529                input->buffer = brw->vb.enabled[k]->buffer;
 530                input->offset = glarray->Ptr - other->Ptr;
 531
 532                buffer_range_start[k] = MIN2(buffer_range_start[k], start);
 533                buffer_range_end[k] = MAX2(buffer_range_end[k], start + range);
 534                break;
 535             }
 536          }
 537          if (k == i) {
 538             struct brw_vertex_buffer *buffer = &brw->vb.buffers[j];
 539
 540             /* Named buffer object: Just reference its contents directly. */
 541             buffer->offset = offset;
 542             buffer->stride = glarray->StrideB;
 543             buffer->step_rate = glarray->InstanceDivisor;
 544
 545             enabled_buffer[j] = intel_buffer;
 546             buffer_range_start[j] = start;
 547             buffer_range_end[j] = start + range;
 548
 549             input->buffer = j++;
 550             input->offset = 0;
 551          }
 552
 553          /* This is a common place to reach if the user mistakenly supplies
 554           * a pointer in place of a VBO offset.  If we just let it go through,
 555           * we may end up dereferencing a pointer beyond the bounds of the
 556           * GTT.
 557           *
 558           * The VBO spec allows application termination in this case, and it's
 559           * probably a service to the poor programmer to do so rather than
 560           * trying to just not render.
 561           */
 562          assert(input->offset < intel_buffer->Base.Size);
 563       } else {
 564          /* Queue the buffer object up to be uploaded in the next pass,
 565           * when we've decided if we're doing interleaved or not.
 566           */
 567          if (nr_uploads == 0) {
 568             interleaved = glarray->StrideB;
 569             ptr = glarray->Ptr;
 570          }
 571          else if (interleaved != glarray->StrideB ||
 572                   glarray->Ptr < ptr ||
 573                   (uintptr_t)(glarray->Ptr - ptr) + glarray->_ElementSize > interleaved)
 574          {
 575             /* If our stride is different from the first attribute's stride,
 576              * or if the first attribute's stride didn't cover our element,
 577              * disable the interleaved upload optimization.  The second case
 578              * can most commonly occur in cases where there is a single vertex
 579              * and, for example, the data is stored on the application's
 580              * stack.
 581              *
 582              * NOTE: This will also disable the optimization in cases where
 583              * the data is in a different order than the array indices.
 584              * Something like:
 585              *
 586              *     float data[...];
 587              *     glVertexAttribPointer(0, 4, GL_FLOAT, 32, &data[4]);
 588              *     glVertexAttribPointer(1, 4, GL_FLOAT, 32, &data[0]);
 589              */
 590             interleaved = 0;
 591          }
 592
 593          upload[nr_uploads++] = input;
 594       }
 595    }
 596
 597    /* Now that we've set up all of the buffers, we walk through and reference
 598     * each of them.  We do this late so that we get the right size in each
 599     * buffer and don't reference too little data.
 600     */
 601    for (i = 0; i < j; i++) {
 602       struct brw_vertex_buffer *buffer = &brw->vb.buffers[i];
 603       if (buffer->bo)
 604          continue;
 605
 606       const uint32_t start = buffer_range_start[i];
 607       const uint32_t range = buffer_range_end[i] - buffer_range_start[i];
 608
 609       buffer->bo = intel_bufferobj_buffer(brw, enabled_buffer[i], start, range);
 610       drm_intel_bo_reference(buffer->bo);
 611
 612       buffer->size = start + range;
 613    }
 614
 615    /* If we need to upload all the arrays, then we can trim those arrays to
 616     * only the used elements [min_index, max_index] so long as we adjust all
 617     * the values used in the 3DPRIMITIVE i.e. by setting the vertex bias.
 618     */
 619    brw->vb.start_vertex_bias = 0;
 620    delta = min_index;
 621    if (nr_uploads == brw->vb.nr_enabled) {
 622       brw->vb.start_vertex_bias = -delta;
 623       delta = 0;
 624    }
 625
 626    /* Handle any arrays to be uploaded. */
 627    if (nr_uploads > 1) {
 628       if (interleaved) {
 629          struct brw_vertex_buffer *buffer = &brw->vb.buffers[j];
 630          /* All uploads are interleaved, so upload the arrays together as
 631           * interleaved.  First, upload the contents and set up upload[0].
 632           */
 633          copy_array_to_vbo_array(brw, upload[0], min_index, max_index,
 634                                  buffer, interleaved);
 635          buffer->offset -= delta * interleaved;
 636          buffer->size += delta * interleaved;
 637
 638          for (i = 0; i < nr_uploads; i++) {
 639             /* Then, just point upload[i] at upload[0]'s buffer. */
 640             upload[i]->offset =
 641                ((const unsigned char *)upload[i]->glarray->Ptr - ptr);
 642             upload[i]->buffer = j;
 643          }
 644          j++;
 645
 646          nr_uploads = 0;
 647       }
 648    }
 649    /* Upload non-interleaved arrays */
 650    for (i = 0; i < nr_uploads; i++) {
 651       struct brw_vertex_buffer *buffer = &brw->vb.buffers[j];
 652       if (upload[i]->glarray->InstanceDivisor == 0) {
 653          copy_array_to_vbo_array(brw, upload[i], min_index, max_index,
 654                                  buffer, upload[i]->glarray->_ElementSize);
 655       } else {
 656          /* This is an instanced attribute, since its InstanceDivisor
 657           * is not zero. Therefore, its data will be stepped after the
 658           * instanced draw has been run InstanceDivisor times.
 659           */
 660          uint32_t instanced_attr_max_index =
 661             (brw->num_instances - 1) / upload[i]->glarray->InstanceDivisor;
 662          copy_array_to_vbo_array(brw, upload[i], 0, instanced_attr_max_index,
 663                                  buffer, upload[i]->glarray->_ElementSize);
 664       }
 665       buffer->offset -= delta * buffer->stride;
 666       buffer->size += delta * buffer->stride;
 667       buffer->step_rate = upload[i]->glarray->InstanceDivisor;
 668       upload[i]->buffer = j++;
 669       upload[i]->offset = 0;
 670    }
 671
 672    brw->vb.nr_buffers = j;
 673 }
 674
 675 void
 676 brw_prepare_shader_draw_parameters(struct brw_context *brw)
 677 {
 678    /* For non-indirect draws, upload gl_BaseVertex. */
 679    if ((brw->vs.prog_data->uses_basevertex ||
 680         brw->vs.prog_data->uses_baseinstance) &&
 681        brw->draw.draw_params_bo == NULL) {
 682       intel_upload_data(brw, &brw->draw.params, sizeof(brw->draw.params), 4,
 683                         &brw->draw.draw_params_bo,
 684                         &brw->draw.draw_params_offset);
 685    }
 686
 687    if (brw->vs.prog_data->uses_drawid) {
 688       intel_upload_data(brw, &brw->draw.gl_drawid, sizeof(brw->draw.gl_drawid), 4,
 689                         &brw->draw.draw_id_bo,
 690                         &brw->draw.draw_id_offset);
 691    }
 692 }
 693
 694 /**
 695  * Emit a VERTEX_BUFFER_STATE entry (part of 3DSTATE_VERTEX_BUFFERS).
 696  */
 697 static uint32_t *
 698 emit_vertex_buffer_state(struct brw_context *brw,
 699                          unsigned buffer_nr,
 700                          drm_intel_bo *bo,
 701                          unsigned bo_ending_address,
 702                          unsigned bo_offset,
 703                          unsigned stride,
 704                          unsigned step_rate,
 705                          uint32_t *__map)
 706 {
 707    struct gl_context *ctx = &brw->ctx;
 708    uint32_t dw0;
 709
 710    if (brw->gen >= 6) {
 711       dw0 = (buffer_nr << GEN6_VB0_INDEX_SHIFT) |
 712             (step_rate ? GEN6_VB0_ACCESS_INSTANCEDATA
 713                        : GEN6_VB0_ACCESS_VERTEXDATA);
 714    } else {
 715       dw0 = (buffer_nr << BRW_VB0_INDEX_SHIFT) |
 716             (step_rate ? BRW_VB0_ACCESS_INSTANCEDATA
 717                        : BRW_VB0_ACCESS_VERTEXDATA);
 718    }
 719
 720    if (brw->gen >= 7)
 721       dw0 |= GEN7_VB0_ADDRESS_MODIFYENABLE;
 722
 723    if (brw->gen == 7)
 724       dw0 |= GEN7_MOCS_L3 << 16;
 725
 726    WARN_ONCE(stride >= (brw->gen >= 5 ? 2048 : 2047),
 727              "VBO stride %d too large, bad rendering may occur\n",
 728              stride);
 729    OUT_BATCH(dw0 | (stride << BRW_VB0_PITCH_SHIFT));
 730    OUT_RELOC(bo, I915_GEM_DOMAIN_VERTEX, 0, bo_offset);
 731    if (brw->gen >= 5) {
 732       OUT_RELOC(bo, I915_GEM_DOMAIN_VERTEX, 0, bo_ending_address);
 733    } else {
 734       OUT_BATCH(0);
 735    }
 736    OUT_BATCH(step_rate);
 737
 738    return __map;
 739 }
 740 #define EMIT_VERTEX_BUFFER_STATE(...) __map = emit_vertex_buffer_state(__VA_ARGS__, __map)
 741
 742 static void
 743 brw_emit_vertices(struct brw_context *brw)
 744 {
 745    GLuint i;
 746
 747    brw_prepare_vertices(brw);
 748    brw_prepare_shader_draw_parameters(brw);
 749
 750    brw_emit_query_begin(brw);
 751
 752    unsigned nr_elements = brw->vb.nr_enabled;
 753    if (brw->vs.prog_data->uses_vertexid || brw->vs.prog_data->uses_instanceid ||
 754        brw->vs.prog_data->uses_basevertex || brw->vs.prog_data->uses_baseinstance)
 755       ++nr_elements;
 756    if (brw->vs.prog_data->uses_drawid)
 757       nr_elements++;
 758
 759    /* If the VS doesn't read any inputs (calculating vertex position from
 760     * a state variable for some reason, for example), emit a single pad
 761     * VERTEX_ELEMENT struct and bail.
 762     *
 763     * The stale VB state stays in place, but they don't do anything unless
 764     * a VE loads from them.
 765     */
 766    if (nr_elements == 0) {
 767       BEGIN_BATCH(3);
 768       OUT_BATCH((_3DSTATE_VERTEX_ELEMENTS << 16) | 1);
 769       if (brw->gen >= 6) {
 770          OUT_BATCH((0 << GEN6_VE0_INDEX_SHIFT) |
 771                    GEN6_VE0_VALID |
 772                    (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_VE0_FORMAT_SHIFT) |
 773                    (0 << BRW_VE0_SRC_OFFSET_SHIFT));
 774       } else {
 775          OUT_BATCH((0 << BRW_VE0_INDEX_SHIFT) |
 776                    BRW_VE0_VALID |
 777                    (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_VE0_FORMAT_SHIFT) |
 778                    (0 << BRW_VE0_SRC_OFFSET_SHIFT));
 779       }
 780       OUT_BATCH((BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_0_SHIFT) |
 781                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT) |
 782                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) |
 783                 (BRW_VE1_COMPONENT_STORE_1_FLT << BRW_VE1_COMPONENT_3_SHIFT));
 784       ADVANCE_BATCH();
 785       return;
 786    }
 787
 788    /* Now emit VB and VEP state packets.
 789     */
 790
 791    const bool uses_draw_params =
 792       brw->vs.prog_data->uses_basevertex ||
 793       brw->vs.prog_data->uses_baseinstance;
 794    const unsigned nr_buffers = brw->vb.nr_buffers +
 795       uses_draw_params + brw->vs.prog_data->uses_drawid;
 796
 797    if (nr_buffers) {
 798       if (brw->gen >= 6) {
 799          assert(nr_buffers <= 33);
 800       } else {
 801          assert(nr_buffers <= 17);
 802       }
 803
 804       BEGIN_BATCH(1 + 4 * nr_buffers);
 805       OUT_BATCH((_3DSTATE_VERTEX_BUFFERS << 16) | (4 * nr_buffers - 1));
 806       for (i = 0; i < brw->vb.nr_buffers; i++) {
 807          struct brw_vertex_buffer *buffer = &brw->vb.buffers[i];
 808          /* Prior to Haswell and Bay Trail we have to use 4-component formats
 809           * to fake 3-component ones.  In particular, we do this for
 810           * half-float and 8 and 16-bit integer formats.  This means that the
 811           * vertex element may poke over the end of the buffer by 2 bytes.
 812           */
 813          unsigned padding =
 814             (brw->gen <= 7 && !brw->is_baytrail && !brw->is_haswell) * 2;
 815          EMIT_VERTEX_BUFFER_STATE(brw, i, buffer->bo,
 816                                   buffer->offset + buffer->size + padding - 1,
 817                                   buffer->offset, buffer->stride,
 818                                   buffer->step_rate);
 819
 820       }
 821
 822       if (uses_draw_params) {
 823          EMIT_VERTEX_BUFFER_STATE(brw, brw->vb.nr_buffers,
 824                                   brw->draw.draw_params_bo,
 825                                   brw->draw.draw_params_bo->size - 1,
 826                                   brw->draw.draw_params_offset,
 827                                   0,  /* stride */
 828                                   0); /* step rate */
 829       }
 830
 831       if (brw->vs.prog_data->uses_drawid) {
 832          EMIT_VERTEX_BUFFER_STATE(brw, brw->vb.nr_buffers + 1,
 833                                   brw->draw.draw_id_bo,
 834                                   brw->draw.draw_id_bo->size - 1,
 835                                   brw->draw.draw_id_offset,
 836                                   0,  /* stride */
 837                                   0); /* step rate */
 838       }
 839
 840       ADVANCE_BATCH();
 841    }
 842
 843    /* The hardware allows one more VERTEX_ELEMENTS than VERTEX_BUFFERS, presumably
 844     * for VertexID/InstanceID.
 845     */
 846    if (brw->gen >= 6) {
 847       assert(nr_elements <= 34);
 848    } else {
 849       assert(nr_elements <= 18);
 850    }
 851
 852    struct brw_vertex_element *gen6_edgeflag_input = NULL;
 853
 854    BEGIN_BATCH(1 + nr_elements * 2);
 855    OUT_BATCH((_3DSTATE_VERTEX_ELEMENTS << 16) | (2 * nr_elements - 1));
 856    for (i = 0; i < brw->vb.nr_enabled; i++) {
 857       struct brw_vertex_element *input = brw->vb.enabled[i];
 858       uint32_t format = brw_get_vertex_surface_type(brw, input->glarray);
 859       uint32_t comp0 = BRW_VE1_COMPONENT_STORE_SRC;
 860       uint32_t comp1 = BRW_VE1_COMPONENT_STORE_SRC;
 861       uint32_t comp2 = BRW_VE1_COMPONENT_STORE_SRC;
 862       uint32_t comp3 = BRW_VE1_COMPONENT_STORE_SRC;
 863
 864       if (input == &brw->vb.inputs[VERT_ATTRIB_EDGEFLAG]) {
 865          /* Gen6+ passes edgeflag as sideband along with the vertex, instead
 866           * of in the VUE.  We have to upload it sideband as the last vertex
 867           * element according to the B-Spec.
 868           */
 869          if (brw->gen >= 6) {
 870             gen6_edgeflag_input = input;
 871             continue;
 872          }
 873       }
 874
 875       switch (input->glarray->Size) {
 876       case 0: comp0 = BRW_VE1_COMPONENT_STORE_0;
 877       case 1: comp1 = BRW_VE1_COMPONENT_STORE_0;
 878       case 2: comp2 = BRW_VE1_COMPONENT_STORE_0;
 879       case 3: comp3 = input->glarray->Integer ? BRW_VE1_COMPONENT_STORE_1_INT
 880                                               : BRW_VE1_COMPONENT_STORE_1_FLT;
 881          break;
 882       }
 883
 884       if (brw->gen >= 6) {
 885          OUT_BATCH((input->buffer << GEN6_VE0_INDEX_SHIFT) |
 886                    GEN6_VE0_VALID |
 887                    (format << BRW_VE0_FORMAT_SHIFT) |
 888                    (input->offset << BRW_VE0_SRC_OFFSET_SHIFT));
 889       } else {
 890          OUT_BATCH((input->buffer << BRW_VE0_INDEX_SHIFT) |
 891                    BRW_VE0_VALID |
 892                    (format << BRW_VE0_FORMAT_SHIFT) |
 893                    (input->offset << BRW_VE0_SRC_OFFSET_SHIFT));
 894       }
 895
 896       if (brw->gen >= 5)
 897           OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
 898                     (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
 899                     (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
 900                     (comp3 << BRW_VE1_COMPONENT_3_SHIFT));
 901       else
 902           OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
 903                     (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
 904                     (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
 905                     (comp3 << BRW_VE1_COMPONENT_3_SHIFT) |
 906                     ((i * 4) << BRW_VE1_DST_OFFSET_SHIFT));
 907    }
 908
 909    if (brw->vs.prog_data->uses_vertexid || brw->vs.prog_data->uses_instanceid ||
 910        brw->vs.prog_data->uses_basevertex || brw->vs.prog_data->uses_baseinstance) {
 911       uint32_t dw0 = 0, dw1 = 0;
 912       uint32_t comp0 = BRW_VE1_COMPONENT_STORE_0;
 913       uint32_t comp1 = BRW_VE1_COMPONENT_STORE_0;
 914       uint32_t comp2 = BRW_VE1_COMPONENT_STORE_0;
 915       uint32_t comp3 = BRW_VE1_COMPONENT_STORE_0;
 916
 917       if (brw->vs.prog_data->uses_basevertex)
 918          comp0 = BRW_VE1_COMPONENT_STORE_SRC;
 919
 920       if (brw->vs.prog_data->uses_baseinstance)
 921          comp1 = BRW_VE1_COMPONENT_STORE_SRC;
 922
 923       if (brw->vs.prog_data->uses_vertexid)
 924          comp2 = BRW_VE1_COMPONENT_STORE_VID;
 925
 926       if (brw->vs.prog_data->uses_instanceid)
 927          comp3 = BRW_VE1_COMPONENT_STORE_IID;
 928
 929       dw1 = (comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
 930             (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
 931             (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
 932             (comp3 << BRW_VE1_COMPONENT_3_SHIFT);
 933
 934       if (brw->gen >= 6) {
 935          dw0 |= GEN6_VE0_VALID |
 936                 brw->vb.nr_buffers << GEN6_VE0_INDEX_SHIFT |
 937                 BRW_SURFACEFORMAT_R32G32_UINT << BRW_VE0_FORMAT_SHIFT;
 938       } else {
 939          dw0 |= BRW_VE0_VALID |
 940                 brw->vb.nr_buffers << BRW_VE0_INDEX_SHIFT |
 941                 BRW_SURFACEFORMAT_R32G32_UINT << BRW_VE0_FORMAT_SHIFT;
 942          dw1 |= (i * 4) << BRW_VE1_DST_OFFSET_SHIFT;
 943       }
 944
 945       /* Note that for gl_VertexID, gl_InstanceID, and gl_PrimitiveID values,
 946        * the format is ignored and the value is always int.
 947        */
 948
 949       OUT_BATCH(dw0);
 950       OUT_BATCH(dw1);
 951    }
 952
 953    if (brw->vs.prog_data->uses_drawid) {
 954       uint32_t dw0 = 0, dw1 = 0;
 955
 956       dw1 = (BRW_VE1_COMPONENT_STORE_SRC << BRW_VE1_COMPONENT_0_SHIFT) |
 957             (BRW_VE1_COMPONENT_STORE_0   << BRW_VE1_COMPONENT_1_SHIFT) |
 958             (BRW_VE1_COMPONENT_STORE_0   << BRW_VE1_COMPONENT_2_SHIFT) |
 959             (BRW_VE1_COMPONENT_STORE_0   << BRW_VE1_COMPONENT_3_SHIFT);
 960
 961       if (brw->gen >= 6) {
 962          dw0 |= GEN6_VE0_VALID |
 963                 ((brw->vb.nr_buffers + 1) << GEN6_VE0_INDEX_SHIFT) |
 964                 (BRW_SURFACEFORMAT_R32_UINT << BRW_VE0_FORMAT_SHIFT);
 965       } else {
 966          dw0 |= BRW_VE0_VALID |
 967                 ((brw->vb.nr_buffers + 1) << BRW_VE0_INDEX_SHIFT) |
 968                 (BRW_SURFACEFORMAT_R32_UINT << BRW_VE0_FORMAT_SHIFT);
 969
 970          dw1 |= (i * 4) << BRW_VE1_DST_OFFSET_SHIFT;
 971       }
 972
 973       OUT_BATCH(dw0);
 974       OUT_BATCH(dw1);
 975    }
 976
 977    if (brw->gen >= 6 && gen6_edgeflag_input) {
 978       uint32_t format =
 979          brw_get_vertex_surface_type(brw, gen6_edgeflag_input->glarray);
 980
 981       OUT_BATCH((gen6_edgeflag_input->buffer << GEN6_VE0_INDEX_SHIFT) |
 982                 GEN6_VE0_VALID |
 983                 GEN6_VE0_EDGE_FLAG_ENABLE |
 984                 (format << BRW_VE0_FORMAT_SHIFT) |
 985                 (gen6_edgeflag_input->offset << BRW_VE0_SRC_OFFSET_SHIFT));
 986       OUT_BATCH((BRW_VE1_COMPONENT_STORE_SRC << BRW_VE1_COMPONENT_0_SHIFT) |
 987                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT) |
 988                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) |
 989                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_3_SHIFT));
 990    }
 991
 992    ADVANCE_BATCH();
 993 }
 994
 995 const struct brw_tracked_state brw_vertices = {
 996    .dirty = {
 997       .mesa = _NEW_POLYGON,
 998       .brw = BRW_NEW_BATCH |
 999              BRW_NEW_BLORP |
1000              BRW_NEW_VERTICES |
1001              BRW_NEW_VS_PROG_DATA,
1002    },
1003    .emit = brw_emit_vertices,
1004 };
1005
1006 static void
1007 brw_upload_indices(struct brw_context *brw)
1008 {
1009    struct gl_context *ctx = &brw->ctx;
1010    const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
1011    GLuint ib_size;
1012    drm_intel_bo *old_bo = brw->ib.bo;
1013    struct gl_buffer_object *bufferobj;
1014    GLuint offset;
1015    GLuint ib_type_size;
1016
1017    if (index_buffer == NULL)
1018       return;
1019
1020    ib_type_size = _mesa_sizeof_type(index_buffer->type);
1021    ib_size = index_buffer->count ? ib_type_size * index_buffer->count :
1022                                    index_buffer->obj->Size;
1023    bufferobj = index_buffer->obj;
1024
1025    /* Turn into a proper VBO:
1026     */
1027    if (!_mesa_is_bufferobj(bufferobj)) {
1028       /* Get new bufferobj, offset:
1029        */
1030       intel_upload_data(brw, index_buffer->ptr, ib_size, ib_type_size,
1031                         &brw->ib.bo, &offset);
1032       brw->ib.size = brw->ib.bo->size;
1033    } else {
1034       offset = (GLuint) (unsigned long) index_buffer->ptr;
1035
1036       /* If the index buffer isn't aligned to its element size, we have to
1037        * rebase it into a temporary.
1038        */
1039       if ((ib_type_size - 1) & offset) {
1040          perf_debug("copying index buffer to a temporary to work around "
1041                     "misaligned offset %d\n", offset);
1042
1043          GLubyte *map = ctx->Driver.MapBufferRange(ctx,
1044                                                    offset,
1045                                                    ib_size,
1046                                                    GL_MAP_READ_BIT,
1047                                                    bufferobj,
1048                                                    MAP_INTERNAL);
1049
1050          intel_upload_data(brw, map, ib_size, ib_type_size,
1051                            &brw->ib.bo, &offset);
1052          brw->ib.size = brw->ib.bo->size;
1053
1054          ctx->Driver.UnmapBuffer(ctx, bufferobj, MAP_INTERNAL);
1055       } else {
1056          drm_intel_bo *bo =
1057             intel_bufferobj_buffer(brw, intel_buffer_object(bufferobj),
1058                                    offset, ib_size);
1059          if (bo != brw->ib.bo) {
1060             drm_intel_bo_unreference(brw->ib.bo);
1061             brw->ib.bo = bo;
1062             brw->ib.size = bufferobj->Size;
1063             drm_intel_bo_reference(bo);
1064          }
1065       }
1066    }
1067
1068    /* Use 3DPRIMITIVE's start_vertex_offset to avoid re-uploading
1069     * the index buffer state when we're just moving the start index
1070     * of our drawing.
1071     */
1072    brw->ib.start_vertex_offset = offset / ib_type_size;
1073
1074    if (brw->ib.bo != old_bo)
1075       brw->ctx.NewDriverState |= BRW_NEW_INDEX_BUFFER;
1076
1077    if (index_buffer->type != brw->ib.type) {
1078       brw->ib.type = index_buffer->type;
1079       brw->ctx.NewDriverState |= BRW_NEW_INDEX_BUFFER;
1080    }
1081 }
1082
1083 const struct brw_tracked_state brw_indices = {
1084    .dirty = {
1085       .mesa = 0,
1086       .brw = BRW_NEW_BLORP |
1087              BRW_NEW_INDICES,
1088    },
1089    .emit = brw_upload_indices,
1090 };
1091
1092 static void
1093 brw_emit_index_buffer(struct brw_context *brw)
1094 {
1095    const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
1096    GLuint cut_index_setting;
1097
1098    if (index_buffer == NULL)
1099       return;
1100
1101    if (brw->prim_restart.enable_cut_index && !brw->is_haswell) {
1102       cut_index_setting = BRW_CUT_INDEX_ENABLE;
1103    } else {
1104       cut_index_setting = 0;
1105    }
1106
1107    BEGIN_BATCH(3);
1108    OUT_BATCH(CMD_INDEX_BUFFER << 16 |
1109              cut_index_setting |
1110              brw_get_index_type(index_buffer->type) |
1111              1);
1112    OUT_RELOC(brw->ib.bo,
1113              I915_GEM_DOMAIN_VERTEX, 0,
1114              0);
1115    OUT_RELOC(brw->ib.bo,
1116              I915_GEM_DOMAIN_VERTEX, 0,
1117              brw->ib.size - 1);
1118    ADVANCE_BATCH();
1119 }
1120
1121 const struct brw_tracked_state brw_index_buffer = {
1122    .dirty = {
1123       .mesa = 0,
1124       .brw = BRW_NEW_BATCH |
1125              BRW_NEW_BLORP |
1126              BRW_NEW_INDEX_BUFFER,
1127    },
1128    .emit = brw_emit_index_buffer,
1129 };