src/mesa/drivers/dri/i965/brw_draw_upload.c

   1 /*
   2  * Copyright 2003 VMware, Inc.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sublicense, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the
  14  * next paragraph) shall be included in all copies or substantial portions
  15  * of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  18  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  21  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  22  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  23  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24  */
  25
  26 #include "main/glheader.h"
  27 #include "main/bufferobj.h"
  28 #include "main/context.h"
  29 #include "main/enums.h"
  30 #include "main/macros.h"
  31 #include "main/glformats.h"
  32
  33 #include "brw_draw.h"
  34 #include "brw_defines.h"
  35 #include "brw_context.h"
  36 #include "brw_state.h"
  37
  38 #include "intel_batchbuffer.h"
  39 #include "intel_buffer_objects.h"
  40
  41 static const GLuint double_types[5] = {
  42    0,
  43    BRW_SURFACEFORMAT_R64_FLOAT,
  44    BRW_SURFACEFORMAT_R64G64_FLOAT,
  45    BRW_SURFACEFORMAT_R64G64B64_FLOAT,
  46    BRW_SURFACEFORMAT_R64G64B64A64_FLOAT
  47 };
  48
  49 static const GLuint float_types[5] = {
  50    0,
  51    BRW_SURFACEFORMAT_R32_FLOAT,
  52    BRW_SURFACEFORMAT_R32G32_FLOAT,
  53    BRW_SURFACEFORMAT_R32G32B32_FLOAT,
  54    BRW_SURFACEFORMAT_R32G32B32A32_FLOAT
  55 };
  56
  57 static const GLuint half_float_types[5] = {
  58    0,
  59    BRW_SURFACEFORMAT_R16_FLOAT,
  60    BRW_SURFACEFORMAT_R16G16_FLOAT,
  61    BRW_SURFACEFORMAT_R16G16B16A16_FLOAT,
  62    BRW_SURFACEFORMAT_R16G16B16A16_FLOAT
  63 };
  64
  65 static const GLuint fixed_point_types[5] = {
  66    0,
  67    BRW_SURFACEFORMAT_R32_SFIXED,
  68    BRW_SURFACEFORMAT_R32G32_SFIXED,
  69    BRW_SURFACEFORMAT_R32G32B32_SFIXED,
  70    BRW_SURFACEFORMAT_R32G32B32A32_SFIXED,
  71 };
  72
  73 static const GLuint uint_types_direct[5] = {
  74    0,
  75    BRW_SURFACEFORMAT_R32_UINT,
  76    BRW_SURFACEFORMAT_R32G32_UINT,
  77    BRW_SURFACEFORMAT_R32G32B32_UINT,
  78    BRW_SURFACEFORMAT_R32G32B32A32_UINT
  79 };
  80
  81 static const GLuint uint_types_norm[5] = {
  82    0,
  83    BRW_SURFACEFORMAT_R32_UNORM,
  84    BRW_SURFACEFORMAT_R32G32_UNORM,
  85    BRW_SURFACEFORMAT_R32G32B32_UNORM,
  86    BRW_SURFACEFORMAT_R32G32B32A32_UNORM
  87 };
  88
  89 static const GLuint uint_types_scale[5] = {
  90    0,
  91    BRW_SURFACEFORMAT_R32_USCALED,
  92    BRW_SURFACEFORMAT_R32G32_USCALED,
  93    BRW_SURFACEFORMAT_R32G32B32_USCALED,
  94    BRW_SURFACEFORMAT_R32G32B32A32_USCALED
  95 };
  96
  97 static const GLuint int_types_direct[5] = {
  98    0,
  99    BRW_SURFACEFORMAT_R32_SINT,
 100    BRW_SURFACEFORMAT_R32G32_SINT,
 101    BRW_SURFACEFORMAT_R32G32B32_SINT,
 102    BRW_SURFACEFORMAT_R32G32B32A32_SINT
 103 };
 104
 105 static const GLuint int_types_norm[5] = {
 106    0,
 107    BRW_SURFACEFORMAT_R32_SNORM,
 108    BRW_SURFACEFORMAT_R32G32_SNORM,
 109    BRW_SURFACEFORMAT_R32G32B32_SNORM,
 110    BRW_SURFACEFORMAT_R32G32B32A32_SNORM
 111 };
 112
 113 static const GLuint int_types_scale[5] = {
 114    0,
 115    BRW_SURFACEFORMAT_R32_SSCALED,
 116    BRW_SURFACEFORMAT_R32G32_SSCALED,
 117    BRW_SURFACEFORMAT_R32G32B32_SSCALED,
 118    BRW_SURFACEFORMAT_R32G32B32A32_SSCALED
 119 };
 120
 121 static const GLuint ushort_types_direct[5] = {
 122    0,
 123    BRW_SURFACEFORMAT_R16_UINT,
 124    BRW_SURFACEFORMAT_R16G16_UINT,
 125    BRW_SURFACEFORMAT_R16G16B16A16_UINT,
 126    BRW_SURFACEFORMAT_R16G16B16A16_UINT
 127 };
 128
 129 static const GLuint ushort_types_norm[5] = {
 130    0,
 131    BRW_SURFACEFORMAT_R16_UNORM,
 132    BRW_SURFACEFORMAT_R16G16_UNORM,
 133    BRW_SURFACEFORMAT_R16G16B16_UNORM,
 134    BRW_SURFACEFORMAT_R16G16B16A16_UNORM
 135 };
 136
 137 static const GLuint ushort_types_scale[5] = {
 138    0,
 139    BRW_SURFACEFORMAT_R16_USCALED,
 140    BRW_SURFACEFORMAT_R16G16_USCALED,
 141    BRW_SURFACEFORMAT_R16G16B16_USCALED,
 142    BRW_SURFACEFORMAT_R16G16B16A16_USCALED
 143 };
 144
 145 static const GLuint short_types_direct[5] = {
 146    0,
 147    BRW_SURFACEFORMAT_R16_SINT,
 148    BRW_SURFACEFORMAT_R16G16_SINT,
 149    BRW_SURFACEFORMAT_R16G16B16A16_SINT,
 150    BRW_SURFACEFORMAT_R16G16B16A16_SINT
 151 };
 152
 153 static const GLuint short_types_norm[5] = {
 154    0,
 155    BRW_SURFACEFORMAT_R16_SNORM,
 156    BRW_SURFACEFORMAT_R16G16_SNORM,
 157    BRW_SURFACEFORMAT_R16G16B16_SNORM,
 158    BRW_SURFACEFORMAT_R16G16B16A16_SNORM
 159 };
 160
 161 static const GLuint short_types_scale[5] = {
 162    0,
 163    BRW_SURFACEFORMAT_R16_SSCALED,
 164    BRW_SURFACEFORMAT_R16G16_SSCALED,
 165    BRW_SURFACEFORMAT_R16G16B16_SSCALED,
 166    BRW_SURFACEFORMAT_R16G16B16A16_SSCALED
 167 };
 168
 169 static const GLuint ubyte_types_direct[5] = {
 170    0,
 171    BRW_SURFACEFORMAT_R8_UINT,
 172    BRW_SURFACEFORMAT_R8G8_UINT,
 173    BRW_SURFACEFORMAT_R8G8B8A8_UINT,
 174    BRW_SURFACEFORMAT_R8G8B8A8_UINT
 175 };
 176
 177 static const GLuint ubyte_types_norm[5] = {
 178    0,
 179    BRW_SURFACEFORMAT_R8_UNORM,
 180    BRW_SURFACEFORMAT_R8G8_UNORM,
 181    BRW_SURFACEFORMAT_R8G8B8_UNORM,
 182    BRW_SURFACEFORMAT_R8G8B8A8_UNORM
 183 };
 184
 185 static const GLuint ubyte_types_scale[5] = {
 186    0,
 187    BRW_SURFACEFORMAT_R8_USCALED,
 188    BRW_SURFACEFORMAT_R8G8_USCALED,
 189    BRW_SURFACEFORMAT_R8G8B8_USCALED,
 190    BRW_SURFACEFORMAT_R8G8B8A8_USCALED
 191 };
 192
 193 static const GLuint byte_types_direct[5] = {
 194    0,
 195    BRW_SURFACEFORMAT_R8_SINT,
 196    BRW_SURFACEFORMAT_R8G8_SINT,
 197    BRW_SURFACEFORMAT_R8G8B8A8_SINT,
 198    BRW_SURFACEFORMAT_R8G8B8A8_SINT
 199 };
 200
 201 static const GLuint byte_types_norm[5] = {
 202    0,
 203    BRW_SURFACEFORMAT_R8_SNORM,
 204    BRW_SURFACEFORMAT_R8G8_SNORM,
 205    BRW_SURFACEFORMAT_R8G8B8_SNORM,
 206    BRW_SURFACEFORMAT_R8G8B8A8_SNORM
 207 };
 208
 209 static const GLuint byte_types_scale[5] = {
 210    0,
 211    BRW_SURFACEFORMAT_R8_SSCALED,
 212    BRW_SURFACEFORMAT_R8G8_SSCALED,
 213    BRW_SURFACEFORMAT_R8G8B8_SSCALED,
 214    BRW_SURFACEFORMAT_R8G8B8A8_SSCALED
 215 };
 216
 217
 218 /**
 219  * Given vertex array type/size/format/normalized info, return
 220  * the appopriate hardware surface type.
 221  * Format will be GL_RGBA or possibly GL_BGRA for GLubyte[4] color arrays.
 222  */
 223 unsigned
 224 brw_get_vertex_surface_type(struct brw_context *brw,
 225                             const struct gl_client_array *glarray)
 226 {
 227    int size = glarray->Size;
 228
 229    if (unlikely(INTEL_DEBUG & DEBUG_VERTS))
 230       fprintf(stderr, "type %s size %d normalized %d\n",
 231               _mesa_enum_to_string(glarray->Type),
 232               glarray->Size, glarray->Normalized);
 233
 234    if (glarray->Integer) {
 235       assert(glarray->Format == GL_RGBA); /* sanity check */
 236       switch (glarray->Type) {
 237       case GL_INT: return int_types_direct[size];
 238       case GL_SHORT: return short_types_direct[size];
 239       case GL_BYTE: return byte_types_direct[size];
 240       case GL_UNSIGNED_INT: return uint_types_direct[size];
 241       case GL_UNSIGNED_SHORT: return ushort_types_direct[size];
 242       case GL_UNSIGNED_BYTE: return ubyte_types_direct[size];
 243       default: unreachable("not reached");
 244       }
 245    } else if (glarray->Type == GL_UNSIGNED_INT_10F_11F_11F_REV) {
 246       return BRW_SURFACEFORMAT_R11G11B10_FLOAT;
 247    } else if (glarray->Normalized) {
 248       switch (glarray->Type) {
 249       case GL_DOUBLE: return double_types[size];
 250       case GL_FLOAT: return float_types[size];
 251       case GL_HALF_FLOAT: return half_float_types[size];
 252       case GL_INT: return int_types_norm[size];
 253       case GL_SHORT: return short_types_norm[size];
 254       case GL_BYTE: return byte_types_norm[size];
 255       case GL_UNSIGNED_INT: return uint_types_norm[size];
 256       case GL_UNSIGNED_SHORT: return ushort_types_norm[size];
 257       case GL_UNSIGNED_BYTE:
 258          if (glarray->Format == GL_BGRA) {
 259             /* See GL_EXT_vertex_array_bgra */
 260             assert(size == 4);
 261             return BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
 262          }
 263          else {
 264             return ubyte_types_norm[size];
 265          }
 266       case GL_FIXED:
 267          if (brw->gen >= 8 || brw->is_haswell)
 268             return fixed_point_types[size];
 269
 270          /* This produces GL_FIXED inputs as values between INT32_MIN and
 271           * INT32_MAX, which will be scaled down by 1/65536 by the VS.
 272           */
 273          return int_types_scale[size];
 274       /* See GL_ARB_vertex_type_2_10_10_10_rev.
 275        * W/A: Pre-Haswell, the hardware doesn't really support the formats we'd
 276        * like to use here, so upload everything as UINT and fix
 277        * it in the shader
 278        */
 279       case GL_INT_2_10_10_10_REV:
 280          assert(size == 4);
 281          if (brw->gen >= 8 || brw->is_haswell) {
 282             return glarray->Format == GL_BGRA
 283                ? BRW_SURFACEFORMAT_B10G10R10A2_SNORM
 284                : BRW_SURFACEFORMAT_R10G10B10A2_SNORM;
 285          }
 286          return BRW_SURFACEFORMAT_R10G10B10A2_UINT;
 287       case GL_UNSIGNED_INT_2_10_10_10_REV:
 288          assert(size == 4);
 289          if (brw->gen >= 8 || brw->is_haswell) {
 290             return glarray->Format == GL_BGRA
 291                ? BRW_SURFACEFORMAT_B10G10R10A2_UNORM
 292                : BRW_SURFACEFORMAT_R10G10B10A2_UNORM;
 293          }
 294          return BRW_SURFACEFORMAT_R10G10B10A2_UINT;
 295       default: unreachable("not reached");
 296       }
 297    }
 298    else {
 299       /* See GL_ARB_vertex_type_2_10_10_10_rev.
 300        * W/A: the hardware doesn't really support the formats we'd
 301        * like to use here, so upload everything as UINT and fix
 302        * it in the shader
 303        */
 304       if (glarray->Type == GL_INT_2_10_10_10_REV) {
 305          assert(size == 4);
 306          if (brw->gen >= 8 || brw->is_haswell) {
 307             return glarray->Format == GL_BGRA
 308                ? BRW_SURFACEFORMAT_B10G10R10A2_SSCALED
 309                : BRW_SURFACEFORMAT_R10G10B10A2_SSCALED;
 310          }
 311          return BRW_SURFACEFORMAT_R10G10B10A2_UINT;
 312       } else if (glarray->Type == GL_UNSIGNED_INT_2_10_10_10_REV) {
 313          assert(size == 4);
 314          if (brw->gen >= 8 || brw->is_haswell) {
 315             return glarray->Format == GL_BGRA
 316                ? BRW_SURFACEFORMAT_B10G10R10A2_USCALED
 317                : BRW_SURFACEFORMAT_R10G10B10A2_USCALED;
 318          }
 319          return BRW_SURFACEFORMAT_R10G10B10A2_UINT;
 320       }
 321       assert(glarray->Format == GL_RGBA); /* sanity check */
 322       switch (glarray->Type) {
 323       case GL_DOUBLE: return double_types[size];
 324       case GL_FLOAT: return float_types[size];
 325       case GL_HALF_FLOAT: return half_float_types[size];
 326       case GL_INT: return int_types_scale[size];
 327       case GL_SHORT: return short_types_scale[size];
 328       case GL_BYTE: return byte_types_scale[size];
 329       case GL_UNSIGNED_INT: return uint_types_scale[size];
 330       case GL_UNSIGNED_SHORT: return ushort_types_scale[size];
 331       case GL_UNSIGNED_BYTE: return ubyte_types_scale[size];
 332       case GL_FIXED:
 333          if (brw->gen >= 8 || brw->is_haswell)
 334             return fixed_point_types[size];
 335
 336          /* This produces GL_FIXED inputs as values between INT32_MIN and
 337           * INT32_MAX, which will be scaled down by 1/65536 by the VS.
 338           */
 339          return int_types_scale[size];
 340       default: unreachable("not reached");
 341       }
 342    }
 343 }
 344
 345 static void
 346 copy_array_to_vbo_array(struct brw_context *brw,
 347                         struct brw_vertex_element *element,
 348                         int min, int max,
 349                         struct brw_vertex_buffer *buffer,
 350                         GLuint dst_stride)
 351 {
 352    const int src_stride = element->glarray->StrideB;
 353
 354    /* If the source stride is zero, we just want to upload the current
 355     * attribute once and set the buffer's stride to 0.  There's no need
 356     * to replicate it out.
 357     */
 358    if (src_stride == 0) {
 359       intel_upload_data(brw, element->glarray->Ptr,
 360                         element->glarray->_ElementSize,
 361                         element->glarray->_ElementSize,
 362                         &buffer->bo, &buffer->offset);
 363
 364       buffer->stride = 0;
 365       return;
 366    }
 367
 368    const unsigned char *src = element->glarray->Ptr + min * src_stride;
 369    int count = max - min + 1;
 370    GLuint size = count * dst_stride;
 371    uint8_t *dst = intel_upload_space(brw, size, dst_stride,
 372                                      &buffer->bo, &buffer->offset);
 373
 374    if (dst_stride == src_stride) {
 375       memcpy(dst, src, size);
 376    } else {
 377       while (count--) {
 378          memcpy(dst, src, dst_stride);
 379          src += src_stride;
 380          dst += dst_stride;
 381       }
 382    }
 383    buffer->stride = dst_stride;
 384 }
 385
 386 void
 387 brw_prepare_vertices(struct brw_context *brw)
 388 {
 389    struct gl_context *ctx = &brw->ctx;
 390    /* BRW_NEW_VS_PROG_DATA */
 391    GLbitfield64 vs_inputs = brw->vs.prog_data->inputs_read;
 392    const unsigned char *ptr = NULL;
 393    GLuint interleaved = 0;
 394    unsigned int min_index = brw->vb.min_index + brw->basevertex;
 395    unsigned int max_index = brw->vb.max_index + brw->basevertex;
 396    unsigned i;
 397    int delta, j;
 398
 399    struct brw_vertex_element *upload[VERT_ATTRIB_MAX];
 400    GLuint nr_uploads = 0;
 401
 402    /* _NEW_POLYGON
 403     *
 404     * On gen6+, edge flags don't end up in the VUE (either in or out of the
 405     * VS).  Instead, they're uploaded as the last vertex element, and the data
 406     * is passed sideband through the fixed function units.  So, we need to
 407     * prepare the vertex buffer for it, but it's not present in inputs_read.
 408     */
 409    if (brw->gen >= 6 && (ctx->Polygon.FrontMode != GL_FILL ||
 410                            ctx->Polygon.BackMode != GL_FILL)) {
 411       vs_inputs |= VERT_BIT_EDGEFLAG;
 412    }
 413
 414    if (0)
 415       fprintf(stderr, "%s %d..%d\n", __func__, min_index, max_index);
 416
 417    /* Accumulate the list of enabled arrays. */
 418    brw->vb.nr_enabled = 0;
 419    while (vs_inputs) {
 420       GLuint index = ffsll(vs_inputs) - 1;
 421       struct brw_vertex_element *input = &brw->vb.inputs[index];
 422
 423       vs_inputs &= ~BITFIELD64_BIT(index);
 424       brw->vb.enabled[brw->vb.nr_enabled++] = input;
 425    }
 426
 427    if (brw->vb.nr_enabled == 0)
 428       return;
 429
 430    if (brw->vb.nr_buffers)
 431       return;
 432
 433    for (i = j = 0; i < brw->vb.nr_enabled; i++) {
 434       struct brw_vertex_element *input = brw->vb.enabled[i];
 435       const struct gl_client_array *glarray = input->glarray;
 436
 437       if (_mesa_is_bufferobj(glarray->BufferObj)) {
 438          struct intel_buffer_object *intel_buffer =
 439             intel_buffer_object(glarray->BufferObj);
 440          unsigned k;
 441
 442          /* If we have a VB set to be uploaded for this buffer object
 443           * already, reuse that VB state so that we emit fewer
 444           * relocations.
 445           */
 446          for (k = 0; k < i; k++) {
 447             const struct gl_client_array *other = brw->vb.enabled[k]->glarray;
 448             if (glarray->BufferObj == other->BufferObj &&
 449                 glarray->StrideB == other->StrideB &&
 450                 glarray->InstanceDivisor == other->InstanceDivisor &&
 451                 (uintptr_t)(glarray->Ptr - other->Ptr) < glarray->StrideB)
 452             {
 453                input->buffer = brw->vb.enabled[k]->buffer;
 454                input->offset = glarray->Ptr - other->Ptr;
 455                break;
 456             }
 457          }
 458          if (k == i) {
 459             struct brw_vertex_buffer *buffer = &brw->vb.buffers[j];
 460
 461             /* Named buffer object: Just reference its contents directly. */
 462             buffer->offset = (uintptr_t)glarray->Ptr;
 463             buffer->stride = glarray->StrideB;
 464             buffer->step_rate = glarray->InstanceDivisor;
 465
 466             uint32_t offset, size;
 467             if (glarray->InstanceDivisor) {
 468                offset = buffer->offset;
 469                size = (buffer->stride * ((brw->num_instances /
 470                                           glarray->InstanceDivisor) - 1) +
 471                        glarray->_ElementSize);
 472             } else {
 473                if (min_index == -1) {
 474                   offset = 0;
 475                   size = intel_buffer->Base.Size;
 476                } else {
 477                   offset = buffer->offset + min_index * buffer->stride;
 478                   size = (buffer->stride * (max_index - min_index) +
 479                           glarray->_ElementSize);
 480                }
 481             }
 482             buffer->bo = intel_bufferobj_buffer(brw, intel_buffer,
 483                                                 offset, size);
 484             drm_intel_bo_reference(buffer->bo);
 485
 486             input->buffer = j++;
 487             input->offset = 0;
 488          }
 489
 490          /* This is a common place to reach if the user mistakenly supplies
 491           * a pointer in place of a VBO offset.  If we just let it go through,
 492           * we may end up dereferencing a pointer beyond the bounds of the
 493           * GTT.
 494           *
 495           * The VBO spec allows application termination in this case, and it's
 496           * probably a service to the poor programmer to do so rather than
 497           * trying to just not render.
 498           */
 499          assert(input->offset < brw->vb.buffers[input->buffer].bo->size);
 500       } else {
 501          /* Queue the buffer object up to be uploaded in the next pass,
 502           * when we've decided if we're doing interleaved or not.
 503           */
 504          if (nr_uploads == 0) {
 505             interleaved = glarray->StrideB;
 506             ptr = glarray->Ptr;
 507          }
 508          else if (interleaved != glarray->StrideB ||
 509                   glarray->Ptr < ptr ||
 510                   (uintptr_t)(glarray->Ptr - ptr) + glarray->_ElementSize > interleaved)
 511          {
 512             /* If our stride is different from the first attribute's stride,
 513              * or if the first attribute's stride didn't cover our element,
 514              * disable the interleaved upload optimization.  The second case
 515              * can most commonly occur in cases where there is a single vertex
 516              * and, for example, the data is stored on the application's
 517              * stack.
 518              *
 519              * NOTE: This will also disable the optimization in cases where
 520              * the data is in a different order than the array indices.
 521              * Something like:
 522              *
 523              *     float data[...];
 524              *     glVertexAttribPointer(0, 4, GL_FLOAT, 32, &data[4]);
 525              *     glVertexAttribPointer(1, 4, GL_FLOAT, 32, &data[0]);
 526              */
 527             interleaved = 0;
 528          }
 529
 530          upload[nr_uploads++] = input;
 531       }
 532    }
 533
 534    /* If we need to upload all the arrays, then we can trim those arrays to
 535     * only the used elements [min_index, max_index] so long as we adjust all
 536     * the values used in the 3DPRIMITIVE i.e. by setting the vertex bias.
 537     */
 538    brw->vb.start_vertex_bias = 0;
 539    delta = min_index;
 540    if (nr_uploads == brw->vb.nr_enabled) {
 541       brw->vb.start_vertex_bias = -delta;
 542       delta = 0;
 543    }
 544
 545    /* Handle any arrays to be uploaded. */
 546    if (nr_uploads > 1) {
 547       if (interleaved) {
 548          struct brw_vertex_buffer *buffer = &brw->vb.buffers[j];
 549          /* All uploads are interleaved, so upload the arrays together as
 550           * interleaved.  First, upload the contents and set up upload[0].
 551           */
 552          copy_array_to_vbo_array(brw, upload[0], min_index, max_index,
 553                                  buffer, interleaved);
 554          buffer->offset -= delta * interleaved;
 555
 556          for (i = 0; i < nr_uploads; i++) {
 557             /* Then, just point upload[i] at upload[0]'s buffer. */
 558             upload[i]->offset =
 559                ((const unsigned char *)upload[i]->glarray->Ptr - ptr);
 560             upload[i]->buffer = j;
 561          }
 562          j++;
 563
 564          nr_uploads = 0;
 565       }
 566    }
 567    /* Upload non-interleaved arrays */
 568    for (i = 0; i < nr_uploads; i++) {
 569       struct brw_vertex_buffer *buffer = &brw->vb.buffers[j];
 570       if (upload[i]->glarray->InstanceDivisor == 0) {
 571          copy_array_to_vbo_array(brw, upload[i], min_index, max_index,
 572                                  buffer, upload[i]->glarray->_ElementSize);
 573       } else {
 574          /* This is an instanced attribute, since its InstanceDivisor
 575           * is not zero. Therefore, its data will be stepped after the
 576           * instanced draw has been run InstanceDivisor times.
 577           */
 578          uint32_t instanced_attr_max_index =
 579             (brw->num_instances - 1) / upload[i]->glarray->InstanceDivisor;
 580          copy_array_to_vbo_array(brw, upload[i], 0, instanced_attr_max_index,
 581                                  buffer, upload[i]->glarray->_ElementSize);
 582       }
 583       buffer->offset -= delta * buffer->stride;
 584       buffer->step_rate = upload[i]->glarray->InstanceDivisor;
 585       upload[i]->buffer = j++;
 586       upload[i]->offset = 0;
 587    }
 588
 589    brw->vb.nr_buffers = j;
 590 }
 591
 592 void
 593 brw_prepare_shader_draw_parameters(struct brw_context *brw)
 594 {
 595    /* For non-indirect draws, upload gl_BaseVertex. */
 596    if (brw->vs.prog_data->uses_vertexid && brw->draw.draw_params_bo == NULL) {
 597       intel_upload_data(brw, &brw->draw.gl_basevertex, 4, 4,
 598                         &brw->draw.draw_params_bo,
 599                         &brw->draw.draw_params_offset);
 600    }
 601 }
 602
 603 /**
 604  * Emit a VERTEX_BUFFER_STATE entry (part of 3DSTATE_VERTEX_BUFFERS).
 605  */
 606 static uint32_t *
 607 emit_vertex_buffer_state(struct brw_context *brw,
 608                          unsigned buffer_nr,
 609                          drm_intel_bo *bo,
 610                          unsigned bo_ending_address,
 611                          unsigned bo_offset,
 612                          unsigned stride,
 613                          unsigned step_rate,
 614                          uint32_t *__map)
 615 {
 616    struct gl_context *ctx = &brw->ctx;
 617    uint32_t dw0;
 618
 619    if (brw->gen >= 6) {
 620       dw0 = (buffer_nr << GEN6_VB0_INDEX_SHIFT) |
 621             (step_rate ? GEN6_VB0_ACCESS_INSTANCEDATA
 622                        : GEN6_VB0_ACCESS_VERTEXDATA);
 623    } else {
 624       dw0 = (buffer_nr << BRW_VB0_INDEX_SHIFT) |
 625             (step_rate ? BRW_VB0_ACCESS_INSTANCEDATA
 626                        : BRW_VB0_ACCESS_VERTEXDATA);
 627    }
 628
 629    if (brw->gen >= 7)
 630       dw0 |= GEN7_VB0_ADDRESS_MODIFYENABLE;
 631
 632    if (brw->gen == 7)
 633       dw0 |= GEN7_MOCS_L3 << 16;
 634
 635    WARN_ONCE(stride >= (brw->gen >= 5 ? 2048 : 2047),
 636              "VBO stride %d too large, bad rendering may occur\n",
 637              stride);
 638    OUT_BATCH(dw0 | (stride << BRW_VB0_PITCH_SHIFT));
 639    OUT_RELOC(bo, I915_GEM_DOMAIN_VERTEX, 0, bo_offset);
 640    if (brw->gen >= 5) {
 641       OUT_RELOC(bo, I915_GEM_DOMAIN_VERTEX, 0, bo_ending_address);
 642    } else {
 643       OUT_BATCH(0);
 644    }
 645    OUT_BATCH(step_rate);
 646
 647    return __map;
 648 }
 649 #define EMIT_VERTEX_BUFFER_STATE(...) __map = emit_vertex_buffer_state(__VA_ARGS__, __map)
 650
 651 static void
 652 brw_emit_vertices(struct brw_context *brw)
 653 {
 654    GLuint i;
 655
 656    brw_prepare_vertices(brw);
 657    brw_prepare_shader_draw_parameters(brw);
 658
 659    brw_emit_query_begin(brw);
 660
 661    unsigned nr_elements = brw->vb.nr_enabled;
 662    if (brw->vs.prog_data->uses_vertexid || brw->vs.prog_data->uses_instanceid)
 663       ++nr_elements;
 664
 665    /* If the VS doesn't read any inputs (calculating vertex position from
 666     * a state variable for some reason, for example), emit a single pad
 667     * VERTEX_ELEMENT struct and bail.
 668     *
 669     * The stale VB state stays in place, but they don't do anything unless
 670     * a VE loads from them.
 671     */
 672    if (nr_elements == 0) {
 673       BEGIN_BATCH(3);
 674       OUT_BATCH((_3DSTATE_VERTEX_ELEMENTS << 16) | 1);
 675       if (brw->gen >= 6) {
 676          OUT_BATCH((0 << GEN6_VE0_INDEX_SHIFT) |
 677                    GEN6_VE0_VALID |
 678                    (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_VE0_FORMAT_SHIFT) |
 679                    (0 << BRW_VE0_SRC_OFFSET_SHIFT));
 680       } else {
 681          OUT_BATCH((0 << BRW_VE0_INDEX_SHIFT) |
 682                    BRW_VE0_VALID |
 683                    (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_VE0_FORMAT_SHIFT) |
 684                    (0 << BRW_VE0_SRC_OFFSET_SHIFT));
 685       }
 686       OUT_BATCH((BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_0_SHIFT) |
 687                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT) |
 688                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) |
 689                 (BRW_VE1_COMPONENT_STORE_1_FLT << BRW_VE1_COMPONENT_3_SHIFT));
 690       ADVANCE_BATCH();
 691       return;
 692    }
 693
 694    /* Now emit VB and VEP state packets.
 695     */
 696
 697    unsigned nr_buffers =
 698       brw->vb.nr_buffers + brw->vs.prog_data->uses_vertexid;
 699
 700    if (nr_buffers) {
 701       if (brw->gen >= 6) {
 702          assert(nr_buffers <= 33);
 703       } else {
 704          assert(nr_buffers <= 17);
 705       }
 706
 707       BEGIN_BATCH(1 + 4 * nr_buffers);
 708       OUT_BATCH((_3DSTATE_VERTEX_BUFFERS << 16) | (4 * nr_buffers - 1));
 709       for (i = 0; i < brw->vb.nr_buffers; i++) {
 710          struct brw_vertex_buffer *buffer = &brw->vb.buffers[i];
 711          EMIT_VERTEX_BUFFER_STATE(brw, i, buffer->bo, buffer->bo->size - 1,
 712                                   buffer->offset, buffer->stride,
 713                                   buffer->step_rate);
 714
 715       }
 716
 717       if (brw->vs.prog_data->uses_vertexid) {
 718          EMIT_VERTEX_BUFFER_STATE(brw, brw->vb.nr_buffers,
 719                                   brw->draw.draw_params_bo,
 720                                   brw->draw.draw_params_bo->size - 1,
 721                                   brw->draw.draw_params_offset,
 722                                   0,  /* stride */
 723                                   0); /* step rate */
 724       }
 725       ADVANCE_BATCH();
 726    }
 727
 728    /* The hardware allows one more VERTEX_ELEMENTS than VERTEX_BUFFERS, presumably
 729     * for VertexID/InstanceID.
 730     */
 731    if (brw->gen >= 6) {
 732       assert(nr_elements <= 34);
 733    } else {
 734       assert(nr_elements <= 18);
 735    }
 736
 737    struct brw_vertex_element *gen6_edgeflag_input = NULL;
 738
 739    BEGIN_BATCH(1 + nr_elements * 2);
 740    OUT_BATCH((_3DSTATE_VERTEX_ELEMENTS << 16) | (2 * nr_elements - 1));
 741    for (i = 0; i < brw->vb.nr_enabled; i++) {
 742       struct brw_vertex_element *input = brw->vb.enabled[i];
 743       uint32_t format = brw_get_vertex_surface_type(brw, input->glarray);
 744       uint32_t comp0 = BRW_VE1_COMPONENT_STORE_SRC;
 745       uint32_t comp1 = BRW_VE1_COMPONENT_STORE_SRC;
 746       uint32_t comp2 = BRW_VE1_COMPONENT_STORE_SRC;
 747       uint32_t comp3 = BRW_VE1_COMPONENT_STORE_SRC;
 748
 749       if (input == &brw->vb.inputs[VERT_ATTRIB_EDGEFLAG]) {
 750          /* Gen6+ passes edgeflag as sideband along with the vertex, instead
 751           * of in the VUE.  We have to upload it sideband as the last vertex
 752           * element according to the B-Spec.
 753           */
 754          if (brw->gen >= 6) {
 755             gen6_edgeflag_input = input;
 756             continue;
 757          }
 758       }
 759
 760       switch (input->glarray->Size) {
 761       case 0: comp0 = BRW_VE1_COMPONENT_STORE_0;
 762       case 1: comp1 = BRW_VE1_COMPONENT_STORE_0;
 763       case 2: comp2 = BRW_VE1_COMPONENT_STORE_0;
 764       case 3: comp3 = input->glarray->Integer ? BRW_VE1_COMPONENT_STORE_1_INT
 765                                               : BRW_VE1_COMPONENT_STORE_1_FLT;
 766          break;
 767       }
 768
 769       if (brw->gen >= 6) {
 770          OUT_BATCH((input->buffer << GEN6_VE0_INDEX_SHIFT) |
 771                    GEN6_VE0_VALID |
 772                    (format << BRW_VE0_FORMAT_SHIFT) |
 773                    (input->offset << BRW_VE0_SRC_OFFSET_SHIFT));
 774       } else {
 775          OUT_BATCH((input->buffer << BRW_VE0_INDEX_SHIFT) |
 776                    BRW_VE0_VALID |
 777                    (format << BRW_VE0_FORMAT_SHIFT) |
 778                    (input->offset << BRW_VE0_SRC_OFFSET_SHIFT));
 779       }
 780
 781       if (brw->gen >= 5)
 782           OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
 783                     (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
 784                     (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
 785                     (comp3 << BRW_VE1_COMPONENT_3_SHIFT));
 786       else
 787           OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
 788                     (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
 789                     (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
 790                     (comp3 << BRW_VE1_COMPONENT_3_SHIFT) |
 791                     ((i * 4) << BRW_VE1_DST_OFFSET_SHIFT));
 792    }
 793
 794    if (brw->vs.prog_data->uses_vertexid || brw->vs.prog_data->uses_instanceid) {
 795       uint32_t dw0 = 0, dw1 = 0;
 796       uint32_t comp0 = BRW_VE1_COMPONENT_STORE_0;
 797       uint32_t comp1 = BRW_VE1_COMPONENT_STORE_0;
 798       uint32_t comp2 = BRW_VE1_COMPONENT_STORE_0;
 799       uint32_t comp3 = BRW_VE1_COMPONENT_STORE_0;
 800
 801       if (brw->vs.prog_data->uses_vertexid) {
 802          comp0 = BRW_VE1_COMPONENT_STORE_SRC;
 803          comp2 = BRW_VE1_COMPONENT_STORE_VID;
 804       }
 805
 806       if (brw->vs.prog_data->uses_instanceid) {
 807          comp3 = BRW_VE1_COMPONENT_STORE_IID;
 808       }
 809
 810       dw1 = (comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
 811             (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
 812             (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
 813             (comp3 << BRW_VE1_COMPONENT_3_SHIFT);
 814
 815       if (brw->gen >= 6) {
 816          dw0 |= GEN6_VE0_VALID |
 817                 brw->vb.nr_buffers << GEN6_VE0_INDEX_SHIFT |
 818                 BRW_SURFACEFORMAT_R32_UINT << BRW_VE0_FORMAT_SHIFT;
 819       } else {
 820          dw0 |= BRW_VE0_VALID |
 821                 brw->vb.nr_buffers << BRW_VE0_INDEX_SHIFT |
 822                 BRW_SURFACEFORMAT_R32_UINT << BRW_VE0_FORMAT_SHIFT;
 823          dw1 |= (i * 4) << BRW_VE1_DST_OFFSET_SHIFT;
 824       }
 825
 826       /* Note that for gl_VertexID, gl_InstanceID, and gl_PrimitiveID values,
 827        * the format is ignored and the value is always int.
 828        */
 829
 830       OUT_BATCH(dw0);
 831       OUT_BATCH(dw1);
 832    }
 833
 834    if (brw->gen >= 6 && gen6_edgeflag_input) {
 835       uint32_t format =
 836          brw_get_vertex_surface_type(brw, gen6_edgeflag_input->glarray);
 837
 838       OUT_BATCH((gen6_edgeflag_input->buffer << GEN6_VE0_INDEX_SHIFT) |
 839                 GEN6_VE0_VALID |
 840                 GEN6_VE0_EDGE_FLAG_ENABLE |
 841                 (format << BRW_VE0_FORMAT_SHIFT) |
 842                 (gen6_edgeflag_input->offset << BRW_VE0_SRC_OFFSET_SHIFT));
 843       OUT_BATCH((BRW_VE1_COMPONENT_STORE_SRC << BRW_VE1_COMPONENT_0_SHIFT) |
 844                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT) |
 845                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) |
 846                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_3_SHIFT));
 847    }
 848
 849    ADVANCE_BATCH();
 850 }
 851
 852 const struct brw_tracked_state brw_vertices = {
 853    .dirty = {
 854       .mesa = _NEW_POLYGON,
 855       .brw = BRW_NEW_BATCH |
 856              BRW_NEW_VERTICES |
 857              BRW_NEW_VS_PROG_DATA,
 858    },
 859    .emit = brw_emit_vertices,
 860 };
 861
 862 static void
 863 brw_upload_indices(struct brw_context *brw)
 864 {
 865    struct gl_context *ctx = &brw->ctx;
 866    const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
 867    GLuint ib_size;
 868    drm_intel_bo *old_bo = brw->ib.bo;
 869    struct gl_buffer_object *bufferobj;
 870    GLuint offset;
 871    GLuint ib_type_size;
 872
 873    if (index_buffer == NULL)
 874       return;
 875
 876    ib_type_size = _mesa_sizeof_type(index_buffer->type);
 877    ib_size = ib_type_size * index_buffer->count;
 878    bufferobj = index_buffer->obj;
 879
 880    /* Turn into a proper VBO:
 881     */
 882    if (!_mesa_is_bufferobj(bufferobj)) {
 883       /* Get new bufferobj, offset:
 884        */
 885       intel_upload_data(brw, index_buffer->ptr, ib_size, ib_type_size,
 886                         &brw->ib.bo, &offset);
 887    } else {
 888       offset = (GLuint) (unsigned long) index_buffer->ptr;
 889
 890       /* If the index buffer isn't aligned to its element size, we have to
 891        * rebase it into a temporary.
 892        */
 893       if ((ib_type_size - 1) & offset) {
 894          perf_debug("copying index buffer to a temporary to work around "
 895                     "misaligned offset %d\n", offset);
 896
 897          GLubyte *map = ctx->Driver.MapBufferRange(ctx,
 898                                                    offset,
 899                                                    ib_size,
 900                                                    GL_MAP_READ_BIT,
 901                                                    bufferobj,
 902                                                    MAP_INTERNAL);
 903
 904          intel_upload_data(brw, map, ib_size, ib_type_size,
 905                            &brw->ib.bo, &offset);
 906
 907          ctx->Driver.UnmapBuffer(ctx, bufferobj, MAP_INTERNAL);
 908       } else {
 909          drm_intel_bo *bo =
 910             intel_bufferobj_buffer(brw, intel_buffer_object(bufferobj),
 911                                    offset, ib_size);
 912          if (bo != brw->ib.bo) {
 913             drm_intel_bo_unreference(brw->ib.bo);
 914             brw->ib.bo = bo;
 915             drm_intel_bo_reference(bo);
 916          }
 917       }
 918    }
 919
 920    /* Use 3DPRIMITIVE's start_vertex_offset to avoid re-uploading
 921     * the index buffer state when we're just moving the start index
 922     * of our drawing.
 923     */
 924    brw->ib.start_vertex_offset = offset / ib_type_size;
 925
 926    if (brw->ib.bo != old_bo)
 927       brw->ctx.NewDriverState |= BRW_NEW_INDEX_BUFFER;
 928
 929    if (index_buffer->type != brw->ib.type) {
 930       brw->ib.type = index_buffer->type;
 931       brw->ctx.NewDriverState |= BRW_NEW_INDEX_BUFFER;
 932    }
 933 }
 934
 935 const struct brw_tracked_state brw_indices = {
 936    .dirty = {
 937       .mesa = 0,
 938       .brw = BRW_NEW_INDICES,
 939    },
 940    .emit = brw_upload_indices,
 941 };
 942
 943 static void
 944 brw_emit_index_buffer(struct brw_context *brw)
 945 {
 946    const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
 947    GLuint cut_index_setting;
 948
 949    if (index_buffer == NULL)
 950       return;
 951
 952    if (brw->prim_restart.enable_cut_index && !brw->is_haswell) {
 953       cut_index_setting = BRW_CUT_INDEX_ENABLE;
 954    } else {
 955       cut_index_setting = 0;
 956    }
 957
 958    BEGIN_BATCH(3);
 959    OUT_BATCH(CMD_INDEX_BUFFER << 16 |
 960              cut_index_setting |
 961              brw_get_index_type(index_buffer->type) |
 962              1);
 963    OUT_RELOC(brw->ib.bo,
 964              I915_GEM_DOMAIN_VERTEX, 0,
 965              0);
 966    OUT_RELOC(brw->ib.bo,
 967              I915_GEM_DOMAIN_VERTEX, 0,
 968              brw->ib.bo->size - 1);
 969    ADVANCE_BATCH();
 970 }
 971
 972 const struct brw_tracked_state brw_index_buffer = {
 973    .dirty = {
 974       .mesa = 0,
 975       .brw = BRW_NEW_BATCH |
 976              BRW_NEW_INDEX_BUFFER,
 977    },
 978    .emit = brw_emit_index_buffer,
 979 };