src/mesa/drivers/dri/i965/brw_draw_upload.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "main/glheader.h"
  30 #include "main/bufferobj.h"
  31 #include "main/context.h"
  32 #include "main/state.h"
  33 #include "main/api_validate.h"
  34 #include "main/enums.h"
  35
  36 #include "brw_draw.h"
  37 #include "brw_defines.h"
  38 #include "brw_context.h"
  39 #include "brw_state.h"
  40 #include "brw_fallback.h"
  41
  42 #include "intel_batchbuffer.h"
  43 #include "intel_buffer_objects.h"
  44 #include "intel_tex.h"
  45
  46 static GLuint double_types[5] = {
  47    0,
  48    BRW_SURFACEFORMAT_R64_FLOAT,
  49    BRW_SURFACEFORMAT_R64G64_FLOAT,
  50    BRW_SURFACEFORMAT_R64G64B64_FLOAT,
  51    BRW_SURFACEFORMAT_R64G64B64A64_FLOAT
  52 };
  53
  54 static GLuint float_types[5] = {
  55    0,
  56    BRW_SURFACEFORMAT_R32_FLOAT,
  57    BRW_SURFACEFORMAT_R32G32_FLOAT,
  58    BRW_SURFACEFORMAT_R32G32B32_FLOAT,
  59    BRW_SURFACEFORMAT_R32G32B32A32_FLOAT
  60 };
  61
  62 static GLuint uint_types_norm[5] = {
  63    0,
  64    BRW_SURFACEFORMAT_R32_UNORM,
  65    BRW_SURFACEFORMAT_R32G32_UNORM,
  66    BRW_SURFACEFORMAT_R32G32B32_UNORM,
  67    BRW_SURFACEFORMAT_R32G32B32A32_UNORM
  68 };
  69
  70 static GLuint uint_types_scale[5] = {
  71    0,
  72    BRW_SURFACEFORMAT_R32_USCALED,
  73    BRW_SURFACEFORMAT_R32G32_USCALED,
  74    BRW_SURFACEFORMAT_R32G32B32_USCALED,
  75    BRW_SURFACEFORMAT_R32G32B32A32_USCALED
  76 };
  77
  78 static GLuint int_types_norm[5] = {
  79    0,
  80    BRW_SURFACEFORMAT_R32_SNORM,
  81    BRW_SURFACEFORMAT_R32G32_SNORM,
  82    BRW_SURFACEFORMAT_R32G32B32_SNORM,
  83    BRW_SURFACEFORMAT_R32G32B32A32_SNORM
  84 };
  85
  86 static GLuint int_types_scale[5] = {
  87    0,
  88    BRW_SURFACEFORMAT_R32_SSCALED,
  89    BRW_SURFACEFORMAT_R32G32_SSCALED,
  90    BRW_SURFACEFORMAT_R32G32B32_SSCALED,
  91    BRW_SURFACEFORMAT_R32G32B32A32_SSCALED
  92 };
  93
  94 static GLuint ushort_types_norm[5] = {
  95    0,
  96    BRW_SURFACEFORMAT_R16_UNORM,
  97    BRW_SURFACEFORMAT_R16G16_UNORM,
  98    BRW_SURFACEFORMAT_R16G16B16_UNORM,
  99    BRW_SURFACEFORMAT_R16G16B16A16_UNORM
 100 };
 101
 102 static GLuint ushort_types_scale[5] = {
 103    0,
 104    BRW_SURFACEFORMAT_R16_USCALED,
 105    BRW_SURFACEFORMAT_R16G16_USCALED,
 106    BRW_SURFACEFORMAT_R16G16B16_USCALED,
 107    BRW_SURFACEFORMAT_R16G16B16A16_USCALED
 108 };
 109
 110 static GLuint short_types_norm[5] = {
 111    0,
 112    BRW_SURFACEFORMAT_R16_SNORM,
 113    BRW_SURFACEFORMAT_R16G16_SNORM,
 114    BRW_SURFACEFORMAT_R16G16B16_SNORM,
 115    BRW_SURFACEFORMAT_R16G16B16A16_SNORM
 116 };
 117
 118 static GLuint short_types_scale[5] = {
 119    0,
 120    BRW_SURFACEFORMAT_R16_SSCALED,
 121    BRW_SURFACEFORMAT_R16G16_SSCALED,
 122    BRW_SURFACEFORMAT_R16G16B16_SSCALED,
 123    BRW_SURFACEFORMAT_R16G16B16A16_SSCALED
 124 };
 125
 126 static GLuint ubyte_types_norm[5] = {
 127    0,
 128    BRW_SURFACEFORMAT_R8_UNORM,
 129    BRW_SURFACEFORMAT_R8G8_UNORM,
 130    BRW_SURFACEFORMAT_R8G8B8_UNORM,
 131    BRW_SURFACEFORMAT_R8G8B8A8_UNORM
 132 };
 133
 134 static GLuint ubyte_types_scale[5] = {
 135    0,
 136    BRW_SURFACEFORMAT_R8_USCALED,
 137    BRW_SURFACEFORMAT_R8G8_USCALED,
 138    BRW_SURFACEFORMAT_R8G8B8_USCALED,
 139    BRW_SURFACEFORMAT_R8G8B8A8_USCALED
 140 };
 141
 142 static GLuint byte_types_norm[5] = {
 143    0,
 144    BRW_SURFACEFORMAT_R8_SNORM,
 145    BRW_SURFACEFORMAT_R8G8_SNORM,
 146    BRW_SURFACEFORMAT_R8G8B8_SNORM,
 147    BRW_SURFACEFORMAT_R8G8B8A8_SNORM
 148 };
 149
 150 static GLuint byte_types_scale[5] = {
 151    0,
 152    BRW_SURFACEFORMAT_R8_SSCALED,
 153    BRW_SURFACEFORMAT_R8G8_SSCALED,
 154    BRW_SURFACEFORMAT_R8G8B8_SSCALED,
 155    BRW_SURFACEFORMAT_R8G8B8A8_SSCALED
 156 };
 157
 158
 159 /**
 160  * Given vertex array type/size/format/normalized info, return
 161  * the appopriate hardware surface type.
 162  * Format will be GL_RGBA or possibly GL_BGRA for GLubyte[4] color arrays.
 163  */
 164 static GLuint get_surface_type( GLenum type, GLuint size,
 165                                 GLenum format, GLboolean normalized )
 166 {
 167    if (INTEL_DEBUG & DEBUG_VERTS)
 168       _mesa_printf("type %s size %d normalized %d\n",
 169                    _mesa_lookup_enum_by_nr(type), size, normalized);
 170
 171    if (normalized) {
 172       switch (type) {
 173       case GL_DOUBLE: return double_types[size];
 174       case GL_FLOAT: return float_types[size];
 175       case GL_INT: return int_types_norm[size];
 176       case GL_SHORT: return short_types_norm[size];
 177       case GL_BYTE: return byte_types_norm[size];
 178       case GL_UNSIGNED_INT: return uint_types_norm[size];
 179       case GL_UNSIGNED_SHORT: return ushort_types_norm[size];
 180       case GL_UNSIGNED_BYTE:
 181          if (format == GL_BGRA) {
 182             /* See GL_EXT_vertex_array_bgra */
 183             assert(size == 4);
 184             return BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
 185          }
 186          else {
 187             return ubyte_types_norm[size];
 188          }
 189       default: assert(0); return 0;
 190       }
 191    }
 192    else {
 193       assert(format == GL_RGBA); /* sanity check */
 194       switch (type) {
 195       case GL_DOUBLE: return double_types[size];
 196       case GL_FLOAT: return float_types[size];
 197       case GL_INT: return int_types_scale[size];
 198       case GL_SHORT: return short_types_scale[size];
 199       case GL_BYTE: return byte_types_scale[size];
 200       case GL_UNSIGNED_INT: return uint_types_scale[size];
 201       case GL_UNSIGNED_SHORT: return ushort_types_scale[size];
 202       case GL_UNSIGNED_BYTE: return ubyte_types_scale[size];
 203       default: assert(0); return 0;
 204       }
 205    }
 206 }
 207
 208
 209 static GLuint get_size( GLenum type )
 210 {
 211    switch (type) {
 212    case GL_DOUBLE: return sizeof(GLdouble);
 213    case GL_FLOAT: return sizeof(GLfloat);
 214    case GL_INT: return sizeof(GLint);
 215    case GL_SHORT: return sizeof(GLshort);
 216    case GL_BYTE: return sizeof(GLbyte);
 217    case GL_UNSIGNED_INT: return sizeof(GLuint);
 218    case GL_UNSIGNED_SHORT: return sizeof(GLushort);
 219    case GL_UNSIGNED_BYTE: return sizeof(GLubyte);
 220    default: return 0;
 221    }
 222 }
 223
 224 static GLuint get_index_type(GLenum type)
 225 {
 226    switch (type) {
 227    case GL_UNSIGNED_BYTE:  return BRW_INDEX_BYTE;
 228    case GL_UNSIGNED_SHORT: return BRW_INDEX_WORD;
 229    case GL_UNSIGNED_INT:   return BRW_INDEX_DWORD;
 230    default: assert(0); return 0;
 231    }
 232 }
 233
 234 static void wrap_buffers( struct brw_context *brw,
 235                           GLuint size )
 236 {
 237    if (size < BRW_UPLOAD_INIT_SIZE)
 238       size = BRW_UPLOAD_INIT_SIZE;
 239
 240    brw->vb.upload.offset = 0;
 241
 242    if (brw->vb.upload.bo != NULL)
 243       dri_bo_unreference(brw->vb.upload.bo);
 244    brw->vb.upload.bo = dri_bo_alloc(brw->intel.bufmgr, "temporary VBO",
 245                                     size, 1);
 246
 247    /* Set the internal VBO\ to no-backing-store.  We only use them as a
 248     * temporary within a brw_try_draw_prims while the lock is held.
 249     */
 250    /* DON'T DO THIS AS IF WE HAVE TO RE-ORG MEMORY WE NEED SOMEWHERE WITH
 251       FAKE TO PUSH THIS STUFF */
 252 //   if (!brw->intel.ttm)
 253 //      dri_bo_fake_disable_backing_store(brw->vb.upload.bo, NULL, NULL);
 254 }
 255
 256 static void get_space( struct brw_context *brw,
 257                        GLuint size,
 258                        dri_bo **bo_return,
 259                        GLuint *offset_return )
 260 {
 261    size = ALIGN(size, 64);
 262
 263    if (brw->vb.upload.bo == NULL ||
 264        brw->vb.upload.offset + size > brw->vb.upload.bo->size) {
 265       wrap_buffers(brw, size);
 266    }
 267
 268    assert(*bo_return == NULL);
 269    dri_bo_reference(brw->vb.upload.bo);
 270    *bo_return = brw->vb.upload.bo;
 271    *offset_return = brw->vb.upload.offset;
 272    brw->vb.upload.offset += size;
 273 }
 274
 275 static void
 276 copy_array_to_vbo_array( struct brw_context *brw,
 277                          struct brw_vertex_element *element,
 278                          GLuint dst_stride)
 279 {
 280    struct intel_context *intel = &brw->intel;
 281    GLuint size = element->count * dst_stride;
 282
 283    get_space(brw, size, &element->bo, &element->offset);
 284
 285    if (element->glarray->StrideB == 0) {
 286       assert(element->count == 1);
 287       element->stride = 0;
 288    } else {
 289       element->stride = dst_stride;
 290    }
 291
 292    if (dst_stride == element->glarray->StrideB) {
 293       if (intel->intelScreen->kernel_exec_fencing) {
 294          drm_intel_gem_bo_map_gtt(element->bo);
 295          memcpy((char *)element->bo->virtual + element->offset,
 296                 element->glarray->Ptr, size);
 297          drm_intel_gem_bo_unmap_gtt(element->bo);
 298       } else {
 299          dri_bo_subdata(element->bo,
 300                         element->offset,
 301                         size,
 302                         element->glarray->Ptr);
 303       }
 304    } else {
 305       char *dest;
 306       const unsigned char *src = element->glarray->Ptr;
 307       int i;
 308
 309       if (intel->intelScreen->kernel_exec_fencing) {
 310          drm_intel_gem_bo_map_gtt(element->bo);
 311          dest = element->bo->virtual;
 312          dest += element->offset;
 313
 314          for (i = 0; i < element->count; i++) {
 315             memcpy(dest, src, dst_stride);
 316             src += element->glarray->StrideB;
 317             dest += dst_stride;
 318          }
 319
 320          drm_intel_gem_bo_unmap_gtt(element->bo);
 321       } else {
 322          void *data;
 323
 324          data = _mesa_malloc(dst_stride * element->count);
 325          dest = data;
 326          for (i = 0; i < element->count; i++) {
 327             memcpy(dest, src, dst_stride);
 328             src += element->glarray->StrideB;
 329             dest += dst_stride;
 330          }
 331
 332          dri_bo_subdata(element->bo,
 333                         element->offset,
 334                         size,
 335                         data);
 336
 337          _mesa_free(data);
 338       }
 339    }
 340 }
 341
 342 static void brw_prepare_vertices(struct brw_context *brw)
 343 {
 344    GLcontext *ctx = &brw->intel.ctx;
 345    struct intel_context *intel = intel_context(ctx);
 346    GLbitfield vs_inputs = brw->vs.prog_data->inputs_read;
 347    GLuint i;
 348    const unsigned char *ptr = NULL;
 349    GLuint interleave = 0;
 350    unsigned int min_index = brw->vb.min_index;
 351    unsigned int max_index = brw->vb.max_index;
 352
 353    struct brw_vertex_element *upload[VERT_ATTRIB_MAX];
 354    GLuint nr_uploads = 0;
 355
 356    /* First build an array of pointers to ve's in vb.inputs_read
 357     */
 358    if (0)
 359       _mesa_printf("%s %d..%d\n", __FUNCTION__, min_index, max_index);
 360
 361    /* Accumulate the list of enabled arrays. */
 362    brw->vb.nr_enabled = 0;
 363    while (vs_inputs) {
 364       GLuint i = _mesa_ffsll(vs_inputs) - 1;
 365       struct brw_vertex_element *input = &brw->vb.inputs[i];
 366
 367       vs_inputs &= ~(1 << i);
 368       brw->vb.enabled[brw->vb.nr_enabled++] = input;
 369    }
 370
 371    /* XXX: In the rare cases where this happens we fallback all
 372     * the way to software rasterization, although a tnl fallback
 373     * would be sufficient.  I don't know of *any* real world
 374     * cases with > 17 vertex attributes enabled, so it probably
 375     * isn't an issue at this point.
 376     */
 377    if (brw->vb.nr_enabled >= BRW_VEP_MAX) {
 378       FALLBACK(intel, BRW_FALLBACK_DRAW, GL_TRUE);
 379       return;
 380    }
 381    FALLBACK(intel, BRW_FALLBACK_DRAW, GL_FALSE);
 382
 383    for (i = 0; i < brw->vb.nr_enabled; i++) {
 384       struct brw_vertex_element *input = brw->vb.enabled[i];
 385
 386       input->element_size = get_size(input->glarray->Type) * input->glarray->Size;
 387
 388       if (_mesa_is_bufferobj(input->glarray->BufferObj)) {
 389          struct intel_buffer_object *intel_buffer =
 390             intel_buffer_object(input->glarray->BufferObj);
 391
 392          /* Named buffer object: Just reference its contents directly. */
 393          dri_bo_unreference(input->bo);
 394          input->bo = intel_bufferobj_buffer(intel, intel_buffer,
 395                                             INTEL_READ);
 396          dri_bo_reference(input->bo);
 397          input->offset = (unsigned long)input->glarray->Ptr;
 398          input->stride = input->glarray->StrideB;
 399          input->count = input->glarray->_MaxElement;
 400
 401          /* This is a common place to reach if the user mistakenly supplies
 402           * a pointer in place of a VBO offset.  If we just let it go through,
 403           * we may end up dereferencing a pointer beyond the bounds of the
 404           * GTT.  We would hope that the VBO's max_index would save us, but
 405           * Mesa appears to hand us min/max values not clipped to the
 406           * array object's _MaxElement, and _MaxElement frequently appears
 407           * to be wrong anyway.
 408           *
 409           * The VBO spec allows application termination in this case, and it's
 410           * probably a service to the poor programmer to do so rather than
 411           * trying to just not render.
 412           */
 413          assert(input->offset < input->bo->size);
 414       } else {
 415          input->count = input->glarray->StrideB ? max_index + 1 - min_index : 1;
 416          if (input->bo != NULL) {
 417             /* Already-uploaded vertex data is present from a previous
 418              * prepare_vertices, but we had to re-validate state due to
 419              * check_aperture failing and a new batch being produced.
 420              */
 421             continue;
 422          }
 423
 424          /* Queue the buffer object up to be uploaded in the next pass,
 425           * when we've decided if we're doing interleaved or not.
 426           */
 427          if (input->attrib == VERT_ATTRIB_POS) {
 428             /* Position array not properly enabled:
 429              */
 430             if (input->glarray->StrideB == 0) {
 431                FALLBACK(intel, BRW_FALLBACK_DRAW, GL_TRUE);
 432                return;
 433             }
 434             FALLBACK(intel, BRW_FALLBACK_DRAW, GL_FALSE);
 435
 436             interleave = input->glarray->StrideB;
 437             ptr = input->glarray->Ptr;
 438          }
 439          else if (interleave != input->glarray->StrideB ||
 440                   (const unsigned char *)input->glarray->Ptr - ptr < 0 ||
 441                   (const unsigned char *)input->glarray->Ptr - ptr > interleave)
 442          {
 443             interleave = 0;
 444          }
 445
 446          upload[nr_uploads++] = input;
 447
 448          /* We rebase drawing to start at element zero only when
 449           * varyings are not in vbos, which means we can end up
 450           * uploading non-varying arrays (stride != 0) when min_index
 451           * is zero.  This doesn't matter as the amount to upload is
 452           * the same for these arrays whether the draw call is rebased
 453           * or not - we just have to upload the one element.
 454           */
 455          assert(min_index == 0 || input->glarray->StrideB == 0);
 456       }
 457    }
 458
 459    /* Handle any arrays to be uploaded. */
 460    if (nr_uploads > 1 && interleave && interleave <= 256) {
 461       /* All uploads are interleaved, so upload the arrays together as
 462        * interleaved.  First, upload the contents and set up upload[0].
 463        */
 464       copy_array_to_vbo_array(brw, upload[0], interleave);
 465
 466       for (i = 1; i < nr_uploads; i++) {
 467          /* Then, just point upload[i] at upload[0]'s buffer. */
 468          upload[i]->stride = interleave;
 469          upload[i]->offset = upload[0]->offset +
 470             ((const unsigned char *)upload[i]->glarray->Ptr - ptr);
 471          upload[i]->bo = upload[0]->bo;
 472          dri_bo_reference(upload[i]->bo);
 473       }
 474    }
 475    else {
 476       /* Upload non-interleaved arrays */
 477       for (i = 0; i < nr_uploads; i++) {
 478           copy_array_to_vbo_array(brw, upload[i], upload[i]->element_size);
 479       }
 480    }
 481
 482    brw_prepare_query_begin(brw);
 483
 484    for (i = 0; i < brw->vb.nr_enabled; i++) {
 485       struct brw_vertex_element *input = brw->vb.enabled[i];
 486
 487       brw_add_validated_bo(brw, input->bo);
 488    }
 489 }
 490
 491 static void brw_emit_vertices(struct brw_context *brw)
 492 {
 493    GLcontext *ctx = &brw->intel.ctx;
 494    struct intel_context *intel = intel_context(ctx);
 495    GLuint i;
 496
 497    brw_emit_query_begin(brw);
 498
 499    /* If the VS doesn't read any inputs (calculating vertex position from
 500     * a state variable for some reason, for example), emit a single pad
 501     * VERTEX_ELEMENT struct and bail.
 502     *
 503     * The stale VB state stays in place, but they don't do anything unless
 504     * a VE loads from them.
 505     */
 506    if (brw->vb.nr_enabled == 0) {
 507       BEGIN_BATCH(3, IGNORE_CLIPRECTS);
 508       OUT_BATCH((CMD_VERTEX_ELEMENT << 16) | 1);
 509       OUT_BATCH((0 << BRW_VE0_INDEX_SHIFT) |
 510                 BRW_VE0_VALID |
 511                 (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_VE0_FORMAT_SHIFT) |
 512                 (0 << BRW_VE0_SRC_OFFSET_SHIFT));
 513       OUT_BATCH((BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_0_SHIFT) |
 514                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT) |
 515                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) |
 516                 (BRW_VE1_COMPONENT_STORE_1_FLT << BRW_VE1_COMPONENT_3_SHIFT));
 517       ADVANCE_BATCH();
 518       return;
 519    }
 520
 521    /* Now emit VB and VEP state packets.
 522     *
 523     * This still defines a hardware VB for each input, even if they
 524     * are interleaved or from the same VBO.  TBD if this makes a
 525     * performance difference.
 526     */
 527    BEGIN_BATCH(1 + brw->vb.nr_enabled * 4, IGNORE_CLIPRECTS);
 528    OUT_BATCH((CMD_VERTEX_BUFFER << 16) |
 529              ((1 + brw->vb.nr_enabled * 4) - 2));
 530
 531    for (i = 0; i < brw->vb.nr_enabled; i++) {
 532       struct brw_vertex_element *input = brw->vb.enabled[i];
 533
 534       OUT_BATCH((i << BRW_VB0_INDEX_SHIFT) |
 535                 BRW_VB0_ACCESS_VERTEXDATA |
 536                 (input->stride << BRW_VB0_PITCH_SHIFT));
 537       OUT_RELOC(input->bo,
 538                 I915_GEM_DOMAIN_VERTEX, 0,
 539                 input->offset);
 540       if (BRW_IS_IGDNG(brw)) {
 541           if (input->stride) {
 542               OUT_RELOC(input->bo,
 543                         I915_GEM_DOMAIN_VERTEX, 0,
 544                         input->offset + input->stride * input->count - 1);
 545           } else {
 546               assert(input->count == 1);
 547               OUT_RELOC(input->bo,
 548                         I915_GEM_DOMAIN_VERTEX, 0,
 549                         input->offset + input->element_size - 1);
 550           }
 551       } else
 552           OUT_BATCH(input->stride ? input->count : 0);
 553       OUT_BATCH(0); /* Instance data step rate */
 554    }
 555    ADVANCE_BATCH();
 556
 557    BEGIN_BATCH(1 + brw->vb.nr_enabled * 2, IGNORE_CLIPRECTS);
 558    OUT_BATCH((CMD_VERTEX_ELEMENT << 16) | ((1 + brw->vb.nr_enabled * 2) - 2));
 559    for (i = 0; i < brw->vb.nr_enabled; i++) {
 560       struct brw_vertex_element *input = brw->vb.enabled[i];
 561       uint32_t format = get_surface_type(input->glarray->Type,
 562                                          input->glarray->Size,
 563                                          input->glarray->Format,
 564                                          input->glarray->Normalized);
 565       uint32_t comp0 = BRW_VE1_COMPONENT_STORE_SRC;
 566       uint32_t comp1 = BRW_VE1_COMPONENT_STORE_SRC;
 567       uint32_t comp2 = BRW_VE1_COMPONENT_STORE_SRC;
 568       uint32_t comp3 = BRW_VE1_COMPONENT_STORE_SRC;
 569
 570       switch (input->glarray->Size) {
 571       case 0: comp0 = BRW_VE1_COMPONENT_STORE_0;
 572       case 1: comp1 = BRW_VE1_COMPONENT_STORE_0;
 573       case 2: comp2 = BRW_VE1_COMPONENT_STORE_0;
 574       case 3: comp3 = BRW_VE1_COMPONENT_STORE_1_FLT;
 575          break;
 576       }
 577
 578       OUT_BATCH((i << BRW_VE0_INDEX_SHIFT) |
 579                 BRW_VE0_VALID |
 580                 (format << BRW_VE0_FORMAT_SHIFT) |
 581                 (0 << BRW_VE0_SRC_OFFSET_SHIFT));
 582
 583       if (BRW_IS_IGDNG(brw))
 584           OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
 585                     (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
 586                     (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
 587                     (comp3 << BRW_VE1_COMPONENT_3_SHIFT));
 588       else
 589           OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
 590                     (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
 591                     (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
 592                     (comp3 << BRW_VE1_COMPONENT_3_SHIFT) |
 593                     ((i * 4) << BRW_VE1_DST_OFFSET_SHIFT));
 594    }
 595    ADVANCE_BATCH();
 596 }
 597
 598 const struct brw_tracked_state brw_vertices = {
 599    .dirty = {
 600       .mesa = 0,
 601       .brw = BRW_NEW_BATCH | BRW_NEW_VERTICES,
 602       .cache = 0,
 603    },
 604    .prepare = brw_prepare_vertices,
 605    .emit = brw_emit_vertices,
 606 };
 607
 608 static void brw_prepare_indices(struct brw_context *brw)
 609 {
 610    GLcontext *ctx = &brw->intel.ctx;
 611    struct intel_context *intel = &brw->intel;
 612    const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
 613    GLuint ib_size;
 614    dri_bo *bo = NULL;
 615    struct gl_buffer_object *bufferobj;
 616    GLuint offset;
 617    GLuint ib_type_size;
 618
 619    if (index_buffer == NULL)
 620       return;
 621
 622    ib_type_size = get_size(index_buffer->type);
 623    ib_size = ib_type_size * index_buffer->count;
 624    bufferobj = index_buffer->obj;;
 625
 626    /* Turn into a proper VBO:
 627     */
 628    if (!_mesa_is_bufferobj(bufferobj)) {
 629       brw->ib.start_vertex_offset = 0;
 630
 631       /* Get new bufferobj, offset:
 632        */
 633       get_space(brw, ib_size, &bo, &offset);
 634
 635       /* Straight upload
 636        */
 637       if (intel->intelScreen->kernel_exec_fencing) {
 638          drm_intel_gem_bo_map_gtt(bo);
 639          memcpy((char *)bo->virtual + offset, index_buffer->ptr, ib_size);
 640          drm_intel_gem_bo_unmap_gtt(bo);
 641       } else {
 642          dri_bo_subdata(bo, offset, ib_size, index_buffer->ptr);
 643       }
 644    } else {
 645       offset = (GLuint) (unsigned long) index_buffer->ptr;
 646       brw->ib.start_vertex_offset = 0;
 647
 648       /* If the index buffer isn't aligned to its element size, we have to
 649        * rebase it into a temporary.
 650        */
 651        if ((get_size(index_buffer->type) - 1) & offset) {
 652            GLubyte *map = ctx->Driver.MapBuffer(ctx,
 653                                                 GL_ELEMENT_ARRAY_BUFFER_ARB,
 654                                                 GL_DYNAMIC_DRAW_ARB,
 655                                                 bufferobj);
 656            map += offset;
 657
 658            get_space(brw, ib_size, &bo, &offset);
 659
 660            dri_bo_subdata(bo, offset, ib_size, map);
 661
 662            ctx->Driver.UnmapBuffer(ctx, GL_ELEMENT_ARRAY_BUFFER_ARB, bufferobj);
 663        } else {
 664           bo = intel_bufferobj_buffer(intel, intel_buffer_object(bufferobj),
 665                                       INTEL_READ);
 666           dri_bo_reference(bo);
 667
 668           /* Use CMD_3D_PRIM's start_vertex_offset to avoid re-uploading
 669            * the index buffer state when we're just moving the start index
 670            * of our drawing.
 671            */
 672           brw->ib.start_vertex_offset = offset / ib_type_size;
 673           offset = 0;
 674           ib_size = bo->size;
 675        }
 676    }
 677
 678    if (brw->ib.bo != bo ||
 679        brw->ib.offset != offset ||
 680        brw->ib.size != ib_size)
 681    {
 682       drm_intel_bo_unreference(brw->ib.bo);
 683       brw->ib.bo = bo;
 684       brw->ib.offset = offset;
 685       brw->ib.size = ib_size;
 686
 687       brw->state.dirty.brw |= BRW_NEW_INDEX_BUFFER;
 688    } else {
 689       drm_intel_bo_unreference(bo);
 690    }
 691
 692    brw_add_validated_bo(brw, brw->ib.bo);
 693 }
 694
 695 const struct brw_tracked_state brw_indices = {
 696    .dirty = {
 697       .mesa = 0,
 698       .brw = BRW_NEW_INDICES,
 699       .cache = 0,
 700    },
 701    .prepare = brw_prepare_indices,
 702 };
 703
 704 static void brw_emit_index_buffer(struct brw_context *brw)
 705 {
 706    struct intel_context *intel = &brw->intel;
 707    const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
 708
 709    if (index_buffer == NULL)
 710       return;
 711
 712    /* Emit the indexbuffer packet:
 713     */
 714    {
 715       struct brw_indexbuffer ib;
 716
 717       memset(&ib, 0, sizeof(ib));
 718
 719       ib.header.bits.opcode = CMD_INDEX_BUFFER;
 720       ib.header.bits.length = sizeof(ib)/4 - 2;
 721       ib.header.bits.index_format = get_index_type(index_buffer->type);
 722       ib.header.bits.cut_index_enable = 0;
 723
 724       BEGIN_BATCH(4, IGNORE_CLIPRECTS);
 725       OUT_BATCH( ib.header.dword );
 726       OUT_RELOC(brw->ib.bo,
 727                 I915_GEM_DOMAIN_VERTEX, 0,
 728                 brw->ib.offset);
 729       OUT_RELOC(brw->ib.bo,
 730                 I915_GEM_DOMAIN_VERTEX, 0,
 731                 brw->ib.offset + brw->ib.size - 1);
 732       OUT_BATCH( 0 );
 733       ADVANCE_BATCH();
 734    }
 735 }
 736
 737 const struct brw_tracked_state brw_index_buffer = {
 738    .dirty = {
 739       .mesa = 0,
 740       .brw = BRW_NEW_BATCH | BRW_NEW_INDEX_BUFFER,
 741       .cache = 0,
 742    },
 743    .emit = brw_emit_index_buffer,
 744 };