src/mesa/drivers/dri/i965/brw_draw_upload.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 VMware, Inc.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #include "main/glheader.h"
  29 #include "main/bufferobj.h"
  30 #include "main/context.h"
  31 #include "main/enums.h"
  32 #include "main/macros.h"
  33 #include "main/glformats.h"
  34
  35 #include "brw_draw.h"
  36 #include "brw_defines.h"
  37 #include "brw_context.h"
  38 #include "brw_state.h"
  39
  40 #include "intel_batchbuffer.h"
  41 #include "intel_buffer_objects.h"
  42
  43 static const GLuint double_types[5] = {
  44    0,
  45    BRW_SURFACEFORMAT_R64_FLOAT,
  46    BRW_SURFACEFORMAT_R64G64_FLOAT,
  47    BRW_SURFACEFORMAT_R64G64B64_FLOAT,
  48    BRW_SURFACEFORMAT_R64G64B64A64_FLOAT
  49 };
  50
  51 static const GLuint float_types[5] = {
  52    0,
  53    BRW_SURFACEFORMAT_R32_FLOAT,
  54    BRW_SURFACEFORMAT_R32G32_FLOAT,
  55    BRW_SURFACEFORMAT_R32G32B32_FLOAT,
  56    BRW_SURFACEFORMAT_R32G32B32A32_FLOAT
  57 };
  58
  59 static const GLuint half_float_types[5] = {
  60    0,
  61    BRW_SURFACEFORMAT_R16_FLOAT,
  62    BRW_SURFACEFORMAT_R16G16_FLOAT,
  63    BRW_SURFACEFORMAT_R16G16B16A16_FLOAT,
  64    BRW_SURFACEFORMAT_R16G16B16A16_FLOAT
  65 };
  66
  67 static const GLuint fixed_point_types[5] = {
  68    0,
  69    BRW_SURFACEFORMAT_R32_SFIXED,
  70    BRW_SURFACEFORMAT_R32G32_SFIXED,
  71    BRW_SURFACEFORMAT_R32G32B32_SFIXED,
  72    BRW_SURFACEFORMAT_R32G32B32A32_SFIXED,
  73 };
  74
  75 static const GLuint uint_types_direct[5] = {
  76    0,
  77    BRW_SURFACEFORMAT_R32_UINT,
  78    BRW_SURFACEFORMAT_R32G32_UINT,
  79    BRW_SURFACEFORMAT_R32G32B32_UINT,
  80    BRW_SURFACEFORMAT_R32G32B32A32_UINT
  81 };
  82
  83 static const GLuint uint_types_norm[5] = {
  84    0,
  85    BRW_SURFACEFORMAT_R32_UNORM,
  86    BRW_SURFACEFORMAT_R32G32_UNORM,
  87    BRW_SURFACEFORMAT_R32G32B32_UNORM,
  88    BRW_SURFACEFORMAT_R32G32B32A32_UNORM
  89 };
  90
  91 static const GLuint uint_types_scale[5] = {
  92    0,
  93    BRW_SURFACEFORMAT_R32_USCALED,
  94    BRW_SURFACEFORMAT_R32G32_USCALED,
  95    BRW_SURFACEFORMAT_R32G32B32_USCALED,
  96    BRW_SURFACEFORMAT_R32G32B32A32_USCALED
  97 };
  98
  99 static const GLuint int_types_direct[5] = {
 100    0,
 101    BRW_SURFACEFORMAT_R32_SINT,
 102    BRW_SURFACEFORMAT_R32G32_SINT,
 103    BRW_SURFACEFORMAT_R32G32B32_SINT,
 104    BRW_SURFACEFORMAT_R32G32B32A32_SINT
 105 };
 106
 107 static const GLuint int_types_norm[5] = {
 108    0,
 109    BRW_SURFACEFORMAT_R32_SNORM,
 110    BRW_SURFACEFORMAT_R32G32_SNORM,
 111    BRW_SURFACEFORMAT_R32G32B32_SNORM,
 112    BRW_SURFACEFORMAT_R32G32B32A32_SNORM
 113 };
 114
 115 static const GLuint int_types_scale[5] = {
 116    0,
 117    BRW_SURFACEFORMAT_R32_SSCALED,
 118    BRW_SURFACEFORMAT_R32G32_SSCALED,
 119    BRW_SURFACEFORMAT_R32G32B32_SSCALED,
 120    BRW_SURFACEFORMAT_R32G32B32A32_SSCALED
 121 };
 122
 123 static const GLuint ushort_types_direct[5] = {
 124    0,
 125    BRW_SURFACEFORMAT_R16_UINT,
 126    BRW_SURFACEFORMAT_R16G16_UINT,
 127    BRW_SURFACEFORMAT_R16G16B16A16_UINT,
 128    BRW_SURFACEFORMAT_R16G16B16A16_UINT
 129 };
 130
 131 static const GLuint ushort_types_norm[5] = {
 132    0,
 133    BRW_SURFACEFORMAT_R16_UNORM,
 134    BRW_SURFACEFORMAT_R16G16_UNORM,
 135    BRW_SURFACEFORMAT_R16G16B16_UNORM,
 136    BRW_SURFACEFORMAT_R16G16B16A16_UNORM
 137 };
 138
 139 static const GLuint ushort_types_scale[5] = {
 140    0,
 141    BRW_SURFACEFORMAT_R16_USCALED,
 142    BRW_SURFACEFORMAT_R16G16_USCALED,
 143    BRW_SURFACEFORMAT_R16G16B16_USCALED,
 144    BRW_SURFACEFORMAT_R16G16B16A16_USCALED
 145 };
 146
 147 static const GLuint short_types_direct[5] = {
 148    0,
 149    BRW_SURFACEFORMAT_R16_SINT,
 150    BRW_SURFACEFORMAT_R16G16_SINT,
 151    BRW_SURFACEFORMAT_R16G16B16A16_SINT,
 152    BRW_SURFACEFORMAT_R16G16B16A16_SINT
 153 };
 154
 155 static const GLuint short_types_norm[5] = {
 156    0,
 157    BRW_SURFACEFORMAT_R16_SNORM,
 158    BRW_SURFACEFORMAT_R16G16_SNORM,
 159    BRW_SURFACEFORMAT_R16G16B16_SNORM,
 160    BRW_SURFACEFORMAT_R16G16B16A16_SNORM
 161 };
 162
 163 static const GLuint short_types_scale[5] = {
 164    0,
 165    BRW_SURFACEFORMAT_R16_SSCALED,
 166    BRW_SURFACEFORMAT_R16G16_SSCALED,
 167    BRW_SURFACEFORMAT_R16G16B16_SSCALED,
 168    BRW_SURFACEFORMAT_R16G16B16A16_SSCALED
 169 };
 170
 171 static const GLuint ubyte_types_direct[5] = {
 172    0,
 173    BRW_SURFACEFORMAT_R8_UINT,
 174    BRW_SURFACEFORMAT_R8G8_UINT,
 175    BRW_SURFACEFORMAT_R8G8B8A8_UINT,
 176    BRW_SURFACEFORMAT_R8G8B8A8_UINT
 177 };
 178
 179 static const GLuint ubyte_types_norm[5] = {
 180    0,
 181    BRW_SURFACEFORMAT_R8_UNORM,
 182    BRW_SURFACEFORMAT_R8G8_UNORM,
 183    BRW_SURFACEFORMAT_R8G8B8_UNORM,
 184    BRW_SURFACEFORMAT_R8G8B8A8_UNORM
 185 };
 186
 187 static const GLuint ubyte_types_scale[5] = {
 188    0,
 189    BRW_SURFACEFORMAT_R8_USCALED,
 190    BRW_SURFACEFORMAT_R8G8_USCALED,
 191    BRW_SURFACEFORMAT_R8G8B8_USCALED,
 192    BRW_SURFACEFORMAT_R8G8B8A8_USCALED
 193 };
 194
 195 static const GLuint byte_types_direct[5] = {
 196    0,
 197    BRW_SURFACEFORMAT_R8_SINT,
 198    BRW_SURFACEFORMAT_R8G8_SINT,
 199    BRW_SURFACEFORMAT_R8G8B8A8_SINT,
 200    BRW_SURFACEFORMAT_R8G8B8A8_SINT
 201 };
 202
 203 static const GLuint byte_types_norm[5] = {
 204    0,
 205    BRW_SURFACEFORMAT_R8_SNORM,
 206    BRW_SURFACEFORMAT_R8G8_SNORM,
 207    BRW_SURFACEFORMAT_R8G8B8_SNORM,
 208    BRW_SURFACEFORMAT_R8G8B8A8_SNORM
 209 };
 210
 211 static const GLuint byte_types_scale[5] = {
 212    0,
 213    BRW_SURFACEFORMAT_R8_SSCALED,
 214    BRW_SURFACEFORMAT_R8G8_SSCALED,
 215    BRW_SURFACEFORMAT_R8G8B8_SSCALED,
 216    BRW_SURFACEFORMAT_R8G8B8A8_SSCALED
 217 };
 218
 219
 220 /**
 221  * Given vertex array type/size/format/normalized info, return
 222  * the appopriate hardware surface type.
 223  * Format will be GL_RGBA or possibly GL_BGRA for GLubyte[4] color arrays.
 224  */
 225 unsigned
 226 brw_get_vertex_surface_type(struct brw_context *brw,
 227                             const struct gl_client_array *glarray)
 228 {
 229    int size = glarray->Size;
 230
 231    if (unlikely(INTEL_DEBUG & DEBUG_VERTS))
 232       fprintf(stderr, "type %s size %d normalized %d\n",
 233               _mesa_enum_to_string(glarray->Type),
 234               glarray->Size, glarray->Normalized);
 235
 236    if (glarray->Integer) {
 237       assert(glarray->Format == GL_RGBA); /* sanity check */
 238       switch (glarray->Type) {
 239       case GL_INT: return int_types_direct[size];
 240       case GL_SHORT: return short_types_direct[size];
 241       case GL_BYTE: return byte_types_direct[size];
 242       case GL_UNSIGNED_INT: return uint_types_direct[size];
 243       case GL_UNSIGNED_SHORT: return ushort_types_direct[size];
 244       case GL_UNSIGNED_BYTE: return ubyte_types_direct[size];
 245       default: unreachable("not reached");
 246       }
 247    } else if (glarray->Type == GL_UNSIGNED_INT_10F_11F_11F_REV) {
 248       return BRW_SURFACEFORMAT_R11G11B10_FLOAT;
 249    } else if (glarray->Normalized) {
 250       switch (glarray->Type) {
 251       case GL_DOUBLE: return double_types[size];
 252       case GL_FLOAT: return float_types[size];
 253       case GL_HALF_FLOAT: return half_float_types[size];
 254       case GL_INT: return int_types_norm[size];
 255       case GL_SHORT: return short_types_norm[size];
 256       case GL_BYTE: return byte_types_norm[size];
 257       case GL_UNSIGNED_INT: return uint_types_norm[size];
 258       case GL_UNSIGNED_SHORT: return ushort_types_norm[size];
 259       case GL_UNSIGNED_BYTE:
 260          if (glarray->Format == GL_BGRA) {
 261             /* See GL_EXT_vertex_array_bgra */
 262             assert(size == 4);
 263             return BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
 264          }
 265          else {
 266             return ubyte_types_norm[size];
 267          }
 268       case GL_FIXED:
 269          if (brw->gen >= 8 || brw->is_haswell)
 270             return fixed_point_types[size];
 271
 272          /* This produces GL_FIXED inputs as values between INT32_MIN and
 273           * INT32_MAX, which will be scaled down by 1/65536 by the VS.
 274           */
 275          return int_types_scale[size];
 276       /* See GL_ARB_vertex_type_2_10_10_10_rev.
 277        * W/A: Pre-Haswell, the hardware doesn't really support the formats we'd
 278        * like to use here, so upload everything as UINT and fix
 279        * it in the shader
 280        */
 281       case GL_INT_2_10_10_10_REV:
 282          assert(size == 4);
 283          if (brw->gen >= 8 || brw->is_haswell) {
 284             return glarray->Format == GL_BGRA
 285                ? BRW_SURFACEFORMAT_B10G10R10A2_SNORM
 286                : BRW_SURFACEFORMAT_R10G10B10A2_SNORM;
 287          }
 288          return BRW_SURFACEFORMAT_R10G10B10A2_UINT;
 289       case GL_UNSIGNED_INT_2_10_10_10_REV:
 290          assert(size == 4);
 291          if (brw->gen >= 8 || brw->is_haswell) {
 292             return glarray->Format == GL_BGRA
 293                ? BRW_SURFACEFORMAT_B10G10R10A2_UNORM
 294                : BRW_SURFACEFORMAT_R10G10B10A2_UNORM;
 295          }
 296          return BRW_SURFACEFORMAT_R10G10B10A2_UINT;
 297       default: unreachable("not reached");
 298       }
 299    }
 300    else {
 301       /* See GL_ARB_vertex_type_2_10_10_10_rev.
 302        * W/A: the hardware doesn't really support the formats we'd
 303        * like to use here, so upload everything as UINT and fix
 304        * it in the shader
 305        */
 306       if (glarray->Type == GL_INT_2_10_10_10_REV) {
 307          assert(size == 4);
 308          if (brw->gen >= 8 || brw->is_haswell) {
 309             return glarray->Format == GL_BGRA
 310                ? BRW_SURFACEFORMAT_B10G10R10A2_SSCALED
 311                : BRW_SURFACEFORMAT_R10G10B10A2_SSCALED;
 312          }
 313          return BRW_SURFACEFORMAT_R10G10B10A2_UINT;
 314       } else if (glarray->Type == GL_UNSIGNED_INT_2_10_10_10_REV) {
 315          assert(size == 4);
 316          if (brw->gen >= 8 || brw->is_haswell) {
 317             return glarray->Format == GL_BGRA
 318                ? BRW_SURFACEFORMAT_B10G10R10A2_USCALED
 319                : BRW_SURFACEFORMAT_R10G10B10A2_USCALED;
 320          }
 321          return BRW_SURFACEFORMAT_R10G10B10A2_UINT;
 322       }
 323       assert(glarray->Format == GL_RGBA); /* sanity check */
 324       switch (glarray->Type) {
 325       case GL_DOUBLE: return double_types[size];
 326       case GL_FLOAT: return float_types[size];
 327       case GL_HALF_FLOAT: return half_float_types[size];
 328       case GL_INT: return int_types_scale[size];
 329       case GL_SHORT: return short_types_scale[size];
 330       case GL_BYTE: return byte_types_scale[size];
 331       case GL_UNSIGNED_INT: return uint_types_scale[size];
 332       case GL_UNSIGNED_SHORT: return ushort_types_scale[size];
 333       case GL_UNSIGNED_BYTE: return ubyte_types_scale[size];
 334       case GL_FIXED:
 335          if (brw->gen >= 8 || brw->is_haswell)
 336             return fixed_point_types[size];
 337
 338          /* This produces GL_FIXED inputs as values between INT32_MIN and
 339           * INT32_MAX, which will be scaled down by 1/65536 by the VS.
 340           */
 341          return int_types_scale[size];
 342       default: unreachable("not reached");
 343       }
 344    }
 345 }
 346
 347 static void
 348 copy_array_to_vbo_array(struct brw_context *brw,
 349                         struct brw_vertex_element *element,
 350                         int min, int max,
 351                         struct brw_vertex_buffer *buffer,
 352                         GLuint dst_stride)
 353 {
 354    const int src_stride = element->glarray->StrideB;
 355
 356    /* If the source stride is zero, we just want to upload the current
 357     * attribute once and set the buffer's stride to 0.  There's no need
 358     * to replicate it out.
 359     */
 360    if (src_stride == 0) {
 361       intel_upload_data(brw, element->glarray->Ptr,
 362                         element->glarray->_ElementSize,
 363                         element->glarray->_ElementSize,
 364                         &buffer->bo, &buffer->offset);
 365
 366       buffer->stride = 0;
 367       return;
 368    }
 369
 370    const unsigned char *src = element->glarray->Ptr + min * src_stride;
 371    int count = max - min + 1;
 372    GLuint size = count * dst_stride;
 373    uint8_t *dst = intel_upload_space(brw, size, dst_stride,
 374                                      &buffer->bo, &buffer->offset);
 375
 376    if (dst_stride == src_stride) {
 377       memcpy(dst, src, size);
 378    } else {
 379       while (count--) {
 380          memcpy(dst, src, dst_stride);
 381          src += src_stride;
 382          dst += dst_stride;
 383       }
 384    }
 385    buffer->stride = dst_stride;
 386 }
 387
 388 void
 389 brw_prepare_vertices(struct brw_context *brw)
 390 {
 391    struct gl_context *ctx = &brw->ctx;
 392    /* BRW_NEW_VS_PROG_DATA */
 393    GLbitfield64 vs_inputs = brw->vs.prog_data->inputs_read;
 394    const unsigned char *ptr = NULL;
 395    GLuint interleaved = 0;
 396    unsigned int min_index = brw->vb.min_index + brw->basevertex;
 397    unsigned int max_index = brw->vb.max_index + brw->basevertex;
 398    unsigned i;
 399    int delta, j;
 400
 401    struct brw_vertex_element *upload[VERT_ATTRIB_MAX];
 402    GLuint nr_uploads = 0;
 403
 404    /* _NEW_POLYGON
 405     *
 406     * On gen6+, edge flags don't end up in the VUE (either in or out of the
 407     * VS).  Instead, they're uploaded as the last vertex element, and the data
 408     * is passed sideband through the fixed function units.  So, we need to
 409     * prepare the vertex buffer for it, but it's not present in inputs_read.
 410     */
 411    if (brw->gen >= 6 && (ctx->Polygon.FrontMode != GL_FILL ||
 412                            ctx->Polygon.BackMode != GL_FILL)) {
 413       vs_inputs |= VERT_BIT_EDGEFLAG;
 414    }
 415
 416    if (0)
 417       fprintf(stderr, "%s %d..%d\n", __func__, min_index, max_index);
 418
 419    /* Accumulate the list of enabled arrays. */
 420    brw->vb.nr_enabled = 0;
 421    while (vs_inputs) {
 422       GLuint index = ffsll(vs_inputs) - 1;
 423       struct brw_vertex_element *input = &brw->vb.inputs[index];
 424
 425       vs_inputs &= ~BITFIELD64_BIT(index);
 426       brw->vb.enabled[brw->vb.nr_enabled++] = input;
 427    }
 428
 429    if (brw->vb.nr_enabled == 0)
 430       return;
 431
 432    if (brw->vb.nr_buffers)
 433       return;
 434
 435    for (i = j = 0; i < brw->vb.nr_enabled; i++) {
 436       struct brw_vertex_element *input = brw->vb.enabled[i];
 437       const struct gl_client_array *glarray = input->glarray;
 438
 439       if (_mesa_is_bufferobj(glarray->BufferObj)) {
 440          struct intel_buffer_object *intel_buffer =
 441             intel_buffer_object(glarray->BufferObj);
 442          unsigned k;
 443
 444          /* If we have a VB set to be uploaded for this buffer object
 445           * already, reuse that VB state so that we emit fewer
 446           * relocations.
 447           */
 448          for (k = 0; k < i; k++) {
 449             const struct gl_client_array *other = brw->vb.enabled[k]->glarray;
 450             if (glarray->BufferObj == other->BufferObj &&
 451                 glarray->StrideB == other->StrideB &&
 452                 glarray->InstanceDivisor == other->InstanceDivisor &&
 453                 (uintptr_t)(glarray->Ptr - other->Ptr) < glarray->StrideB)
 454             {
 455                input->buffer = brw->vb.enabled[k]->buffer;
 456                input->offset = glarray->Ptr - other->Ptr;
 457                break;
 458             }
 459          }
 460          if (k == i) {
 461             struct brw_vertex_buffer *buffer = &brw->vb.buffers[j];
 462
 463             /* Named buffer object: Just reference its contents directly. */
 464             buffer->offset = (uintptr_t)glarray->Ptr;
 465             buffer->stride = glarray->StrideB;
 466             buffer->step_rate = glarray->InstanceDivisor;
 467
 468             uint32_t offset, size;
 469             if (glarray->InstanceDivisor) {
 470                offset = buffer->offset;
 471                size = (buffer->stride * ((brw->num_instances /
 472                                           glarray->InstanceDivisor) - 1) +
 473                        glarray->_ElementSize);
 474             } else {
 475                if (min_index == -1) {
 476                   offset = 0;
 477                   size = intel_buffer->Base.Size;
 478                } else {
 479                   offset = buffer->offset + min_index * buffer->stride;
 480                   size = (buffer->stride * (max_index - min_index) +
 481                           glarray->_ElementSize);
 482                }
 483             }
 484             buffer->bo = intel_bufferobj_buffer(brw, intel_buffer,
 485                                                 offset, size);
 486             drm_intel_bo_reference(buffer->bo);
 487
 488             input->buffer = j++;
 489             input->offset = 0;
 490          }
 491
 492          /* This is a common place to reach if the user mistakenly supplies
 493           * a pointer in place of a VBO offset.  If we just let it go through,
 494           * we may end up dereferencing a pointer beyond the bounds of the
 495           * GTT.
 496           *
 497           * The VBO spec allows application termination in this case, and it's
 498           * probably a service to the poor programmer to do so rather than
 499           * trying to just not render.
 500           */
 501          assert(input->offset < brw->vb.buffers[input->buffer].bo->size);
 502       } else {
 503          /* Queue the buffer object up to be uploaded in the next pass,
 504           * when we've decided if we're doing interleaved or not.
 505           */
 506          if (nr_uploads == 0) {
 507             interleaved = glarray->StrideB;
 508             ptr = glarray->Ptr;
 509          }
 510          else if (interleaved != glarray->StrideB ||
 511                   glarray->Ptr < ptr ||
 512                   (uintptr_t)(glarray->Ptr - ptr) + glarray->_ElementSize > interleaved)
 513          {
 514             /* If our stride is different from the first attribute's stride,
 515              * or if the first attribute's stride didn't cover our element,
 516              * disable the interleaved upload optimization.  The second case
 517              * can most commonly occur in cases where there is a single vertex
 518              * and, for example, the data is stored on the application's
 519              * stack.
 520              *
 521              * NOTE: This will also disable the optimization in cases where
 522              * the data is in a different order than the array indices.
 523              * Something like:
 524              *
 525              *     float data[...];
 526              *     glVertexAttribPointer(0, 4, GL_FLOAT, 32, &data[4]);
 527              *     glVertexAttribPointer(1, 4, GL_FLOAT, 32, &data[0]);
 528              */
 529             interleaved = 0;
 530          }
 531
 532          upload[nr_uploads++] = input;
 533       }
 534    }
 535
 536    /* If we need to upload all the arrays, then we can trim those arrays to
 537     * only the used elements [min_index, max_index] so long as we adjust all
 538     * the values used in the 3DPRIMITIVE i.e. by setting the vertex bias.
 539     */
 540    brw->vb.start_vertex_bias = 0;
 541    delta = min_index;
 542    if (nr_uploads == brw->vb.nr_enabled) {
 543       brw->vb.start_vertex_bias = -delta;
 544       delta = 0;
 545    }
 546
 547    /* Handle any arrays to be uploaded. */
 548    if (nr_uploads > 1) {
 549       if (interleaved) {
 550          struct brw_vertex_buffer *buffer = &brw->vb.buffers[j];
 551          /* All uploads are interleaved, so upload the arrays together as
 552           * interleaved.  First, upload the contents and set up upload[0].
 553           */
 554          copy_array_to_vbo_array(brw, upload[0], min_index, max_index,
 555                                  buffer, interleaved);
 556          buffer->offset -= delta * interleaved;
 557
 558          for (i = 0; i < nr_uploads; i++) {
 559             /* Then, just point upload[i] at upload[0]'s buffer. */
 560             upload[i]->offset =
 561                ((const unsigned char *)upload[i]->glarray->Ptr - ptr);
 562             upload[i]->buffer = j;
 563          }
 564          j++;
 565
 566          nr_uploads = 0;
 567       }
 568    }
 569    /* Upload non-interleaved arrays */
 570    for (i = 0; i < nr_uploads; i++) {
 571       struct brw_vertex_buffer *buffer = &brw->vb.buffers[j];
 572       if (upload[i]->glarray->InstanceDivisor == 0) {
 573          copy_array_to_vbo_array(brw, upload[i], min_index, max_index,
 574                                  buffer, upload[i]->glarray->_ElementSize);
 575       } else {
 576          /* This is an instanced attribute, since its InstanceDivisor
 577           * is not zero. Therefore, its data will be stepped after the
 578           * instanced draw has been run InstanceDivisor times.
 579           */
 580          uint32_t instanced_attr_max_index =
 581             (brw->num_instances - 1) / upload[i]->glarray->InstanceDivisor;
 582          copy_array_to_vbo_array(brw, upload[i], 0, instanced_attr_max_index,
 583                                  buffer, upload[i]->glarray->_ElementSize);
 584       }
 585       buffer->offset -= delta * buffer->stride;
 586       buffer->step_rate = upload[i]->glarray->InstanceDivisor;
 587       upload[i]->buffer = j++;
 588       upload[i]->offset = 0;
 589    }
 590
 591    brw->vb.nr_buffers = j;
 592 }
 593
 594 void
 595 brw_prepare_shader_draw_parameters(struct brw_context *brw)
 596 {
 597    /* For non-indirect draws, upload gl_BaseVertex. */
 598    if (brw->vs.prog_data->uses_vertexid && brw->draw.draw_params_bo == NULL) {
 599       intel_upload_data(brw, &brw->draw.gl_basevertex, 4, 4,
 600                         &brw->draw.draw_params_bo,
 601                         &brw->draw.draw_params_offset);
 602    }
 603 }
 604
 605 /**
 606  * Emit a VERTEX_BUFFER_STATE entry (part of 3DSTATE_VERTEX_BUFFERS).
 607  */
 608 static uint32_t *
 609 emit_vertex_buffer_state(struct brw_context *brw,
 610                          unsigned buffer_nr,
 611                          drm_intel_bo *bo,
 612                          unsigned bo_ending_address,
 613                          unsigned bo_offset,
 614                          unsigned stride,
 615                          unsigned step_rate,
 616                          uint32_t *__map)
 617 {
 618    struct gl_context *ctx = &brw->ctx;
 619    uint32_t dw0;
 620
 621    if (brw->gen >= 6) {
 622       dw0 = (buffer_nr << GEN6_VB0_INDEX_SHIFT) |
 623             (step_rate ? GEN6_VB0_ACCESS_INSTANCEDATA
 624                        : GEN6_VB0_ACCESS_VERTEXDATA);
 625    } else {
 626       dw0 = (buffer_nr << BRW_VB0_INDEX_SHIFT) |
 627             (step_rate ? BRW_VB0_ACCESS_INSTANCEDATA
 628                        : BRW_VB0_ACCESS_VERTEXDATA);
 629    }
 630
 631    if (brw->gen >= 7)
 632       dw0 |= GEN7_VB0_ADDRESS_MODIFYENABLE;
 633
 634    if (brw->gen == 7)
 635       dw0 |= GEN7_MOCS_L3 << 16;
 636
 637    WARN_ONCE(stride >= (brw->gen >= 5 ? 2048 : 2047),
 638              "VBO stride %d too large, bad rendering may occur\n",
 639              stride);
 640    OUT_BATCH(dw0 | (stride << BRW_VB0_PITCH_SHIFT));
 641    OUT_RELOC(bo, I915_GEM_DOMAIN_VERTEX, 0, bo_offset);
 642    if (brw->gen >= 5) {
 643       OUT_RELOC(bo, I915_GEM_DOMAIN_VERTEX, 0, bo_ending_address);
 644    } else {
 645       OUT_BATCH(0);
 646    }
 647    OUT_BATCH(step_rate);
 648
 649    return __map;
 650 }
 651 #define EMIT_VERTEX_BUFFER_STATE(...) __map = emit_vertex_buffer_state(__VA_ARGS__, __map)
 652
 653 static void
 654 brw_emit_vertices(struct brw_context *brw)
 655 {
 656    GLuint i;
 657
 658    brw_prepare_vertices(brw);
 659    brw_prepare_shader_draw_parameters(brw);
 660
 661    brw_emit_query_begin(brw);
 662
 663    unsigned nr_elements = brw->vb.nr_enabled;
 664    if (brw->vs.prog_data->uses_vertexid || brw->vs.prog_data->uses_instanceid)
 665       ++nr_elements;
 666
 667    /* If the VS doesn't read any inputs (calculating vertex position from
 668     * a state variable for some reason, for example), emit a single pad
 669     * VERTEX_ELEMENT struct and bail.
 670     *
 671     * The stale VB state stays in place, but they don't do anything unless
 672     * a VE loads from them.
 673     */
 674    if (nr_elements == 0) {
 675       BEGIN_BATCH(3);
 676       OUT_BATCH((_3DSTATE_VERTEX_ELEMENTS << 16) | 1);
 677       if (brw->gen >= 6) {
 678          OUT_BATCH((0 << GEN6_VE0_INDEX_SHIFT) |
 679                    GEN6_VE0_VALID |
 680                    (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_VE0_FORMAT_SHIFT) |
 681                    (0 << BRW_VE0_SRC_OFFSET_SHIFT));
 682       } else {
 683          OUT_BATCH((0 << BRW_VE0_INDEX_SHIFT) |
 684                    BRW_VE0_VALID |
 685                    (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_VE0_FORMAT_SHIFT) |
 686                    (0 << BRW_VE0_SRC_OFFSET_SHIFT));
 687       }
 688       OUT_BATCH((BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_0_SHIFT) |
 689                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT) |
 690                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) |
 691                 (BRW_VE1_COMPONENT_STORE_1_FLT << BRW_VE1_COMPONENT_3_SHIFT));
 692       ADVANCE_BATCH();
 693       return;
 694    }
 695
 696    /* Now emit VB and VEP state packets.
 697     */
 698
 699    unsigned nr_buffers =
 700       brw->vb.nr_buffers + brw->vs.prog_data->uses_vertexid;
 701
 702    if (nr_buffers) {
 703       if (brw->gen >= 6) {
 704          assert(nr_buffers <= 33);
 705       } else {
 706          assert(nr_buffers <= 17);
 707       }
 708
 709       BEGIN_BATCH(1 + 4 * nr_buffers);
 710       OUT_BATCH((_3DSTATE_VERTEX_BUFFERS << 16) | (4 * nr_buffers - 1));
 711       for (i = 0; i < brw->vb.nr_buffers; i++) {
 712          struct brw_vertex_buffer *buffer = &brw->vb.buffers[i];
 713          EMIT_VERTEX_BUFFER_STATE(brw, i, buffer->bo, buffer->bo->size - 1,
 714                                   buffer->offset, buffer->stride,
 715                                   buffer->step_rate);
 716
 717       }
 718
 719       if (brw->vs.prog_data->uses_vertexid) {
 720          EMIT_VERTEX_BUFFER_STATE(brw, brw->vb.nr_buffers,
 721                                   brw->draw.draw_params_bo,
 722                                   brw->draw.draw_params_bo->size - 1,
 723                                   brw->draw.draw_params_offset,
 724                                   0,  /* stride */
 725                                   0); /* step rate */
 726       }
 727       ADVANCE_BATCH();
 728    }
 729
 730    /* The hardware allows one more VERTEX_ELEMENTS than VERTEX_BUFFERS, presumably
 731     * for VertexID/InstanceID.
 732     */
 733    if (brw->gen >= 6) {
 734       assert(nr_elements <= 34);
 735    } else {
 736       assert(nr_elements <= 18);
 737    }
 738
 739    struct brw_vertex_element *gen6_edgeflag_input = NULL;
 740
 741    BEGIN_BATCH(1 + nr_elements * 2);
 742    OUT_BATCH((_3DSTATE_VERTEX_ELEMENTS << 16) | (2 * nr_elements - 1));
 743    for (i = 0; i < brw->vb.nr_enabled; i++) {
 744       struct brw_vertex_element *input = brw->vb.enabled[i];
 745       uint32_t format = brw_get_vertex_surface_type(brw, input->glarray);
 746       uint32_t comp0 = BRW_VE1_COMPONENT_STORE_SRC;
 747       uint32_t comp1 = BRW_VE1_COMPONENT_STORE_SRC;
 748       uint32_t comp2 = BRW_VE1_COMPONENT_STORE_SRC;
 749       uint32_t comp3 = BRW_VE1_COMPONENT_STORE_SRC;
 750
 751       if (input == &brw->vb.inputs[VERT_ATTRIB_EDGEFLAG]) {
 752          /* Gen6+ passes edgeflag as sideband along with the vertex, instead
 753           * of in the VUE.  We have to upload it sideband as the last vertex
 754           * element according to the B-Spec.
 755           */
 756          if (brw->gen >= 6) {
 757             gen6_edgeflag_input = input;
 758             continue;
 759          }
 760       }
 761
 762       switch (input->glarray->Size) {
 763       case 0: comp0 = BRW_VE1_COMPONENT_STORE_0;
 764       case 1: comp1 = BRW_VE1_COMPONENT_STORE_0;
 765       case 2: comp2 = BRW_VE1_COMPONENT_STORE_0;
 766       case 3: comp3 = input->glarray->Integer ? BRW_VE1_COMPONENT_STORE_1_INT
 767                                               : BRW_VE1_COMPONENT_STORE_1_FLT;
 768          break;
 769       }
 770
 771       if (brw->gen >= 6) {
 772          OUT_BATCH((input->buffer << GEN6_VE0_INDEX_SHIFT) |
 773                    GEN6_VE0_VALID |
 774                    (format << BRW_VE0_FORMAT_SHIFT) |
 775                    (input->offset << BRW_VE0_SRC_OFFSET_SHIFT));
 776       } else {
 777          OUT_BATCH((input->buffer << BRW_VE0_INDEX_SHIFT) |
 778                    BRW_VE0_VALID |
 779                    (format << BRW_VE0_FORMAT_SHIFT) |
 780                    (input->offset << BRW_VE0_SRC_OFFSET_SHIFT));
 781       }
 782
 783       if (brw->gen >= 5)
 784           OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
 785                     (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
 786                     (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
 787                     (comp3 << BRW_VE1_COMPONENT_3_SHIFT));
 788       else
 789           OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
 790                     (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
 791                     (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
 792                     (comp3 << BRW_VE1_COMPONENT_3_SHIFT) |
 793                     ((i * 4) << BRW_VE1_DST_OFFSET_SHIFT));
 794    }
 795
 796    if (brw->vs.prog_data->uses_vertexid || brw->vs.prog_data->uses_instanceid) {
 797       uint32_t dw0 = 0, dw1 = 0;
 798       uint32_t comp0 = BRW_VE1_COMPONENT_STORE_0;
 799       uint32_t comp1 = BRW_VE1_COMPONENT_STORE_0;
 800       uint32_t comp2 = BRW_VE1_COMPONENT_STORE_0;
 801       uint32_t comp3 = BRW_VE1_COMPONENT_STORE_0;
 802
 803       if (brw->vs.prog_data->uses_vertexid) {
 804          comp0 = BRW_VE1_COMPONENT_STORE_SRC;
 805          comp2 = BRW_VE1_COMPONENT_STORE_VID;
 806       }
 807
 808       if (brw->vs.prog_data->uses_instanceid) {
 809          comp3 = BRW_VE1_COMPONENT_STORE_IID;
 810       }
 811
 812       dw1 = (comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
 813             (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
 814             (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
 815             (comp3 << BRW_VE1_COMPONENT_3_SHIFT);
 816
 817       if (brw->gen >= 6) {
 818          dw0 |= GEN6_VE0_VALID |
 819                 brw->vb.nr_buffers << GEN6_VE0_INDEX_SHIFT |
 820                 BRW_SURFACEFORMAT_R32_UINT << BRW_VE0_FORMAT_SHIFT;
 821       } else {
 822          dw0 |= BRW_VE0_VALID |
 823                 brw->vb.nr_buffers << BRW_VE0_INDEX_SHIFT |
 824                 BRW_SURFACEFORMAT_R32_UINT << BRW_VE0_FORMAT_SHIFT;
 825          dw1 |= (i * 4) << BRW_VE1_DST_OFFSET_SHIFT;
 826       }
 827
 828       /* Note that for gl_VertexID, gl_InstanceID, and gl_PrimitiveID values,
 829        * the format is ignored and the value is always int.
 830        */
 831
 832       OUT_BATCH(dw0);
 833       OUT_BATCH(dw1);
 834    }
 835
 836    if (brw->gen >= 6 && gen6_edgeflag_input) {
 837       uint32_t format =
 838          brw_get_vertex_surface_type(brw, gen6_edgeflag_input->glarray);
 839
 840       OUT_BATCH((gen6_edgeflag_input->buffer << GEN6_VE0_INDEX_SHIFT) |
 841                 GEN6_VE0_VALID |
 842                 GEN6_VE0_EDGE_FLAG_ENABLE |
 843                 (format << BRW_VE0_FORMAT_SHIFT) |
 844                 (gen6_edgeflag_input->offset << BRW_VE0_SRC_OFFSET_SHIFT));
 845       OUT_BATCH((BRW_VE1_COMPONENT_STORE_SRC << BRW_VE1_COMPONENT_0_SHIFT) |
 846                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT) |
 847                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) |
 848                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_3_SHIFT));
 849    }
 850
 851    ADVANCE_BATCH();
 852 }
 853
 854 const struct brw_tracked_state brw_vertices = {
 855    .dirty = {
 856       .mesa = _NEW_POLYGON,
 857       .brw = BRW_NEW_BATCH |
 858              BRW_NEW_VERTICES |
 859              BRW_NEW_VS_PROG_DATA,
 860    },
 861    .emit = brw_emit_vertices,
 862 };
 863
 864 static void
 865 brw_upload_indices(struct brw_context *brw)
 866 {
 867    struct gl_context *ctx = &brw->ctx;
 868    const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
 869    GLuint ib_size;
 870    drm_intel_bo *old_bo = brw->ib.bo;
 871    struct gl_buffer_object *bufferobj;
 872    GLuint offset;
 873    GLuint ib_type_size;
 874
 875    if (index_buffer == NULL)
 876       return;
 877
 878    ib_type_size = _mesa_sizeof_type(index_buffer->type);
 879    ib_size = ib_type_size * index_buffer->count;
 880    bufferobj = index_buffer->obj;
 881
 882    /* Turn into a proper VBO:
 883     */
 884    if (!_mesa_is_bufferobj(bufferobj)) {
 885       /* Get new bufferobj, offset:
 886        */
 887       intel_upload_data(brw, index_buffer->ptr, ib_size, ib_type_size,
 888                         &brw->ib.bo, &offset);
 889    } else {
 890       offset = (GLuint) (unsigned long) index_buffer->ptr;
 891
 892       /* If the index buffer isn't aligned to its element size, we have to
 893        * rebase it into a temporary.
 894        */
 895       if ((ib_type_size - 1) & offset) {
 896          perf_debug("copying index buffer to a temporary to work around "
 897                     "misaligned offset %d\n", offset);
 898
 899          GLubyte *map = ctx->Driver.MapBufferRange(ctx,
 900                                                    offset,
 901                                                    ib_size,
 902                                                    GL_MAP_READ_BIT,
 903                                                    bufferobj,
 904                                                    MAP_INTERNAL);
 905
 906          intel_upload_data(brw, map, ib_size, ib_type_size,
 907                            &brw->ib.bo, &offset);
 908
 909          ctx->Driver.UnmapBuffer(ctx, bufferobj, MAP_INTERNAL);
 910       } else {
 911          drm_intel_bo *bo =
 912             intel_bufferobj_buffer(brw, intel_buffer_object(bufferobj),
 913                                    offset, ib_size);
 914          if (bo != brw->ib.bo) {
 915             drm_intel_bo_unreference(brw->ib.bo);
 916             brw->ib.bo = bo;
 917             drm_intel_bo_reference(bo);
 918          }
 919       }
 920    }
 921
 922    /* Use 3DPRIMITIVE's start_vertex_offset to avoid re-uploading
 923     * the index buffer state when we're just moving the start index
 924     * of our drawing.
 925     */
 926    brw->ib.start_vertex_offset = offset / ib_type_size;
 927
 928    if (brw->ib.bo != old_bo)
 929       brw->ctx.NewDriverState |= BRW_NEW_INDEX_BUFFER;
 930
 931    if (index_buffer->type != brw->ib.type) {
 932       brw->ib.type = index_buffer->type;
 933       brw->ctx.NewDriverState |= BRW_NEW_INDEX_BUFFER;
 934    }
 935 }
 936
 937 const struct brw_tracked_state brw_indices = {
 938    .dirty = {
 939       .mesa = 0,
 940       .brw = BRW_NEW_INDICES,
 941    },
 942    .emit = brw_upload_indices,
 943 };
 944
 945 static void
 946 brw_emit_index_buffer(struct brw_context *brw)
 947 {
 948    const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
 949    GLuint cut_index_setting;
 950
 951    if (index_buffer == NULL)
 952       return;
 953
 954    if (brw->prim_restart.enable_cut_index && !brw->is_haswell) {
 955       cut_index_setting = BRW_CUT_INDEX_ENABLE;
 956    } else {
 957       cut_index_setting = 0;
 958    }
 959
 960    BEGIN_BATCH(3);
 961    OUT_BATCH(CMD_INDEX_BUFFER << 16 |
 962              cut_index_setting |
 963              brw_get_index_type(index_buffer->type) |
 964              1);
 965    OUT_RELOC(brw->ib.bo,
 966              I915_GEM_DOMAIN_VERTEX, 0,
 967              0);
 968    OUT_RELOC(brw->ib.bo,
 969              I915_GEM_DOMAIN_VERTEX, 0,
 970              brw->ib.bo->size - 1);
 971    ADVANCE_BATCH();
 972 }
 973
 974 const struct brw_tracked_state brw_index_buffer = {
 975    .dirty = {
 976       .mesa = 0,
 977       .brw = BRW_NEW_BATCH |
 978              BRW_NEW_INDEX_BUFFER,
 979    },
 980    .emit = brw_emit_index_buffer,
 981 };