1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
30 #include "main/glheader.h"
31 #include "main/context.h"
32 #include "main/state.h"
33 #include "main/api_validate.h"
34 #include "main/enums.h"
37 #include "brw_defines.h"
38 #include "brw_context.h"
39 #include "brw_state.h"
40 #include "brw_fallback.h"
42 #include "intel_batchbuffer.h"
43 #include "intel_buffer_objects.h"
44 #include "intel_tex.h"
46 static GLuint double_types
[5] = {
48 BRW_SURFACEFORMAT_R64_FLOAT
,
49 BRW_SURFACEFORMAT_R64G64_FLOAT
,
50 BRW_SURFACEFORMAT_R64G64B64_FLOAT
,
51 BRW_SURFACEFORMAT_R64G64B64A64_FLOAT
54 static GLuint float_types
[5] = {
56 BRW_SURFACEFORMAT_R32_FLOAT
,
57 BRW_SURFACEFORMAT_R32G32_FLOAT
,
58 BRW_SURFACEFORMAT_R32G32B32_FLOAT
,
59 BRW_SURFACEFORMAT_R32G32B32A32_FLOAT
62 static GLuint uint_types_norm
[5] = {
64 BRW_SURFACEFORMAT_R32_UNORM
,
65 BRW_SURFACEFORMAT_R32G32_UNORM
,
66 BRW_SURFACEFORMAT_R32G32B32_UNORM
,
67 BRW_SURFACEFORMAT_R32G32B32A32_UNORM
70 static GLuint uint_types_scale
[5] = {
72 BRW_SURFACEFORMAT_R32_USCALED
,
73 BRW_SURFACEFORMAT_R32G32_USCALED
,
74 BRW_SURFACEFORMAT_R32G32B32_USCALED
,
75 BRW_SURFACEFORMAT_R32G32B32A32_USCALED
78 static GLuint int_types_norm
[5] = {
80 BRW_SURFACEFORMAT_R32_SNORM
,
81 BRW_SURFACEFORMAT_R32G32_SNORM
,
82 BRW_SURFACEFORMAT_R32G32B32_SNORM
,
83 BRW_SURFACEFORMAT_R32G32B32A32_SNORM
86 static GLuint int_types_scale
[5] = {
88 BRW_SURFACEFORMAT_R32_SSCALED
,
89 BRW_SURFACEFORMAT_R32G32_SSCALED
,
90 BRW_SURFACEFORMAT_R32G32B32_SSCALED
,
91 BRW_SURFACEFORMAT_R32G32B32A32_SSCALED
94 static GLuint ushort_types_norm
[5] = {
96 BRW_SURFACEFORMAT_R16_UNORM
,
97 BRW_SURFACEFORMAT_R16G16_UNORM
,
98 BRW_SURFACEFORMAT_R16G16B16_UNORM
,
99 BRW_SURFACEFORMAT_R16G16B16A16_UNORM
102 static GLuint ushort_types_scale
[5] = {
104 BRW_SURFACEFORMAT_R16_USCALED
,
105 BRW_SURFACEFORMAT_R16G16_USCALED
,
106 BRW_SURFACEFORMAT_R16G16B16_USCALED
,
107 BRW_SURFACEFORMAT_R16G16B16A16_USCALED
110 static GLuint short_types_norm
[5] = {
112 BRW_SURFACEFORMAT_R16_SNORM
,
113 BRW_SURFACEFORMAT_R16G16_SNORM
,
114 BRW_SURFACEFORMAT_R16G16B16_SNORM
,
115 BRW_SURFACEFORMAT_R16G16B16A16_SNORM
118 static GLuint short_types_scale
[5] = {
120 BRW_SURFACEFORMAT_R16_SSCALED
,
121 BRW_SURFACEFORMAT_R16G16_SSCALED
,
122 BRW_SURFACEFORMAT_R16G16B16_SSCALED
,
123 BRW_SURFACEFORMAT_R16G16B16A16_SSCALED
126 static GLuint ubyte_types_norm
[5] = {
128 BRW_SURFACEFORMAT_R8_UNORM
,
129 BRW_SURFACEFORMAT_R8G8_UNORM
,
130 BRW_SURFACEFORMAT_R8G8B8_UNORM
,
131 BRW_SURFACEFORMAT_R8G8B8A8_UNORM
134 static GLuint ubyte_types_scale
[5] = {
136 BRW_SURFACEFORMAT_R8_USCALED
,
137 BRW_SURFACEFORMAT_R8G8_USCALED
,
138 BRW_SURFACEFORMAT_R8G8B8_USCALED
,
139 BRW_SURFACEFORMAT_R8G8B8A8_USCALED
142 static GLuint byte_types_norm
[5] = {
144 BRW_SURFACEFORMAT_R8_SNORM
,
145 BRW_SURFACEFORMAT_R8G8_SNORM
,
146 BRW_SURFACEFORMAT_R8G8B8_SNORM
,
147 BRW_SURFACEFORMAT_R8G8B8A8_SNORM
150 static GLuint byte_types_scale
[5] = {
152 BRW_SURFACEFORMAT_R8_SSCALED
,
153 BRW_SURFACEFORMAT_R8G8_SSCALED
,
154 BRW_SURFACEFORMAT_R8G8B8_SSCALED
,
155 BRW_SURFACEFORMAT_R8G8B8A8_SSCALED
160 * Given vertex array type/size/format/normalized info, return
161 * the appopriate hardware surface type.
162 * Format will be GL_RGBA or possibly GL_BGRA for GLubyte[4] color arrays.
164 static GLuint
get_surface_type( GLenum type
, GLuint size
,
165 GLenum format
, GLboolean normalized
)
167 if (INTEL_DEBUG
& DEBUG_VERTS
)
168 _mesa_printf("type %s size %d normalized %d\n",
169 _mesa_lookup_enum_by_nr(type
), size
, normalized
);
173 case GL_DOUBLE
: return double_types
[size
];
174 case GL_FLOAT
: return float_types
[size
];
175 case GL_INT
: return int_types_norm
[size
];
176 case GL_SHORT
: return short_types_norm
[size
];
177 case GL_BYTE
: return byte_types_norm
[size
];
178 case GL_UNSIGNED_INT
: return uint_types_norm
[size
];
179 case GL_UNSIGNED_SHORT
: return ushort_types_norm
[size
];
180 case GL_UNSIGNED_BYTE
:
181 if (format
== GL_BGRA
) {
182 /* See GL_EXT_vertex_array_bgra */
184 return BRW_SURFACEFORMAT_B8G8R8A8_UNORM
;
187 return ubyte_types_norm
[size
];
189 default: assert(0); return 0;
193 assert(format
== GL_RGBA
); /* sanity check */
195 case GL_DOUBLE
: return double_types
[size
];
196 case GL_FLOAT
: return float_types
[size
];
197 case GL_INT
: return int_types_scale
[size
];
198 case GL_SHORT
: return short_types_scale
[size
];
199 case GL_BYTE
: return byte_types_scale
[size
];
200 case GL_UNSIGNED_INT
: return uint_types_scale
[size
];
201 case GL_UNSIGNED_SHORT
: return ushort_types_scale
[size
];
202 case GL_UNSIGNED_BYTE
: return ubyte_types_scale
[size
];
203 default: assert(0); return 0;
209 static GLuint
get_size( GLenum type
)
212 case GL_DOUBLE
: return sizeof(GLdouble
);
213 case GL_FLOAT
: return sizeof(GLfloat
);
214 case GL_INT
: return sizeof(GLint
);
215 case GL_SHORT
: return sizeof(GLshort
);
216 case GL_BYTE
: return sizeof(GLbyte
);
217 case GL_UNSIGNED_INT
: return sizeof(GLuint
);
218 case GL_UNSIGNED_SHORT
: return sizeof(GLushort
);
219 case GL_UNSIGNED_BYTE
: return sizeof(GLubyte
);
224 static GLuint
get_index_type(GLenum type
)
227 case GL_UNSIGNED_BYTE
: return BRW_INDEX_BYTE
;
228 case GL_UNSIGNED_SHORT
: return BRW_INDEX_WORD
;
229 case GL_UNSIGNED_INT
: return BRW_INDEX_DWORD
;
230 default: assert(0); return 0;
234 static void wrap_buffers( struct brw_context
*brw
,
237 if (size
< BRW_UPLOAD_INIT_SIZE
)
238 size
= BRW_UPLOAD_INIT_SIZE
;
240 brw
->vb
.upload
.offset
= 0;
242 if (brw
->vb
.upload
.bo
!= NULL
)
243 dri_bo_unreference(brw
->vb
.upload
.bo
);
244 brw
->vb
.upload
.bo
= dri_bo_alloc(brw
->intel
.bufmgr
, "temporary VBO",
247 /* Set the internal VBO\ to no-backing-store. We only use them as a
248 * temporary within a brw_try_draw_prims while the lock is held.
250 /* DON'T DO THIS AS IF WE HAVE TO RE-ORG MEMORY WE NEED SOMEWHERE WITH
251 FAKE TO PUSH THIS STUFF */
252 // if (!brw->intel.ttm)
253 // dri_bo_fake_disable_backing_store(brw->vb.upload.bo, NULL, NULL);
256 static void get_space( struct brw_context
*brw
,
259 GLuint
*offset_return
)
261 size
= ALIGN(size
, 64);
263 if (brw
->vb
.upload
.bo
== NULL
||
264 brw
->vb
.upload
.offset
+ size
> brw
->vb
.upload
.bo
->size
) {
265 wrap_buffers(brw
, size
);
268 assert(*bo_return
== NULL
);
269 dri_bo_reference(brw
->vb
.upload
.bo
);
270 *bo_return
= brw
->vb
.upload
.bo
;
271 *offset_return
= brw
->vb
.upload
.offset
;
272 brw
->vb
.upload
.offset
+= size
;
276 copy_array_to_vbo_array( struct brw_context
*brw
,
277 struct brw_vertex_element
*element
,
280 struct intel_context
*intel
= &brw
->intel
;
281 GLuint size
= element
->count
* dst_stride
;
283 get_space(brw
, size
, &element
->bo
, &element
->offset
);
285 if (element
->glarray
->StrideB
== 0) {
286 assert(element
->count
== 1);
289 element
->stride
= dst_stride
;
292 if (dst_stride
== element
->glarray
->StrideB
) {
293 if (intel
->intelScreen
->kernel_exec_fencing
) {
294 drm_intel_gem_bo_map_gtt(element
->bo
);
295 memcpy((char *)element
->bo
->virtual + element
->offset
,
296 element
->glarray
->Ptr
, size
);
297 drm_intel_gem_bo_unmap_gtt(element
->bo
);
299 dri_bo_subdata(element
->bo
,
302 element
->glarray
->Ptr
);
306 const unsigned char *src
= element
->glarray
->Ptr
;
309 if (intel
->intelScreen
->kernel_exec_fencing
) {
310 drm_intel_gem_bo_map_gtt(element
->bo
);
311 dest
= element
->bo
->virtual;
312 dest
+= element
->offset
;
314 for (i
= 0; i
< element
->count
; i
++) {
315 memcpy(dest
, src
, dst_stride
);
316 src
+= element
->glarray
->StrideB
;
320 drm_intel_gem_bo_unmap_gtt(element
->bo
);
324 data
= _mesa_malloc(dst_stride
* element
->count
);
326 for (i
= 0; i
< element
->count
; i
++) {
327 memcpy(dest
, src
, dst_stride
);
328 src
+= element
->glarray
->StrideB
;
332 dri_bo_subdata(element
->bo
,
342 static void brw_prepare_vertices(struct brw_context
*brw
)
344 GLcontext
*ctx
= &brw
->intel
.ctx
;
345 struct intel_context
*intel
= intel_context(ctx
);
346 GLbitfield vs_inputs
= brw
->vs
.prog_data
->inputs_read
;
348 const unsigned char *ptr
= NULL
;
349 GLuint interleave
= 0;
350 unsigned int min_index
= brw
->vb
.min_index
;
351 unsigned int max_index
= brw
->vb
.max_index
;
353 struct brw_vertex_element
*upload
[VERT_ATTRIB_MAX
];
354 GLuint nr_uploads
= 0;
356 /* First build an array of pointers to ve's in vb.inputs_read
359 _mesa_printf("%s %d..%d\n", __FUNCTION__
, min_index
, max_index
);
361 /* Accumulate the list of enabled arrays. */
362 brw
->vb
.nr_enabled
= 0;
364 GLuint i
= _mesa_ffsll(vs_inputs
) - 1;
365 struct brw_vertex_element
*input
= &brw
->vb
.inputs
[i
];
367 vs_inputs
&= ~(1 << i
);
368 brw
->vb
.enabled
[brw
->vb
.nr_enabled
++] = input
;
371 /* XXX: In the rare cases where this happens we fallback all
372 * the way to software rasterization, although a tnl fallback
373 * would be sufficient. I don't know of *any* real world
374 * cases with > 17 vertex attributes enabled, so it probably
375 * isn't an issue at this point.
377 if (brw
->vb
.nr_enabled
>= BRW_VEP_MAX
) {
382 for (i
= 0; i
< brw
->vb
.nr_enabled
; i
++) {
383 struct brw_vertex_element
*input
= brw
->vb
.enabled
[i
];
385 input
->element_size
= get_size(input
->glarray
->Type
) * input
->glarray
->Size
;
387 if (input
->glarray
->BufferObj
->Name
!= 0) {
388 struct intel_buffer_object
*intel_buffer
=
389 intel_buffer_object(input
->glarray
->BufferObj
);
391 /* Named buffer object: Just reference its contents directly. */
392 dri_bo_unreference(input
->bo
);
393 input
->bo
= intel_bufferobj_buffer(intel
, intel_buffer
,
395 dri_bo_reference(input
->bo
);
396 input
->offset
= (unsigned long)input
->glarray
->Ptr
;
397 input
->stride
= input
->glarray
->StrideB
;
398 input
->count
= input
->glarray
->_MaxElement
;
400 /* This is a common place to reach if the user mistakenly supplies
401 * a pointer in place of a VBO offset. If we just let it go through,
402 * we may end up dereferencing a pointer beyond the bounds of the
403 * GTT. We would hope that the VBO's max_index would save us, but
404 * Mesa appears to hand us min/max values not clipped to the
405 * array object's _MaxElement, and _MaxElement frequently appears
406 * to be wrong anyway.
408 * The VBO spec allows application termination in this case, and it's
409 * probably a service to the poor programmer to do so rather than
410 * trying to just not render.
412 assert(input
->offset
< input
->bo
->size
);
414 input
->count
= input
->glarray
->StrideB
? max_index
+ 1 - min_index
: 1;
415 if (input
->bo
!= NULL
) {
416 /* Already-uploaded vertex data is present from a previous
417 * prepare_vertices, but we had to re-validate state due to
418 * check_aperture failing and a new batch being produced.
423 /* Queue the buffer object up to be uploaded in the next pass,
424 * when we've decided if we're doing interleaved or not.
426 if (input
->attrib
== VERT_ATTRIB_POS
) {
427 /* Position array not properly enabled:
429 if (input
->glarray
->StrideB
== 0) {
434 interleave
= input
->glarray
->StrideB
;
435 ptr
= input
->glarray
->Ptr
;
437 else if (interleave
!= input
->glarray
->StrideB
||
438 (const unsigned char *)input
->glarray
->Ptr
- ptr
< 0 ||
439 (const unsigned char *)input
->glarray
->Ptr
- ptr
> interleave
)
444 upload
[nr_uploads
++] = input
;
446 /* We rebase drawing to start at element zero only when
447 * varyings are not in vbos, which means we can end up
448 * uploading non-varying arrays (stride != 0) when min_index
449 * is zero. This doesn't matter as the amount to upload is
450 * the same for these arrays whether the draw call is rebased
451 * or not - we just have to upload the one element.
453 assert(min_index
== 0 || input
->glarray
->StrideB
== 0);
457 /* Handle any arrays to be uploaded. */
458 if (nr_uploads
> 1 && interleave
&& interleave
<= 256) {
459 /* All uploads are interleaved, so upload the arrays together as
460 * interleaved. First, upload the contents and set up upload[0].
462 copy_array_to_vbo_array(brw
, upload
[0], interleave
);
464 for (i
= 1; i
< nr_uploads
; i
++) {
465 /* Then, just point upload[i] at upload[0]'s buffer. */
466 upload
[i
]->stride
= interleave
;
467 upload
[i
]->offset
= upload
[0]->offset
+
468 ((const unsigned char *)upload
[i
]->glarray
->Ptr
- ptr
);
469 upload
[i
]->bo
= upload
[0]->bo
;
470 dri_bo_reference(upload
[i
]->bo
);
474 /* Upload non-interleaved arrays */
475 for (i
= 0; i
< nr_uploads
; i
++) {
476 copy_array_to_vbo_array(brw
, upload
[i
], upload
[i
]->element_size
);
480 brw_prepare_query_begin(brw
);
482 for (i
= 0; i
< brw
->vb
.nr_enabled
; i
++) {
483 struct brw_vertex_element
*input
= brw
->vb
.enabled
[i
];
485 brw_add_validated_bo(brw
, input
->bo
);
489 static void brw_emit_vertices(struct brw_context
*brw
)
491 GLcontext
*ctx
= &brw
->intel
.ctx
;
492 struct intel_context
*intel
= intel_context(ctx
);
495 brw_emit_query_begin(brw
);
497 /* If the VS doesn't read any inputs (calculating vertex position from
498 * a state variable for some reason, for example), emit a single pad
499 * VERTEX_ELEMENT struct and bail.
501 * The stale VB state stays in place, but they don't do anything unless
502 * a VE loads from them.
504 if (brw
->vb
.nr_enabled
== 0) {
505 BEGIN_BATCH(3, IGNORE_CLIPRECTS
);
506 OUT_BATCH((CMD_VERTEX_ELEMENT
<< 16) | 1);
507 OUT_BATCH((0 << BRW_VE0_INDEX_SHIFT
) |
509 (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT
<< BRW_VE0_FORMAT_SHIFT
) |
510 (0 << BRW_VE0_SRC_OFFSET_SHIFT
));
511 OUT_BATCH((BRW_VE1_COMPONENT_STORE_0
<< BRW_VE1_COMPONENT_0_SHIFT
) |
512 (BRW_VE1_COMPONENT_STORE_0
<< BRW_VE1_COMPONENT_1_SHIFT
) |
513 (BRW_VE1_COMPONENT_STORE_0
<< BRW_VE1_COMPONENT_2_SHIFT
) |
514 (BRW_VE1_COMPONENT_STORE_1_FLT
<< BRW_VE1_COMPONENT_3_SHIFT
));
519 /* Now emit VB and VEP state packets.
521 * This still defines a hardware VB for each input, even if they
522 * are interleaved or from the same VBO. TBD if this makes a
523 * performance difference.
525 BEGIN_BATCH(1 + brw
->vb
.nr_enabled
* 4, IGNORE_CLIPRECTS
);
526 OUT_BATCH((CMD_VERTEX_BUFFER
<< 16) |
527 ((1 + brw
->vb
.nr_enabled
* 4) - 2));
529 for (i
= 0; i
< brw
->vb
.nr_enabled
; i
++) {
530 struct brw_vertex_element
*input
= brw
->vb
.enabled
[i
];
532 OUT_BATCH((i
<< BRW_VB0_INDEX_SHIFT
) |
533 BRW_VB0_ACCESS_VERTEXDATA
|
534 (input
->stride
<< BRW_VB0_PITCH_SHIFT
));
536 I915_GEM_DOMAIN_VERTEX
, 0,
538 if (BRW_IS_IGDNG(brw
)) {
541 I915_GEM_DOMAIN_VERTEX
, 0,
542 input
->offset
+ input
->stride
* input
->count
);
544 assert(input
->count
== 1);
546 I915_GEM_DOMAIN_VERTEX
, 0,
547 input
->offset
+ input
->element_size
);
550 OUT_BATCH(input
->stride
? input
->count
: 0);
551 OUT_BATCH(0); /* Instance data step rate */
555 BEGIN_BATCH(1 + brw
->vb
.nr_enabled
* 2, IGNORE_CLIPRECTS
);
556 OUT_BATCH((CMD_VERTEX_ELEMENT
<< 16) | ((1 + brw
->vb
.nr_enabled
* 2) - 2));
557 for (i
= 0; i
< brw
->vb
.nr_enabled
; i
++) {
558 struct brw_vertex_element
*input
= brw
->vb
.enabled
[i
];
559 uint32_t format
= get_surface_type(input
->glarray
->Type
,
560 input
->glarray
->Size
,
561 input
->glarray
->Format
,
562 input
->glarray
->Normalized
);
563 uint32_t comp0
= BRW_VE1_COMPONENT_STORE_SRC
;
564 uint32_t comp1
= BRW_VE1_COMPONENT_STORE_SRC
;
565 uint32_t comp2
= BRW_VE1_COMPONENT_STORE_SRC
;
566 uint32_t comp3
= BRW_VE1_COMPONENT_STORE_SRC
;
568 switch (input
->glarray
->Size
) {
569 case 0: comp0
= BRW_VE1_COMPONENT_STORE_0
;
570 case 1: comp1
= BRW_VE1_COMPONENT_STORE_0
;
571 case 2: comp2
= BRW_VE1_COMPONENT_STORE_0
;
572 case 3: comp3
= BRW_VE1_COMPONENT_STORE_1_FLT
;
576 OUT_BATCH((i
<< BRW_VE0_INDEX_SHIFT
) |
578 (format
<< BRW_VE0_FORMAT_SHIFT
) |
579 (0 << BRW_VE0_SRC_OFFSET_SHIFT
));
581 if (BRW_IS_IGDNG(brw
))
582 OUT_BATCH((comp0
<< BRW_VE1_COMPONENT_0_SHIFT
) |
583 (comp1
<< BRW_VE1_COMPONENT_1_SHIFT
) |
584 (comp2
<< BRW_VE1_COMPONENT_2_SHIFT
) |
585 (comp3
<< BRW_VE1_COMPONENT_3_SHIFT
));
587 OUT_BATCH((comp0
<< BRW_VE1_COMPONENT_0_SHIFT
) |
588 (comp1
<< BRW_VE1_COMPONENT_1_SHIFT
) |
589 (comp2
<< BRW_VE1_COMPONENT_2_SHIFT
) |
590 (comp3
<< BRW_VE1_COMPONENT_3_SHIFT
) |
591 ((i
* 4) << BRW_VE1_DST_OFFSET_SHIFT
));
596 const struct brw_tracked_state brw_vertices
= {
599 .brw
= BRW_NEW_BATCH
| BRW_NEW_VERTICES
,
602 .prepare
= brw_prepare_vertices
,
603 .emit
= brw_emit_vertices
,
606 static void brw_prepare_indices(struct brw_context
*brw
)
608 GLcontext
*ctx
= &brw
->intel
.ctx
;
609 struct intel_context
*intel
= &brw
->intel
;
610 const struct _mesa_index_buffer
*index_buffer
= brw
->ib
.ib
;
613 struct gl_buffer_object
*bufferobj
;
617 if (index_buffer
== NULL
)
620 ib_type_size
= get_size(index_buffer
->type
);
621 ib_size
= ib_type_size
* index_buffer
->count
;
622 bufferobj
= index_buffer
->obj
;;
624 /* Turn into a proper VBO:
626 if (!bufferobj
->Name
) {
627 brw
->ib
.start_vertex_offset
= 0;
629 /* Get new bufferobj, offset:
631 get_space(brw
, ib_size
, &bo
, &offset
);
635 if (intel
->intelScreen
->kernel_exec_fencing
) {
636 drm_intel_gem_bo_map_gtt(bo
);
637 memcpy((char *)bo
->virtual + offset
, index_buffer
->ptr
, ib_size
);
638 drm_intel_gem_bo_unmap_gtt(bo
);
640 dri_bo_subdata(bo
, offset
, ib_size
, index_buffer
->ptr
);
643 offset
= (GLuint
) (unsigned long) index_buffer
->ptr
;
644 brw
->ib
.start_vertex_offset
= 0;
646 /* If the index buffer isn't aligned to its element size, we have to
647 * rebase it into a temporary.
649 if ((get_size(index_buffer
->type
) - 1) & offset
) {
650 GLubyte
*map
= ctx
->Driver
.MapBuffer(ctx
,
651 GL_ELEMENT_ARRAY_BUFFER_ARB
,
656 get_space(brw
, ib_size
, &bo
, &offset
);
658 dri_bo_subdata(bo
, offset
, ib_size
, map
);
660 ctx
->Driver
.UnmapBuffer(ctx
, GL_ELEMENT_ARRAY_BUFFER_ARB
, bufferobj
);
662 bo
= intel_bufferobj_buffer(intel
, intel_buffer_object(bufferobj
),
664 dri_bo_reference(bo
);
666 /* Use CMD_3D_PRIM's start_vertex_offset to avoid re-uploading
667 * the index buffer state when we're just moving the start index
670 brw
->ib
.start_vertex_offset
= offset
/ ib_type_size
;
676 if (brw
->ib
.bo
!= bo
||
677 brw
->ib
.offset
!= offset
||
678 brw
->ib
.size
!= ib_size
)
680 drm_intel_bo_unreference(brw
->ib
.bo
);
682 brw
->ib
.offset
= offset
;
683 brw
->ib
.size
= ib_size
;
685 brw
->state
.dirty
.brw
|= BRW_NEW_INDEX_BUFFER
;
687 drm_intel_bo_unreference(bo
);
690 brw_add_validated_bo(brw
, brw
->ib
.bo
);
693 const struct brw_tracked_state brw_indices
= {
696 .brw
= BRW_NEW_INDICES
,
699 .prepare
= brw_prepare_indices
,
702 static void brw_emit_index_buffer(struct brw_context
*brw
)
704 struct intel_context
*intel
= &brw
->intel
;
705 const struct _mesa_index_buffer
*index_buffer
= brw
->ib
.ib
;
707 if (index_buffer
== NULL
)
710 /* Emit the indexbuffer packet:
713 struct brw_indexbuffer ib
;
715 memset(&ib
, 0, sizeof(ib
));
717 ib
.header
.bits
.opcode
= CMD_INDEX_BUFFER
;
718 ib
.header
.bits
.length
= sizeof(ib
)/4 - 2;
719 ib
.header
.bits
.index_format
= get_index_type(index_buffer
->type
);
720 ib
.header
.bits
.cut_index_enable
= 0;
722 BEGIN_BATCH(4, IGNORE_CLIPRECTS
);
723 OUT_BATCH( ib
.header
.dword
);
724 OUT_RELOC(brw
->ib
.bo
,
725 I915_GEM_DOMAIN_VERTEX
, 0,
727 OUT_RELOC(brw
->ib
.bo
,
728 I915_GEM_DOMAIN_VERTEX
, 0,
729 brw
->ib
.offset
+ brw
->ib
.size
);
735 const struct brw_tracked_state brw_index_buffer
= {
738 .brw
= BRW_NEW_BATCH
| BRW_NEW_INDEX_BUFFER
,
741 .emit
= brw_emit_index_buffer
,