src/mesa/drivers/dri/i965/brw_draw_upload.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 VMware, Inc.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #include "main/glheader.h"
  29 #include "main/bufferobj.h"
  30 #include "main/context.h"
  31 #include "main/enums.h"
  32 #include "main/macros.h"
  33 #include "main/glformats.h"
  34
  35 #include "brw_draw.h"
  36 #include "brw_defines.h"
  37 #include "brw_context.h"
  38 #include "brw_state.h"
  39
  40 #include "intel_batchbuffer.h"
  41 #include "intel_buffer_objects.h"
  42
  43 static GLuint double_types[5] = {
  44    0,
  45    BRW_SURFACEFORMAT_R64_FLOAT,
  46    BRW_SURFACEFORMAT_R64G64_FLOAT,
  47    BRW_SURFACEFORMAT_R64G64B64_FLOAT,
  48    BRW_SURFACEFORMAT_R64G64B64A64_FLOAT
  49 };
  50
  51 static GLuint float_types[5] = {
  52    0,
  53    BRW_SURFACEFORMAT_R32_FLOAT,
  54    BRW_SURFACEFORMAT_R32G32_FLOAT,
  55    BRW_SURFACEFORMAT_R32G32B32_FLOAT,
  56    BRW_SURFACEFORMAT_R32G32B32A32_FLOAT
  57 };
  58
  59 static GLuint half_float_types[5] = {
  60    0,
  61    BRW_SURFACEFORMAT_R16_FLOAT,
  62    BRW_SURFACEFORMAT_R16G16_FLOAT,
  63    BRW_SURFACEFORMAT_R16G16B16A16_FLOAT,
  64    BRW_SURFACEFORMAT_R16G16B16A16_FLOAT
  65 };
  66
  67 static GLuint fixed_point_types[5] = {
  68    0,
  69    BRW_SURFACEFORMAT_R32_SFIXED,
  70    BRW_SURFACEFORMAT_R32G32_SFIXED,
  71    BRW_SURFACEFORMAT_R32G32B32_SFIXED,
  72    BRW_SURFACEFORMAT_R32G32B32A32_SFIXED,
  73 };
  74
  75 static GLuint uint_types_direct[5] = {
  76    0,
  77    BRW_SURFACEFORMAT_R32_UINT,
  78    BRW_SURFACEFORMAT_R32G32_UINT,
  79    BRW_SURFACEFORMAT_R32G32B32_UINT,
  80    BRW_SURFACEFORMAT_R32G32B32A32_UINT
  81 };
  82
  83 static GLuint uint_types_norm[5] = {
  84    0,
  85    BRW_SURFACEFORMAT_R32_UNORM,
  86    BRW_SURFACEFORMAT_R32G32_UNORM,
  87    BRW_SURFACEFORMAT_R32G32B32_UNORM,
  88    BRW_SURFACEFORMAT_R32G32B32A32_UNORM
  89 };
  90
  91 static GLuint uint_types_scale[5] = {
  92    0,
  93    BRW_SURFACEFORMAT_R32_USCALED,
  94    BRW_SURFACEFORMAT_R32G32_USCALED,
  95    BRW_SURFACEFORMAT_R32G32B32_USCALED,
  96    BRW_SURFACEFORMAT_R32G32B32A32_USCALED
  97 };
  98
  99 static GLuint int_types_direct[5] = {
 100    0,
 101    BRW_SURFACEFORMAT_R32_SINT,
 102    BRW_SURFACEFORMAT_R32G32_SINT,
 103    BRW_SURFACEFORMAT_R32G32B32_SINT,
 104    BRW_SURFACEFORMAT_R32G32B32A32_SINT
 105 };
 106
 107 static GLuint int_types_norm[5] = {
 108    0,
 109    BRW_SURFACEFORMAT_R32_SNORM,
 110    BRW_SURFACEFORMAT_R32G32_SNORM,
 111    BRW_SURFACEFORMAT_R32G32B32_SNORM,
 112    BRW_SURFACEFORMAT_R32G32B32A32_SNORM
 113 };
 114
 115 static GLuint int_types_scale[5] = {
 116    0,
 117    BRW_SURFACEFORMAT_R32_SSCALED,
 118    BRW_SURFACEFORMAT_R32G32_SSCALED,
 119    BRW_SURFACEFORMAT_R32G32B32_SSCALED,
 120    BRW_SURFACEFORMAT_R32G32B32A32_SSCALED
 121 };
 122
 123 static GLuint ushort_types_direct[5] = {
 124    0,
 125    BRW_SURFACEFORMAT_R16_UINT,
 126    BRW_SURFACEFORMAT_R16G16_UINT,
 127    BRW_SURFACEFORMAT_R16G16B16A16_UINT,
 128    BRW_SURFACEFORMAT_R16G16B16A16_UINT
 129 };
 130
 131 static GLuint ushort_types_norm[5] = {
 132    0,
 133    BRW_SURFACEFORMAT_R16_UNORM,
 134    BRW_SURFACEFORMAT_R16G16_UNORM,
 135    BRW_SURFACEFORMAT_R16G16B16_UNORM,
 136    BRW_SURFACEFORMAT_R16G16B16A16_UNORM
 137 };
 138
 139 static GLuint ushort_types_scale[5] = {
 140    0,
 141    BRW_SURFACEFORMAT_R16_USCALED,
 142    BRW_SURFACEFORMAT_R16G16_USCALED,
 143    BRW_SURFACEFORMAT_R16G16B16_USCALED,
 144    BRW_SURFACEFORMAT_R16G16B16A16_USCALED
 145 };
 146
 147 static GLuint short_types_direct[5] = {
 148    0,
 149    BRW_SURFACEFORMAT_R16_SINT,
 150    BRW_SURFACEFORMAT_R16G16_SINT,
 151    BRW_SURFACEFORMAT_R16G16B16A16_SINT,
 152    BRW_SURFACEFORMAT_R16G16B16A16_SINT
 153 };
 154
 155 static GLuint short_types_norm[5] = {
 156    0,
 157    BRW_SURFACEFORMAT_R16_SNORM,
 158    BRW_SURFACEFORMAT_R16G16_SNORM,
 159    BRW_SURFACEFORMAT_R16G16B16_SNORM,
 160    BRW_SURFACEFORMAT_R16G16B16A16_SNORM
 161 };
 162
 163 static GLuint short_types_scale[5] = {
 164    0,
 165    BRW_SURFACEFORMAT_R16_SSCALED,
 166    BRW_SURFACEFORMAT_R16G16_SSCALED,
 167    BRW_SURFACEFORMAT_R16G16B16_SSCALED,
 168    BRW_SURFACEFORMAT_R16G16B16A16_SSCALED
 169 };
 170
 171 static GLuint ubyte_types_direct[5] = {
 172    0,
 173    BRW_SURFACEFORMAT_R8_UINT,
 174    BRW_SURFACEFORMAT_R8G8_UINT,
 175    BRW_SURFACEFORMAT_R8G8B8A8_UINT,
 176    BRW_SURFACEFORMAT_R8G8B8A8_UINT
 177 };
 178
 179 static GLuint ubyte_types_norm[5] = {
 180    0,
 181    BRW_SURFACEFORMAT_R8_UNORM,
 182    BRW_SURFACEFORMAT_R8G8_UNORM,
 183    BRW_SURFACEFORMAT_R8G8B8_UNORM,
 184    BRW_SURFACEFORMAT_R8G8B8A8_UNORM
 185 };
 186
 187 static GLuint ubyte_types_scale[5] = {
 188    0,
 189    BRW_SURFACEFORMAT_R8_USCALED,
 190    BRW_SURFACEFORMAT_R8G8_USCALED,
 191    BRW_SURFACEFORMAT_R8G8B8_USCALED,
 192    BRW_SURFACEFORMAT_R8G8B8A8_USCALED
 193 };
 194
 195 static GLuint byte_types_direct[5] = {
 196    0,
 197    BRW_SURFACEFORMAT_R8_SINT,
 198    BRW_SURFACEFORMAT_R8G8_SINT,
 199    BRW_SURFACEFORMAT_R8G8B8A8_SINT,
 200    BRW_SURFACEFORMAT_R8G8B8A8_SINT
 201 };
 202
 203 static GLuint byte_types_norm[5] = {
 204    0,
 205    BRW_SURFACEFORMAT_R8_SNORM,
 206    BRW_SURFACEFORMAT_R8G8_SNORM,
 207    BRW_SURFACEFORMAT_R8G8B8_SNORM,
 208    BRW_SURFACEFORMAT_R8G8B8A8_SNORM
 209 };
 210
 211 static GLuint byte_types_scale[5] = {
 212    0,
 213    BRW_SURFACEFORMAT_R8_SSCALED,
 214    BRW_SURFACEFORMAT_R8G8_SSCALED,
 215    BRW_SURFACEFORMAT_R8G8B8_SSCALED,
 216    BRW_SURFACEFORMAT_R8G8B8A8_SSCALED
 217 };
 218
 219
 220 /**
 221  * Given vertex array type/size/format/normalized info, return
 222  * the appopriate hardware surface type.
 223  * Format will be GL_RGBA or possibly GL_BGRA for GLubyte[4] color arrays.
 224  */
 225 unsigned
 226 brw_get_vertex_surface_type(struct brw_context *brw,
 227                             const struct gl_client_array *glarray)
 228 {
 229    int size = glarray->Size;
 230
 231    if (unlikely(INTEL_DEBUG & DEBUG_VERTS))
 232       fprintf(stderr, "type %s size %d normalized %d\n",
 233               _mesa_lookup_enum_by_nr(glarray->Type),
 234               glarray->Size, glarray->Normalized);
 235
 236    if (glarray->Integer) {
 237       assert(glarray->Format == GL_RGBA); /* sanity check */
 238       switch (glarray->Type) {
 239       case GL_INT: return int_types_direct[size];
 240       case GL_SHORT: return short_types_direct[size];
 241       case GL_BYTE: return byte_types_direct[size];
 242       case GL_UNSIGNED_INT: return uint_types_direct[size];
 243       case GL_UNSIGNED_SHORT: return ushort_types_direct[size];
 244       case GL_UNSIGNED_BYTE: return ubyte_types_direct[size];
 245       default: unreachable("not reached");
 246       }
 247    } else if (glarray->Type == GL_UNSIGNED_INT_10F_11F_11F_REV) {
 248       return BRW_SURFACEFORMAT_R11G11B10_FLOAT;
 249    } else if (glarray->Normalized) {
 250       switch (glarray->Type) {
 251       case GL_DOUBLE: return double_types[size];
 252       case GL_FLOAT: return float_types[size];
 253       case GL_HALF_FLOAT: return half_float_types[size];
 254       case GL_INT: return int_types_norm[size];
 255       case GL_SHORT: return short_types_norm[size];
 256       case GL_BYTE: return byte_types_norm[size];
 257       case GL_UNSIGNED_INT: return uint_types_norm[size];
 258       case GL_UNSIGNED_SHORT: return ushort_types_norm[size];
 259       case GL_UNSIGNED_BYTE:
 260          if (glarray->Format == GL_BGRA) {
 261             /* See GL_EXT_vertex_array_bgra */
 262             assert(size == 4);
 263             return BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
 264          }
 265          else {
 266             return ubyte_types_norm[size];
 267          }
 268       case GL_FIXED:
 269          if (brw->gen >= 8 || brw->is_haswell)
 270             return fixed_point_types[size];
 271
 272          /* This produces GL_FIXED inputs as values between INT32_MIN and
 273           * INT32_MAX, which will be scaled down by 1/65536 by the VS.
 274           */
 275          return int_types_scale[size];
 276       /* See GL_ARB_vertex_type_2_10_10_10_rev.
 277        * W/A: Pre-Haswell, the hardware doesn't really support the formats we'd
 278        * like to use here, so upload everything as UINT and fix
 279        * it in the shader
 280        */
 281       case GL_INT_2_10_10_10_REV:
 282          assert(size == 4);
 283          if (brw->gen >= 8 || brw->is_haswell) {
 284             return glarray->Format == GL_BGRA
 285                ? BRW_SURFACEFORMAT_B10G10R10A2_SNORM
 286                : BRW_SURFACEFORMAT_R10G10B10A2_SNORM;
 287          }
 288          return BRW_SURFACEFORMAT_R10G10B10A2_UINT;
 289       case GL_UNSIGNED_INT_2_10_10_10_REV:
 290          assert(size == 4);
 291          if (brw->gen >= 8 || brw->is_haswell) {
 292             return glarray->Format == GL_BGRA
 293                ? BRW_SURFACEFORMAT_B10G10R10A2_UNORM
 294                : BRW_SURFACEFORMAT_R10G10B10A2_UNORM;
 295          }
 296          return BRW_SURFACEFORMAT_R10G10B10A2_UINT;
 297       default: unreachable("not reached");
 298       }
 299    }
 300    else {
 301       /* See GL_ARB_vertex_type_2_10_10_10_rev.
 302        * W/A: the hardware doesn't really support the formats we'd
 303        * like to use here, so upload everything as UINT and fix
 304        * it in the shader
 305        */
 306       if (glarray->Type == GL_INT_2_10_10_10_REV) {
 307          assert(size == 4);
 308          if (brw->gen >= 8 || brw->is_haswell) {
 309             return glarray->Format == GL_BGRA
 310                ? BRW_SURFACEFORMAT_B10G10R10A2_SSCALED
 311                : BRW_SURFACEFORMAT_R10G10B10A2_SSCALED;
 312          }
 313          return BRW_SURFACEFORMAT_R10G10B10A2_UINT;
 314       } else if (glarray->Type == GL_UNSIGNED_INT_2_10_10_10_REV) {
 315          assert(size == 4);
 316          if (brw->gen >= 8 || brw->is_haswell) {
 317             return glarray->Format == GL_BGRA
 318                ? BRW_SURFACEFORMAT_B10G10R10A2_USCALED
 319                : BRW_SURFACEFORMAT_R10G10B10A2_USCALED;
 320          }
 321          return BRW_SURFACEFORMAT_R10G10B10A2_UINT;
 322       }
 323       assert(glarray->Format == GL_RGBA); /* sanity check */
 324       switch (glarray->Type) {
 325       case GL_DOUBLE: return double_types[size];
 326       case GL_FLOAT: return float_types[size];
 327       case GL_HALF_FLOAT: return half_float_types[size];
 328       case GL_INT: return int_types_scale[size];
 329       case GL_SHORT: return short_types_scale[size];
 330       case GL_BYTE: return byte_types_scale[size];
 331       case GL_UNSIGNED_INT: return uint_types_scale[size];
 332       case GL_UNSIGNED_SHORT: return ushort_types_scale[size];
 333       case GL_UNSIGNED_BYTE: return ubyte_types_scale[size];
 334       case GL_FIXED:
 335          if (brw->gen >= 8 || brw->is_haswell)
 336             return fixed_point_types[size];
 337
 338          /* This produces GL_FIXED inputs as values between INT32_MIN and
 339           * INT32_MAX, which will be scaled down by 1/65536 by the VS.
 340           */
 341          return int_types_scale[size];
 342       default: unreachable("not reached");
 343       }
 344    }
 345 }
 346
 347 unsigned
 348 brw_get_index_type(GLenum type)
 349 {
 350    switch (type) {
 351    case GL_UNSIGNED_BYTE:  return BRW_INDEX_BYTE;
 352    case GL_UNSIGNED_SHORT: return BRW_INDEX_WORD;
 353    case GL_UNSIGNED_INT:   return BRW_INDEX_DWORD;
 354    default: unreachable("not reached");
 355    }
 356 }
 357
 358 static void
 359 copy_array_to_vbo_array(struct brw_context *brw,
 360                         struct brw_vertex_element *element,
 361                         int min, int max,
 362                         struct brw_vertex_buffer *buffer,
 363                         GLuint dst_stride)
 364 {
 365    const int src_stride = element->glarray->StrideB;
 366
 367    /* If the source stride is zero, we just want to upload the current
 368     * attribute once and set the buffer's stride to 0.  There's no need
 369     * to replicate it out.
 370     */
 371    if (src_stride == 0) {
 372       intel_upload_data(brw, element->glarray->Ptr,
 373                         element->glarray->_ElementSize,
 374                         element->glarray->_ElementSize,
 375                         &buffer->bo, &buffer->offset);
 376
 377       buffer->stride = 0;
 378       return;
 379    }
 380
 381    const unsigned char *src = element->glarray->Ptr + min * src_stride;
 382    int count = max - min + 1;
 383    GLuint size = count * dst_stride;
 384    uint8_t *dst = intel_upload_space(brw, size, dst_stride,
 385                                      &buffer->bo, &buffer->offset);
 386
 387    if (dst_stride == src_stride) {
 388       memcpy(dst, src, size);
 389    } else {
 390       while (count--) {
 391          memcpy(dst, src, dst_stride);
 392          src += src_stride;
 393          dst += dst_stride;
 394       }
 395    }
 396    buffer->stride = dst_stride;
 397 }
 398
 399 void
 400 brw_prepare_vertices(struct brw_context *brw)
 401 {
 402    struct gl_context *ctx = &brw->ctx;
 403    /* BRW_NEW_VS_PROG_DATA */
 404    GLbitfield64 vs_inputs = brw->vs.prog_data->inputs_read;
 405    const unsigned char *ptr = NULL;
 406    GLuint interleaved = 0;
 407    unsigned int min_index = brw->vb.min_index + brw->basevertex;
 408    unsigned int max_index = brw->vb.max_index + brw->basevertex;
 409    int delta, i, j;
 410
 411    struct brw_vertex_element *upload[VERT_ATTRIB_MAX];
 412    GLuint nr_uploads = 0;
 413
 414    /* _NEW_POLYGON
 415     *
 416     * On gen6+, edge flags don't end up in the VUE (either in or out of the
 417     * VS).  Instead, they're uploaded as the last vertex element, and the data
 418     * is passed sideband through the fixed function units.  So, we need to
 419     * prepare the vertex buffer for it, but it's not present in inputs_read.
 420     */
 421    if (brw->gen >= 6 && (ctx->Polygon.FrontMode != GL_FILL ||
 422                            ctx->Polygon.BackMode != GL_FILL)) {
 423       vs_inputs |= VERT_BIT_EDGEFLAG;
 424    }
 425
 426    if (0)
 427       fprintf(stderr, "%s %d..%d\n", __FUNCTION__, min_index, max_index);
 428
 429    /* Accumulate the list of enabled arrays. */
 430    brw->vb.nr_enabled = 0;
 431    while (vs_inputs) {
 432       GLuint i = ffsll(vs_inputs) - 1;
 433       struct brw_vertex_element *input = &brw->vb.inputs[i];
 434
 435       vs_inputs &= ~BITFIELD64_BIT(i);
 436       brw->vb.enabled[brw->vb.nr_enabled++] = input;
 437    }
 438
 439    if (brw->vb.nr_enabled == 0)
 440       return;
 441
 442    if (brw->vb.nr_buffers)
 443       return;
 444
 445    for (i = j = 0; i < brw->vb.nr_enabled; i++) {
 446       struct brw_vertex_element *input = brw->vb.enabled[i];
 447       const struct gl_client_array *glarray = input->glarray;
 448
 449       if (_mesa_is_bufferobj(glarray->BufferObj)) {
 450          struct intel_buffer_object *intel_buffer =
 451             intel_buffer_object(glarray->BufferObj);
 452          int k;
 453
 454          /* If we have a VB set to be uploaded for this buffer object
 455           * already, reuse that VB state so that we emit fewer
 456           * relocations.
 457           */
 458          for (k = 0; k < i; k++) {
 459             const struct gl_client_array *other = brw->vb.enabled[k]->glarray;
 460             if (glarray->BufferObj == other->BufferObj &&
 461                 glarray->StrideB == other->StrideB &&
 462                 glarray->InstanceDivisor == other->InstanceDivisor &&
 463                 (uintptr_t)(glarray->Ptr - other->Ptr) < glarray->StrideB)
 464             {
 465                input->buffer = brw->vb.enabled[k]->buffer;
 466                input->offset = glarray->Ptr - other->Ptr;
 467                break;
 468             }
 469          }
 470          if (k == i) {
 471             struct brw_vertex_buffer *buffer = &brw->vb.buffers[j];
 472
 473             /* Named buffer object: Just reference its contents directly. */
 474             buffer->offset = (uintptr_t)glarray->Ptr;
 475             buffer->stride = glarray->StrideB;
 476             buffer->step_rate = glarray->InstanceDivisor;
 477
 478             uint32_t offset, size;
 479             if (glarray->InstanceDivisor) {
 480                offset = buffer->offset;
 481                size = (buffer->stride * ((brw->num_instances /
 482                                           glarray->InstanceDivisor) - 1) +
 483                        glarray->_ElementSize);
 484             } else {
 485                if (min_index == -1) {
 486                   offset = 0;
 487                   size = intel_buffer->Base.Size;
 488                } else {
 489                   offset = buffer->offset + min_index * buffer->stride;
 490                   size = (buffer->stride * (max_index - min_index) +
 491                           glarray->_ElementSize);
 492                }
 493             }
 494             buffer->bo = intel_bufferobj_buffer(brw, intel_buffer,
 495                                                 offset, size);
 496             drm_intel_bo_reference(buffer->bo);
 497
 498             input->buffer = j++;
 499             input->offset = 0;
 500          }
 501
 502          /* This is a common place to reach if the user mistakenly supplies
 503           * a pointer in place of a VBO offset.  If we just let it go through,
 504           * we may end up dereferencing a pointer beyond the bounds of the
 505           * GTT.
 506           *
 507           * The VBO spec allows application termination in this case, and it's
 508           * probably a service to the poor programmer to do so rather than
 509           * trying to just not render.
 510           */
 511          assert(input->offset < brw->vb.buffers[input->buffer].bo->size);
 512       } else {
 513          /* Queue the buffer object up to be uploaded in the next pass,
 514           * when we've decided if we're doing interleaved or not.
 515           */
 516          if (nr_uploads == 0) {
 517             interleaved = glarray->StrideB;
 518             ptr = glarray->Ptr;
 519          }
 520          else if (interleaved != glarray->StrideB ||
 521                   glarray->Ptr < ptr ||
 522                   (uintptr_t)(glarray->Ptr - ptr) + glarray->_ElementSize > interleaved)
 523          {
 524             /* If our stride is different from the first attribute's stride,
 525              * or if the first attribute's stride didn't cover our element,
 526              * disable the interleaved upload optimization.  The second case
 527              * can most commonly occur in cases where there is a single vertex
 528              * and, for example, the data is stored on the application's
 529              * stack.
 530              *
 531              * NOTE: This will also disable the optimization in cases where
 532              * the data is in a different order than the array indices.
 533              * Something like:
 534              *
 535              *     float data[...];
 536              *     glVertexAttribPointer(0, 4, GL_FLOAT, 32, &data[4]);
 537              *     glVertexAttribPointer(1, 4, GL_FLOAT, 32, &data[0]);
 538              */
 539             interleaved = 0;
 540          }
 541
 542          upload[nr_uploads++] = input;
 543       }
 544    }
 545
 546    /* If we need to upload all the arrays, then we can trim those arrays to
 547     * only the used elements [min_index, max_index] so long as we adjust all
 548     * the values used in the 3DPRIMITIVE i.e. by setting the vertex bias.
 549     */
 550    brw->vb.start_vertex_bias = 0;
 551    delta = min_index;
 552    if (nr_uploads == brw->vb.nr_enabled) {
 553       brw->vb.start_vertex_bias = -delta;
 554       delta = 0;
 555    }
 556
 557    /* Handle any arrays to be uploaded. */
 558    if (nr_uploads > 1) {
 559       if (interleaved) {
 560          struct brw_vertex_buffer *buffer = &brw->vb.buffers[j];
 561          /* All uploads are interleaved, so upload the arrays together as
 562           * interleaved.  First, upload the contents and set up upload[0].
 563           */
 564          copy_array_to_vbo_array(brw, upload[0], min_index, max_index,
 565                                  buffer, interleaved);
 566          buffer->offset -= delta * interleaved;
 567
 568          for (i = 0; i < nr_uploads; i++) {
 569             /* Then, just point upload[i] at upload[0]'s buffer. */
 570             upload[i]->offset =
 571                ((const unsigned char *)upload[i]->glarray->Ptr - ptr);
 572             upload[i]->buffer = j;
 573          }
 574          j++;
 575
 576          nr_uploads = 0;
 577       }
 578    }
 579    /* Upload non-interleaved arrays */
 580    for (i = 0; i < nr_uploads; i++) {
 581       struct brw_vertex_buffer *buffer = &brw->vb.buffers[j];
 582       if (upload[i]->glarray->InstanceDivisor == 0) {
 583          copy_array_to_vbo_array(brw, upload[i], min_index, max_index,
 584                                  buffer, upload[i]->glarray->_ElementSize);
 585       } else {
 586          /* This is an instanced attribute, since its InstanceDivisor
 587           * is not zero. Therefore, its data will be stepped after the
 588           * instanced draw has been run InstanceDivisor times.
 589           */
 590          uint32_t instanced_attr_max_index =
 591             (brw->num_instances - 1) / upload[i]->glarray->InstanceDivisor;
 592          copy_array_to_vbo_array(brw, upload[i], 0, instanced_attr_max_index,
 593                                  buffer, upload[i]->glarray->_ElementSize);
 594       }
 595       buffer->offset -= delta * buffer->stride;
 596       buffer->step_rate = upload[i]->glarray->InstanceDivisor;
 597       upload[i]->buffer = j++;
 598       upload[i]->offset = 0;
 599    }
 600
 601    brw->vb.nr_buffers = j;
 602 }
 603
 604 void
 605 brw_prepare_shader_draw_parameters(struct brw_context *brw)
 606 {
 607    /* For non-indirect draws, upload gl_BaseVertex. */
 608    if (brw->vs.prog_data->uses_vertexid && brw->draw.draw_params_bo == NULL) {
 609       intel_upload_data(brw, &brw->draw.gl_basevertex, 4, 4,
 610                         &brw->draw.draw_params_bo,
 611                         &brw->draw.draw_params_offset);
 612    }
 613 }
 614
 615 /**
 616  * Emit a VERTEX_BUFFER_STATE entry (part of 3DSTATE_VERTEX_BUFFERS).
 617  */
 618 static void
 619 emit_vertex_buffer_state(struct brw_context *brw,
 620                          unsigned buffer_nr,
 621                          drm_intel_bo *bo,
 622                          unsigned bo_ending_address,
 623                          unsigned bo_offset,
 624                          unsigned stride,
 625                          unsigned step_rate)
 626 {
 627    struct gl_context *ctx = &brw->ctx;
 628    uint32_t dw0;
 629
 630    if (brw->gen >= 6) {
 631       dw0 = (buffer_nr << GEN6_VB0_INDEX_SHIFT) |
 632             (step_rate ? GEN6_VB0_ACCESS_INSTANCEDATA
 633                        : GEN6_VB0_ACCESS_VERTEXDATA);
 634    } else {
 635       dw0 = (buffer_nr << BRW_VB0_INDEX_SHIFT) |
 636             (step_rate ? BRW_VB0_ACCESS_INSTANCEDATA
 637                        : BRW_VB0_ACCESS_VERTEXDATA);
 638    }
 639
 640    if (brw->gen >= 7)
 641       dw0 |= GEN7_VB0_ADDRESS_MODIFYENABLE;
 642
 643    if (brw->gen == 7)
 644       dw0 |= GEN7_MOCS_L3 << 16;
 645
 646    WARN_ONCE(stride >= (brw->gen >= 5 ? 2048 : 2047),
 647              "VBO stride %d too large, bad rendering may occur\n",
 648              stride);
 649    OUT_BATCH(dw0 | (stride << BRW_VB0_PITCH_SHIFT));
 650    OUT_RELOC(bo, I915_GEM_DOMAIN_VERTEX, 0, bo_offset);
 651    if (brw->gen >= 5) {
 652       OUT_RELOC(bo, I915_GEM_DOMAIN_VERTEX, 0, bo_ending_address);
 653    } else {
 654       OUT_BATCH(0);
 655    }
 656    OUT_BATCH(step_rate);
 657 }
 658
 659 static void brw_emit_vertices(struct brw_context *brw)
 660 {
 661    GLuint i;
 662
 663    brw_prepare_vertices(brw);
 664    brw_prepare_shader_draw_parameters(brw);
 665
 666    brw_emit_query_begin(brw);
 667
 668    unsigned nr_elements = brw->vb.nr_enabled;
 669    if (brw->vs.prog_data->uses_vertexid || brw->vs.prog_data->uses_instanceid)
 670       ++nr_elements;
 671
 672    /* If the VS doesn't read any inputs (calculating vertex position from
 673     * a state variable for some reason, for example), emit a single pad
 674     * VERTEX_ELEMENT struct and bail.
 675     *
 676     * The stale VB state stays in place, but they don't do anything unless
 677     * a VE loads from them.
 678     */
 679    if (nr_elements == 0) {
 680       BEGIN_BATCH(3);
 681       OUT_BATCH((_3DSTATE_VERTEX_ELEMENTS << 16) | 1);
 682       if (brw->gen >= 6) {
 683          OUT_BATCH((0 << GEN6_VE0_INDEX_SHIFT) |
 684                    GEN6_VE0_VALID |
 685                    (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_VE0_FORMAT_SHIFT) |
 686                    (0 << BRW_VE0_SRC_OFFSET_SHIFT));
 687       } else {
 688          OUT_BATCH((0 << BRW_VE0_INDEX_SHIFT) |
 689                    BRW_VE0_VALID |
 690                    (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_VE0_FORMAT_SHIFT) |
 691                    (0 << BRW_VE0_SRC_OFFSET_SHIFT));
 692       }
 693       OUT_BATCH((BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_0_SHIFT) |
 694                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT) |
 695                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) |
 696                 (BRW_VE1_COMPONENT_STORE_1_FLT << BRW_VE1_COMPONENT_3_SHIFT));
 697       ADVANCE_BATCH();
 698       return;
 699    }
 700
 701    /* Now emit VB and VEP state packets.
 702     */
 703
 704    unsigned nr_buffers =
 705       brw->vb.nr_buffers + brw->vs.prog_data->uses_vertexid;
 706
 707    if (nr_buffers) {
 708       if (brw->gen >= 6) {
 709          assert(nr_buffers <= 33);
 710       } else {
 711          assert(nr_buffers <= 17);
 712       }
 713
 714       BEGIN_BATCH(1 + 4 * nr_buffers);
 715       OUT_BATCH((_3DSTATE_VERTEX_BUFFERS << 16) | (4 * nr_buffers - 1));
 716       for (i = 0; i < brw->vb.nr_buffers; i++) {
 717          struct brw_vertex_buffer *buffer = &brw->vb.buffers[i];
 718          emit_vertex_buffer_state(brw, i, buffer->bo, buffer->bo->size - 1,
 719                                   buffer->offset, buffer->stride,
 720                                   buffer->step_rate);
 721
 722       }
 723
 724       if (brw->vs.prog_data->uses_vertexid) {
 725          emit_vertex_buffer_state(brw, brw->vb.nr_buffers,
 726                                   brw->draw.draw_params_bo,
 727                                   brw->draw.draw_params_bo->size - 1,
 728                                   brw->draw.draw_params_offset,
 729                                   0,  /* stride */
 730                                   0); /* step rate */
 731       }
 732       ADVANCE_BATCH();
 733    }
 734
 735    /* The hardware allows one more VERTEX_ELEMENTS than VERTEX_BUFFERS, presumably
 736     * for VertexID/InstanceID.
 737     */
 738    if (brw->gen >= 6) {
 739       assert(nr_elements <= 34);
 740    } else {
 741       assert(nr_elements <= 18);
 742    }
 743
 744    struct brw_vertex_element *gen6_edgeflag_input = NULL;
 745
 746    BEGIN_BATCH(1 + nr_elements * 2);
 747    OUT_BATCH((_3DSTATE_VERTEX_ELEMENTS << 16) | (2 * nr_elements - 1));
 748    for (i = 0; i < brw->vb.nr_enabled; i++) {
 749       struct brw_vertex_element *input = brw->vb.enabled[i];
 750       uint32_t format = brw_get_vertex_surface_type(brw, input->glarray);
 751       uint32_t comp0 = BRW_VE1_COMPONENT_STORE_SRC;
 752       uint32_t comp1 = BRW_VE1_COMPONENT_STORE_SRC;
 753       uint32_t comp2 = BRW_VE1_COMPONENT_STORE_SRC;
 754       uint32_t comp3 = BRW_VE1_COMPONENT_STORE_SRC;
 755
 756       if (input == &brw->vb.inputs[VERT_ATTRIB_EDGEFLAG]) {
 757          /* Gen6+ passes edgeflag as sideband along with the vertex, instead
 758           * of in the VUE.  We have to upload it sideband as the last vertex
 759           * element according to the B-Spec.
 760           */
 761          if (brw->gen >= 6) {
 762             gen6_edgeflag_input = input;
 763             continue;
 764          }
 765       }
 766
 767       switch (input->glarray->Size) {
 768       case 0: comp0 = BRW_VE1_COMPONENT_STORE_0;
 769       case 1: comp1 = BRW_VE1_COMPONENT_STORE_0;
 770       case 2: comp2 = BRW_VE1_COMPONENT_STORE_0;
 771       case 3: comp3 = input->glarray->Integer ? BRW_VE1_COMPONENT_STORE_1_INT
 772                                               : BRW_VE1_COMPONENT_STORE_1_FLT;
 773          break;
 774       }
 775
 776       if (brw->gen >= 6) {
 777          OUT_BATCH((input->buffer << GEN6_VE0_INDEX_SHIFT) |
 778                    GEN6_VE0_VALID |
 779                    (format << BRW_VE0_FORMAT_SHIFT) |
 780                    (input->offset << BRW_VE0_SRC_OFFSET_SHIFT));
 781       } else {
 782          OUT_BATCH((input->buffer << BRW_VE0_INDEX_SHIFT) |
 783                    BRW_VE0_VALID |
 784                    (format << BRW_VE0_FORMAT_SHIFT) |
 785                    (input->offset << BRW_VE0_SRC_OFFSET_SHIFT));
 786       }
 787
 788       if (brw->gen >= 5)
 789           OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
 790                     (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
 791                     (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
 792                     (comp3 << BRW_VE1_COMPONENT_3_SHIFT));
 793       else
 794           OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
 795                     (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
 796                     (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
 797                     (comp3 << BRW_VE1_COMPONENT_3_SHIFT) |
 798                     ((i * 4) << BRW_VE1_DST_OFFSET_SHIFT));
 799    }
 800
 801    if (brw->gen >= 6 && gen6_edgeflag_input) {
 802       uint32_t format =
 803          brw_get_vertex_surface_type(brw, gen6_edgeflag_input->glarray);
 804
 805       OUT_BATCH((gen6_edgeflag_input->buffer << GEN6_VE0_INDEX_SHIFT) |
 806                 GEN6_VE0_VALID |
 807                 GEN6_VE0_EDGE_FLAG_ENABLE |
 808                 (format << BRW_VE0_FORMAT_SHIFT) |
 809                 (gen6_edgeflag_input->offset << BRW_VE0_SRC_OFFSET_SHIFT));
 810       OUT_BATCH((BRW_VE1_COMPONENT_STORE_SRC << BRW_VE1_COMPONENT_0_SHIFT) |
 811                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT) |
 812                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) |
 813                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_3_SHIFT));
 814    }
 815
 816    if (brw->vs.prog_data->uses_vertexid || brw->vs.prog_data->uses_instanceid) {
 817       uint32_t dw0 = 0, dw1 = 0;
 818       uint32_t comp0 = BRW_VE1_COMPONENT_STORE_0;
 819       uint32_t comp1 = BRW_VE1_COMPONENT_STORE_0;
 820       uint32_t comp2 = BRW_VE1_COMPONENT_STORE_0;
 821       uint32_t comp3 = BRW_VE1_COMPONENT_STORE_0;
 822
 823       if (brw->vs.prog_data->uses_vertexid) {
 824          comp0 = BRW_VE1_COMPONENT_STORE_SRC;
 825          comp2 = BRW_VE1_COMPONENT_STORE_VID;
 826       }
 827
 828       if (brw->vs.prog_data->uses_instanceid) {
 829          comp3 = BRW_VE1_COMPONENT_STORE_IID;
 830       }
 831
 832       dw1 = (comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
 833             (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
 834             (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
 835             (comp3 << BRW_VE1_COMPONENT_3_SHIFT);
 836
 837       if (brw->gen >= 6) {
 838          dw0 |= GEN6_VE0_VALID |
 839                 brw->vb.nr_buffers << GEN6_VE0_INDEX_SHIFT |
 840                 BRW_SURFACEFORMAT_R32_UINT << BRW_VE0_FORMAT_SHIFT;
 841       } else {
 842          dw0 |= BRW_VE0_VALID |
 843                 brw->vb.nr_buffers << BRW_VE0_INDEX_SHIFT |
 844                 BRW_SURFACEFORMAT_R32_UINT << BRW_VE0_FORMAT_SHIFT;
 845          dw1 |= (i * 4) << BRW_VE1_DST_OFFSET_SHIFT;
 846       }
 847
 848       /* Note that for gl_VertexID, gl_InstanceID, and gl_PrimitiveID values,
 849        * the format is ignored and the value is always int.
 850        */
 851
 852       OUT_BATCH(dw0);
 853       OUT_BATCH(dw1);
 854    }
 855
 856    ADVANCE_BATCH();
 857 }
 858
 859 const struct brw_tracked_state brw_vertices = {
 860    .dirty = {
 861       .mesa = _NEW_POLYGON,
 862       .brw = BRW_NEW_BATCH |
 863              BRW_NEW_VERTICES |
 864              BRW_NEW_VS_PROG_DATA,
 865    },
 866    .emit = brw_emit_vertices,
 867 };
 868
 869 static void brw_upload_indices(struct brw_context *brw)
 870 {
 871    struct gl_context *ctx = &brw->ctx;
 872    const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
 873    GLuint ib_size;
 874    drm_intel_bo *old_bo = brw->ib.bo;
 875    struct gl_buffer_object *bufferobj;
 876    GLuint offset;
 877    GLuint ib_type_size;
 878
 879    if (index_buffer == NULL)
 880       return;
 881
 882    ib_type_size = _mesa_sizeof_type(index_buffer->type);
 883    ib_size = ib_type_size * index_buffer->count;
 884    bufferobj = index_buffer->obj;
 885
 886    /* Turn into a proper VBO:
 887     */
 888    if (!_mesa_is_bufferobj(bufferobj)) {
 889       /* Get new bufferobj, offset:
 890        */
 891       intel_upload_data(brw, index_buffer->ptr, ib_size, ib_type_size,
 892                         &brw->ib.bo, &offset);
 893    } else {
 894       offset = (GLuint) (unsigned long) index_buffer->ptr;
 895
 896       /* If the index buffer isn't aligned to its element size, we have to
 897        * rebase it into a temporary.
 898        */
 899       if ((ib_type_size - 1) & offset) {
 900          perf_debug("copying index buffer to a temporary to work around "
 901                     "misaligned offset %d\n", offset);
 902
 903          GLubyte *map = ctx->Driver.MapBufferRange(ctx,
 904                                                    offset,
 905                                                    ib_size,
 906                                                    GL_MAP_READ_BIT,
 907                                                    bufferobj,
 908                                                    MAP_INTERNAL);
 909
 910          intel_upload_data(brw, map, ib_size, ib_type_size,
 911                            &brw->ib.bo, &offset);
 912
 913          ctx->Driver.UnmapBuffer(ctx, bufferobj, MAP_INTERNAL);
 914       } else {
 915          drm_intel_bo *bo =
 916             intel_bufferobj_buffer(brw, intel_buffer_object(bufferobj),
 917                                    offset, ib_size);
 918          if (bo != brw->ib.bo) {
 919             drm_intel_bo_unreference(brw->ib.bo);
 920             brw->ib.bo = bo;
 921             drm_intel_bo_reference(bo);
 922          }
 923       }
 924    }
 925
 926    /* Use 3DPRIMITIVE's start_vertex_offset to avoid re-uploading
 927     * the index buffer state when we're just moving the start index
 928     * of our drawing.
 929     */
 930    brw->ib.start_vertex_offset = offset / ib_type_size;
 931
 932    if (brw->ib.bo != old_bo)
 933       brw->state.dirty.brw |= BRW_NEW_INDEX_BUFFER;
 934
 935    if (index_buffer->type != brw->ib.type) {
 936       brw->ib.type = index_buffer->type;
 937       brw->state.dirty.brw |= BRW_NEW_INDEX_BUFFER;
 938    }
 939 }
 940
 941 const struct brw_tracked_state brw_indices = {
 942    .dirty = {
 943       .mesa = 0,
 944       .brw = BRW_NEW_INDICES,
 945    },
 946    .emit = brw_upload_indices,
 947 };
 948
 949 static void brw_emit_index_buffer(struct brw_context *brw)
 950 {
 951    const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
 952    GLuint cut_index_setting;
 953
 954    if (index_buffer == NULL)
 955       return;
 956
 957    if (brw->prim_restart.enable_cut_index && !brw->is_haswell) {
 958       cut_index_setting = BRW_CUT_INDEX_ENABLE;
 959    } else {
 960       cut_index_setting = 0;
 961    }
 962
 963    BEGIN_BATCH(3);
 964    OUT_BATCH(CMD_INDEX_BUFFER << 16 |
 965              cut_index_setting |
 966              brw_get_index_type(index_buffer->type) << 8 |
 967              1);
 968    OUT_RELOC(brw->ib.bo,
 969              I915_GEM_DOMAIN_VERTEX, 0,
 970              0);
 971    OUT_RELOC(brw->ib.bo,
 972              I915_GEM_DOMAIN_VERTEX, 0,
 973              brw->ib.bo->size - 1);
 974    ADVANCE_BATCH();
 975 }
 976
 977 const struct brw_tracked_state brw_index_buffer = {
 978    .dirty = {
 979       .mesa = 0,
 980       .brw = BRW_NEW_BATCH |
 981              BRW_NEW_INDEX_BUFFER,
 982    },
 983    .emit = brw_emit_index_buffer,
 984 };