src/mesa/drivers/dri/i965/brw_draw_upload.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #undef NDEBUG
  29
  30 #include "main/glheader.h"
  31 #include "main/bufferobj.h"
  32 #include "main/context.h"
  33 #include "main/enums.h"
  34 #include "main/macros.h"
  35
  36 #include "brw_draw.h"
  37 #include "brw_defines.h"
  38 #include "brw_context.h"
  39 #include "brw_state.h"
  40
  41 #include "intel_batchbuffer.h"
  42 #include "intel_buffer_objects.h"
  43
  44 static GLuint double_types[5] = {
  45    0,
  46    BRW_SURFACEFORMAT_R64_FLOAT,
  47    BRW_SURFACEFORMAT_R64G64_FLOAT,
  48    BRW_SURFACEFORMAT_R64G64B64_FLOAT,
  49    BRW_SURFACEFORMAT_R64G64B64A64_FLOAT
  50 };
  51
  52 static GLuint float_types[5] = {
  53    0,
  54    BRW_SURFACEFORMAT_R32_FLOAT,
  55    BRW_SURFACEFORMAT_R32G32_FLOAT,
  56    BRW_SURFACEFORMAT_R32G32B32_FLOAT,
  57    BRW_SURFACEFORMAT_R32G32B32A32_FLOAT
  58 };
  59
  60 static GLuint half_float_types[5] = {
  61    0,
  62    BRW_SURFACEFORMAT_R16_FLOAT,
  63    BRW_SURFACEFORMAT_R16G16_FLOAT,
  64    BRW_SURFACEFORMAT_R16G16B16A16_FLOAT,
  65    BRW_SURFACEFORMAT_R16G16B16A16_FLOAT
  66 };
  67
  68 static GLuint uint_types_direct[5] = {
  69    0,
  70    BRW_SURFACEFORMAT_R32_UINT,
  71    BRW_SURFACEFORMAT_R32G32_UINT,
  72    BRW_SURFACEFORMAT_R32G32B32_UINT,
  73    BRW_SURFACEFORMAT_R32G32B32A32_UINT
  74 };
  75
  76 static GLuint uint_types_norm[5] = {
  77    0,
  78    BRW_SURFACEFORMAT_R32_UNORM,
  79    BRW_SURFACEFORMAT_R32G32_UNORM,
  80    BRW_SURFACEFORMAT_R32G32B32_UNORM,
  81    BRW_SURFACEFORMAT_R32G32B32A32_UNORM
  82 };
  83
  84 static GLuint uint_types_scale[5] = {
  85    0,
  86    BRW_SURFACEFORMAT_R32_USCALED,
  87    BRW_SURFACEFORMAT_R32G32_USCALED,
  88    BRW_SURFACEFORMAT_R32G32B32_USCALED,
  89    BRW_SURFACEFORMAT_R32G32B32A32_USCALED
  90 };
  91
  92 static GLuint int_types_direct[5] = {
  93    0,
  94    BRW_SURFACEFORMAT_R32_SINT,
  95    BRW_SURFACEFORMAT_R32G32_SINT,
  96    BRW_SURFACEFORMAT_R32G32B32_SINT,
  97    BRW_SURFACEFORMAT_R32G32B32A32_SINT
  98 };
  99
 100 static GLuint int_types_norm[5] = {
 101    0,
 102    BRW_SURFACEFORMAT_R32_SNORM,
 103    BRW_SURFACEFORMAT_R32G32_SNORM,
 104    BRW_SURFACEFORMAT_R32G32B32_SNORM,
 105    BRW_SURFACEFORMAT_R32G32B32A32_SNORM
 106 };
 107
 108 static GLuint int_types_scale[5] = {
 109    0,
 110    BRW_SURFACEFORMAT_R32_SSCALED,
 111    BRW_SURFACEFORMAT_R32G32_SSCALED,
 112    BRW_SURFACEFORMAT_R32G32B32_SSCALED,
 113    BRW_SURFACEFORMAT_R32G32B32A32_SSCALED
 114 };
 115
 116 static GLuint ushort_types_direct[5] = {
 117    0,
 118    BRW_SURFACEFORMAT_R16_UINT,
 119    BRW_SURFACEFORMAT_R16G16_UINT,
 120    BRW_SURFACEFORMAT_R16G16B16A16_UINT,
 121    BRW_SURFACEFORMAT_R16G16B16A16_UINT
 122 };
 123
 124 static GLuint ushort_types_norm[5] = {
 125    0,
 126    BRW_SURFACEFORMAT_R16_UNORM,
 127    BRW_SURFACEFORMAT_R16G16_UNORM,
 128    BRW_SURFACEFORMAT_R16G16B16_UNORM,
 129    BRW_SURFACEFORMAT_R16G16B16A16_UNORM
 130 };
 131
 132 static GLuint ushort_types_scale[5] = {
 133    0,
 134    BRW_SURFACEFORMAT_R16_USCALED,
 135    BRW_SURFACEFORMAT_R16G16_USCALED,
 136    BRW_SURFACEFORMAT_R16G16B16_USCALED,
 137    BRW_SURFACEFORMAT_R16G16B16A16_USCALED
 138 };
 139
 140 static GLuint short_types_direct[5] = {
 141    0,
 142    BRW_SURFACEFORMAT_R16_SINT,
 143    BRW_SURFACEFORMAT_R16G16_SINT,
 144    BRW_SURFACEFORMAT_R16G16B16A16_SINT,
 145    BRW_SURFACEFORMAT_R16G16B16A16_SINT
 146 };
 147
 148 static GLuint short_types_norm[5] = {
 149    0,
 150    BRW_SURFACEFORMAT_R16_SNORM,
 151    BRW_SURFACEFORMAT_R16G16_SNORM,
 152    BRW_SURFACEFORMAT_R16G16B16_SNORM,
 153    BRW_SURFACEFORMAT_R16G16B16A16_SNORM
 154 };
 155
 156 static GLuint short_types_scale[5] = {
 157    0,
 158    BRW_SURFACEFORMAT_R16_SSCALED,
 159    BRW_SURFACEFORMAT_R16G16_SSCALED,
 160    BRW_SURFACEFORMAT_R16G16B16_SSCALED,
 161    BRW_SURFACEFORMAT_R16G16B16A16_SSCALED
 162 };
 163
 164 static GLuint ubyte_types_direct[5] = {
 165    0,
 166    BRW_SURFACEFORMAT_R8_UINT,
 167    BRW_SURFACEFORMAT_R8G8_UINT,
 168    BRW_SURFACEFORMAT_R8G8B8A8_UINT,
 169    BRW_SURFACEFORMAT_R8G8B8A8_UINT
 170 };
 171
 172 static GLuint ubyte_types_norm[5] = {
 173    0,
 174    BRW_SURFACEFORMAT_R8_UNORM,
 175    BRW_SURFACEFORMAT_R8G8_UNORM,
 176    BRW_SURFACEFORMAT_R8G8B8_UNORM,
 177    BRW_SURFACEFORMAT_R8G8B8A8_UNORM
 178 };
 179
 180 static GLuint ubyte_types_scale[5] = {
 181    0,
 182    BRW_SURFACEFORMAT_R8_USCALED,
 183    BRW_SURFACEFORMAT_R8G8_USCALED,
 184    BRW_SURFACEFORMAT_R8G8B8_USCALED,
 185    BRW_SURFACEFORMAT_R8G8B8A8_USCALED
 186 };
 187
 188 static GLuint byte_types_direct[5] = {
 189    0,
 190    BRW_SURFACEFORMAT_R8_SINT,
 191    BRW_SURFACEFORMAT_R8G8_SINT,
 192    BRW_SURFACEFORMAT_R8G8B8A8_SINT,
 193    BRW_SURFACEFORMAT_R8G8B8A8_SINT
 194 };
 195
 196 static GLuint byte_types_norm[5] = {
 197    0,
 198    BRW_SURFACEFORMAT_R8_SNORM,
 199    BRW_SURFACEFORMAT_R8G8_SNORM,
 200    BRW_SURFACEFORMAT_R8G8B8_SNORM,
 201    BRW_SURFACEFORMAT_R8G8B8A8_SNORM
 202 };
 203
 204 static GLuint byte_types_scale[5] = {
 205    0,
 206    BRW_SURFACEFORMAT_R8_SSCALED,
 207    BRW_SURFACEFORMAT_R8G8_SSCALED,
 208    BRW_SURFACEFORMAT_R8G8B8_SSCALED,
 209    BRW_SURFACEFORMAT_R8G8B8A8_SSCALED
 210 };
 211
 212
 213 /**
 214  * Given vertex array type/size/format/normalized info, return
 215  * the appopriate hardware surface type.
 216  * Format will be GL_RGBA or possibly GL_BGRA for GLubyte[4] color arrays.
 217  */
 218 static GLuint get_surface_type( GLenum type, GLuint size,
 219                                 GLenum format, bool normalized, bool integer )
 220 {
 221    if (unlikely(INTEL_DEBUG & DEBUG_VERTS))
 222       printf("type %s size %d normalized %d\n",
 223                    _mesa_lookup_enum_by_nr(type), size, normalized);
 224
 225    if (integer) {
 226       assert(format == GL_RGBA); /* sanity check */
 227       switch (type) {
 228       case GL_INT: return int_types_direct[size];
 229       case GL_SHORT: return short_types_direct[size];
 230       case GL_BYTE: return byte_types_direct[size];
 231       case GL_UNSIGNED_INT: return uint_types_direct[size];
 232       case GL_UNSIGNED_SHORT: return ushort_types_direct[size];
 233       case GL_UNSIGNED_BYTE: return ubyte_types_direct[size];
 234       default: assert(0); return 0;
 235       }
 236    } else if (normalized) {
 237       switch (type) {
 238       case GL_DOUBLE: return double_types[size];
 239       case GL_FLOAT: return float_types[size];
 240       case GL_HALF_FLOAT: return half_float_types[size];
 241       case GL_INT: return int_types_norm[size];
 242       case GL_SHORT: return short_types_norm[size];
 243       case GL_BYTE: return byte_types_norm[size];
 244       case GL_UNSIGNED_INT: return uint_types_norm[size];
 245       case GL_UNSIGNED_SHORT: return ushort_types_norm[size];
 246       case GL_UNSIGNED_BYTE:
 247          if (format == GL_BGRA) {
 248             /* See GL_EXT_vertex_array_bgra */
 249             assert(size == 4);
 250             return BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
 251          }
 252          else {
 253             return ubyte_types_norm[size];
 254          }
 255       default: assert(0); return 0;
 256       }
 257    }
 258    else {
 259       assert(format == GL_RGBA); /* sanity check */
 260       switch (type) {
 261       case GL_DOUBLE: return double_types[size];
 262       case GL_FLOAT: return float_types[size];
 263       case GL_HALF_FLOAT: return half_float_types[size];
 264       case GL_INT: return int_types_scale[size];
 265       case GL_SHORT: return short_types_scale[size];
 266       case GL_BYTE: return byte_types_scale[size];
 267       case GL_UNSIGNED_INT: return uint_types_scale[size];
 268       case GL_UNSIGNED_SHORT: return ushort_types_scale[size];
 269       case GL_UNSIGNED_BYTE: return ubyte_types_scale[size];
 270       /* This produces GL_FIXED inputs as values between INT32_MIN and
 271        * INT32_MAX, which will be scaled down by 1/65536 by the VS.
 272        */
 273       case GL_FIXED: return int_types_scale[size];
 274       default: assert(0); return 0;
 275       }
 276    }
 277 }
 278
 279
 280 static GLuint get_size( GLenum type )
 281 {
 282    switch (type) {
 283    case GL_DOUBLE: return sizeof(GLdouble);
 284    case GL_FLOAT: return sizeof(GLfloat);
 285    case GL_HALF_FLOAT: return sizeof(GLhalfARB);
 286    case GL_INT: return sizeof(GLint);
 287    case GL_SHORT: return sizeof(GLshort);
 288    case GL_BYTE: return sizeof(GLbyte);
 289    case GL_UNSIGNED_INT: return sizeof(GLuint);
 290    case GL_UNSIGNED_SHORT: return sizeof(GLushort);
 291    case GL_UNSIGNED_BYTE: return sizeof(GLubyte);
 292    case GL_FIXED: return sizeof(GLuint);
 293    /* packed formats: always have 4 components, and element size is
 294     * 4 bytes, so pretend each component is 1 byte.
 295     */
 296    case GL_INT_2_10_10_10_REV: return sizeof(GLbyte);
 297    case GL_UNSIGNED_INT_2_10_10_10_REV: return sizeof(GLubyte);
 298    default: assert(0); return 0;
 299    }
 300 }
 301
 302 static GLuint get_index_type(GLenum type)
 303 {
 304    switch (type) {
 305    case GL_UNSIGNED_BYTE:  return BRW_INDEX_BYTE;
 306    case GL_UNSIGNED_SHORT: return BRW_INDEX_WORD;
 307    case GL_UNSIGNED_INT:   return BRW_INDEX_DWORD;
 308    default: assert(0); return 0;
 309    }
 310 }
 311
 312 static void
 313 copy_array_to_vbo_array(struct brw_context *brw,
 314                         struct brw_vertex_element *element,
 315                         int min, int max,
 316                         struct brw_vertex_buffer *buffer,
 317                         GLuint dst_stride)
 318 {
 319    const int src_stride = element->glarray->StrideB;
 320
 321    /* If the source stride is zero, we just want to upload the current
 322     * attribute once and set the buffer's stride to 0.  There's no need
 323     * to replicate it out.
 324     */
 325    if (src_stride == 0) {
 326       intel_upload_data(&brw->intel, element->glarray->Ptr,
 327                         element->element_size,
 328                         element->element_size,
 329                         &buffer->bo, &buffer->offset);
 330
 331       buffer->stride = 0;
 332       return;
 333    }
 334
 335    const unsigned char *src = element->glarray->Ptr + min * src_stride;
 336    int count = max - min + 1;
 337    GLuint size = count * dst_stride;
 338
 339    if (dst_stride == src_stride) {
 340       intel_upload_data(&brw->intel, src, size, dst_stride,
 341                         &buffer->bo, &buffer->offset);
 342    } else {
 343       char * const map = intel_upload_map(&brw->intel, size, dst_stride);
 344       char *dst = map;
 345
 346       while (count--) {
 347          memcpy(dst, src, dst_stride);
 348          src += src_stride;
 349          dst += dst_stride;
 350       }
 351       intel_upload_unmap(&brw->intel, map, size, dst_stride,
 352                          &buffer->bo, &buffer->offset);
 353    }
 354    buffer->stride = dst_stride;
 355 }
 356
 357 static void brw_prepare_vertices(struct brw_context *brw)
 358 {
 359    struct gl_context *ctx = &brw->intel.ctx;
 360    struct intel_context *intel = intel_context(ctx);
 361    /* CACHE_NEW_VS_PROG */
 362    GLbitfield64 vs_inputs = brw->vs.prog_data->inputs_read;
 363    const unsigned char *ptr = NULL;
 364    GLuint interleaved = 0;
 365    unsigned int min_index = brw->vb.min_index + brw->basevertex;
 366    unsigned int max_index = brw->vb.max_index + brw->basevertex;
 367    int delta, i, j;
 368
 369    struct brw_vertex_element *upload[VERT_ATTRIB_MAX];
 370    GLuint nr_uploads = 0;
 371
 372    /* _NEW_POLYGON
 373     *
 374     * On gen6+, edge flags don't end up in the VUE (either in or out of the
 375     * VS).  Instead, they're uploaded as the last vertex element, and the data
 376     * is passed sideband through the fixed function units.  So, we need to
 377     * prepare the vertex buffer for it, but it's not present in inputs_read.
 378     */
 379    if (intel->gen >= 6 && (ctx->Polygon.FrontMode != GL_FILL ||
 380                            ctx->Polygon.BackMode != GL_FILL)) {
 381       vs_inputs |= VERT_BIT_EDGEFLAG;
 382    }
 383
 384    /* First build an array of pointers to ve's in vb.inputs_read
 385     */
 386    if (0)
 387       printf("%s %d..%d\n", __FUNCTION__, min_index, max_index);
 388
 389    /* Accumulate the list of enabled arrays. */
 390    brw->vb.nr_enabled = 0;
 391    while (vs_inputs) {
 392       GLuint i = ffsll(vs_inputs) - 1;
 393       struct brw_vertex_element *input = &brw->vb.inputs[i];
 394
 395       vs_inputs &= ~BITFIELD64_BIT(i);
 396       if (input->glarray->Size && get_size(input->glarray->Type))
 397          brw->vb.enabled[brw->vb.nr_enabled++] = input;
 398    }
 399
 400    if (brw->vb.nr_enabled == 0)
 401       return;
 402
 403    if (brw->vb.nr_buffers)
 404       return;
 405
 406    for (i = j = 0; i < brw->vb.nr_enabled; i++) {
 407       struct brw_vertex_element *input = brw->vb.enabled[i];
 408       const struct gl_client_array *glarray = input->glarray;
 409       int type_size = get_size(glarray->Type);
 410
 411       input->element_size = type_size * glarray->Size;
 412
 413       if (_mesa_is_bufferobj(glarray->BufferObj)) {
 414          struct intel_buffer_object *intel_buffer =
 415             intel_buffer_object(glarray->BufferObj);
 416          int k;
 417
 418          /* If we have a VB set to be uploaded for this buffer object
 419           * already, reuse that VB state so that we emit fewer
 420           * relocations.
 421           */
 422          for (k = 0; k < i; k++) {
 423             const struct gl_client_array *other = brw->vb.enabled[k]->glarray;
 424             if (glarray->BufferObj == other->BufferObj &&
 425                 glarray->StrideB == other->StrideB &&
 426                 glarray->InstanceDivisor == other->InstanceDivisor &&
 427                 (uintptr_t)(glarray->Ptr - other->Ptr) < glarray->StrideB)
 428             {
 429                input->buffer = brw->vb.enabled[k]->buffer;
 430                input->offset = glarray->Ptr - other->Ptr;
 431                break;
 432             }
 433          }
 434          if (k == i) {
 435             struct brw_vertex_buffer *buffer = &brw->vb.buffers[j];
 436
 437             /* Named buffer object: Just reference its contents directly. */
 438             buffer->bo = intel_bufferobj_source(intel,
 439                                                 intel_buffer, type_size,
 440                                                 &buffer->offset);
 441             drm_intel_bo_reference(buffer->bo);
 442             buffer->offset += (uintptr_t)glarray->Ptr;
 443             buffer->stride = glarray->StrideB;
 444             buffer->step_rate = glarray->InstanceDivisor;
 445
 446             input->buffer = j++;
 447             input->offset = 0;
 448          }
 449
 450          /* This is a common place to reach if the user mistakenly supplies
 451           * a pointer in place of a VBO offset.  If we just let it go through,
 452           * we may end up dereferencing a pointer beyond the bounds of the
 453           * GTT.  We would hope that the VBO's max_index would save us, but
 454           * Mesa appears to hand us min/max values not clipped to the
 455           * array object's _MaxElement, and _MaxElement frequently appears
 456           * to be wrong anyway.
 457           *
 458           * The VBO spec allows application termination in this case, and it's
 459           * probably a service to the poor programmer to do so rather than
 460           * trying to just not render.
 461           */
 462          assert(input->offset < brw->vb.buffers[input->buffer].bo->size);
 463       } else {
 464          /* Queue the buffer object up to be uploaded in the next pass,
 465           * when we've decided if we're doing interleaved or not.
 466           */
 467          if (nr_uploads == 0) {
 468             interleaved = glarray->StrideB;
 469             ptr = glarray->Ptr;
 470          }
 471          else if (interleaved != glarray->StrideB ||
 472                   (uintptr_t)(glarray->Ptr - ptr) > interleaved)
 473          {
 474             interleaved = 0;
 475          }
 476          else if ((uintptr_t)(glarray->Ptr - ptr) & (type_size -1))
 477          {
 478             /* enforce natural alignment (for doubles) */
 479             interleaved = 0;
 480          }
 481
 482          upload[nr_uploads++] = input;
 483       }
 484    }
 485
 486    /* If we need to upload all the arrays, then we can trim those arrays to
 487     * only the used elements [min_index, max_index] so long as we adjust all
 488     * the values used in the 3DPRIMITIVE i.e. by setting the vertex bias.
 489     */
 490    brw->vb.start_vertex_bias = 0;
 491    delta = min_index;
 492    if (nr_uploads == brw->vb.nr_enabled) {
 493       brw->vb.start_vertex_bias = -delta;
 494       delta = 0;
 495    }
 496    if (delta && !brw->intel.intelScreen->relaxed_relocations)
 497       min_index = delta = 0;
 498
 499    /* Handle any arrays to be uploaded. */
 500    if (nr_uploads > 1) {
 501       if (interleaved) {
 502          struct brw_vertex_buffer *buffer = &brw->vb.buffers[j];
 503          /* All uploads are interleaved, so upload the arrays together as
 504           * interleaved.  First, upload the contents and set up upload[0].
 505           */
 506          copy_array_to_vbo_array(brw, upload[0], min_index, max_index,
 507                                  buffer, interleaved);
 508          buffer->offset -= delta * interleaved;
 509
 510          for (i = 0; i < nr_uploads; i++) {
 511             /* Then, just point upload[i] at upload[0]'s buffer. */
 512             upload[i]->offset =
 513                ((const unsigned char *)upload[i]->glarray->Ptr - ptr);
 514             upload[i]->buffer = j;
 515          }
 516          j++;
 517
 518          nr_uploads = 0;
 519       }
 520    }
 521    /* Upload non-interleaved arrays */
 522    for (i = 0; i < nr_uploads; i++) {
 523       struct brw_vertex_buffer *buffer = &brw->vb.buffers[j];
 524       if (upload[i]->glarray->InstanceDivisor == 0) {
 525          copy_array_to_vbo_array(brw, upload[i], min_index, max_index,
 526                                  buffer, upload[i]->element_size);
 527       } else {
 528          /* This is an instanced attribute, since its InstanceDivisor
 529           * is not zero. Therefore, its data will be stepped after the
 530           * instanced draw has been run InstanceDivisor times.
 531           */
 532          uint32_t instanced_attr_max_index =
 533             (brw->num_instances - 1) / upload[i]->glarray->InstanceDivisor;
 534          copy_array_to_vbo_array(brw, upload[i], 0, instanced_attr_max_index,
 535                                  buffer, upload[i]->element_size);
 536       }
 537       buffer->offset -= delta * buffer->stride;
 538       buffer->step_rate = upload[i]->glarray->InstanceDivisor;
 539       upload[i]->buffer = j++;
 540       upload[i]->offset = 0;
 541    }
 542
 543    brw->vb.nr_buffers = j;
 544 }
 545
 546 static void brw_emit_vertices(struct brw_context *brw)
 547 {
 548    struct gl_context *ctx = &brw->intel.ctx;
 549    struct intel_context *intel = intel_context(ctx);
 550    GLuint i, nr_elements;
 551
 552    brw_prepare_vertices(brw);
 553
 554    brw_emit_query_begin(brw);
 555
 556    /* If the VS doesn't read any inputs (calculating vertex position from
 557     * a state variable for some reason, for example), emit a single pad
 558     * VERTEX_ELEMENT struct and bail.
 559     *
 560     * The stale VB state stays in place, but they don't do anything unless
 561     * a VE loads from them.
 562     */
 563    if (brw->vb.nr_enabled == 0) {
 564       BEGIN_BATCH(3);
 565       OUT_BATCH((_3DSTATE_VERTEX_ELEMENTS << 16) | 1);
 566       if (intel->gen >= 6) {
 567          OUT_BATCH((0 << GEN6_VE0_INDEX_SHIFT) |
 568                    GEN6_VE0_VALID |
 569                    (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_VE0_FORMAT_SHIFT) |
 570                    (0 << BRW_VE0_SRC_OFFSET_SHIFT));
 571       } else {
 572          OUT_BATCH((0 << BRW_VE0_INDEX_SHIFT) |
 573                    BRW_VE0_VALID |
 574                    (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_VE0_FORMAT_SHIFT) |
 575                    (0 << BRW_VE0_SRC_OFFSET_SHIFT));
 576       }
 577       OUT_BATCH((BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_0_SHIFT) |
 578                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT) |
 579                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) |
 580                 (BRW_VE1_COMPONENT_STORE_1_FLT << BRW_VE1_COMPONENT_3_SHIFT));
 581       CACHED_BATCH();
 582       return;
 583    }
 584
 585    /* Now emit VB and VEP state packets.
 586     */
 587
 588    if (brw->vb.nr_buffers) {
 589       if (intel->gen >= 6) {
 590          assert(brw->vb.nr_buffers <= 33);
 591       } else {
 592          assert(brw->vb.nr_buffers <= 17);
 593       }
 594
 595       BEGIN_BATCH(1 + 4*brw->vb.nr_buffers);
 596       OUT_BATCH((_3DSTATE_VERTEX_BUFFERS << 16) | (4*brw->vb.nr_buffers - 1));
 597       for (i = 0; i < brw->vb.nr_buffers; i++) {
 598          struct brw_vertex_buffer *buffer = &brw->vb.buffers[i];
 599          uint32_t dw0;
 600
 601          if (intel->gen >= 6) {
 602             dw0 = buffer->step_rate
 603                      ? GEN6_VB0_ACCESS_INSTANCEDATA
 604                      : GEN6_VB0_ACCESS_VERTEXDATA;
 605             dw0 |= i << GEN6_VB0_INDEX_SHIFT;
 606          } else {
 607             dw0 = buffer->step_rate
 608                      ? BRW_VB0_ACCESS_INSTANCEDATA
 609                      : BRW_VB0_ACCESS_VERTEXDATA;
 610             dw0 |= i << BRW_VB0_INDEX_SHIFT;
 611          }
 612
 613          if (intel->gen >= 7)
 614             dw0 |= GEN7_VB0_ADDRESS_MODIFYENABLE;
 615
 616          OUT_BATCH(dw0 | (buffer->stride << BRW_VB0_PITCH_SHIFT));
 617          OUT_RELOC(buffer->bo, I915_GEM_DOMAIN_VERTEX, 0, buffer->offset);
 618          if (intel->gen >= 5) {
 619             OUT_RELOC(buffer->bo, I915_GEM_DOMAIN_VERTEX, 0, buffer->bo->size - 1);
 620          } else
 621             OUT_BATCH(0);
 622          OUT_BATCH(buffer->step_rate);
 623       }
 624       ADVANCE_BATCH();
 625    }
 626
 627    nr_elements = brw->vb.nr_enabled + brw->vs.prog_data->uses_vertexid;
 628
 629    /* The hardware allows one more VERTEX_ELEMENTS than VERTEX_BUFFERS, presumably
 630     * for VertexID/InstanceID.
 631     */
 632    if (intel->gen >= 6) {
 633       assert(nr_elements <= 34);
 634    } else {
 635       assert(nr_elements <= 18);
 636    }
 637
 638    struct brw_vertex_element *gen6_edgeflag_input = NULL;
 639
 640    BEGIN_BATCH(1 + nr_elements * 2);
 641    OUT_BATCH((_3DSTATE_VERTEX_ELEMENTS << 16) | (2 * nr_elements - 1));
 642    for (i = 0; i < brw->vb.nr_enabled; i++) {
 643       struct brw_vertex_element *input = brw->vb.enabled[i];
 644       uint32_t format = get_surface_type(input->glarray->Type,
 645                                          input->glarray->Size,
 646                                          input->glarray->Format,
 647                                          input->glarray->Normalized,
 648                                          input->glarray->Integer);
 649       uint32_t comp0 = BRW_VE1_COMPONENT_STORE_SRC;
 650       uint32_t comp1 = BRW_VE1_COMPONENT_STORE_SRC;
 651       uint32_t comp2 = BRW_VE1_COMPONENT_STORE_SRC;
 652       uint32_t comp3 = BRW_VE1_COMPONENT_STORE_SRC;
 653
 654       /* The gen4 driver expects edgeflag to come in as a float, and passes
 655        * that float on to the tests in the clipper.  Mesa's current vertex
 656        * attribute value for EdgeFlag is stored as a float, which works out.
 657        * glEdgeFlagPointer, on the other hand, gives us an unnormalized
 658        * integer ubyte.  Just rewrite that to convert to a float.
 659        */
 660       if (input->attrib == VERT_ATTRIB_EDGEFLAG) {
 661          /* Gen6+ passes edgeflag as sideband along with the vertex, instead
 662           * of in the VUE.  We have to upload it sideband as the last vertex
 663           * element according to the B-Spec.
 664           */
 665          if (intel->gen >= 6) {
 666             gen6_edgeflag_input = input;
 667             continue;
 668          }
 669
 670          if (format == BRW_SURFACEFORMAT_R8_UINT)
 671             format = BRW_SURFACEFORMAT_R8_SSCALED;
 672       }
 673
 674       switch (input->glarray->Size) {
 675       case 0: comp0 = BRW_VE1_COMPONENT_STORE_0;
 676       case 1: comp1 = BRW_VE1_COMPONENT_STORE_0;
 677       case 2: comp2 = BRW_VE1_COMPONENT_STORE_0;
 678       case 3: comp3 = input->glarray->Integer ? BRW_VE1_COMPONENT_STORE_1_INT
 679                                               : BRW_VE1_COMPONENT_STORE_1_FLT;
 680          break;
 681       }
 682
 683       if (intel->gen >= 6) {
 684          OUT_BATCH((input->buffer << GEN6_VE0_INDEX_SHIFT) |
 685                    GEN6_VE0_VALID |
 686                    (format << BRW_VE0_FORMAT_SHIFT) |
 687                    (input->offset << BRW_VE0_SRC_OFFSET_SHIFT));
 688       } else {
 689          OUT_BATCH((input->buffer << BRW_VE0_INDEX_SHIFT) |
 690                    BRW_VE0_VALID |
 691                    (format << BRW_VE0_FORMAT_SHIFT) |
 692                    (input->offset << BRW_VE0_SRC_OFFSET_SHIFT));
 693       }
 694
 695       if (intel->gen >= 5)
 696           OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
 697                     (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
 698                     (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
 699                     (comp3 << BRW_VE1_COMPONENT_3_SHIFT));
 700       else
 701           OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
 702                     (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
 703                     (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
 704                     (comp3 << BRW_VE1_COMPONENT_3_SHIFT) |
 705                     ((i * 4) << BRW_VE1_DST_OFFSET_SHIFT));
 706    }
 707
 708    if (intel->gen >= 6 && gen6_edgeflag_input) {
 709       uint32_t format = get_surface_type(gen6_edgeflag_input->glarray->Type,
 710                                          gen6_edgeflag_input->glarray->Size,
 711                                          gen6_edgeflag_input->glarray->Format,
 712                                          gen6_edgeflag_input->glarray->Normalized,
 713                                          gen6_edgeflag_input->glarray->Integer);
 714
 715       OUT_BATCH((gen6_edgeflag_input->buffer << GEN6_VE0_INDEX_SHIFT) |
 716                 GEN6_VE0_VALID |
 717                 GEN6_VE0_EDGE_FLAG_ENABLE |
 718                 (format << BRW_VE0_FORMAT_SHIFT) |
 719                 (gen6_edgeflag_input->offset << BRW_VE0_SRC_OFFSET_SHIFT));
 720       OUT_BATCH((BRW_VE1_COMPONENT_STORE_SRC << BRW_VE1_COMPONENT_0_SHIFT) |
 721                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT) |
 722                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) |
 723                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_3_SHIFT));
 724    }
 725
 726    if (brw->vs.prog_data->uses_vertexid) {
 727       uint32_t dw0 = 0, dw1 = 0;
 728
 729       dw1 = ((BRW_VE1_COMPONENT_STORE_VID << BRW_VE1_COMPONENT_0_SHIFT) |
 730              (BRW_VE1_COMPONENT_STORE_IID << BRW_VE1_COMPONENT_1_SHIFT) |
 731              (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) |
 732              (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_3_SHIFT));
 733
 734       if (intel->gen >= 6) {
 735          dw0 |= GEN6_VE0_VALID;
 736       } else {
 737          dw0 |= BRW_VE0_VALID;
 738          dw1 |= (i * 4) << BRW_VE1_DST_OFFSET_SHIFT;
 739       }
 740
 741       /* Note that for gl_VertexID, gl_InstanceID, and gl_PrimitiveID values,
 742        * the format is ignored and the value is always int.
 743        */
 744
 745       OUT_BATCH(dw0);
 746       OUT_BATCH(dw1);
 747    }
 748
 749    CACHED_BATCH();
 750 }
 751
 752 const struct brw_tracked_state brw_vertices = {
 753    .dirty = {
 754       .mesa = _NEW_POLYGON,
 755       .brw = BRW_NEW_BATCH | BRW_NEW_VERTICES,
 756       .cache = CACHE_NEW_VS_PROG,
 757    },
 758    .emit = brw_emit_vertices,
 759 };
 760
 761 static void brw_upload_indices(struct brw_context *brw)
 762 {
 763    struct gl_context *ctx = &brw->intel.ctx;
 764    struct intel_context *intel = &brw->intel;
 765    const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
 766    GLuint ib_size;
 767    drm_intel_bo *bo = NULL;
 768    struct gl_buffer_object *bufferobj;
 769    GLuint offset;
 770    GLuint ib_type_size;
 771
 772    if (index_buffer == NULL)
 773       return;
 774
 775    ib_type_size = get_size(index_buffer->type);
 776    ib_size = ib_type_size * index_buffer->count;
 777    bufferobj = index_buffer->obj;
 778
 779    /* Turn into a proper VBO:
 780     */
 781    if (!_mesa_is_bufferobj(bufferobj)) {
 782
 783       /* Get new bufferobj, offset:
 784        */
 785       intel_upload_data(&brw->intel, index_buffer->ptr, ib_size, ib_type_size,
 786                         &bo, &offset);
 787       brw->ib.start_vertex_offset = offset / ib_type_size;
 788    } else {
 789       offset = (GLuint) (unsigned long) index_buffer->ptr;
 790
 791       /* If the index buffer isn't aligned to its element size, we have to
 792        * rebase it into a temporary.
 793        */
 794        if ((get_size(index_buffer->type) - 1) & offset) {
 795            GLubyte *map = ctx->Driver.MapBufferRange(ctx,
 796                                                      offset,
 797                                                      ib_size,
 798                                                      GL_MAP_WRITE_BIT,
 799                                                      bufferobj);
 800
 801            intel_upload_data(&brw->intel, map, ib_size, ib_type_size,
 802                              &bo, &offset);
 803            brw->ib.start_vertex_offset = offset / ib_type_size;
 804
 805            ctx->Driver.UnmapBuffer(ctx, bufferobj);
 806        } else {
 807           /* Use CMD_3D_PRIM's start_vertex_offset to avoid re-uploading
 808            * the index buffer state when we're just moving the start index
 809            * of our drawing.
 810            */
 811           brw->ib.start_vertex_offset = offset / ib_type_size;
 812
 813           bo = intel_bufferobj_source(intel,
 814                                       intel_buffer_object(bufferobj),
 815                                       ib_type_size,
 816                                       &offset);
 817           drm_intel_bo_reference(bo);
 818
 819           brw->ib.start_vertex_offset += offset / ib_type_size;
 820        }
 821    }
 822
 823    if (brw->ib.bo != bo) {
 824       drm_intel_bo_unreference(brw->ib.bo);
 825       brw->ib.bo = bo;
 826
 827       brw->state.dirty.brw |= BRW_NEW_INDEX_BUFFER;
 828    } else {
 829       drm_intel_bo_unreference(bo);
 830    }
 831
 832    if (index_buffer->type != brw->ib.type) {
 833       brw->ib.type = index_buffer->type;
 834       brw->state.dirty.brw |= BRW_NEW_INDEX_BUFFER;
 835    }
 836 }
 837
 838 const struct brw_tracked_state brw_indices = {
 839    .dirty = {
 840       .mesa = 0,
 841       .brw = BRW_NEW_INDICES,
 842       .cache = 0,
 843    },
 844    .emit = brw_upload_indices,
 845 };
 846
 847 static void brw_emit_index_buffer(struct brw_context *brw)
 848 {
 849    struct intel_context *intel = &brw->intel;
 850    const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
 851    GLuint cut_index_setting;
 852
 853    if (index_buffer == NULL)
 854       return;
 855
 856    if (brw->prim_restart.enable_cut_index && !intel->is_haswell) {
 857       cut_index_setting = BRW_CUT_INDEX_ENABLE;
 858    } else {
 859       cut_index_setting = 0;
 860    }
 861
 862    BEGIN_BATCH(3);
 863    OUT_BATCH(CMD_INDEX_BUFFER << 16 |
 864              cut_index_setting |
 865              get_index_type(index_buffer->type) << 8 |
 866              1);
 867    OUT_RELOC(brw->ib.bo,
 868              I915_GEM_DOMAIN_VERTEX, 0,
 869              0);
 870    OUT_RELOC(brw->ib.bo,
 871              I915_GEM_DOMAIN_VERTEX, 0,
 872              brw->ib.bo->size - 1);
 873    ADVANCE_BATCH();
 874 }
 875
 876 const struct brw_tracked_state brw_index_buffer = {
 877    .dirty = {
 878       .mesa = 0,
 879       .brw = BRW_NEW_BATCH | BRW_NEW_INDEX_BUFFER,
 880       .cache = 0,
 881    },
 882    .emit = brw_emit_index_buffer,
 883 };