2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
33 #include "brw_context.h"
34 #include "brw_defines.h"
39 /* How does predicate control work when execution_size != 8? Do I
40 * need to test/set for 0xffff when execution_size is 16?
42 void brw_set_predicate_control_flag_value( struct brw_compile
*p
, GLuint value
)
44 p
->current
->header
.predicate_control
= BRW_PREDICATE_NONE
;
47 if (value
!= p
->flag_value
) {
48 brw_push_insn_state(p
);
49 brw_MOV(p
, brw_flag_reg(), brw_imm_uw(value
));
50 p
->flag_value
= value
;
51 brw_pop_insn_state(p
);
54 p
->current
->header
.predicate_control
= BRW_PREDICATE_NORMAL
;
58 void brw_set_predicate_control( struct brw_compile
*p
, GLuint pc
)
60 p
->current
->header
.predicate_control
= pc
;
63 void brw_set_conditionalmod( struct brw_compile
*p
, GLuint conditional
)
65 p
->current
->header
.destreg__conditionalmod
= conditional
;
68 void brw_set_access_mode( struct brw_compile
*p
, GLuint access_mode
)
70 p
->current
->header
.access_mode
= access_mode
;
73 void brw_set_compression_control( struct brw_compile
*p
, GLboolean compression_control
)
75 p
->compressed
= (compression_control
== BRW_COMPRESSION_COMPRESSED
);
77 if (p
->brw
->intel
.gen
>= 6) {
78 /* Since we don't use the 32-wide support in gen6, we translate
79 * the pre-gen6 compression control here.
81 switch (compression_control
) {
82 case BRW_COMPRESSION_NONE
:
83 /* This is the "use the first set of bits of dmask/vmask/arf
84 * according to execsize" option.
86 p
->current
->header
.compression_control
= GEN6_COMPRESSION_1Q
;
88 case BRW_COMPRESSION_2NDHALF
:
89 /* For 8-wide, this is "use the second set of 8 bits." */
90 p
->current
->header
.compression_control
= GEN6_COMPRESSION_2Q
;
92 case BRW_COMPRESSION_COMPRESSED
:
93 /* For 16-wide instruction compression, use the first set of 16 bits
94 * since we don't do 32-wide dispatch.
96 p
->current
->header
.compression_control
= GEN6_COMPRESSION_1H
;
99 assert(!"not reached");
100 p
->current
->header
.compression_control
= GEN6_COMPRESSION_1H
;
104 p
->current
->header
.compression_control
= compression_control
;
108 void brw_set_mask_control( struct brw_compile
*p
, GLuint value
)
110 p
->current
->header
.mask_control
= value
;
113 void brw_set_saturate( struct brw_compile
*p
, GLuint value
)
115 p
->current
->header
.saturate
= value
;
118 void brw_set_acc_write_control(struct brw_compile
*p
, GLuint value
)
120 if (p
->brw
->intel
.gen
>= 6)
121 p
->current
->header
.acc_wr_control
= value
;
124 void brw_push_insn_state( struct brw_compile
*p
)
126 assert(p
->current
!= &p
->stack
[BRW_EU_MAX_INSN_STACK
-1]);
127 memcpy(p
->current
+1, p
->current
, sizeof(struct brw_instruction
));
128 p
->compressed_stack
[p
->current
- p
->stack
] = p
->compressed
;
132 void brw_pop_insn_state( struct brw_compile
*p
)
134 assert(p
->current
!= p
->stack
);
136 p
->compressed
= p
->compressed_stack
[p
->current
- p
->stack
];
140 /***********************************************************************
142 void brw_init_compile( struct brw_context
*brw
, struct brw_compile
*p
)
146 p
->current
= p
->stack
;
147 p
->compressed
= false;
148 memset(p
->current
, 0, sizeof(p
->current
[0]));
152 brw_set_mask_control(p
, BRW_MASK_ENABLE
); /* what does this do? */
153 brw_set_saturate(p
, 0);
154 brw_set_compression_control(p
, BRW_COMPRESSION_NONE
);
155 brw_set_predicate_control_flag_value(p
, 0xff);
159 const GLuint
*brw_get_program( struct brw_compile
*p
,
164 for (i
= 0; i
< 8; i
++)
167 *sz
= p
->nr_insn
* sizeof(struct brw_instruction
);
168 return (const GLuint
*)p
->store
;
174 * Subroutine calls require special attention.
175 * Mesa instructions may be expanded into multiple hardware instructions
176 * so the prog_instruction::BranchTarget field can't be used as an index
177 * into the hardware instructions.
179 * The BranchTarget field isn't needed, however. Mesa's GLSL compiler
180 * emits CAL and BGNSUB instructions with labels that can be used to map
181 * subroutine calls to actual subroutine code blocks.
183 * The structures and function here implement patching of CAL instructions
184 * so they jump to the right subroutine code...
189 * For each OPCODE_BGNSUB we create one of these.
191 struct brw_glsl_label
193 const char *name
; /**< the label string */
194 GLuint position
; /**< the position of the brw instruction for this label */
195 struct brw_glsl_label
*next
; /**< next in linked list */
200 * For each OPCODE_CAL we create one of these.
204 GLuint call_inst_pos
; /**< location of the CAL instruction */
205 const char *sub_name
; /**< name of subroutine to call */
206 struct brw_glsl_call
*next
; /**< next in linked list */
211 * Called for each OPCODE_BGNSUB.
214 brw_save_label(struct brw_compile
*c
, const char *name
, GLuint position
)
216 struct brw_glsl_label
*label
= CALLOC_STRUCT(brw_glsl_label
);
218 label
->position
= position
;
219 label
->next
= c
->first_label
;
220 c
->first_label
= label
;
225 * Called for each OPCODE_CAL.
228 brw_save_call(struct brw_compile
*c
, const char *name
, GLuint call_pos
)
230 struct brw_glsl_call
*call
= CALLOC_STRUCT(brw_glsl_call
);
231 call
->call_inst_pos
= call_pos
;
232 call
->sub_name
= name
;
233 call
->next
= c
->first_call
;
234 c
->first_call
= call
;
239 * Lookup a label, return label's position/offset.
242 brw_lookup_label(struct brw_compile
*c
, const char *name
)
244 const struct brw_glsl_label
*label
;
245 for (label
= c
->first_label
; label
; label
= label
->next
) {
246 if (strcmp(name
, label
->name
) == 0) {
247 return label
->position
;
250 abort(); /* should never happen */
256 * When we're done generating code, this function is called to resolve
260 brw_resolve_cals(struct brw_compile
*c
)
262 const struct brw_glsl_call
*call
;
264 for (call
= c
->first_call
; call
; call
= call
->next
) {
265 const GLuint sub_loc
= brw_lookup_label(c
, call
->sub_name
);
266 struct brw_instruction
*brw_call_inst
= &c
->store
[call
->call_inst_pos
];
267 struct brw_instruction
*brw_sub_inst
= &c
->store
[sub_loc
];
268 GLint offset
= brw_sub_inst
- brw_call_inst
;
270 /* patch brw_inst1 to point to brw_inst2 */
271 brw_set_src1(brw_call_inst
, brw_imm_d(offset
* 16));
274 /* free linked list of calls */
276 struct brw_glsl_call
*call
, *next
;
277 for (call
= c
->first_call
; call
; call
= next
) {
281 c
->first_call
= NULL
;
284 /* free linked list of labels */
286 struct brw_glsl_label
*label
, *next
;
287 for (label
= c
->first_label
; label
; label
= next
) {
291 c
->first_label
= NULL
;