2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keithw@vmware.com>
38 #include "brw_structs.h"
39 #include "brw_defines.h"
41 #include "intel_asm_annotation.h"
42 #include "program/prog_instruction.h"
48 #define BRW_EU_MAX_INSN_STACK 5
50 /* A helper for accessing the last instruction emitted. This makes it easy
51 * to set various bits on an instruction without having to create temporary
52 * variable and assign the emitted instruction to those.
54 #define brw_last_inst (&p->store[p->nr_insn - 1])
60 unsigned int next_insn_offset
;
64 /* Allow clients to push/pop instruction state:
66 brw_inst stack
[BRW_EU_MAX_INSN_STACK
];
67 bool compressed_stack
[BRW_EU_MAX_INSN_STACK
];
70 bool single_program_flow
;
72 struct brw_context
*brw
;
73 const struct brw_device_info
*devinfo
;
75 /* Control flow stacks:
76 * - if_stack contains IF and ELSE instructions which must be patched
77 * (and popped) once the matching ENDIF instruction is encountered.
79 * Just store the instruction pointer(an index).
83 int if_stack_array_size
;
86 * loop_stack contains the instruction pointers of the starts of loops which
87 * must be patched (and popped) once the matching WHILE instruction is
92 * pre-gen6, the BREAK and CONT instructions had to tell how many IF/ENDIF
93 * blocks they were popping out of, to fix up the mask stack. This tracks
94 * the IF/ENDIF nesting in each current nested loop level.
96 int *if_depth_in_loop
;
98 int loop_stack_array_size
;
101 void brw_pop_insn_state( struct brw_compile
*p
);
102 void brw_push_insn_state( struct brw_compile
*p
);
103 void brw_set_default_exec_size(struct brw_compile
*p
, unsigned value
);
104 void brw_set_default_mask_control( struct brw_compile
*p
, unsigned value
);
105 void brw_set_default_saturate( struct brw_compile
*p
, bool enable
);
106 void brw_set_default_access_mode( struct brw_compile
*p
, unsigned access_mode
);
107 void brw_set_default_compression_control(struct brw_compile
*p
, enum brw_compression c
);
108 void brw_set_default_predicate_control( struct brw_compile
*p
, unsigned pc
);
109 void brw_set_default_predicate_inverse(struct brw_compile
*p
, bool predicate_inverse
);
110 void brw_set_default_flag_reg(struct brw_compile
*p
, int reg
, int subreg
);
111 void brw_set_default_acc_write_control(struct brw_compile
*p
, unsigned value
);
113 void brw_init_compile(struct brw_context
*, struct brw_compile
*p
,
115 void brw_disassemble(struct brw_context
*brw
, void *assembly
,
116 int start
, int end
, FILE *out
);
117 const unsigned *brw_get_program( struct brw_compile
*p
, unsigned *sz
);
119 brw_inst
*brw_next_insn(struct brw_compile
*p
, unsigned opcode
);
120 void brw_set_dest(struct brw_compile
*p
, brw_inst
*insn
, struct brw_reg dest
);
121 void brw_set_src0(struct brw_compile
*p
, brw_inst
*insn
, struct brw_reg reg
);
123 void gen6_resolve_implied_move(struct brw_compile
*p
,
125 unsigned msg_reg_nr
);
127 /* Helpers for regular instructions:
130 brw_inst *brw_##OP(struct brw_compile *p, \
131 struct brw_reg dest, \
132 struct brw_reg src0);
135 brw_inst *brw_##OP(struct brw_compile *p, \
136 struct brw_reg dest, \
137 struct brw_reg src0, \
138 struct brw_reg src1);
141 brw_inst *brw_##OP(struct brw_compile *p, \
142 struct brw_reg dest, \
143 struct brw_reg src0, \
144 struct brw_reg src1, \
145 struct brw_reg src2);
148 void brw_##OP(struct brw_compile *p, struct brw_reg dest, struct brw_reg src0);
197 /* Helpers for SEND instruction:
199 void brw_set_sampler_message(struct brw_compile
*p
,
201 unsigned binding_table_index
,
204 unsigned response_length
,
206 unsigned header_present
,
208 unsigned return_format
);
210 void brw_set_dp_read_message(struct brw_compile
*p
,
212 unsigned binding_table_index
,
213 unsigned msg_control
,
215 unsigned target_cache
,
218 unsigned response_length
);
220 void brw_set_dp_write_message(struct brw_compile
*p
,
222 unsigned binding_table_index
,
223 unsigned msg_control
,
227 unsigned last_render_target
,
228 unsigned response_length
,
229 unsigned end_of_thread
,
230 unsigned send_commit_msg
);
232 void brw_urb_WRITE(struct brw_compile
*p
,
236 enum brw_urb_write_flags flags
,
238 unsigned response_length
,
243 * Send message to shared unit \p sfid with a possibly indirect descriptor \p
244 * desc. If \p desc is not an immediate it will be transparently loaded to an
245 * address register using an OR instruction. The returned instruction can be
246 * passed as argument to the usual brw_set_*_message() functions in order to
247 * specify any additional descriptor bits -- If \p desc is an immediate this
248 * will be the SEND instruction itself, otherwise it will be the OR
252 brw_send_indirect_message(struct brw_compile
*p
,
255 struct brw_reg payload
,
256 struct brw_reg desc
);
258 void brw_ff_sync(struct brw_compile
*p
,
263 unsigned response_length
,
266 void brw_svb_write(struct brw_compile
*p
,
270 unsigned binding_table_index
,
271 bool send_commit_msg
);
273 void brw_fb_WRITE(struct brw_compile
*p
,
275 struct brw_reg payload
,
276 struct brw_reg implied_header
,
277 unsigned msg_control
,
278 unsigned binding_table_index
,
280 unsigned response_length
,
282 bool last_render_target
,
283 bool header_present
);
285 void brw_SAMPLE(struct brw_compile
*p
,
289 unsigned binding_table_index
,
292 unsigned response_length
,
294 unsigned header_present
,
296 unsigned return_format
);
298 void brw_adjust_sampler_state_pointer(struct brw_compile
*p
,
299 struct brw_reg header
,
300 struct brw_reg sampler_index
);
302 void gen4_math(struct brw_compile
*p
,
307 unsigned precision
);
309 void gen6_math(struct brw_compile
*p
,
313 struct brw_reg src1
);
315 void brw_oword_block_read(struct brw_compile
*p
,
319 uint32_t bind_table_index
);
321 void brw_oword_block_read_scratch(struct brw_compile
*p
,
327 void brw_oword_block_write_scratch(struct brw_compile
*p
,
332 void gen7_block_read_scratch(struct brw_compile
*p
,
337 void brw_shader_time_add(struct brw_compile
*p
,
338 struct brw_reg payload
,
339 uint32_t surf_index
);
342 * Return the generation-specific jump distance scaling factor.
344 * Given the number of instructions to jump, we need to scale by
345 * some number to obtain the actual jump distance to program in an
348 static inline unsigned
349 brw_jump_scale(const struct brw_device_info
*devinfo
)
351 /* Broadwell measures jump targets in bytes. */
352 if (devinfo
->gen
>= 8)
355 /* Ironlake and later measure jump targets in 64-bit data chunks (in order
356 * (to support compaction), so each 128-bit instruction requires 2 chunks.
358 if (devinfo
->gen
>= 5)
361 /* Gen4 simply uses the number of 128-bit instructions. */
365 /* If/else/endif. Works by manipulating the execution flags on each
368 brw_inst
*brw_IF(struct brw_compile
*p
, unsigned execute_size
);
369 brw_inst
*gen6_IF(struct brw_compile
*p
, enum brw_conditional_mod conditional
,
370 struct brw_reg src0
, struct brw_reg src1
);
372 void brw_ELSE(struct brw_compile
*p
);
373 void brw_ENDIF(struct brw_compile
*p
);
377 brw_inst
*brw_DO(struct brw_compile
*p
, unsigned execute_size
);
379 brw_inst
*brw_WHILE(struct brw_compile
*p
);
381 brw_inst
*brw_BREAK(struct brw_compile
*p
);
382 brw_inst
*brw_CONT(struct brw_compile
*p
);
383 brw_inst
*gen6_HALT(struct brw_compile
*p
);
387 void brw_land_fwd_jump(struct brw_compile
*p
, int jmp_insn_idx
);
389 brw_inst
*brw_JMPI(struct brw_compile
*p
, struct brw_reg index
,
390 unsigned predicate_control
);
392 void brw_NOP(struct brw_compile
*p
);
394 /* Special case: there is never a destination, execution size will be
397 void brw_CMP(struct brw_compile
*p
,
399 unsigned conditional
,
401 struct brw_reg src1
);
404 brw_untyped_atomic(struct brw_compile
*p
,
406 struct brw_reg payload
,
408 unsigned bind_table_index
,
410 bool response_expected
);
413 brw_untyped_surface_read(struct brw_compile
*p
,
416 unsigned bind_table_index
,
418 unsigned num_channels
);
421 brw_pixel_interpolator_query(struct brw_compile
*p
,
428 unsigned response_length
);
430 /***********************************************************************
434 void brw_copy_indirect_to_indirect(struct brw_compile
*p
,
435 struct brw_indirect dst_ptr
,
436 struct brw_indirect src_ptr
,
439 void brw_copy_from_indirect(struct brw_compile
*p
,
441 struct brw_indirect ptr
,
444 void brw_copy4(struct brw_compile
*p
,
449 void brw_copy8(struct brw_compile
*p
,
454 void brw_math_invert( struct brw_compile
*p
,
458 void brw_set_src1(struct brw_compile
*p
, brw_inst
*insn
, struct brw_reg reg
);
460 void brw_set_uip_jip(struct brw_compile
*p
);
462 enum brw_conditional_mod
brw_negate_cmod(uint32_t cmod
);
463 enum brw_conditional_mod
brw_swap_cmod(uint32_t cmod
);
465 /* brw_eu_compact.c */
466 void brw_init_compaction_tables(struct brw_context
*brw
);
467 void brw_compact_instructions(struct brw_compile
*p
, int start_offset
,
468 int num_annotations
, struct annotation
*annotation
);
469 void brw_uncompact_instruction(struct brw_context
*brw
, brw_inst
*dst
,
470 brw_compact_inst
*src
);
471 bool brw_try_compact_instruction(struct brw_context
*brw
, brw_compact_inst
*dst
,
474 void brw_debug_compact_uncompact(struct brw_context
*brw
, brw_inst
*orig
,
475 brw_inst
*uncompacted
);
478 next_offset(const struct brw_device_info
*devinfo
, void *store
, int offset
)
480 brw_inst
*insn
= (brw_inst
*)((char *)store
+ offset
);
482 if (brw_inst_cmpt_control(devinfo
, insn
))