2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
37 #include "brw_structs.h"
38 #include "brw_defines.h"
40 #include "program/prog_instruction.h"
46 #define BRW_EU_MAX_INSN_STACK 5
49 struct brw_instruction
*store
;
52 unsigned int next_insn_offset
;
56 /* Allow clients to push/pop instruction state:
58 struct brw_instruction stack
[BRW_EU_MAX_INSN_STACK
];
59 bool compressed_stack
[BRW_EU_MAX_INSN_STACK
];
60 struct brw_instruction
*current
;
63 bool single_program_flow
;
65 struct brw_context
*brw
;
67 /* Control flow stacks:
68 * - if_stack contains IF and ELSE instructions which must be patched
69 * (and popped) once the matching ENDIF instruction is encountered.
71 * Just store the instruction pointer(an index).
75 int if_stack_array_size
;
78 * loop_stack contains the instruction pointers of the starts of loops which
79 * must be patched (and popped) once the matching WHILE instruction is
84 * pre-gen6, the BREAK and CONT instructions had to tell how many IF/ENDIF
85 * blocks they were popping out of, to fix up the mask stack. This tracks
86 * the IF/ENDIF nesting in each current nested loop level.
88 int *if_depth_in_loop
;
90 int loop_stack_array_size
;
93 static INLINE
struct brw_instruction
*current_insn( struct brw_compile
*p
)
95 return &p
->store
[p
->nr_insn
];
98 void brw_pop_insn_state( struct brw_compile
*p
);
99 void brw_push_insn_state( struct brw_compile
*p
);
100 void brw_set_mask_control( struct brw_compile
*p
, GLuint value
);
101 void brw_set_saturate( struct brw_compile
*p
, bool enable
);
102 void brw_set_access_mode( struct brw_compile
*p
, GLuint access_mode
);
103 void brw_set_compression_control(struct brw_compile
*p
, enum brw_compression c
);
104 void brw_set_predicate_control_flag_value( struct brw_compile
*p
, GLuint value
);
105 void brw_set_predicate_control( struct brw_compile
*p
, GLuint pc
);
106 void brw_set_predicate_inverse(struct brw_compile
*p
, bool predicate_inverse
);
107 void brw_set_conditionalmod( struct brw_compile
*p
, GLuint conditional
);
108 void brw_set_flag_reg(struct brw_compile
*p
, int reg
, int subreg
);
109 void brw_set_acc_write_control(struct brw_compile
*p
, GLuint value
);
111 void brw_init_compile(struct brw_context
*, struct brw_compile
*p
,
113 void brw_dump_compile(struct brw_compile
*p
, FILE *out
, int start
, int end
);
114 const GLuint
*brw_get_program( struct brw_compile
*p
, GLuint
*sz
);
116 struct brw_instruction
*brw_next_insn(struct brw_compile
*p
, GLuint opcode
);
117 void brw_set_dest(struct brw_compile
*p
, struct brw_instruction
*insn
,
118 struct brw_reg dest
);
119 void brw_set_src0(struct brw_compile
*p
, struct brw_instruction
*insn
,
122 void gen6_resolve_implied_move(struct brw_compile
*p
,
126 /* Helpers for regular instructions:
129 struct brw_instruction *brw_##OP(struct brw_compile *p, \
130 struct brw_reg dest, \
131 struct brw_reg src0);
134 struct brw_instruction *brw_##OP(struct brw_compile *p, \
135 struct brw_reg dest, \
136 struct brw_reg src0, \
137 struct brw_reg src1);
140 struct brw_instruction *brw_##OP(struct brw_compile *p, \
141 struct brw_reg dest, \
142 struct brw_reg src0, \
143 struct brw_reg src1, \
144 struct brw_reg src2);
147 void brw_##OP(struct brw_compile *p, struct brw_reg dest, struct brw_reg src0);
196 /* Helpers for SEND instruction:
198 void brw_set_sampler_message(struct brw_compile
*p
,
199 struct brw_instruction
*insn
,
200 GLuint binding_table_index
,
203 GLuint response_length
,
205 GLuint header_present
,
207 GLuint return_format
);
209 void brw_set_dp_read_message(struct brw_compile
*p
,
210 struct brw_instruction
*insn
,
211 GLuint binding_table_index
,
217 GLuint response_length
);
219 void brw_set_dp_write_message(struct brw_compile
*p
,
220 struct brw_instruction
*insn
,
221 GLuint binding_table_index
,
226 GLuint last_render_target
,
227 GLuint response_length
,
228 GLuint end_of_thread
,
229 GLuint send_commit_msg
);
231 enum brw_urb_write_flags
{
232 BRW_URB_WRITE_NO_FLAGS
= 0,
235 * Causes a new URB entry to be allocated, and its address stored in the
236 * destination register (gen < 7).
238 BRW_URB_WRITE_ALLOCATE
= 0x1,
241 * Causes the current URB entry to be deallocated (gen < 7).
243 BRW_URB_WRITE_UNUSED
= 0x2,
246 * Causes the thread to terminate.
248 BRW_URB_WRITE_EOT
= 0x4,
251 * Indicates that the given URB entry is complete, and may be sent further
252 * down the 3D pipeline (gen < 7).
254 BRW_URB_WRITE_COMPLETE
= 0x8,
257 * Indicates that an additional offset (which may be different for the two
258 * vec4 slots) is stored in the message header (gen == 7).
260 BRW_URB_WRITE_PER_SLOT_OFFSET
= 0x10,
263 * Convenient combination of flags: end the thread while simultaneously
264 * marking the given URB entry as complete.
266 BRW_URB_WRITE_EOT_COMPLETE
= BRW_URB_WRITE_EOT
| BRW_URB_WRITE_COMPLETE
,
269 * Convenient combination of flags: mark the given URB entry as complete
270 * and simultaneously allocate a new one.
272 BRW_URB_WRITE_ALLOCATE_COMPLETE
=
273 BRW_URB_WRITE_ALLOCATE
| BRW_URB_WRITE_COMPLETE
,
278 * Allow brw_urb_write_flags enums to be ORed together.
280 inline brw_urb_write_flags
281 operator|(brw_urb_write_flags x
, brw_urb_write_flags y
)
283 return static_cast<brw_urb_write_flags
>(static_cast<int>(x
) |
284 static_cast<int>(y
));
288 void brw_urb_WRITE(struct brw_compile
*p
,
292 enum brw_urb_write_flags flags
,
294 GLuint response_length
,
298 void brw_ff_sync(struct brw_compile
*p
,
303 GLuint response_length
,
306 void brw_svb_write(struct brw_compile
*p
,
310 GLuint binding_table_index
,
311 bool send_commit_msg
);
313 void brw_fb_WRITE(struct brw_compile
*p
,
318 GLuint binding_table_index
,
320 GLuint response_length
,
322 bool header_present
);
324 void brw_SAMPLE(struct brw_compile
*p
,
328 GLuint binding_table_index
,
331 GLuint response_length
,
333 GLuint header_present
,
335 GLuint return_format
);
337 void brw_math( struct brw_compile
*p
,
345 void brw_math2(struct brw_compile
*p
,
349 struct brw_reg src1
);
351 void brw_oword_block_read(struct brw_compile
*p
,
355 uint32_t bind_table_index
);
357 void brw_oword_block_read_scratch(struct brw_compile
*p
,
363 void brw_oword_block_write_scratch(struct brw_compile
*p
,
368 void brw_shader_time_add(struct brw_compile
*p
,
369 struct brw_reg payload
,
370 uint32_t surf_index
);
372 /* If/else/endif. Works by manipulating the execution flags on each
375 struct brw_instruction
*brw_IF(struct brw_compile
*p
,
376 GLuint execute_size
);
377 struct brw_instruction
*gen6_IF(struct brw_compile
*p
, uint32_t conditional
,
378 struct brw_reg src0
, struct brw_reg src1
);
380 void brw_ELSE(struct brw_compile
*p
);
381 void brw_ENDIF(struct brw_compile
*p
);
385 struct brw_instruction
*brw_DO(struct brw_compile
*p
,
386 GLuint execute_size
);
388 struct brw_instruction
*brw_WHILE(struct brw_compile
*p
);
390 struct brw_instruction
*brw_BREAK(struct brw_compile
*p
);
391 struct brw_instruction
*brw_CONT(struct brw_compile
*p
);
392 struct brw_instruction
*gen6_CONT(struct brw_compile
*p
);
393 struct brw_instruction
*gen6_HALT(struct brw_compile
*p
);
396 void brw_land_fwd_jump(struct brw_compile
*p
, int jmp_insn_idx
);
400 void brw_NOP(struct brw_compile
*p
);
402 void brw_WAIT(struct brw_compile
*p
);
404 /* Special case: there is never a destination, execution size will be
407 void brw_CMP(struct brw_compile
*p
,
411 struct brw_reg src1
);
413 /***********************************************************************
417 void brw_copy_indirect_to_indirect(struct brw_compile
*p
,
418 struct brw_indirect dst_ptr
,
419 struct brw_indirect src_ptr
,
422 void brw_copy_from_indirect(struct brw_compile
*p
,
424 struct brw_indirect ptr
,
427 void brw_copy4(struct brw_compile
*p
,
432 void brw_copy8(struct brw_compile
*p
,
437 void brw_math_invert( struct brw_compile
*p
,
441 void brw_set_src1(struct brw_compile
*p
,
442 struct brw_instruction
*insn
,
445 void brw_set_uip_jip(struct brw_compile
*p
);
447 uint32_t brw_swap_cmod(uint32_t cmod
);
449 /* brw_eu_compact.c */
450 void brw_init_compaction_tables(struct brw_context
*brw
);
451 void brw_compact_instructions(struct brw_compile
*p
);
452 void brw_uncompact_instruction(struct brw_context
*brw
,
453 struct brw_instruction
*dst
,
454 struct brw_compact_instruction
*src
);
455 bool brw_try_compact_instruction(struct brw_compile
*p
,
456 struct brw_compact_instruction
*dst
,
457 struct brw_instruction
*src
);
459 void brw_debug_compact_uncompact(struct brw_context
*brw
,
460 struct brw_instruction
*orig
,
461 struct brw_instruction
*uncompacted
);