2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
37 #include "brw_structs.h"
38 #include "brw_defines.h"
40 #include "program/prog_instruction.h"
46 #define BRW_EU_MAX_INSN_STACK 5
49 struct brw_instruction
*store
;
52 unsigned int next_insn_offset
;
56 /* Allow clients to push/pop instruction state:
58 struct brw_instruction stack
[BRW_EU_MAX_INSN_STACK
];
59 bool compressed_stack
[BRW_EU_MAX_INSN_STACK
];
60 struct brw_instruction
*current
;
63 bool single_program_flow
;
65 struct brw_context
*brw
;
67 /* Control flow stacks:
68 * - if_stack contains IF and ELSE instructions which must be patched
69 * (and popped) once the matching ENDIF instruction is encountered.
71 * Just store the instruction pointer(an index).
75 int if_stack_array_size
;
78 * loop_stack contains the instruction pointers of the starts of loops which
79 * must be patched (and popped) once the matching WHILE instruction is
84 * pre-gen6, the BREAK and CONT instructions had to tell how many IF/ENDIF
85 * blocks they were popping out of, to fix up the mask stack. This tracks
86 * the IF/ENDIF nesting in each current nested loop level.
88 int *if_depth_in_loop
;
90 int loop_stack_array_size
;
93 static INLINE
struct brw_instruction
*current_insn( struct brw_compile
*p
)
95 return &p
->store
[p
->nr_insn
];
98 void brw_pop_insn_state( struct brw_compile
*p
);
99 void brw_push_insn_state( struct brw_compile
*p
);
100 void brw_set_mask_control( struct brw_compile
*p
, GLuint value
);
101 void brw_set_saturate( struct brw_compile
*p
, bool enable
);
102 void brw_set_access_mode( struct brw_compile
*p
, GLuint access_mode
);
103 void brw_set_compression_control(struct brw_compile
*p
, enum brw_compression c
);
104 void brw_set_predicate_control_flag_value( struct brw_compile
*p
, GLuint value
);
105 void brw_set_predicate_control( struct brw_compile
*p
, GLuint pc
);
106 void brw_set_predicate_inverse(struct brw_compile
*p
, bool predicate_inverse
);
107 void brw_set_conditionalmod( struct brw_compile
*p
, GLuint conditional
);
108 void brw_set_flag_reg(struct brw_compile
*p
, int reg
, int subreg
);
109 void brw_set_acc_write_control(struct brw_compile
*p
, GLuint value
);
111 void brw_init_compile(struct brw_context
*, struct brw_compile
*p
,
113 void brw_dump_compile(struct brw_compile
*p
, FILE *out
, int start
, int end
);
114 const GLuint
*brw_get_program( struct brw_compile
*p
, GLuint
*sz
);
116 struct brw_instruction
*brw_next_insn(struct brw_compile
*p
, GLuint opcode
);
117 void brw_set_dest(struct brw_compile
*p
, struct brw_instruction
*insn
,
118 struct brw_reg dest
);
119 void brw_set_src0(struct brw_compile
*p
, struct brw_instruction
*insn
,
122 void gen6_resolve_implied_move(struct brw_compile
*p
,
126 /* Helpers for regular instructions:
129 struct brw_instruction *brw_##OP(struct brw_compile *p, \
130 struct brw_reg dest, \
131 struct brw_reg src0);
134 struct brw_instruction *brw_##OP(struct brw_compile *p, \
135 struct brw_reg dest, \
136 struct brw_reg src0, \
137 struct brw_reg src1);
140 struct brw_instruction *brw_##OP(struct brw_compile *p, \
141 struct brw_reg dest, \
142 struct brw_reg src0, \
143 struct brw_reg src1, \
144 struct brw_reg src2);
147 void brw_##OP(struct brw_compile *p, struct brw_reg dest, struct brw_reg src0);
194 /* Helpers for SEND instruction:
196 void brw_set_sampler_message(struct brw_compile
*p
,
197 struct brw_instruction
*insn
,
198 GLuint binding_table_index
,
201 GLuint response_length
,
203 GLuint header_present
,
205 GLuint return_format
);
207 void brw_set_dp_read_message(struct brw_compile
*p
,
208 struct brw_instruction
*insn
,
209 GLuint binding_table_index
,
215 GLuint response_length
);
217 void brw_set_dp_write_message(struct brw_compile
*p
,
218 struct brw_instruction
*insn
,
219 GLuint binding_table_index
,
224 GLuint last_render_target
,
225 GLuint response_length
,
226 GLuint end_of_thread
,
227 GLuint send_commit_msg
);
229 enum brw_urb_write_flags
{
230 BRW_URB_WRITE_NO_FLAGS
= 0,
233 * Causes a new URB entry to be allocated, and its address stored in the
234 * destination register (gen < 7).
236 BRW_URB_WRITE_ALLOCATE
= 0x1,
239 * Causes the current URB entry to be deallocated (gen < 7).
241 BRW_URB_WRITE_UNUSED
= 0x2,
244 * Causes the thread to terminate.
246 BRW_URB_WRITE_EOT
= 0x4,
249 * Indicates that the given URB entry is complete, and may be sent further
250 * down the 3D pipeline (gen < 7).
252 BRW_URB_WRITE_COMPLETE
= 0x8,
255 * Indicates that an additional offset (which may be different for the two
256 * vec4 slots) is stored in the message header (gen == 7).
258 BRW_URB_WRITE_PER_SLOT_OFFSET
= 0x10,
261 * Convenient combination of flags: end the thread while simultaneously
262 * marking the given URB entry as complete.
264 BRW_URB_WRITE_EOT_COMPLETE
= BRW_URB_WRITE_EOT
| BRW_URB_WRITE_COMPLETE
,
267 * Convenient combination of flags: mark the given URB entry as complete
268 * and simultaneously allocate a new one.
270 BRW_URB_WRITE_ALLOCATE_COMPLETE
=
271 BRW_URB_WRITE_ALLOCATE
| BRW_URB_WRITE_COMPLETE
,
276 * Allow brw_urb_write_flags enums to be ORed together.
278 inline brw_urb_write_flags
279 operator|(brw_urb_write_flags x
, brw_urb_write_flags y
)
281 return static_cast<brw_urb_write_flags
>(static_cast<int>(x
) |
282 static_cast<int>(y
));
286 void brw_urb_WRITE(struct brw_compile
*p
,
290 enum brw_urb_write_flags flags
,
292 GLuint response_length
,
296 void brw_ff_sync(struct brw_compile
*p
,
301 GLuint response_length
,
304 void brw_svb_write(struct brw_compile
*p
,
308 GLuint binding_table_index
,
309 bool send_commit_msg
);
311 void brw_fb_WRITE(struct brw_compile
*p
,
316 GLuint binding_table_index
,
318 GLuint response_length
,
320 bool header_present
);
322 void brw_SAMPLE(struct brw_compile
*p
,
326 GLuint binding_table_index
,
329 GLuint response_length
,
331 GLuint header_present
,
333 GLuint return_format
);
335 void brw_math( struct brw_compile
*p
,
343 void brw_math2(struct brw_compile
*p
,
347 struct brw_reg src1
);
349 void brw_oword_block_read(struct brw_compile
*p
,
353 uint32_t bind_table_index
);
355 void brw_oword_block_read_scratch(struct brw_compile
*p
,
361 void brw_oword_block_write_scratch(struct brw_compile
*p
,
366 void brw_shader_time_add(struct brw_compile
*p
,
367 struct brw_reg payload
,
368 uint32_t surf_index
);
370 /* If/else/endif. Works by manipulating the execution flags on each
373 struct brw_instruction
*brw_IF(struct brw_compile
*p
,
374 GLuint execute_size
);
375 struct brw_instruction
*gen6_IF(struct brw_compile
*p
, uint32_t conditional
,
376 struct brw_reg src0
, struct brw_reg src1
);
378 void brw_ELSE(struct brw_compile
*p
);
379 void brw_ENDIF(struct brw_compile
*p
);
383 struct brw_instruction
*brw_DO(struct brw_compile
*p
,
384 GLuint execute_size
);
386 struct brw_instruction
*brw_WHILE(struct brw_compile
*p
);
388 struct brw_instruction
*brw_BREAK(struct brw_compile
*p
);
389 struct brw_instruction
*brw_CONT(struct brw_compile
*p
);
390 struct brw_instruction
*gen6_CONT(struct brw_compile
*p
);
391 struct brw_instruction
*gen6_HALT(struct brw_compile
*p
);
394 void brw_land_fwd_jump(struct brw_compile
*p
, int jmp_insn_idx
);
398 void brw_NOP(struct brw_compile
*p
);
400 void brw_WAIT(struct brw_compile
*p
);
402 /* Special case: there is never a destination, execution size will be
405 void brw_CMP(struct brw_compile
*p
,
409 struct brw_reg src1
);
411 /***********************************************************************
415 void brw_copy_indirect_to_indirect(struct brw_compile
*p
,
416 struct brw_indirect dst_ptr
,
417 struct brw_indirect src_ptr
,
420 void brw_copy_from_indirect(struct brw_compile
*p
,
422 struct brw_indirect ptr
,
425 void brw_copy4(struct brw_compile
*p
,
430 void brw_copy8(struct brw_compile
*p
,
435 void brw_math_invert( struct brw_compile
*p
,
439 void brw_set_src1(struct brw_compile
*p
,
440 struct brw_instruction
*insn
,
443 void brw_set_uip_jip(struct brw_compile
*p
);
445 uint32_t brw_swap_cmod(uint32_t cmod
);
447 /* brw_eu_compact.c */
448 void brw_init_compaction_tables(struct brw_context
*brw
);
449 void brw_compact_instructions(struct brw_compile
*p
);
450 void brw_uncompact_instruction(struct brw_context
*brw
,
451 struct brw_instruction
*dst
,
452 struct brw_compact_instruction
*src
);
453 bool brw_try_compact_instruction(struct brw_compile
*p
,
454 struct brw_compact_instruction
*dst
,
455 struct brw_instruction
*src
);
457 void brw_debug_compact_uncompact(struct brw_context
*brw
,
458 struct brw_instruction
*orig
,
459 struct brw_instruction
*uncompacted
);