src/mesa/drivers/dri/i965/brw_eu.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keithw@vmware.com>
  30   */
  31
  32
  33 #ifndef BRW_EU_H
  34 #define BRW_EU_H
  35
  36 #include <stdbool.h>
  37 #include "brw_inst.h"
  38 #include "brw_defines.h"
  39 #include "brw_reg.h"
  40 #include "intel_asm_annotation.h"
  41
  42 #ifdef __cplusplus
  43 extern "C" {
  44 #endif
  45
  46 #define BRW_EU_MAX_INSN_STACK 5
  47
  48 /* A helper for accessing the last instruction emitted.  This makes it easy
  49  * to set various bits on an instruction without having to create temporary
  50  * variable and assign the emitted instruction to those.
  51  */
  52 #define brw_last_inst (&p->store[p->nr_insn - 1])
  53
  54 struct brw_codegen {
  55    brw_inst *store;
  56    int store_size;
  57    unsigned nr_insn;
  58    unsigned int next_insn_offset;
  59
  60    void *mem_ctx;
  61
  62    /* Allow clients to push/pop instruction state:
  63     */
  64    brw_inst stack[BRW_EU_MAX_INSN_STACK];
  65    bool compressed_stack[BRW_EU_MAX_INSN_STACK];
  66    brw_inst *current;
  67
  68    bool single_program_flow;
  69    const struct gen_device_info *devinfo;
  70
  71    /* Control flow stacks:
  72     * - if_stack contains IF and ELSE instructions which must be patched
  73     *   (and popped) once the matching ENDIF instruction is encountered.
  74     *
  75     *   Just store the instruction pointer(an index).
  76     */
  77    int *if_stack;
  78    int if_stack_depth;
  79    int if_stack_array_size;
  80
  81    /**
  82     * loop_stack contains the instruction pointers of the starts of loops which
  83     * must be patched (and popped) once the matching WHILE instruction is
  84     * encountered.
  85     */
  86    int *loop_stack;
  87    /**
  88     * pre-gen6, the BREAK and CONT instructions had to tell how many IF/ENDIF
  89     * blocks they were popping out of, to fix up the mask stack.  This tracks
  90     * the IF/ENDIF nesting in each current nested loop level.
  91     */
  92    int *if_depth_in_loop;
  93    int loop_stack_depth;
  94    int loop_stack_array_size;
  95 };
  96
  97 void brw_pop_insn_state( struct brw_codegen *p );
  98 void brw_push_insn_state( struct brw_codegen *p );
  99 void brw_set_default_exec_size(struct brw_codegen *p, unsigned value);
 100 void brw_set_default_mask_control( struct brw_codegen *p, unsigned value );
 101 void brw_set_default_saturate( struct brw_codegen *p, bool enable );
 102 void brw_set_default_access_mode( struct brw_codegen *p, unsigned access_mode );
 103 void brw_inst_set_compression(const struct gen_device_info *devinfo,
 104                               brw_inst *inst, bool on);
 105 void brw_set_default_compression(struct brw_codegen *p, bool on);
 106 void brw_inst_set_group(const struct gen_device_info *devinfo,
 107                         brw_inst *inst, unsigned group);
 108 void brw_set_default_group(struct brw_codegen *p, unsigned group);
 109 void brw_set_default_compression_control(struct brw_codegen *p, enum brw_compression c);
 110 void brw_set_default_predicate_control( struct brw_codegen *p, unsigned pc );
 111 void brw_set_default_predicate_inverse(struct brw_codegen *p, bool predicate_inverse);
 112 void brw_set_default_flag_reg(struct brw_codegen *p, int reg, int subreg);
 113 void brw_set_default_acc_write_control(struct brw_codegen *p, unsigned value);
 114
 115 void brw_init_codegen(const struct gen_device_info *, struct brw_codegen *p,
 116                       void *mem_ctx);
 117 void brw_disassemble(const struct gen_device_info *devinfo, void *assembly,
 118                      int start, int end, FILE *out);
 119 const unsigned *brw_get_program( struct brw_codegen *p, unsigned *sz );
 120
 121 brw_inst *brw_next_insn(struct brw_codegen *p, unsigned opcode);
 122 void brw_set_dest(struct brw_codegen *p, brw_inst *insn, struct brw_reg dest);
 123 void brw_set_src0(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg);
 124
 125 void gen6_resolve_implied_move(struct brw_codegen *p,
 126                                struct brw_reg *src,
 127                                unsigned msg_reg_nr);
 128
 129 /* Helpers for regular instructions:
 130  */
 131 #define ALU1(OP)                                \
 132 brw_inst *brw_##OP(struct brw_codegen *p,       \
 133               struct brw_reg dest,              \
 134               struct brw_reg src0);
 135
 136 #define ALU2(OP)                                \
 137 brw_inst *brw_##OP(struct brw_codegen *p,       \
 138               struct brw_reg dest,              \
 139               struct brw_reg src0,              \
 140               struct brw_reg src1);
 141
 142 #define ALU3(OP)                                \
 143 brw_inst *brw_##OP(struct brw_codegen *p,       \
 144               struct brw_reg dest,              \
 145               struct brw_reg src0,              \
 146               struct brw_reg src1,              \
 147               struct brw_reg src2);
 148
 149 #define ROUND(OP) \
 150 void brw_##OP(struct brw_codegen *p, struct brw_reg dest, struct brw_reg src0);
 151
 152 ALU1(MOV)
 153 ALU2(SEL)
 154 ALU1(NOT)
 155 ALU2(AND)
 156 ALU2(OR)
 157 ALU2(XOR)
 158 ALU2(SHR)
 159 ALU2(SHL)
 160 ALU1(DIM)
 161 ALU2(ASR)
 162 ALU1(F32TO16)
 163 ALU1(F16TO32)
 164 ALU2(ADD)
 165 ALU2(AVG)
 166 ALU2(MUL)
 167 ALU1(FRC)
 168 ALU1(RNDD)
 169 ALU2(MAC)
 170 ALU2(MACH)
 171 ALU1(LZD)
 172 ALU2(DP4)
 173 ALU2(DPH)
 174 ALU2(DP3)
 175 ALU2(DP2)
 176 ALU2(LINE)
 177 ALU2(PLN)
 178 ALU3(MAD)
 179 ALU3(LRP)
 180 ALU1(BFREV)
 181 ALU3(BFE)
 182 ALU2(BFI1)
 183 ALU3(BFI2)
 184 ALU1(FBH)
 185 ALU1(FBL)
 186 ALU1(CBIT)
 187 ALU2(ADDC)
 188 ALU2(SUBB)
 189 ALU2(MAC)
 190
 191 ROUND(RNDZ)
 192 ROUND(RNDE)
 193
 194 #undef ALU1
 195 #undef ALU2
 196 #undef ALU3
 197 #undef ROUND
 198
 199
 200 /* Helpers for SEND instruction:
 201  */
 202 void brw_set_sampler_message(struct brw_codegen *p,
 203                              brw_inst *insn,
 204                              unsigned binding_table_index,
 205                              unsigned sampler,
 206                              unsigned msg_type,
 207                              unsigned response_length,
 208                              unsigned msg_length,
 209                              unsigned header_present,
 210                              unsigned simd_mode,
 211                              unsigned return_format);
 212
 213 void brw_set_message_descriptor(struct brw_codegen *p,
 214                                 brw_inst *inst,
 215                                 enum brw_message_target sfid,
 216                                 unsigned msg_length,
 217                                 unsigned response_length,
 218                                 bool header_present,
 219                                 bool end_of_thread);
 220
 221 void brw_set_dp_read_message(struct brw_codegen *p,
 222                              brw_inst *insn,
 223                              unsigned binding_table_index,
 224                              unsigned msg_control,
 225                              unsigned msg_type,
 226                              unsigned target_cache,
 227                              unsigned msg_length,
 228                              bool header_present,
 229                              unsigned response_length);
 230
 231 void brw_set_dp_write_message(struct brw_codegen *p,
 232                               brw_inst *insn,
 233                               unsigned binding_table_index,
 234                               unsigned msg_control,
 235                               unsigned msg_type,
 236                               unsigned msg_length,
 237                               bool header_present,
 238                               unsigned last_render_target,
 239                               unsigned response_length,
 240                               unsigned end_of_thread,
 241                               unsigned send_commit_msg);
 242
 243 void brw_urb_WRITE(struct brw_codegen *p,
 244                    struct brw_reg dest,
 245                    unsigned msg_reg_nr,
 246                    struct brw_reg src0,
 247                    enum brw_urb_write_flags flags,
 248                    unsigned msg_length,
 249                    unsigned response_length,
 250                    unsigned offset,
 251                    unsigned swizzle);
 252
 253 /**
 254  * Send message to shared unit \p sfid with a possibly indirect descriptor \p
 255  * desc.  If \p desc is not an immediate it will be transparently loaded to an
 256  * address register using an OR instruction.  The returned instruction can be
 257  * passed as argument to the usual brw_set_*_message() functions in order to
 258  * specify any additional descriptor bits -- If \p desc is an immediate this
 259  * will be the SEND instruction itself, otherwise it will be the OR
 260  * instruction.
 261  */
 262 struct brw_inst *
 263 brw_send_indirect_message(struct brw_codegen *p,
 264                           unsigned sfid,
 265                           struct brw_reg dst,
 266                           struct brw_reg payload,
 267                           struct brw_reg desc);
 268
 269 void brw_ff_sync(struct brw_codegen *p,
 270                    struct brw_reg dest,
 271                    unsigned msg_reg_nr,
 272                    struct brw_reg src0,
 273                    bool allocate,
 274                    unsigned response_length,
 275                    bool eot);
 276
 277 void brw_svb_write(struct brw_codegen *p,
 278                    struct brw_reg dest,
 279                    unsigned msg_reg_nr,
 280                    struct brw_reg src0,
 281                    unsigned binding_table_index,
 282                    bool   send_commit_msg);
 283
 284 void brw_fb_WRITE(struct brw_codegen *p,
 285                    struct brw_reg payload,
 286                    struct brw_reg implied_header,
 287                    unsigned msg_control,
 288                    unsigned binding_table_index,
 289                    unsigned msg_length,
 290                    unsigned response_length,
 291                    bool eot,
 292                    bool last_render_target,
 293                    bool header_present);
 294
 295 brw_inst *gen9_fb_READ(struct brw_codegen *p,
 296                        struct brw_reg dst,
 297                        struct brw_reg payload,
 298                        unsigned binding_table_index,
 299                        unsigned msg_length,
 300                        unsigned response_length,
 301                        bool per_sample);
 302
 303 void brw_SAMPLE(struct brw_codegen *p,
 304                 struct brw_reg dest,
 305                 unsigned msg_reg_nr,
 306                 struct brw_reg src0,
 307                 unsigned binding_table_index,
 308                 unsigned sampler,
 309                 unsigned msg_type,
 310                 unsigned response_length,
 311                 unsigned msg_length,
 312                 unsigned header_present,
 313                 unsigned simd_mode,
 314                 unsigned return_format);
 315
 316 void brw_adjust_sampler_state_pointer(struct brw_codegen *p,
 317                                       struct brw_reg header,
 318                                       struct brw_reg sampler_index);
 319
 320 void gen4_math(struct brw_codegen *p,
 321                struct brw_reg dest,
 322                unsigned function,
 323                unsigned msg_reg_nr,
 324                struct brw_reg src,
 325                unsigned precision );
 326
 327 void gen6_math(struct brw_codegen *p,
 328                struct brw_reg dest,
 329                unsigned function,
 330                struct brw_reg src0,
 331                struct brw_reg src1);
 332
 333 void brw_oword_block_read(struct brw_codegen *p,
 334                           struct brw_reg dest,
 335                           struct brw_reg mrf,
 336                           uint32_t offset,
 337                           uint32_t bind_table_index);
 338
 339 unsigned brw_scratch_surface_idx(const struct brw_codegen *p);
 340
 341 void brw_oword_block_read_scratch(struct brw_codegen *p,
 342                                   struct brw_reg dest,
 343                                   struct brw_reg mrf,
 344                                   int num_regs,
 345                                   unsigned offset);
 346
 347 void brw_oword_block_write_scratch(struct brw_codegen *p,
 348                                    struct brw_reg mrf,
 349                                    int num_regs,
 350                                    unsigned offset);
 351
 352 void gen7_block_read_scratch(struct brw_codegen *p,
 353                              struct brw_reg dest,
 354                              int num_regs,
 355                              unsigned offset);
 356
 357 void brw_shader_time_add(struct brw_codegen *p,
 358                          struct brw_reg payload,
 359                          uint32_t surf_index);
 360
 361 /**
 362  * Return the generation-specific jump distance scaling factor.
 363  *
 364  * Given the number of instructions to jump, we need to scale by
 365  * some number to obtain the actual jump distance to program in an
 366  * instruction.
 367  */
 368 static inline unsigned
 369 brw_jump_scale(const struct gen_device_info *devinfo)
 370 {
 371    /* Broadwell measures jump targets in bytes. */
 372    if (devinfo->gen >= 8)
 373       return 16;
 374
 375    /* Ironlake and later measure jump targets in 64-bit data chunks (in order
 376     * (to support compaction), so each 128-bit instruction requires 2 chunks.
 377     */
 378    if (devinfo->gen >= 5)
 379       return 2;
 380
 381    /* Gen4 simply uses the number of 128-bit instructions. */
 382    return 1;
 383 }
 384
 385 void brw_barrier(struct brw_codegen *p, struct brw_reg src);
 386
 387 /* If/else/endif.  Works by manipulating the execution flags on each
 388  * channel.
 389  */
 390 brw_inst *brw_IF(struct brw_codegen *p, unsigned execute_size);
 391 brw_inst *gen6_IF(struct brw_codegen *p, enum brw_conditional_mod conditional,
 392                   struct brw_reg src0, struct brw_reg src1);
 393
 394 void brw_ELSE(struct brw_codegen *p);
 395 void brw_ENDIF(struct brw_codegen *p);
 396
 397 /* DO/WHILE loops:
 398  */
 399 brw_inst *brw_DO(struct brw_codegen *p, unsigned execute_size);
 400
 401 brw_inst *brw_WHILE(struct brw_codegen *p);
 402
 403 brw_inst *brw_BREAK(struct brw_codegen *p);
 404 brw_inst *brw_CONT(struct brw_codegen *p);
 405 brw_inst *gen6_HALT(struct brw_codegen *p);
 406
 407 /* Forward jumps:
 408  */
 409 void brw_land_fwd_jump(struct brw_codegen *p, int jmp_insn_idx);
 410
 411 brw_inst *brw_JMPI(struct brw_codegen *p, struct brw_reg index,
 412                    unsigned predicate_control);
 413
 414 void brw_NOP(struct brw_codegen *p);
 415
 416 void brw_WAIT(struct brw_codegen *p);
 417
 418 /* Special case: there is never a destination, execution size will be
 419  * taken from src0:
 420  */
 421 void brw_CMP(struct brw_codegen *p,
 422              struct brw_reg dest,
 423              unsigned conditional,
 424              struct brw_reg src0,
 425              struct brw_reg src1);
 426
 427 void
 428 brw_untyped_atomic(struct brw_codegen *p,
 429                    struct brw_reg dst,
 430                    struct brw_reg payload,
 431                    struct brw_reg surface,
 432                    unsigned atomic_op,
 433                    unsigned msg_length,
 434                    bool response_expected);
 435
 436 void
 437 brw_untyped_surface_read(struct brw_codegen *p,
 438                          struct brw_reg dst,
 439                          struct brw_reg payload,
 440                          struct brw_reg surface,
 441                          unsigned msg_length,
 442                          unsigned num_channels);
 443
 444 void
 445 brw_untyped_surface_write(struct brw_codegen *p,
 446                           struct brw_reg payload,
 447                           struct brw_reg surface,
 448                           unsigned msg_length,
 449                           unsigned num_channels);
 450
 451 void
 452 brw_typed_atomic(struct brw_codegen *p,
 453                  struct brw_reg dst,
 454                  struct brw_reg payload,
 455                  struct brw_reg surface,
 456                  unsigned atomic_op,
 457                  unsigned msg_length,
 458                  bool response_expected);
 459
 460 void
 461 brw_typed_surface_read(struct brw_codegen *p,
 462                        struct brw_reg dst,
 463                        struct brw_reg payload,
 464                        struct brw_reg surface,
 465                        unsigned msg_length,
 466                        unsigned num_channels);
 467
 468 void
 469 brw_typed_surface_write(struct brw_codegen *p,
 470                         struct brw_reg payload,
 471                         struct brw_reg surface,
 472                         unsigned msg_length,
 473                         unsigned num_channels);
 474
 475 void
 476 brw_memory_fence(struct brw_codegen *p,
 477                  struct brw_reg dst);
 478
 479 void
 480 brw_pixel_interpolator_query(struct brw_codegen *p,
 481                              struct brw_reg dest,
 482                              struct brw_reg mrf,
 483                              bool noperspective,
 484                              unsigned mode,
 485                              struct brw_reg data,
 486                              unsigned msg_length,
 487                              unsigned response_length);
 488
 489 void
 490 brw_find_live_channel(struct brw_codegen *p,
 491                       struct brw_reg dst,
 492                       struct brw_reg mask);
 493
 494 void
 495 brw_broadcast(struct brw_codegen *p,
 496               struct brw_reg dst,
 497               struct brw_reg src,
 498               struct brw_reg idx);
 499
 500 /***********************************************************************
 501  * brw_eu_util.c:
 502  */
 503
 504 void brw_copy_indirect_to_indirect(struct brw_codegen *p,
 505                                    struct brw_indirect dst_ptr,
 506                                    struct brw_indirect src_ptr,
 507                                    unsigned count);
 508
 509 void brw_copy_from_indirect(struct brw_codegen *p,
 510                             struct brw_reg dst,
 511                             struct brw_indirect ptr,
 512                             unsigned count);
 513
 514 void brw_copy4(struct brw_codegen *p,
 515                struct brw_reg dst,
 516                struct brw_reg src,
 517                unsigned count);
 518
 519 void brw_copy8(struct brw_codegen *p,
 520                struct brw_reg dst,
 521                struct brw_reg src,
 522                unsigned count);
 523
 524 void brw_math_invert( struct brw_codegen *p,
 525                       struct brw_reg dst,
 526                       struct brw_reg src);
 527
 528 void brw_set_src1(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg);
 529
 530 void brw_set_uip_jip(struct brw_codegen *p, int start_offset);
 531
 532 enum brw_conditional_mod brw_negate_cmod(uint32_t cmod);
 533 enum brw_conditional_mod brw_swap_cmod(uint32_t cmod);
 534
 535 /* brw_eu_compact.c */
 536 void brw_init_compaction_tables(const struct gen_device_info *devinfo);
 537 void brw_compact_instructions(struct brw_codegen *p, int start_offset,
 538                               int num_annotations, struct annotation *annotation);
 539 void brw_uncompact_instruction(const struct gen_device_info *devinfo,
 540                                brw_inst *dst, brw_compact_inst *src);
 541 bool brw_try_compact_instruction(const struct gen_device_info *devinfo,
 542                                  brw_compact_inst *dst, brw_inst *src);
 543
 544 void brw_debug_compact_uncompact(const struct gen_device_info *devinfo,
 545                                  brw_inst *orig, brw_inst *uncompacted);
 546
 547 /* brw_eu_validate.c */
 548 bool brw_validate_instructions(const struct brw_codegen *p, int start_offset,
 549                                struct annotation_info *annotation);
 550
 551 static inline int
 552 next_offset(const struct gen_device_info *devinfo, void *store, int offset)
 553 {
 554    brw_inst *insn = (brw_inst *)((char *)store + offset);
 555
 556    if (brw_inst_cmpt_control(devinfo, insn))
 557       return offset + 8;
 558    else
 559       return offset + 16;
 560 }
 561
 562 struct opcode_desc {
 563    /* The union is an implementation detail used by brw_opcode_desc() to handle
 564     * opcodes that have been reused for different instructions across hardware
 565     * generations.
 566     *
 567     * The gens field acts as a tag. If it is non-zero, name points to a string
 568     * containing the instruction mnemonic. If it is zero, the table field is
 569     * valid and either points to a secondary opcode_desc table with 'size'
 570     * elements or is NULL and no such instruction exists for the opcode.
 571     */
 572    union {
 573       struct {
 574          char    *name;
 575          int      nsrc;
 576       };
 577       struct {
 578          const struct opcode_desc *table;
 579          unsigned size;
 580       };
 581    };
 582    int      ndst;
 583    int      gens;
 584 };
 585
 586 const struct opcode_desc *
 587 brw_opcode_desc(const struct gen_device_info *devinfo, enum opcode opcode);
 588
 589 static inline bool
 590 is_3src(const struct gen_device_info *devinfo, enum opcode opcode)
 591 {
 592    const struct opcode_desc *desc = brw_opcode_desc(devinfo, opcode);
 593    return desc && desc->nsrc == 3;
 594 }
 595
 596 /** Maximum SEND message length */
 597 #define BRW_MAX_MSG_LENGTH 15
 598
 599 /** First MRF register used by pull loads */
 600 #define FIRST_SPILL_MRF(gen) ((gen) == 6 ? 21 : 13)
 601
 602 /** First MRF register used by spills */
 603 #define FIRST_PULL_LOAD_MRF(gen) ((gen) == 6 ? 16 : 13)
 604
 605 #ifdef __cplusplus
 606 }
 607 #endif
 608
 609 #endif