2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keithw@vmware.com>
38 #include "brw_structs.h"
39 #include "brw_defines.h"
41 #include "intel_asm_annotation.h"
42 #include "program/prog_instruction.h"
48 #define BRW_EU_MAX_INSN_STACK 5
50 /* A helper for accessing the last instruction emitted. This makes it easy
51 * to set various bits on an instruction without having to create temporary
52 * variable and assign the emitted instruction to those.
54 #define brw_last_inst (&p->store[p->nr_insn - 1])
60 unsigned int next_insn_offset
;
64 /* Allow clients to push/pop instruction state:
66 brw_inst stack
[BRW_EU_MAX_INSN_STACK
];
67 bool compressed_stack
[BRW_EU_MAX_INSN_STACK
];
70 bool single_program_flow
;
72 const struct brw_device_info
*devinfo
;
74 /* Control flow stacks:
75 * - if_stack contains IF and ELSE instructions which must be patched
76 * (and popped) once the matching ENDIF instruction is encountered.
78 * Just store the instruction pointer(an index).
82 int if_stack_array_size
;
85 * loop_stack contains the instruction pointers of the starts of loops which
86 * must be patched (and popped) once the matching WHILE instruction is
91 * pre-gen6, the BREAK and CONT instructions had to tell how many IF/ENDIF
92 * blocks they were popping out of, to fix up the mask stack. This tracks
93 * the IF/ENDIF nesting in each current nested loop level.
95 int *if_depth_in_loop
;
97 int loop_stack_array_size
;
100 void brw_pop_insn_state( struct brw_codegen
*p
);
101 void brw_push_insn_state( struct brw_codegen
*p
);
102 void brw_set_default_exec_size(struct brw_codegen
*p
, unsigned value
);
103 void brw_set_default_mask_control( struct brw_codegen
*p
, unsigned value
);
104 void brw_set_default_saturate( struct brw_codegen
*p
, bool enable
);
105 void brw_set_default_access_mode( struct brw_codegen
*p
, unsigned access_mode
);
106 void brw_set_default_compression_control(struct brw_codegen
*p
, enum brw_compression c
);
107 void brw_set_default_predicate_control( struct brw_codegen
*p
, unsigned pc
);
108 void brw_set_default_predicate_inverse(struct brw_codegen
*p
, bool predicate_inverse
);
109 void brw_set_default_flag_reg(struct brw_codegen
*p
, int reg
, int subreg
);
110 void brw_set_default_acc_write_control(struct brw_codegen
*p
, unsigned value
);
112 void brw_init_codegen(const struct brw_device_info
*, struct brw_codegen
*p
,
114 void brw_disassemble(const struct brw_device_info
*devinfo
, void *assembly
,
115 int start
, int end
, FILE *out
);
116 const unsigned *brw_get_program( struct brw_codegen
*p
, unsigned *sz
);
118 brw_inst
*brw_next_insn(struct brw_codegen
*p
, unsigned opcode
);
119 void brw_set_dest(struct brw_codegen
*p
, brw_inst
*insn
, struct brw_reg dest
);
120 void brw_set_src0(struct brw_codegen
*p
, brw_inst
*insn
, struct brw_reg reg
);
122 void gen6_resolve_implied_move(struct brw_codegen
*p
,
124 unsigned msg_reg_nr
);
126 /* Helpers for regular instructions:
129 brw_inst *brw_##OP(struct brw_codegen *p, \
130 struct brw_reg dest, \
131 struct brw_reg src0);
134 brw_inst *brw_##OP(struct brw_codegen *p, \
135 struct brw_reg dest, \
136 struct brw_reg src0, \
137 struct brw_reg src1);
140 brw_inst *brw_##OP(struct brw_codegen *p, \
141 struct brw_reg dest, \
142 struct brw_reg src0, \
143 struct brw_reg src1, \
144 struct brw_reg src2);
147 void brw_##OP(struct brw_codegen *p, struct brw_reg dest, struct brw_reg src0);
196 /* Helpers for SEND instruction:
198 void brw_set_sampler_message(struct brw_codegen
*p
,
200 unsigned binding_table_index
,
203 unsigned response_length
,
205 unsigned header_present
,
207 unsigned return_format
);
209 void brw_set_dp_read_message(struct brw_codegen
*p
,
211 unsigned binding_table_index
,
212 unsigned msg_control
,
214 unsigned target_cache
,
217 unsigned response_length
);
219 void brw_set_dp_write_message(struct brw_codegen
*p
,
221 unsigned binding_table_index
,
222 unsigned msg_control
,
226 unsigned last_render_target
,
227 unsigned response_length
,
228 unsigned end_of_thread
,
229 unsigned send_commit_msg
);
231 void brw_urb_WRITE(struct brw_codegen
*p
,
235 enum brw_urb_write_flags flags
,
237 unsigned response_length
,
242 * Send message to shared unit \p sfid with a possibly indirect descriptor \p
243 * desc. If \p desc is not an immediate it will be transparently loaded to an
244 * address register using an OR instruction. The returned instruction can be
245 * passed as argument to the usual brw_set_*_message() functions in order to
246 * specify any additional descriptor bits -- If \p desc is an immediate this
247 * will be the SEND instruction itself, otherwise it will be the OR
251 brw_send_indirect_message(struct brw_codegen
*p
,
254 struct brw_reg payload
,
255 struct brw_reg desc
);
257 void brw_ff_sync(struct brw_codegen
*p
,
262 unsigned response_length
,
265 void brw_svb_write(struct brw_codegen
*p
,
269 unsigned binding_table_index
,
270 bool send_commit_msg
);
272 void brw_fb_WRITE(struct brw_codegen
*p
,
274 struct brw_reg payload
,
275 struct brw_reg implied_header
,
276 unsigned msg_control
,
277 unsigned binding_table_index
,
279 unsigned response_length
,
281 bool last_render_target
,
282 bool header_present
);
284 void brw_SAMPLE(struct brw_codegen
*p
,
288 unsigned binding_table_index
,
291 unsigned response_length
,
293 unsigned header_present
,
295 unsigned return_format
);
297 void brw_adjust_sampler_state_pointer(struct brw_codegen
*p
,
298 struct brw_reg header
,
299 struct brw_reg sampler_index
);
301 void gen4_math(struct brw_codegen
*p
,
306 unsigned precision
);
308 void gen6_math(struct brw_codegen
*p
,
312 struct brw_reg src1
);
314 void brw_oword_block_read(struct brw_codegen
*p
,
318 uint32_t bind_table_index
);
320 void brw_oword_block_read_scratch(struct brw_codegen
*p
,
326 void brw_oword_block_write_scratch(struct brw_codegen
*p
,
331 void gen7_block_read_scratch(struct brw_codegen
*p
,
336 void brw_shader_time_add(struct brw_codegen
*p
,
337 struct brw_reg payload
,
338 uint32_t surf_index
);
341 * Return the generation-specific jump distance scaling factor.
343 * Given the number of instructions to jump, we need to scale by
344 * some number to obtain the actual jump distance to program in an
347 static inline unsigned
348 brw_jump_scale(const struct brw_device_info
*devinfo
)
350 /* Broadwell measures jump targets in bytes. */
351 if (devinfo
->gen
>= 8)
354 /* Ironlake and later measure jump targets in 64-bit data chunks (in order
355 * (to support compaction), so each 128-bit instruction requires 2 chunks.
357 if (devinfo
->gen
>= 5)
360 /* Gen4 simply uses the number of 128-bit instructions. */
364 void brw_barrier(struct brw_codegen
*p
, struct brw_reg src
);
366 /* If/else/endif. Works by manipulating the execution flags on each
369 brw_inst
*brw_IF(struct brw_codegen
*p
, unsigned execute_size
);
370 brw_inst
*gen6_IF(struct brw_codegen
*p
, enum brw_conditional_mod conditional
,
371 struct brw_reg src0
, struct brw_reg src1
);
373 void brw_ELSE(struct brw_codegen
*p
);
374 void brw_ENDIF(struct brw_codegen
*p
);
378 brw_inst
*brw_DO(struct brw_codegen
*p
, unsigned execute_size
);
380 brw_inst
*brw_WHILE(struct brw_codegen
*p
);
382 brw_inst
*brw_BREAK(struct brw_codegen
*p
);
383 brw_inst
*brw_CONT(struct brw_codegen
*p
);
384 brw_inst
*gen6_HALT(struct brw_codegen
*p
);
388 void brw_land_fwd_jump(struct brw_codegen
*p
, int jmp_insn_idx
);
390 brw_inst
*brw_JMPI(struct brw_codegen
*p
, struct brw_reg index
,
391 unsigned predicate_control
);
393 void brw_NOP(struct brw_codegen
*p
);
395 void brw_WAIT(struct brw_codegen
*p
);
397 /* Special case: there is never a destination, execution size will be
400 void brw_CMP(struct brw_codegen
*p
,
402 unsigned conditional
,
404 struct brw_reg src1
);
407 brw_untyped_atomic(struct brw_codegen
*p
,
409 struct brw_reg payload
,
410 struct brw_reg surface
,
413 bool response_expected
);
416 brw_untyped_surface_read(struct brw_codegen
*p
,
418 struct brw_reg payload
,
419 struct brw_reg surface
,
421 unsigned num_channels
);
424 brw_untyped_surface_write(struct brw_codegen
*p
,
425 struct brw_reg payload
,
426 struct brw_reg surface
,
428 unsigned num_channels
);
431 brw_typed_atomic(struct brw_codegen
*p
,
433 struct brw_reg payload
,
434 struct brw_reg surface
,
437 bool response_expected
);
440 brw_typed_surface_read(struct brw_codegen
*p
,
442 struct brw_reg payload
,
443 struct brw_reg surface
,
445 unsigned num_channels
);
448 brw_typed_surface_write(struct brw_codegen
*p
,
449 struct brw_reg payload
,
450 struct brw_reg surface
,
452 unsigned num_channels
);
455 brw_memory_fence(struct brw_codegen
*p
,
459 brw_pixel_interpolator_query(struct brw_codegen
*p
,
466 unsigned response_length
);
469 brw_find_live_channel(struct brw_codegen
*p
,
473 brw_broadcast(struct brw_codegen
*p
,
478 /***********************************************************************
482 void brw_copy_indirect_to_indirect(struct brw_codegen
*p
,
483 struct brw_indirect dst_ptr
,
484 struct brw_indirect src_ptr
,
487 void brw_copy_from_indirect(struct brw_codegen
*p
,
489 struct brw_indirect ptr
,
492 void brw_copy4(struct brw_codegen
*p
,
497 void brw_copy8(struct brw_codegen
*p
,
502 void brw_math_invert( struct brw_codegen
*p
,
506 void brw_set_src1(struct brw_codegen
*p
, brw_inst
*insn
, struct brw_reg reg
);
508 void brw_set_uip_jip(struct brw_codegen
*p
);
510 enum brw_conditional_mod
brw_negate_cmod(uint32_t cmod
);
511 enum brw_conditional_mod
brw_swap_cmod(uint32_t cmod
);
513 /* brw_eu_compact.c */
514 void brw_init_compaction_tables(const struct brw_device_info
*devinfo
);
515 void brw_compact_instructions(struct brw_codegen
*p
, int start_offset
,
516 int num_annotations
, struct annotation
*annotation
);
517 void brw_uncompact_instruction(const struct brw_device_info
*devinfo
,
518 brw_inst
*dst
, brw_compact_inst
*src
);
519 bool brw_try_compact_instruction(const struct brw_device_info
*devinfo
,
520 brw_compact_inst
*dst
, brw_inst
*src
);
522 void brw_debug_compact_uncompact(const struct brw_device_info
*devinfo
,
523 brw_inst
*orig
, brw_inst
*uncompacted
);
526 next_offset(const struct brw_device_info
*devinfo
, void *store
, int offset
)
528 brw_inst
*insn
= (brw_inst
*)((char *)store
+ offset
);
530 if (brw_inst_cmpt_control(devinfo
, insn
))