src/mesa/drivers/dri/i965/brw_eu.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keithw@vmware.com>
  30   */
  31
  32
  33 #ifndef BRW_EU_H
  34 #define BRW_EU_H
  35
  36 #include <stdbool.h>
  37 #include "brw_inst.h"
  38 #include "brw_structs.h"
  39 #include "brw_defines.h"
  40 #include "brw_reg.h"
  41 #include "intel_asm_annotation.h"
  42 #include "program/prog_instruction.h"
  43
  44 #ifdef __cplusplus
  45 extern "C" {
  46 #endif
  47
  48 #define BRW_EU_MAX_INSN_STACK 5
  49
  50 /* A helper for accessing the last instruction emitted.  This makes it easy
  51  * to set various bits on an instruction without having to create temporary
  52  * variable and assign the emitted instruction to those.
  53  */
  54 #define brw_last_inst (&p->store[p->nr_insn - 1])
  55
  56 struct brw_codegen {
  57    brw_inst *store;
  58    int store_size;
  59    unsigned nr_insn;
  60    unsigned int next_insn_offset;
  61
  62    void *mem_ctx;
  63
  64    /* Allow clients to push/pop instruction state:
  65     */
  66    brw_inst stack[BRW_EU_MAX_INSN_STACK];
  67    bool compressed_stack[BRW_EU_MAX_INSN_STACK];
  68    brw_inst *current;
  69
  70    bool single_program_flow;
  71    bool compressed;
  72    const struct brw_device_info *devinfo;
  73
  74    /* Control flow stacks:
  75     * - if_stack contains IF and ELSE instructions which must be patched
  76     *   (and popped) once the matching ENDIF instruction is encountered.
  77     *
  78     *   Just store the instruction pointer(an index).
  79     */
  80    int *if_stack;
  81    int if_stack_depth;
  82    int if_stack_array_size;
  83
  84    /**
  85     * loop_stack contains the instruction pointers of the starts of loops which
  86     * must be patched (and popped) once the matching WHILE instruction is
  87     * encountered.
  88     */
  89    int *loop_stack;
  90    /**
  91     * pre-gen6, the BREAK and CONT instructions had to tell how many IF/ENDIF
  92     * blocks they were popping out of, to fix up the mask stack.  This tracks
  93     * the IF/ENDIF nesting in each current nested loop level.
  94     */
  95    int *if_depth_in_loop;
  96    int loop_stack_depth;
  97    int loop_stack_array_size;
  98 };
  99
 100 void brw_pop_insn_state( struct brw_codegen *p );
 101 void brw_push_insn_state( struct brw_codegen *p );
 102 void brw_set_default_exec_size(struct brw_codegen *p, unsigned value);
 103 void brw_set_default_mask_control( struct brw_codegen *p, unsigned value );
 104 void brw_set_default_saturate( struct brw_codegen *p, bool enable );
 105 void brw_set_default_access_mode( struct brw_codegen *p, unsigned access_mode );
 106 void brw_set_default_compression_control(struct brw_codegen *p, enum brw_compression c);
 107 void brw_set_default_predicate_control( struct brw_codegen *p, unsigned pc );
 108 void brw_set_default_predicate_inverse(struct brw_codegen *p, bool predicate_inverse);
 109 void brw_set_default_flag_reg(struct brw_codegen *p, int reg, int subreg);
 110 void brw_set_default_acc_write_control(struct brw_codegen *p, unsigned value);
 111
 112 void brw_init_codegen(const struct brw_device_info *, struct brw_codegen *p,
 113                       void *mem_ctx);
 114 void brw_disassemble(const struct brw_device_info *devinfo, void *assembly,
 115                      int start, int end, FILE *out);
 116 const unsigned *brw_get_program( struct brw_codegen *p, unsigned *sz );
 117
 118 brw_inst *brw_next_insn(struct brw_codegen *p, unsigned opcode);
 119 void brw_set_dest(struct brw_codegen *p, brw_inst *insn, struct brw_reg dest);
 120 void brw_set_src0(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg);
 121
 122 void gen6_resolve_implied_move(struct brw_codegen *p,
 123                                struct brw_reg *src,
 124                                unsigned msg_reg_nr);
 125
 126 /* Helpers for regular instructions:
 127  */
 128 #define ALU1(OP)                                \
 129 brw_inst *brw_##OP(struct brw_codegen *p,       \
 130               struct brw_reg dest,              \
 131               struct brw_reg src0);
 132
 133 #define ALU2(OP)                                \
 134 brw_inst *brw_##OP(struct brw_codegen *p,       \
 135               struct brw_reg dest,              \
 136               struct brw_reg src0,              \
 137               struct brw_reg src1);
 138
 139 #define ALU3(OP)                                \
 140 brw_inst *brw_##OP(struct brw_codegen *p,       \
 141               struct brw_reg dest,              \
 142               struct brw_reg src0,              \
 143               struct brw_reg src1,              \
 144               struct brw_reg src2);
 145
 146 #define ROUND(OP) \
 147 void brw_##OP(struct brw_codegen *p, struct brw_reg dest, struct brw_reg src0);
 148
 149 ALU1(MOV)
 150 ALU2(SEL)
 151 ALU1(NOT)
 152 ALU2(AND)
 153 ALU2(OR)
 154 ALU2(XOR)
 155 ALU2(SHR)
 156 ALU2(SHL)
 157 ALU2(ASR)
 158 ALU1(F32TO16)
 159 ALU1(F16TO32)
 160 ALU2(ADD)
 161 ALU2(AVG)
 162 ALU2(MUL)
 163 ALU1(FRC)
 164 ALU1(RNDD)
 165 ALU2(MAC)
 166 ALU2(MACH)
 167 ALU1(LZD)
 168 ALU2(DP4)
 169 ALU2(DPH)
 170 ALU2(DP3)
 171 ALU2(DP2)
 172 ALU2(LINE)
 173 ALU2(PLN)
 174 ALU3(MAD)
 175 ALU3(LRP)
 176 ALU1(BFREV)
 177 ALU3(BFE)
 178 ALU2(BFI1)
 179 ALU3(BFI2)
 180 ALU1(FBH)
 181 ALU1(FBL)
 182 ALU1(CBIT)
 183 ALU2(ADDC)
 184 ALU2(SUBB)
 185 ALU2(MAC)
 186
 187 ROUND(RNDZ)
 188 ROUND(RNDE)
 189
 190 #undef ALU1
 191 #undef ALU2
 192 #undef ALU3
 193 #undef ROUND
 194
 195
 196 /* Helpers for SEND instruction:
 197  */
 198 void brw_set_sampler_message(struct brw_codegen *p,
 199                              brw_inst *insn,
 200                              unsigned binding_table_index,
 201                              unsigned sampler,
 202                              unsigned msg_type,
 203                              unsigned response_length,
 204                              unsigned msg_length,
 205                              unsigned header_present,
 206                              unsigned simd_mode,
 207                              unsigned return_format);
 208
 209 void brw_set_dp_read_message(struct brw_codegen *p,
 210                              brw_inst *insn,
 211                              unsigned binding_table_index,
 212                              unsigned msg_control,
 213                              unsigned msg_type,
 214                              unsigned target_cache,
 215                              unsigned msg_length,
 216                              bool header_present,
 217                              unsigned response_length);
 218
 219 void brw_set_dp_write_message(struct brw_codegen *p,
 220                               brw_inst *insn,
 221                               unsigned binding_table_index,
 222                               unsigned msg_control,
 223                               unsigned msg_type,
 224                               unsigned msg_length,
 225                               bool header_present,
 226                               unsigned last_render_target,
 227                               unsigned response_length,
 228                               unsigned end_of_thread,
 229                               unsigned send_commit_msg);
 230
 231 void brw_urb_WRITE(struct brw_codegen *p,
 232                    struct brw_reg dest,
 233                    unsigned msg_reg_nr,
 234                    struct brw_reg src0,
 235                    enum brw_urb_write_flags flags,
 236                    unsigned msg_length,
 237                    unsigned response_length,
 238                    unsigned offset,
 239                    unsigned swizzle);
 240
 241 /**
 242  * Send message to shared unit \p sfid with a possibly indirect descriptor \p
 243  * desc.  If \p desc is not an immediate it will be transparently loaded to an
 244  * address register using an OR instruction.  The returned instruction can be
 245  * passed as argument to the usual brw_set_*_message() functions in order to
 246  * specify any additional descriptor bits -- If \p desc is an immediate this
 247  * will be the SEND instruction itself, otherwise it will be the OR
 248  * instruction.
 249  */
 250 struct brw_inst *
 251 brw_send_indirect_message(struct brw_codegen *p,
 252                           unsigned sfid,
 253                           struct brw_reg dst,
 254                           struct brw_reg payload,
 255                           struct brw_reg desc);
 256
 257 void brw_ff_sync(struct brw_codegen *p,
 258                    struct brw_reg dest,
 259                    unsigned msg_reg_nr,
 260                    struct brw_reg src0,
 261                    bool allocate,
 262                    unsigned response_length,
 263                    bool eot);
 264
 265 void brw_svb_write(struct brw_codegen *p,
 266                    struct brw_reg dest,
 267                    unsigned msg_reg_nr,
 268                    struct brw_reg src0,
 269                    unsigned binding_table_index,
 270                    bool   send_commit_msg);
 271
 272 void brw_fb_WRITE(struct brw_codegen *p,
 273                   int dispatch_width,
 274                    struct brw_reg payload,
 275                    struct brw_reg implied_header,
 276                    unsigned msg_control,
 277                    unsigned binding_table_index,
 278                    unsigned msg_length,
 279                    unsigned response_length,
 280                    bool eot,
 281                    bool last_render_target,
 282                    bool header_present);
 283
 284 void brw_SAMPLE(struct brw_codegen *p,
 285                 struct brw_reg dest,
 286                 unsigned msg_reg_nr,
 287                 struct brw_reg src0,
 288                 unsigned binding_table_index,
 289                 unsigned sampler,
 290                 unsigned msg_type,
 291                 unsigned response_length,
 292                 unsigned msg_length,
 293                 unsigned header_present,
 294                 unsigned simd_mode,
 295                 unsigned return_format);
 296
 297 void brw_adjust_sampler_state_pointer(struct brw_codegen *p,
 298                                       struct brw_reg header,
 299                                       struct brw_reg sampler_index);
 300
 301 void gen4_math(struct brw_codegen *p,
 302                struct brw_reg dest,
 303                unsigned function,
 304                unsigned msg_reg_nr,
 305                struct brw_reg src,
 306                unsigned precision );
 307
 308 void gen6_math(struct brw_codegen *p,
 309                struct brw_reg dest,
 310                unsigned function,
 311                struct brw_reg src0,
 312                struct brw_reg src1);
 313
 314 void brw_oword_block_read(struct brw_codegen *p,
 315                           struct brw_reg dest,
 316                           struct brw_reg mrf,
 317                           uint32_t offset,
 318                           uint32_t bind_table_index);
 319
 320 void brw_oword_block_read_scratch(struct brw_codegen *p,
 321                                   struct brw_reg dest,
 322                                   struct brw_reg mrf,
 323                                   int num_regs,
 324                                   unsigned offset);
 325
 326 void brw_oword_block_write_scratch(struct brw_codegen *p,
 327                                    struct brw_reg mrf,
 328                                    int num_regs,
 329                                    unsigned offset);
 330
 331 void gen7_block_read_scratch(struct brw_codegen *p,
 332                              struct brw_reg dest,
 333                              int num_regs,
 334                              unsigned offset);
 335
 336 void brw_shader_time_add(struct brw_codegen *p,
 337                          struct brw_reg payload,
 338                          uint32_t surf_index);
 339
 340 /**
 341  * Return the generation-specific jump distance scaling factor.
 342  *
 343  * Given the number of instructions to jump, we need to scale by
 344  * some number to obtain the actual jump distance to program in an
 345  * instruction.
 346  */
 347 static inline unsigned
 348 brw_jump_scale(const struct brw_device_info *devinfo)
 349 {
 350    /* Broadwell measures jump targets in bytes. */
 351    if (devinfo->gen >= 8)
 352       return 16;
 353
 354    /* Ironlake and later measure jump targets in 64-bit data chunks (in order
 355     * (to support compaction), so each 128-bit instruction requires 2 chunks.
 356     */
 357    if (devinfo->gen >= 5)
 358       return 2;
 359
 360    /* Gen4 simply uses the number of 128-bit instructions. */
 361    return 1;
 362 }
 363
 364 /* If/else/endif.  Works by manipulating the execution flags on each
 365  * channel.
 366  */
 367 brw_inst *brw_IF(struct brw_codegen *p, unsigned execute_size);
 368 brw_inst *gen6_IF(struct brw_codegen *p, enum brw_conditional_mod conditional,
 369                   struct brw_reg src0, struct brw_reg src1);
 370
 371 void brw_ELSE(struct brw_codegen *p);
 372 void brw_ENDIF(struct brw_codegen *p);
 373
 374 /* DO/WHILE loops:
 375  */
 376 brw_inst *brw_DO(struct brw_codegen *p, unsigned execute_size);
 377
 378 brw_inst *brw_WHILE(struct brw_codegen *p);
 379
 380 brw_inst *brw_BREAK(struct brw_codegen *p);
 381 brw_inst *brw_CONT(struct brw_codegen *p);
 382 brw_inst *gen6_HALT(struct brw_codegen *p);
 383
 384 /* Forward jumps:
 385  */
 386 void brw_land_fwd_jump(struct brw_codegen *p, int jmp_insn_idx);
 387
 388 brw_inst *brw_JMPI(struct brw_codegen *p, struct brw_reg index,
 389                    unsigned predicate_control);
 390
 391 void brw_NOP(struct brw_codegen *p);
 392
 393 /* Special case: there is never a destination, execution size will be
 394  * taken from src0:
 395  */
 396 void brw_CMP(struct brw_codegen *p,
 397              struct brw_reg dest,
 398              unsigned conditional,
 399              struct brw_reg src0,
 400              struct brw_reg src1);
 401
 402 void
 403 brw_untyped_atomic(struct brw_codegen *p,
 404                    struct brw_reg dest,
 405                    struct brw_reg payload,
 406                    unsigned atomic_op,
 407                    unsigned bind_table_index,
 408                    unsigned msg_length,
 409                    bool response_expected);
 410
 411 void
 412 brw_untyped_surface_read(struct brw_codegen *p,
 413                          struct brw_reg dest,
 414                          struct brw_reg mrf,
 415                          unsigned bind_table_index,
 416                          unsigned msg_length,
 417                          unsigned num_channels);
 418
 419 void
 420 brw_pixel_interpolator_query(struct brw_codegen *p,
 421                              struct brw_reg dest,
 422                              struct brw_reg mrf,
 423                              bool noperspective,
 424                              unsigned mode,
 425                              unsigned data,
 426                              unsigned msg_length,
 427                              unsigned response_length);
 428
 429 /***********************************************************************
 430  * brw_eu_util.c:
 431  */
 432
 433 void brw_copy_indirect_to_indirect(struct brw_codegen *p,
 434                                    struct brw_indirect dst_ptr,
 435                                    struct brw_indirect src_ptr,
 436                                    unsigned count);
 437
 438 void brw_copy_from_indirect(struct brw_codegen *p,
 439                             struct brw_reg dst,
 440                             struct brw_indirect ptr,
 441                             unsigned count);
 442
 443 void brw_copy4(struct brw_codegen *p,
 444                struct brw_reg dst,
 445                struct brw_reg src,
 446                unsigned count);
 447
 448 void brw_copy8(struct brw_codegen *p,
 449                struct brw_reg dst,
 450                struct brw_reg src,
 451                unsigned count);
 452
 453 void brw_math_invert( struct brw_codegen *p,
 454                       struct brw_reg dst,
 455                       struct brw_reg src);
 456
 457 void brw_set_src1(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg);
 458
 459 void brw_set_uip_jip(struct brw_codegen *p);
 460
 461 enum brw_conditional_mod brw_negate_cmod(uint32_t cmod);
 462 enum brw_conditional_mod brw_swap_cmod(uint32_t cmod);
 463
 464 /* brw_eu_compact.c */
 465 void brw_init_compaction_tables(const struct brw_device_info *devinfo);
 466 void brw_compact_instructions(struct brw_codegen *p, int start_offset,
 467                               int num_annotations, struct annotation *annotation);
 468 void brw_uncompact_instruction(const struct brw_device_info *devinfo,
 469                                brw_inst *dst, brw_compact_inst *src);
 470 bool brw_try_compact_instruction(const struct brw_device_info *devinfo,
 471                                  brw_compact_inst *dst, brw_inst *src);
 472
 473 void brw_debug_compact_uncompact(const struct brw_device_info *devinfo,
 474                                  brw_inst *orig, brw_inst *uncompacted);
 475
 476 static inline int
 477 next_offset(const struct brw_device_info *devinfo, void *store, int offset)
 478 {
 479    brw_inst *insn = (brw_inst *)((char *)store + offset);
 480
 481    if (brw_inst_cmpt_control(devinfo, insn))
 482       return offset + 8;
 483    else
 484       return offset + 16;
 485 }
 486
 487 #ifdef __cplusplus
 488 }
 489 #endif
 490
 491 #endif