src/mesa/drivers/dri/i965/brw_eu.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keithw@vmware.com>
  30   */
  31
  32
  33 #ifndef BRW_EU_H
  34 #define BRW_EU_H
  35
  36 #include <stdbool.h>
  37 #include "brw_inst.h"
  38 #include "brw_defines.h"
  39 #include "brw_reg.h"
  40 #include "intel_asm_annotation.h"
  41
  42 #ifdef __cplusplus
  43 extern "C" {
  44 #endif
  45
  46 #define BRW_EU_MAX_INSN_STACK 5
  47
  48 /* A helper for accessing the last instruction emitted.  This makes it easy
  49  * to set various bits on an instruction without having to create temporary
  50  * variable and assign the emitted instruction to those.
  51  */
  52 #define brw_last_inst (&p->store[p->nr_insn - 1])
  53
  54 struct brw_codegen {
  55    brw_inst *store;
  56    int store_size;
  57    unsigned nr_insn;
  58    unsigned int next_insn_offset;
  59
  60    void *mem_ctx;
  61
  62    /* Allow clients to push/pop instruction state:
  63     */
  64    brw_inst stack[BRW_EU_MAX_INSN_STACK];
  65    bool compressed_stack[BRW_EU_MAX_INSN_STACK];
  66    brw_inst *current;
  67
  68    bool single_program_flow;
  69    bool compressed;
  70    const struct brw_device_info *devinfo;
  71
  72    /* Control flow stacks:
  73     * - if_stack contains IF and ELSE instructions which must be patched
  74     *   (and popped) once the matching ENDIF instruction is encountered.
  75     *
  76     *   Just store the instruction pointer(an index).
  77     */
  78    int *if_stack;
  79    int if_stack_depth;
  80    int if_stack_array_size;
  81
  82    /**
  83     * loop_stack contains the instruction pointers of the starts of loops which
  84     * must be patched (and popped) once the matching WHILE instruction is
  85     * encountered.
  86     */
  87    int *loop_stack;
  88    /**
  89     * pre-gen6, the BREAK and CONT instructions had to tell how many IF/ENDIF
  90     * blocks they were popping out of, to fix up the mask stack.  This tracks
  91     * the IF/ENDIF nesting in each current nested loop level.
  92     */
  93    int *if_depth_in_loop;
  94    int loop_stack_depth;
  95    int loop_stack_array_size;
  96 };
  97
  98 void brw_pop_insn_state( struct brw_codegen *p );
  99 void brw_push_insn_state( struct brw_codegen *p );
 100 void brw_set_default_exec_size(struct brw_codegen *p, unsigned value);
 101 void brw_set_default_mask_control( struct brw_codegen *p, unsigned value );
 102 void brw_set_default_saturate( struct brw_codegen *p, bool enable );
 103 void brw_set_default_access_mode( struct brw_codegen *p, unsigned access_mode );
 104 void brw_set_default_compression_control(struct brw_codegen *p, enum brw_compression c);
 105 void brw_set_default_predicate_control( struct brw_codegen *p, unsigned pc );
 106 void brw_set_default_predicate_inverse(struct brw_codegen *p, bool predicate_inverse);
 107 void brw_set_default_flag_reg(struct brw_codegen *p, int reg, int subreg);
 108 void brw_set_default_acc_write_control(struct brw_codegen *p, unsigned value);
 109
 110 void brw_init_codegen(const struct brw_device_info *, struct brw_codegen *p,
 111                       void *mem_ctx);
 112 void brw_disassemble(const struct brw_device_info *devinfo, void *assembly,
 113                      int start, int end, FILE *out);
 114 const unsigned *brw_get_program( struct brw_codegen *p, unsigned *sz );
 115
 116 brw_inst *brw_next_insn(struct brw_codegen *p, unsigned opcode);
 117 void brw_set_dest(struct brw_codegen *p, brw_inst *insn, struct brw_reg dest);
 118 void brw_set_src0(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg);
 119
 120 void gen6_resolve_implied_move(struct brw_codegen *p,
 121                                struct brw_reg *src,
 122                                unsigned msg_reg_nr);
 123
 124 /* Helpers for regular instructions:
 125  */
 126 #define ALU1(OP)                                \
 127 brw_inst *brw_##OP(struct brw_codegen *p,       \
 128               struct brw_reg dest,              \
 129               struct brw_reg src0);
 130
 131 #define ALU2(OP)                                \
 132 brw_inst *brw_##OP(struct brw_codegen *p,       \
 133               struct brw_reg dest,              \
 134               struct brw_reg src0,              \
 135               struct brw_reg src1);
 136
 137 #define ALU3(OP)                                \
 138 brw_inst *brw_##OP(struct brw_codegen *p,       \
 139               struct brw_reg dest,              \
 140               struct brw_reg src0,              \
 141               struct brw_reg src1,              \
 142               struct brw_reg src2);
 143
 144 #define ROUND(OP) \
 145 void brw_##OP(struct brw_codegen *p, struct brw_reg dest, struct brw_reg src0);
 146
 147 ALU1(MOV)
 148 ALU2(SEL)
 149 ALU1(NOT)
 150 ALU2(AND)
 151 ALU2(OR)
 152 ALU2(XOR)
 153 ALU2(SHR)
 154 ALU2(SHL)
 155 ALU2(ASR)
 156 ALU1(F32TO16)
 157 ALU1(F16TO32)
 158 ALU2(ADD)
 159 ALU2(AVG)
 160 ALU2(MUL)
 161 ALU1(FRC)
 162 ALU1(RNDD)
 163 ALU2(MAC)
 164 ALU2(MACH)
 165 ALU1(LZD)
 166 ALU2(DP4)
 167 ALU2(DPH)
 168 ALU2(DP3)
 169 ALU2(DP2)
 170 ALU2(LINE)
 171 ALU2(PLN)
 172 ALU3(MAD)
 173 ALU3(LRP)
 174 ALU1(BFREV)
 175 ALU3(BFE)
 176 ALU2(BFI1)
 177 ALU3(BFI2)
 178 ALU1(FBH)
 179 ALU1(FBL)
 180 ALU1(CBIT)
 181 ALU2(ADDC)
 182 ALU2(SUBB)
 183 ALU2(MAC)
 184
 185 ROUND(RNDZ)
 186 ROUND(RNDE)
 187
 188 #undef ALU1
 189 #undef ALU2
 190 #undef ALU3
 191 #undef ROUND
 192
 193
 194 /* Helpers for SEND instruction:
 195  */
 196 void brw_set_sampler_message(struct brw_codegen *p,
 197                              brw_inst *insn,
 198                              unsigned binding_table_index,
 199                              unsigned sampler,
 200                              unsigned msg_type,
 201                              unsigned response_length,
 202                              unsigned msg_length,
 203                              unsigned header_present,
 204                              unsigned simd_mode,
 205                              unsigned return_format);
 206
 207 void brw_set_message_descriptor(struct brw_codegen *p,
 208                                 brw_inst *inst,
 209                                 enum brw_message_target sfid,
 210                                 unsigned msg_length,
 211                                 unsigned response_length,
 212                                 bool header_present,
 213                                 bool end_of_thread);
 214
 215 void brw_set_dp_read_message(struct brw_codegen *p,
 216                              brw_inst *insn,
 217                              unsigned binding_table_index,
 218                              unsigned msg_control,
 219                              unsigned msg_type,
 220                              unsigned target_cache,
 221                              unsigned msg_length,
 222                              bool header_present,
 223                              unsigned response_length);
 224
 225 void brw_set_dp_write_message(struct brw_codegen *p,
 226                               brw_inst *insn,
 227                               unsigned binding_table_index,
 228                               unsigned msg_control,
 229                               unsigned msg_type,
 230                               unsigned msg_length,
 231                               bool header_present,
 232                               unsigned last_render_target,
 233                               unsigned response_length,
 234                               unsigned end_of_thread,
 235                               unsigned send_commit_msg);
 236
 237 void brw_urb_WRITE(struct brw_codegen *p,
 238                    struct brw_reg dest,
 239                    unsigned msg_reg_nr,
 240                    struct brw_reg src0,
 241                    enum brw_urb_write_flags flags,
 242                    unsigned msg_length,
 243                    unsigned response_length,
 244                    unsigned offset,
 245                    unsigned swizzle);
 246
 247 /**
 248  * Send message to shared unit \p sfid with a possibly indirect descriptor \p
 249  * desc.  If \p desc is not an immediate it will be transparently loaded to an
 250  * address register using an OR instruction.  The returned instruction can be
 251  * passed as argument to the usual brw_set_*_message() functions in order to
 252  * specify any additional descriptor bits -- If \p desc is an immediate this
 253  * will be the SEND instruction itself, otherwise it will be the OR
 254  * instruction.
 255  */
 256 struct brw_inst *
 257 brw_send_indirect_message(struct brw_codegen *p,
 258                           unsigned sfid,
 259                           struct brw_reg dst,
 260                           struct brw_reg payload,
 261                           struct brw_reg desc);
 262
 263 void brw_ff_sync(struct brw_codegen *p,
 264                    struct brw_reg dest,
 265                    unsigned msg_reg_nr,
 266                    struct brw_reg src0,
 267                    bool allocate,
 268                    unsigned response_length,
 269                    bool eot);
 270
 271 void brw_svb_write(struct brw_codegen *p,
 272                    struct brw_reg dest,
 273                    unsigned msg_reg_nr,
 274                    struct brw_reg src0,
 275                    unsigned binding_table_index,
 276                    bool   send_commit_msg);
 277
 278 void brw_fb_WRITE(struct brw_codegen *p,
 279                   int dispatch_width,
 280                    struct brw_reg payload,
 281                    struct brw_reg implied_header,
 282                    unsigned msg_control,
 283                    unsigned binding_table_index,
 284                    unsigned msg_length,
 285                    unsigned response_length,
 286                    bool eot,
 287                    bool last_render_target,
 288                    bool header_present);
 289
 290 void brw_SAMPLE(struct brw_codegen *p,
 291                 struct brw_reg dest,
 292                 unsigned msg_reg_nr,
 293                 struct brw_reg src0,
 294                 unsigned binding_table_index,
 295                 unsigned sampler,
 296                 unsigned msg_type,
 297                 unsigned response_length,
 298                 unsigned msg_length,
 299                 unsigned header_present,
 300                 unsigned simd_mode,
 301                 unsigned return_format);
 302
 303 void brw_adjust_sampler_state_pointer(struct brw_codegen *p,
 304                                       struct brw_reg header,
 305                                       struct brw_reg sampler_index);
 306
 307 void gen4_math(struct brw_codegen *p,
 308                struct brw_reg dest,
 309                unsigned function,
 310                unsigned msg_reg_nr,
 311                struct brw_reg src,
 312                unsigned precision );
 313
 314 void gen6_math(struct brw_codegen *p,
 315                struct brw_reg dest,
 316                unsigned function,
 317                struct brw_reg src0,
 318                struct brw_reg src1);
 319
 320 void brw_oword_block_read(struct brw_codegen *p,
 321                           struct brw_reg dest,
 322                           struct brw_reg mrf,
 323                           uint32_t offset,
 324                           uint32_t bind_table_index);
 325
 326 unsigned brw_scratch_surface_idx(const struct brw_codegen *p);
 327
 328 void brw_oword_block_read_scratch(struct brw_codegen *p,
 329                                   struct brw_reg dest,
 330                                   struct brw_reg mrf,
 331                                   int num_regs,
 332                                   unsigned offset);
 333
 334 void brw_oword_block_write_scratch(struct brw_codegen *p,
 335                                    struct brw_reg mrf,
 336                                    int num_regs,
 337                                    unsigned offset);
 338
 339 void gen7_block_read_scratch(struct brw_codegen *p,
 340                              struct brw_reg dest,
 341                              int num_regs,
 342                              unsigned offset);
 343
 344 void brw_shader_time_add(struct brw_codegen *p,
 345                          struct brw_reg payload,
 346                          uint32_t surf_index);
 347
 348 /**
 349  * Return the generation-specific jump distance scaling factor.
 350  *
 351  * Given the number of instructions to jump, we need to scale by
 352  * some number to obtain the actual jump distance to program in an
 353  * instruction.
 354  */
 355 static inline unsigned
 356 brw_jump_scale(const struct brw_device_info *devinfo)
 357 {
 358    /* Broadwell measures jump targets in bytes. */
 359    if (devinfo->gen >= 8)
 360       return 16;
 361
 362    /* Ironlake and later measure jump targets in 64-bit data chunks (in order
 363     * (to support compaction), so each 128-bit instruction requires 2 chunks.
 364     */
 365    if (devinfo->gen >= 5)
 366       return 2;
 367
 368    /* Gen4 simply uses the number of 128-bit instructions. */
 369    return 1;
 370 }
 371
 372 void brw_barrier(struct brw_codegen *p, struct brw_reg src);
 373
 374 /* If/else/endif.  Works by manipulating the execution flags on each
 375  * channel.
 376  */
 377 brw_inst *brw_IF(struct brw_codegen *p, unsigned execute_size);
 378 brw_inst *gen6_IF(struct brw_codegen *p, enum brw_conditional_mod conditional,
 379                   struct brw_reg src0, struct brw_reg src1);
 380
 381 void brw_ELSE(struct brw_codegen *p);
 382 void brw_ENDIF(struct brw_codegen *p);
 383
 384 /* DO/WHILE loops:
 385  */
 386 brw_inst *brw_DO(struct brw_codegen *p, unsigned execute_size);
 387
 388 brw_inst *brw_WHILE(struct brw_codegen *p);
 389
 390 brw_inst *brw_BREAK(struct brw_codegen *p);
 391 brw_inst *brw_CONT(struct brw_codegen *p);
 392 brw_inst *gen6_HALT(struct brw_codegen *p);
 393
 394 /* Forward jumps:
 395  */
 396 void brw_land_fwd_jump(struct brw_codegen *p, int jmp_insn_idx);
 397
 398 brw_inst *brw_JMPI(struct brw_codegen *p, struct brw_reg index,
 399                    unsigned predicate_control);
 400
 401 void brw_NOP(struct brw_codegen *p);
 402
 403 void brw_WAIT(struct brw_codegen *p);
 404
 405 /* Special case: there is never a destination, execution size will be
 406  * taken from src0:
 407  */
 408 void brw_CMP(struct brw_codegen *p,
 409              struct brw_reg dest,
 410              unsigned conditional,
 411              struct brw_reg src0,
 412              struct brw_reg src1);
 413
 414 void
 415 brw_untyped_atomic(struct brw_codegen *p,
 416                    struct brw_reg dst,
 417                    struct brw_reg payload,
 418                    struct brw_reg surface,
 419                    unsigned atomic_op,
 420                    unsigned msg_length,
 421                    bool response_expected);
 422
 423 void
 424 brw_untyped_surface_read(struct brw_codegen *p,
 425                          struct brw_reg dst,
 426                          struct brw_reg payload,
 427                          struct brw_reg surface,
 428                          unsigned msg_length,
 429                          unsigned num_channels);
 430
 431 void
 432 brw_untyped_surface_write(struct brw_codegen *p,
 433                           struct brw_reg payload,
 434                           struct brw_reg surface,
 435                           unsigned msg_length,
 436                           unsigned num_channels);
 437
 438 void
 439 brw_typed_atomic(struct brw_codegen *p,
 440                  struct brw_reg dst,
 441                  struct brw_reg payload,
 442                  struct brw_reg surface,
 443                  unsigned atomic_op,
 444                  unsigned msg_length,
 445                  bool response_expected);
 446
 447 void
 448 brw_typed_surface_read(struct brw_codegen *p,
 449                        struct brw_reg dst,
 450                        struct brw_reg payload,
 451                        struct brw_reg surface,
 452                        unsigned msg_length,
 453                        unsigned num_channels);
 454
 455 void
 456 brw_typed_surface_write(struct brw_codegen *p,
 457                         struct brw_reg payload,
 458                         struct brw_reg surface,
 459                         unsigned msg_length,
 460                         unsigned num_channels);
 461
 462 void
 463 brw_memory_fence(struct brw_codegen *p,
 464                  struct brw_reg dst);
 465
 466 void
 467 brw_pixel_interpolator_query(struct brw_codegen *p,
 468                              struct brw_reg dest,
 469                              struct brw_reg mrf,
 470                              bool noperspective,
 471                              unsigned mode,
 472                              struct brw_reg data,
 473                              unsigned msg_length,
 474                              unsigned response_length);
 475
 476 void
 477 brw_find_live_channel(struct brw_codegen *p,
 478                       struct brw_reg dst);
 479
 480 void
 481 brw_broadcast(struct brw_codegen *p,
 482               struct brw_reg dst,
 483               struct brw_reg src,
 484               struct brw_reg idx);
 485
 486 /***********************************************************************
 487  * brw_eu_util.c:
 488  */
 489
 490 void brw_copy_indirect_to_indirect(struct brw_codegen *p,
 491                                    struct brw_indirect dst_ptr,
 492                                    struct brw_indirect src_ptr,
 493                                    unsigned count);
 494
 495 void brw_copy_from_indirect(struct brw_codegen *p,
 496                             struct brw_reg dst,
 497                             struct brw_indirect ptr,
 498                             unsigned count);
 499
 500 void brw_copy4(struct brw_codegen *p,
 501                struct brw_reg dst,
 502                struct brw_reg src,
 503                unsigned count);
 504
 505 void brw_copy8(struct brw_codegen *p,
 506                struct brw_reg dst,
 507                struct brw_reg src,
 508                unsigned count);
 509
 510 void brw_math_invert( struct brw_codegen *p,
 511                       struct brw_reg dst,
 512                       struct brw_reg src);
 513
 514 void brw_set_src1(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg);
 515
 516 void brw_set_uip_jip(struct brw_codegen *p);
 517
 518 enum brw_conditional_mod brw_negate_cmod(uint32_t cmod);
 519 enum brw_conditional_mod brw_swap_cmod(uint32_t cmod);
 520
 521 /* brw_eu_compact.c */
 522 void brw_init_compaction_tables(const struct brw_device_info *devinfo);
 523 void brw_compact_instructions(struct brw_codegen *p, int start_offset,
 524                               int num_annotations, struct annotation *annotation);
 525 void brw_uncompact_instruction(const struct brw_device_info *devinfo,
 526                                brw_inst *dst, brw_compact_inst *src);
 527 bool brw_try_compact_instruction(const struct brw_device_info *devinfo,
 528                                  brw_compact_inst *dst, brw_inst *src);
 529
 530 void brw_debug_compact_uncompact(const struct brw_device_info *devinfo,
 531                                  brw_inst *orig, brw_inst *uncompacted);
 532
 533 /* brw_eu_validate.c */
 534 bool brw_validate_instructions(const struct brw_codegen *p, int start_offset,
 535                                struct annotation_info *annotation);
 536
 537 static inline int
 538 next_offset(const struct brw_device_info *devinfo, void *store, int offset)
 539 {
 540    brw_inst *insn = (brw_inst *)((char *)store + offset);
 541
 542    if (brw_inst_cmpt_control(devinfo, insn))
 543       return offset + 8;
 544    else
 545       return offset + 16;
 546 }
 547
 548 struct opcode_desc {
 549    /* The union is an implementation detail used by brw_opcode_desc() to handle
 550     * opcodes that have been reused for different instructions across hardware
 551     * generations.
 552     *
 553     * The gens field acts as a tag. If it is non-zero, name points to a string
 554     * containing the instruction mnemonic. If it is zero, the table field is
 555     * valid and either points to a secondary opcode_desc table with 'size'
 556     * elements or is NULL and no such instruction exists for the opcode.
 557     */
 558    union {
 559       struct {
 560          char    *name;
 561          int      nsrc;
 562       };
 563       struct {
 564          const struct opcode_desc *table;
 565          unsigned size;
 566       };
 567    };
 568    int      ndst;
 569    int      gens;
 570 };
 571
 572 const struct opcode_desc *
 573 brw_opcode_desc(const struct brw_device_info *devinfo, enum opcode opcode);
 574
 575 static inline bool
 576 is_3src(const struct brw_device_info *devinfo, enum opcode opcode)
 577 {
 578    const struct opcode_desc *desc = brw_opcode_desc(devinfo, opcode);
 579    return desc && desc->nsrc == 3;
 580 }
 581
 582 /** Maximum SEND message length */
 583 #define BRW_MAX_MSG_LENGTH 15
 584
 585 /** First MRF register used by pull loads */
 586 #define FIRST_SPILL_MRF(gen) ((gen) == 6 ? 21 : 13)
 587
 588 /** First MRF register used by spills */
 589 #define FIRST_PULL_LOAD_MRF(gen) ((gen) == 6 ? 16 : 13)
 590
 591 #ifdef __cplusplus
 592 }
 593 #endif
 594
 595 #endif