src/mesa/drivers/dri/i965/brw_eu.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keithw@vmware.com>
  30   */
  31
  32
  33 #ifndef BRW_EU_H
  34 #define BRW_EU_H
  35
  36 #include <stdbool.h>
  37 #include "brw_inst.h"
  38 #include "brw_defines.h"
  39 #include "brw_reg.h"
  40 #include "intel_asm_annotation.h"
  41
  42 #ifdef __cplusplus
  43 extern "C" {
  44 #endif
  45
  46 #define BRW_EU_MAX_INSN_STACK 5
  47
  48 /* A helper for accessing the last instruction emitted.  This makes it easy
  49  * to set various bits on an instruction without having to create temporary
  50  * variable and assign the emitted instruction to those.
  51  */
  52 #define brw_last_inst (&p->store[p->nr_insn - 1])
  53
  54 struct brw_codegen {
  55    brw_inst *store;
  56    int store_size;
  57    unsigned nr_insn;
  58    unsigned int next_insn_offset;
  59
  60    void *mem_ctx;
  61
  62    /* Allow clients to push/pop instruction state:
  63     */
  64    brw_inst stack[BRW_EU_MAX_INSN_STACK];
  65    bool compressed_stack[BRW_EU_MAX_INSN_STACK];
  66    brw_inst *current;
  67
  68    bool single_program_flow;
  69    const struct gen_device_info *devinfo;
  70
  71    /* Control flow stacks:
  72     * - if_stack contains IF and ELSE instructions which must be patched
  73     *   (and popped) once the matching ENDIF instruction is encountered.
  74     *
  75     *   Just store the instruction pointer(an index).
  76     */
  77    int *if_stack;
  78    int if_stack_depth;
  79    int if_stack_array_size;
  80
  81    /**
  82     * loop_stack contains the instruction pointers of the starts of loops which
  83     * must be patched (and popped) once the matching WHILE instruction is
  84     * encountered.
  85     */
  86    int *loop_stack;
  87    /**
  88     * pre-gen6, the BREAK and CONT instructions had to tell how many IF/ENDIF
  89     * blocks they were popping out of, to fix up the mask stack.  This tracks
  90     * the IF/ENDIF nesting in each current nested loop level.
  91     */
  92    int *if_depth_in_loop;
  93    int loop_stack_depth;
  94    int loop_stack_array_size;
  95 };
  96
  97 void brw_pop_insn_state( struct brw_codegen *p );
  98 void brw_push_insn_state( struct brw_codegen *p );
  99 void brw_set_default_exec_size(struct brw_codegen *p, unsigned value);
 100 void brw_set_default_mask_control( struct brw_codegen *p, unsigned value );
 101 void brw_set_default_saturate( struct brw_codegen *p, bool enable );
 102 void brw_set_default_access_mode( struct brw_codegen *p, unsigned access_mode );
 103 void brw_inst_set_compression(const struct gen_device_info *devinfo,
 104                               brw_inst *inst, bool on);
 105 void brw_set_default_compression(struct brw_codegen *p, bool on);
 106 void brw_inst_set_group(const struct gen_device_info *devinfo,
 107                         brw_inst *inst, unsigned group);
 108 void brw_set_default_group(struct brw_codegen *p, unsigned group);
 109 void brw_set_default_compression_control(struct brw_codegen *p, enum brw_compression c);
 110 void brw_set_default_predicate_control( struct brw_codegen *p, unsigned pc );
 111 void brw_set_default_predicate_inverse(struct brw_codegen *p, bool predicate_inverse);
 112 void brw_set_default_flag_reg(struct brw_codegen *p, int reg, int subreg);
 113 void brw_set_default_acc_write_control(struct brw_codegen *p, unsigned value);
 114
 115 void brw_init_codegen(const struct gen_device_info *, struct brw_codegen *p,
 116                       void *mem_ctx);
 117 void brw_disassemble(const struct gen_device_info *devinfo, void *assembly,
 118                      int start, int end, FILE *out);
 119 const unsigned *brw_get_program( struct brw_codegen *p, unsigned *sz );
 120
 121 brw_inst *brw_next_insn(struct brw_codegen *p, unsigned opcode);
 122 void brw_set_dest(struct brw_codegen *p, brw_inst *insn, struct brw_reg dest);
 123 void brw_set_src0(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg);
 124
 125 void gen6_resolve_implied_move(struct brw_codegen *p,
 126                                struct brw_reg *src,
 127                                unsigned msg_reg_nr);
 128
 129 /* Helpers for regular instructions:
 130  */
 131 #define ALU1(OP)                                \
 132 brw_inst *brw_##OP(struct brw_codegen *p,       \
 133               struct brw_reg dest,              \
 134               struct brw_reg src0);
 135
 136 #define ALU2(OP)                                \
 137 brw_inst *brw_##OP(struct brw_codegen *p,       \
 138               struct brw_reg dest,              \
 139               struct brw_reg src0,              \
 140               struct brw_reg src1);
 141
 142 #define ALU3(OP)                                \
 143 brw_inst *brw_##OP(struct brw_codegen *p,       \
 144               struct brw_reg dest,              \
 145               struct brw_reg src0,              \
 146               struct brw_reg src1,              \
 147               struct brw_reg src2);
 148
 149 #define ROUND(OP) \
 150 void brw_##OP(struct brw_codegen *p, struct brw_reg dest, struct brw_reg src0);
 151
 152 ALU1(MOV)
 153 ALU2(SEL)
 154 ALU1(NOT)
 155 ALU2(AND)
 156 ALU2(OR)
 157 ALU2(XOR)
 158 ALU2(SHR)
 159 ALU2(SHL)
 160 ALU1(DIM)
 161 ALU2(ASR)
 162 ALU1(F32TO16)
 163 ALU1(F16TO32)
 164 ALU2(ADD)
 165 ALU2(AVG)
 166 ALU2(MUL)
 167 ALU1(FRC)
 168 ALU1(RNDD)
 169 ALU2(MAC)
 170 ALU2(MACH)
 171 ALU1(LZD)
 172 ALU2(DP4)
 173 ALU2(DPH)
 174 ALU2(DP3)
 175 ALU2(DP2)
 176 ALU2(LINE)
 177 ALU2(PLN)
 178 ALU3(MAD)
 179 ALU3(LRP)
 180 ALU1(BFREV)
 181 ALU3(BFE)
 182 ALU2(BFI1)
 183 ALU3(BFI2)
 184 ALU1(FBH)
 185 ALU1(FBL)
 186 ALU1(CBIT)
 187 ALU2(ADDC)
 188 ALU2(SUBB)
 189 ALU2(MAC)
 190
 191 ROUND(RNDZ)
 192 ROUND(RNDE)
 193
 194 #undef ALU1
 195 #undef ALU2
 196 #undef ALU3
 197 #undef ROUND
 198
 199
 200 /* Helpers for SEND instruction:
 201  */
 202 void brw_set_sampler_message(struct brw_codegen *p,
 203                              brw_inst *insn,
 204                              unsigned binding_table_index,
 205                              unsigned sampler,
 206                              unsigned msg_type,
 207                              unsigned response_length,
 208                              unsigned msg_length,
 209                              unsigned header_present,
 210                              unsigned simd_mode,
 211                              unsigned return_format);
 212
 213 void brw_set_message_descriptor(struct brw_codegen *p,
 214                                 brw_inst *inst,
 215                                 enum brw_message_target sfid,
 216                                 unsigned msg_length,
 217                                 unsigned response_length,
 218                                 bool header_present,
 219                                 bool end_of_thread);
 220
 221 void brw_set_dp_read_message(struct brw_codegen *p,
 222                              brw_inst *insn,
 223                              unsigned binding_table_index,
 224                              unsigned msg_control,
 225                              unsigned msg_type,
 226                              unsigned target_cache,
 227                              unsigned msg_length,
 228                              bool header_present,
 229                              unsigned response_length);
 230
 231 void brw_set_dp_write_message(struct brw_codegen *p,
 232                               brw_inst *insn,
 233                               unsigned binding_table_index,
 234                               unsigned msg_control,
 235                               unsigned msg_type,
 236                               unsigned target_cache,
 237                               unsigned msg_length,
 238                               bool header_present,
 239                               unsigned last_render_target,
 240                               unsigned response_length,
 241                               unsigned end_of_thread,
 242                               unsigned send_commit_msg);
 243
 244 void brw_urb_WRITE(struct brw_codegen *p,
 245                    struct brw_reg dest,
 246                    unsigned msg_reg_nr,
 247                    struct brw_reg src0,
 248                    enum brw_urb_write_flags flags,
 249                    unsigned msg_length,
 250                    unsigned response_length,
 251                    unsigned offset,
 252                    unsigned swizzle);
 253
 254 /**
 255  * Send message to shared unit \p sfid with a possibly indirect descriptor \p
 256  * desc.  If \p desc is not an immediate it will be transparently loaded to an
 257  * address register using an OR instruction.  The returned instruction can be
 258  * passed as argument to the usual brw_set_*_message() functions in order to
 259  * specify any additional descriptor bits -- If \p desc is an immediate this
 260  * will be the SEND instruction itself, otherwise it will be the OR
 261  * instruction.
 262  */
 263 struct brw_inst *
 264 brw_send_indirect_message(struct brw_codegen *p,
 265                           unsigned sfid,
 266                           struct brw_reg dst,
 267                           struct brw_reg payload,
 268                           struct brw_reg desc);
 269
 270 void brw_ff_sync(struct brw_codegen *p,
 271                    struct brw_reg dest,
 272                    unsigned msg_reg_nr,
 273                    struct brw_reg src0,
 274                    bool allocate,
 275                    unsigned response_length,
 276                    bool eot);
 277
 278 void brw_svb_write(struct brw_codegen *p,
 279                    struct brw_reg dest,
 280                    unsigned msg_reg_nr,
 281                    struct brw_reg src0,
 282                    unsigned binding_table_index,
 283                    bool   send_commit_msg);
 284
 285 void brw_fb_WRITE(struct brw_codegen *p,
 286                    struct brw_reg payload,
 287                    struct brw_reg implied_header,
 288                    unsigned msg_control,
 289                    unsigned binding_table_index,
 290                    unsigned msg_length,
 291                    unsigned response_length,
 292                    bool eot,
 293                    bool last_render_target,
 294                    bool header_present);
 295
 296 brw_inst *gen9_fb_READ(struct brw_codegen *p,
 297                        struct brw_reg dst,
 298                        struct brw_reg payload,
 299                        unsigned binding_table_index,
 300                        unsigned msg_length,
 301                        unsigned response_length,
 302                        bool per_sample);
 303
 304 void brw_SAMPLE(struct brw_codegen *p,
 305                 struct brw_reg dest,
 306                 unsigned msg_reg_nr,
 307                 struct brw_reg src0,
 308                 unsigned binding_table_index,
 309                 unsigned sampler,
 310                 unsigned msg_type,
 311                 unsigned response_length,
 312                 unsigned msg_length,
 313                 unsigned header_present,
 314                 unsigned simd_mode,
 315                 unsigned return_format);
 316
 317 void brw_adjust_sampler_state_pointer(struct brw_codegen *p,
 318                                       struct brw_reg header,
 319                                       struct brw_reg sampler_index);
 320
 321 void gen4_math(struct brw_codegen *p,
 322                struct brw_reg dest,
 323                unsigned function,
 324                unsigned msg_reg_nr,
 325                struct brw_reg src,
 326                unsigned precision );
 327
 328 void gen6_math(struct brw_codegen *p,
 329                struct brw_reg dest,
 330                unsigned function,
 331                struct brw_reg src0,
 332                struct brw_reg src1);
 333
 334 void brw_oword_block_read(struct brw_codegen *p,
 335                           struct brw_reg dest,
 336                           struct brw_reg mrf,
 337                           uint32_t offset,
 338                           uint32_t bind_table_index);
 339
 340 unsigned brw_scratch_surface_idx(const struct brw_codegen *p);
 341
 342 void brw_oword_block_read_scratch(struct brw_codegen *p,
 343                                   struct brw_reg dest,
 344                                   struct brw_reg mrf,
 345                                   int num_regs,
 346                                   unsigned offset);
 347
 348 void brw_oword_block_write_scratch(struct brw_codegen *p,
 349                                    struct brw_reg mrf,
 350                                    int num_regs,
 351                                    unsigned offset);
 352
 353 void gen7_block_read_scratch(struct brw_codegen *p,
 354                              struct brw_reg dest,
 355                              int num_regs,
 356                              unsigned offset);
 357
 358 void brw_shader_time_add(struct brw_codegen *p,
 359                          struct brw_reg payload,
 360                          uint32_t surf_index);
 361
 362 /**
 363  * Return the generation-specific jump distance scaling factor.
 364  *
 365  * Given the number of instructions to jump, we need to scale by
 366  * some number to obtain the actual jump distance to program in an
 367  * instruction.
 368  */
 369 static inline unsigned
 370 brw_jump_scale(const struct gen_device_info *devinfo)
 371 {
 372    /* Broadwell measures jump targets in bytes. */
 373    if (devinfo->gen >= 8)
 374       return 16;
 375
 376    /* Ironlake and later measure jump targets in 64-bit data chunks (in order
 377     * (to support compaction), so each 128-bit instruction requires 2 chunks.
 378     */
 379    if (devinfo->gen >= 5)
 380       return 2;
 381
 382    /* Gen4 simply uses the number of 128-bit instructions. */
 383    return 1;
 384 }
 385
 386 void brw_barrier(struct brw_codegen *p, struct brw_reg src);
 387
 388 /* If/else/endif.  Works by manipulating the execution flags on each
 389  * channel.
 390  */
 391 brw_inst *brw_IF(struct brw_codegen *p, unsigned execute_size);
 392 brw_inst *gen6_IF(struct brw_codegen *p, enum brw_conditional_mod conditional,
 393                   struct brw_reg src0, struct brw_reg src1);
 394
 395 void brw_ELSE(struct brw_codegen *p);
 396 void brw_ENDIF(struct brw_codegen *p);
 397
 398 /* DO/WHILE loops:
 399  */
 400 brw_inst *brw_DO(struct brw_codegen *p, unsigned execute_size);
 401
 402 brw_inst *brw_WHILE(struct brw_codegen *p);
 403
 404 brw_inst *brw_BREAK(struct brw_codegen *p);
 405 brw_inst *brw_CONT(struct brw_codegen *p);
 406 brw_inst *gen6_HALT(struct brw_codegen *p);
 407
 408 /* Forward jumps:
 409  */
 410 void brw_land_fwd_jump(struct brw_codegen *p, int jmp_insn_idx);
 411
 412 brw_inst *brw_JMPI(struct brw_codegen *p, struct brw_reg index,
 413                    unsigned predicate_control);
 414
 415 void brw_NOP(struct brw_codegen *p);
 416
 417 void brw_WAIT(struct brw_codegen *p);
 418
 419 /* Special case: there is never a destination, execution size will be
 420  * taken from src0:
 421  */
 422 void brw_CMP(struct brw_codegen *p,
 423              struct brw_reg dest,
 424              unsigned conditional,
 425              struct brw_reg src0,
 426              struct brw_reg src1);
 427
 428 void
 429 brw_untyped_atomic(struct brw_codegen *p,
 430                    struct brw_reg dst,
 431                    struct brw_reg payload,
 432                    struct brw_reg surface,
 433                    unsigned atomic_op,
 434                    unsigned msg_length,
 435                    bool response_expected);
 436
 437 void
 438 brw_untyped_surface_read(struct brw_codegen *p,
 439                          struct brw_reg dst,
 440                          struct brw_reg payload,
 441                          struct brw_reg surface,
 442                          unsigned msg_length,
 443                          unsigned num_channels);
 444
 445 void
 446 brw_untyped_surface_write(struct brw_codegen *p,
 447                           struct brw_reg payload,
 448                           struct brw_reg surface,
 449                           unsigned msg_length,
 450                           unsigned num_channels);
 451
 452 void
 453 brw_typed_atomic(struct brw_codegen *p,
 454                  struct brw_reg dst,
 455                  struct brw_reg payload,
 456                  struct brw_reg surface,
 457                  unsigned atomic_op,
 458                  unsigned msg_length,
 459                  bool response_expected);
 460
 461 void
 462 brw_typed_surface_read(struct brw_codegen *p,
 463                        struct brw_reg dst,
 464                        struct brw_reg payload,
 465                        struct brw_reg surface,
 466                        unsigned msg_length,
 467                        unsigned num_channels);
 468
 469 void
 470 brw_typed_surface_write(struct brw_codegen *p,
 471                         struct brw_reg payload,
 472                         struct brw_reg surface,
 473                         unsigned msg_length,
 474                         unsigned num_channels);
 475
 476 void
 477 brw_memory_fence(struct brw_codegen *p,
 478                  struct brw_reg dst);
 479
 480 void
 481 brw_pixel_interpolator_query(struct brw_codegen *p,
 482                              struct brw_reg dest,
 483                              struct brw_reg mrf,
 484                              bool noperspective,
 485                              unsigned mode,
 486                              struct brw_reg data,
 487                              unsigned msg_length,
 488                              unsigned response_length);
 489
 490 void
 491 brw_find_live_channel(struct brw_codegen *p,
 492                       struct brw_reg dst,
 493                       struct brw_reg mask);
 494
 495 void
 496 brw_broadcast(struct brw_codegen *p,
 497               struct brw_reg dst,
 498               struct brw_reg src,
 499               struct brw_reg idx);
 500
 501 /***********************************************************************
 502  * brw_eu_util.c:
 503  */
 504
 505 void brw_copy_indirect_to_indirect(struct brw_codegen *p,
 506                                    struct brw_indirect dst_ptr,
 507                                    struct brw_indirect src_ptr,
 508                                    unsigned count);
 509
 510 void brw_copy_from_indirect(struct brw_codegen *p,
 511                             struct brw_reg dst,
 512                             struct brw_indirect ptr,
 513                             unsigned count);
 514
 515 void brw_copy4(struct brw_codegen *p,
 516                struct brw_reg dst,
 517                struct brw_reg src,
 518                unsigned count);
 519
 520 void brw_copy8(struct brw_codegen *p,
 521                struct brw_reg dst,
 522                struct brw_reg src,
 523                unsigned count);
 524
 525 void brw_math_invert( struct brw_codegen *p,
 526                       struct brw_reg dst,
 527                       struct brw_reg src);
 528
 529 void brw_set_src1(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg);
 530
 531 void brw_set_uip_jip(struct brw_codegen *p, int start_offset);
 532
 533 enum brw_conditional_mod brw_negate_cmod(uint32_t cmod);
 534 enum brw_conditional_mod brw_swap_cmod(uint32_t cmod);
 535
 536 /* brw_eu_compact.c */
 537 void brw_init_compaction_tables(const struct gen_device_info *devinfo);
 538 void brw_compact_instructions(struct brw_codegen *p, int start_offset,
 539                               int num_annotations, struct annotation *annotation);
 540 void brw_uncompact_instruction(const struct gen_device_info *devinfo,
 541                                brw_inst *dst, brw_compact_inst *src);
 542 bool brw_try_compact_instruction(const struct gen_device_info *devinfo,
 543                                  brw_compact_inst *dst, brw_inst *src);
 544
 545 void brw_debug_compact_uncompact(const struct gen_device_info *devinfo,
 546                                  brw_inst *orig, brw_inst *uncompacted);
 547
 548 /* brw_eu_validate.c */
 549 bool brw_validate_instructions(const struct brw_codegen *p, int start_offset,
 550                                struct annotation_info *annotation);
 551
 552 static inline int
 553 next_offset(const struct gen_device_info *devinfo, void *store, int offset)
 554 {
 555    brw_inst *insn = (brw_inst *)((char *)store + offset);
 556
 557    if (brw_inst_cmpt_control(devinfo, insn))
 558       return offset + 8;
 559    else
 560       return offset + 16;
 561 }
 562
 563 struct opcode_desc {
 564    /* The union is an implementation detail used by brw_opcode_desc() to handle
 565     * opcodes that have been reused for different instructions across hardware
 566     * generations.
 567     *
 568     * The gens field acts as a tag. If it is non-zero, name points to a string
 569     * containing the instruction mnemonic. If it is zero, the table field is
 570     * valid and either points to a secondary opcode_desc table with 'size'
 571     * elements or is NULL and no such instruction exists for the opcode.
 572     */
 573    union {
 574       struct {
 575          char    *name;
 576          int      nsrc;
 577       };
 578       struct {
 579          const struct opcode_desc *table;
 580          unsigned size;
 581       };
 582    };
 583    int      ndst;
 584    int      gens;
 585 };
 586
 587 const struct opcode_desc *
 588 brw_opcode_desc(const struct gen_device_info *devinfo, enum opcode opcode);
 589
 590 static inline bool
 591 is_3src(const struct gen_device_info *devinfo, enum opcode opcode)
 592 {
 593    const struct opcode_desc *desc = brw_opcode_desc(devinfo, opcode);
 594    return desc && desc->nsrc == 3;
 595 }
 596
 597 /** Maximum SEND message length */
 598 #define BRW_MAX_MSG_LENGTH 15
 599
 600 /** First MRF register used by pull loads */
 601 #define FIRST_SPILL_MRF(gen) ((gen) == 6 ? 21 : 13)
 602
 603 /** First MRF register used by spills */
 604 #define FIRST_PULL_LOAD_MRF(gen) ((gen) == 6 ? 16 : 13)
 605
 606 #ifdef __cplusplus
 607 }
 608 #endif
 609
 610 #endif