i965/eu: Add a devinfo parameter to brw_compile
[mesa.git] / src / mesa / drivers / dri / i965 / brw_eu.h
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keithw@vmware.com>
30 */
31
32
33 #ifndef BRW_EU_H
34 #define BRW_EU_H
35
36 #include <stdbool.h>
37 #include "brw_inst.h"
38 #include "brw_structs.h"
39 #include "brw_defines.h"
40 #include "brw_reg.h"
41 #include "intel_asm_annotation.h"
42 #include "program/prog_instruction.h"
43
44 #ifdef __cplusplus
45 extern "C" {
46 #endif
47
48 #define BRW_EU_MAX_INSN_STACK 5
49
50 /* A helper for accessing the last instruction emitted. This makes it easy
51 * to set various bits on an instruction without having to create temporary
52 * variable and assign the emitted instruction to those.
53 */
54 #define brw_last_inst (&p->store[p->nr_insn - 1])
55
56 struct brw_compile {
57 brw_inst *store;
58 int store_size;
59 unsigned nr_insn;
60 unsigned int next_insn_offset;
61
62 void *mem_ctx;
63
64 /* Allow clients to push/pop instruction state:
65 */
66 brw_inst stack[BRW_EU_MAX_INSN_STACK];
67 bool compressed_stack[BRW_EU_MAX_INSN_STACK];
68 brw_inst *current;
69
70 bool single_program_flow;
71 bool compressed;
72 struct brw_context *brw;
73 const struct brw_device_info *devinfo;
74
75 /* Control flow stacks:
76 * - if_stack contains IF and ELSE instructions which must be patched
77 * (and popped) once the matching ENDIF instruction is encountered.
78 *
79 * Just store the instruction pointer(an index).
80 */
81 int *if_stack;
82 int if_stack_depth;
83 int if_stack_array_size;
84
85 /**
86 * loop_stack contains the instruction pointers of the starts of loops which
87 * must be patched (and popped) once the matching WHILE instruction is
88 * encountered.
89 */
90 int *loop_stack;
91 /**
92 * pre-gen6, the BREAK and CONT instructions had to tell how many IF/ENDIF
93 * blocks they were popping out of, to fix up the mask stack. This tracks
94 * the IF/ENDIF nesting in each current nested loop level.
95 */
96 int *if_depth_in_loop;
97 int loop_stack_depth;
98 int loop_stack_array_size;
99 };
100
101 void brw_pop_insn_state( struct brw_compile *p );
102 void brw_push_insn_state( struct brw_compile *p );
103 void brw_set_default_exec_size(struct brw_compile *p, unsigned value);
104 void brw_set_default_mask_control( struct brw_compile *p, unsigned value );
105 void brw_set_default_saturate( struct brw_compile *p, bool enable );
106 void brw_set_default_access_mode( struct brw_compile *p, unsigned access_mode );
107 void brw_set_default_compression_control(struct brw_compile *p, enum brw_compression c);
108 void brw_set_default_predicate_control( struct brw_compile *p, unsigned pc );
109 void brw_set_default_predicate_inverse(struct brw_compile *p, bool predicate_inverse);
110 void brw_set_default_flag_reg(struct brw_compile *p, int reg, int subreg);
111 void brw_set_default_acc_write_control(struct brw_compile *p, unsigned value);
112
113 void brw_init_compile(struct brw_context *, struct brw_compile *p,
114 void *mem_ctx);
115 void brw_disassemble(struct brw_context *brw, void *assembly,
116 int start, int end, FILE *out);
117 const unsigned *brw_get_program( struct brw_compile *p, unsigned *sz );
118
119 brw_inst *brw_next_insn(struct brw_compile *p, unsigned opcode);
120 void brw_set_dest(struct brw_compile *p, brw_inst *insn, struct brw_reg dest);
121 void brw_set_src0(struct brw_compile *p, brw_inst *insn, struct brw_reg reg);
122
123 void gen6_resolve_implied_move(struct brw_compile *p,
124 struct brw_reg *src,
125 unsigned msg_reg_nr);
126
127 /* Helpers for regular instructions:
128 */
129 #define ALU1(OP) \
130 brw_inst *brw_##OP(struct brw_compile *p, \
131 struct brw_reg dest, \
132 struct brw_reg src0);
133
134 #define ALU2(OP) \
135 brw_inst *brw_##OP(struct brw_compile *p, \
136 struct brw_reg dest, \
137 struct brw_reg src0, \
138 struct brw_reg src1);
139
140 #define ALU3(OP) \
141 brw_inst *brw_##OP(struct brw_compile *p, \
142 struct brw_reg dest, \
143 struct brw_reg src0, \
144 struct brw_reg src1, \
145 struct brw_reg src2);
146
147 #define ROUND(OP) \
148 void brw_##OP(struct brw_compile *p, struct brw_reg dest, struct brw_reg src0);
149
150 ALU1(MOV)
151 ALU2(SEL)
152 ALU1(NOT)
153 ALU2(AND)
154 ALU2(OR)
155 ALU2(XOR)
156 ALU2(SHR)
157 ALU2(SHL)
158 ALU2(ASR)
159 ALU1(F32TO16)
160 ALU1(F16TO32)
161 ALU2(ADD)
162 ALU2(AVG)
163 ALU2(MUL)
164 ALU1(FRC)
165 ALU1(RNDD)
166 ALU2(MAC)
167 ALU2(MACH)
168 ALU1(LZD)
169 ALU2(DP4)
170 ALU2(DPH)
171 ALU2(DP3)
172 ALU2(DP2)
173 ALU2(LINE)
174 ALU2(PLN)
175 ALU3(MAD)
176 ALU3(LRP)
177 ALU1(BFREV)
178 ALU3(BFE)
179 ALU2(BFI1)
180 ALU3(BFI2)
181 ALU1(FBH)
182 ALU1(FBL)
183 ALU1(CBIT)
184 ALU2(ADDC)
185 ALU2(SUBB)
186 ALU2(MAC)
187
188 ROUND(RNDZ)
189 ROUND(RNDE)
190
191 #undef ALU1
192 #undef ALU2
193 #undef ALU3
194 #undef ROUND
195
196
197 /* Helpers for SEND instruction:
198 */
199 void brw_set_sampler_message(struct brw_compile *p,
200 brw_inst *insn,
201 unsigned binding_table_index,
202 unsigned sampler,
203 unsigned msg_type,
204 unsigned response_length,
205 unsigned msg_length,
206 unsigned header_present,
207 unsigned simd_mode,
208 unsigned return_format);
209
210 void brw_set_dp_read_message(struct brw_compile *p,
211 brw_inst *insn,
212 unsigned binding_table_index,
213 unsigned msg_control,
214 unsigned msg_type,
215 unsigned target_cache,
216 unsigned msg_length,
217 bool header_present,
218 unsigned response_length);
219
220 void brw_set_dp_write_message(struct brw_compile *p,
221 brw_inst *insn,
222 unsigned binding_table_index,
223 unsigned msg_control,
224 unsigned msg_type,
225 unsigned msg_length,
226 bool header_present,
227 unsigned last_render_target,
228 unsigned response_length,
229 unsigned end_of_thread,
230 unsigned send_commit_msg);
231
232 void brw_urb_WRITE(struct brw_compile *p,
233 struct brw_reg dest,
234 unsigned msg_reg_nr,
235 struct brw_reg src0,
236 enum brw_urb_write_flags flags,
237 unsigned msg_length,
238 unsigned response_length,
239 unsigned offset,
240 unsigned swizzle);
241
242 /**
243 * Send message to shared unit \p sfid with a possibly indirect descriptor \p
244 * desc. If \p desc is not an immediate it will be transparently loaded to an
245 * address register using an OR instruction. The returned instruction can be
246 * passed as argument to the usual brw_set_*_message() functions in order to
247 * specify any additional descriptor bits -- If \p desc is an immediate this
248 * will be the SEND instruction itself, otherwise it will be the OR
249 * instruction.
250 */
251 struct brw_inst *
252 brw_send_indirect_message(struct brw_compile *p,
253 unsigned sfid,
254 struct brw_reg dst,
255 struct brw_reg payload,
256 struct brw_reg desc);
257
258 void brw_ff_sync(struct brw_compile *p,
259 struct brw_reg dest,
260 unsigned msg_reg_nr,
261 struct brw_reg src0,
262 bool allocate,
263 unsigned response_length,
264 bool eot);
265
266 void brw_svb_write(struct brw_compile *p,
267 struct brw_reg dest,
268 unsigned msg_reg_nr,
269 struct brw_reg src0,
270 unsigned binding_table_index,
271 bool send_commit_msg);
272
273 void brw_fb_WRITE(struct brw_compile *p,
274 int dispatch_width,
275 struct brw_reg payload,
276 struct brw_reg implied_header,
277 unsigned msg_control,
278 unsigned binding_table_index,
279 unsigned msg_length,
280 unsigned response_length,
281 bool eot,
282 bool last_render_target,
283 bool header_present);
284
285 void brw_SAMPLE(struct brw_compile *p,
286 struct brw_reg dest,
287 unsigned msg_reg_nr,
288 struct brw_reg src0,
289 unsigned binding_table_index,
290 unsigned sampler,
291 unsigned msg_type,
292 unsigned response_length,
293 unsigned msg_length,
294 unsigned header_present,
295 unsigned simd_mode,
296 unsigned return_format);
297
298 void brw_adjust_sampler_state_pointer(struct brw_compile *p,
299 struct brw_reg header,
300 struct brw_reg sampler_index);
301
302 void gen4_math(struct brw_compile *p,
303 struct brw_reg dest,
304 unsigned function,
305 unsigned msg_reg_nr,
306 struct brw_reg src,
307 unsigned precision );
308
309 void gen6_math(struct brw_compile *p,
310 struct brw_reg dest,
311 unsigned function,
312 struct brw_reg src0,
313 struct brw_reg src1);
314
315 void brw_oword_block_read(struct brw_compile *p,
316 struct brw_reg dest,
317 struct brw_reg mrf,
318 uint32_t offset,
319 uint32_t bind_table_index);
320
321 void brw_oword_block_read_scratch(struct brw_compile *p,
322 struct brw_reg dest,
323 struct brw_reg mrf,
324 int num_regs,
325 unsigned offset);
326
327 void brw_oword_block_write_scratch(struct brw_compile *p,
328 struct brw_reg mrf,
329 int num_regs,
330 unsigned offset);
331
332 void gen7_block_read_scratch(struct brw_compile *p,
333 struct brw_reg dest,
334 int num_regs,
335 unsigned offset);
336
337 void brw_shader_time_add(struct brw_compile *p,
338 struct brw_reg payload,
339 uint32_t surf_index);
340
341 /**
342 * Return the generation-specific jump distance scaling factor.
343 *
344 * Given the number of instructions to jump, we need to scale by
345 * some number to obtain the actual jump distance to program in an
346 * instruction.
347 */
348 static inline unsigned
349 brw_jump_scale(const struct brw_context *brw)
350 {
351 /* Broadwell measures jump targets in bytes. */
352 if (brw->gen >= 8)
353 return 16;
354
355 /* Ironlake and later measure jump targets in 64-bit data chunks (in order
356 * (to support compaction), so each 128-bit instruction requires 2 chunks.
357 */
358 if (brw->gen >= 5)
359 return 2;
360
361 /* Gen4 simply uses the number of 128-bit instructions. */
362 return 1;
363 }
364
365 /* If/else/endif. Works by manipulating the execution flags on each
366 * channel.
367 */
368 brw_inst *brw_IF(struct brw_compile *p, unsigned execute_size);
369 brw_inst *gen6_IF(struct brw_compile *p, enum brw_conditional_mod conditional,
370 struct brw_reg src0, struct brw_reg src1);
371
372 void brw_ELSE(struct brw_compile *p);
373 void brw_ENDIF(struct brw_compile *p);
374
375 /* DO/WHILE loops:
376 */
377 brw_inst *brw_DO(struct brw_compile *p, unsigned execute_size);
378
379 brw_inst *brw_WHILE(struct brw_compile *p);
380
381 brw_inst *brw_BREAK(struct brw_compile *p);
382 brw_inst *brw_CONT(struct brw_compile *p);
383 brw_inst *gen6_HALT(struct brw_compile *p);
384
385 /* Forward jumps:
386 */
387 void brw_land_fwd_jump(struct brw_compile *p, int jmp_insn_idx);
388
389 brw_inst *brw_JMPI(struct brw_compile *p, struct brw_reg index,
390 unsigned predicate_control);
391
392 void brw_NOP(struct brw_compile *p);
393
394 /* Special case: there is never a destination, execution size will be
395 * taken from src0:
396 */
397 void brw_CMP(struct brw_compile *p,
398 struct brw_reg dest,
399 unsigned conditional,
400 struct brw_reg src0,
401 struct brw_reg src1);
402
403 void
404 brw_untyped_atomic(struct brw_compile *p,
405 struct brw_reg dest,
406 struct brw_reg payload,
407 unsigned atomic_op,
408 unsigned bind_table_index,
409 unsigned msg_length,
410 bool response_expected);
411
412 void
413 brw_untyped_surface_read(struct brw_compile *p,
414 struct brw_reg dest,
415 struct brw_reg mrf,
416 unsigned bind_table_index,
417 unsigned msg_length,
418 unsigned num_channels);
419
420 void
421 brw_pixel_interpolator_query(struct brw_compile *p,
422 struct brw_reg dest,
423 struct brw_reg mrf,
424 bool noperspective,
425 unsigned mode,
426 unsigned data,
427 unsigned msg_length,
428 unsigned response_length);
429
430 /***********************************************************************
431 * brw_eu_util.c:
432 */
433
434 void brw_copy_indirect_to_indirect(struct brw_compile *p,
435 struct brw_indirect dst_ptr,
436 struct brw_indirect src_ptr,
437 unsigned count);
438
439 void brw_copy_from_indirect(struct brw_compile *p,
440 struct brw_reg dst,
441 struct brw_indirect ptr,
442 unsigned count);
443
444 void brw_copy4(struct brw_compile *p,
445 struct brw_reg dst,
446 struct brw_reg src,
447 unsigned count);
448
449 void brw_copy8(struct brw_compile *p,
450 struct brw_reg dst,
451 struct brw_reg src,
452 unsigned count);
453
454 void brw_math_invert( struct brw_compile *p,
455 struct brw_reg dst,
456 struct brw_reg src);
457
458 void brw_set_src1(struct brw_compile *p, brw_inst *insn, struct brw_reg reg);
459
460 void brw_set_uip_jip(struct brw_compile *p);
461
462 enum brw_conditional_mod brw_negate_cmod(uint32_t cmod);
463 enum brw_conditional_mod brw_swap_cmod(uint32_t cmod);
464
465 /* brw_eu_compact.c */
466 void brw_init_compaction_tables(struct brw_context *brw);
467 void brw_compact_instructions(struct brw_compile *p, int start_offset,
468 int num_annotations, struct annotation *annotation);
469 void brw_uncompact_instruction(struct brw_context *brw, brw_inst *dst,
470 brw_compact_inst *src);
471 bool brw_try_compact_instruction(struct brw_context *brw, brw_compact_inst *dst,
472 brw_inst *src);
473
474 void brw_debug_compact_uncompact(struct brw_context *brw, brw_inst *orig,
475 brw_inst *uncompacted);
476
477 static inline int
478 next_offset(const struct brw_context *brw, void *store, int offset)
479 {
480 brw_inst *insn = (brw_inst *)((char *)store + offset);
481
482 if (brw_inst_cmpt_control(brw, insn))
483 return offset + 8;
484 else
485 return offset + 16;
486 }
487
488 #ifdef __cplusplus
489 }
490 #endif
491
492 #endif