2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keithw@vmware.com>
38 #include "brw_structs.h"
39 #include "brw_defines.h"
41 #include "intel_asm_annotation.h"
42 #include "program/prog_instruction.h"
48 #define BRW_EU_MAX_INSN_STACK 5
50 /* A helper for accessing the last instruction emitted. This makes it easy
51 * to set various bits on an instruction without having to create temporary
52 * variable and assign the emitted instruction to those.
54 #define brw_last_inst (&p->store[p->nr_insn - 1])
60 unsigned int next_insn_offset
;
64 /* Allow clients to push/pop instruction state:
66 brw_inst stack
[BRW_EU_MAX_INSN_STACK
];
67 bool compressed_stack
[BRW_EU_MAX_INSN_STACK
];
70 bool single_program_flow
;
72 struct brw_context
*brw
;
74 /* Control flow stacks:
75 * - if_stack contains IF and ELSE instructions which must be patched
76 * (and popped) once the matching ENDIF instruction is encountered.
78 * Just store the instruction pointer(an index).
82 int if_stack_array_size
;
85 * loop_stack contains the instruction pointers of the starts of loops which
86 * must be patched (and popped) once the matching WHILE instruction is
91 * pre-gen6, the BREAK and CONT instructions had to tell how many IF/ENDIF
92 * blocks they were popping out of, to fix up the mask stack. This tracks
93 * the IF/ENDIF nesting in each current nested loop level.
95 int *if_depth_in_loop
;
97 int loop_stack_array_size
;
100 void brw_pop_insn_state( struct brw_compile
*p
);
101 void brw_push_insn_state( struct brw_compile
*p
);
102 void brw_set_default_mask_control( struct brw_compile
*p
, unsigned value
);
103 void brw_set_default_saturate( struct brw_compile
*p
, bool enable
);
104 void brw_set_default_access_mode( struct brw_compile
*p
, unsigned access_mode
);
105 void brw_set_default_compression_control(struct brw_compile
*p
, enum brw_compression c
);
106 void brw_set_default_predicate_control( struct brw_compile
*p
, unsigned pc
);
107 void brw_set_default_predicate_inverse(struct brw_compile
*p
, bool predicate_inverse
);
108 void brw_set_default_flag_reg(struct brw_compile
*p
, int reg
, int subreg
);
109 void brw_set_default_acc_write_control(struct brw_compile
*p
, unsigned value
);
111 void brw_init_compile(struct brw_context
*, struct brw_compile
*p
,
113 void brw_disassemble(struct brw_context
*brw
, void *assembly
,
114 int start
, int end
, FILE *out
);
115 const unsigned *brw_get_program( struct brw_compile
*p
, unsigned *sz
);
117 brw_inst
*brw_next_insn(struct brw_compile
*p
, unsigned opcode
);
118 void brw_set_dest(struct brw_compile
*p
, brw_inst
*insn
, struct brw_reg dest
);
119 void brw_set_src0(struct brw_compile
*p
, brw_inst
*insn
, struct brw_reg reg
);
121 void gen6_resolve_implied_move(struct brw_compile
*p
,
123 unsigned msg_reg_nr
);
125 /* Helpers for regular instructions:
128 brw_inst *brw_##OP(struct brw_compile *p, \
129 struct brw_reg dest, \
130 struct brw_reg src0);
133 brw_inst *brw_##OP(struct brw_compile *p, \
134 struct brw_reg dest, \
135 struct brw_reg src0, \
136 struct brw_reg src1);
139 brw_inst *brw_##OP(struct brw_compile *p, \
140 struct brw_reg dest, \
141 struct brw_reg src0, \
142 struct brw_reg src1, \
143 struct brw_reg src2);
146 void brw_##OP(struct brw_compile *p, struct brw_reg dest, struct brw_reg src0);
195 /* Helpers for SEND instruction:
197 void brw_set_sampler_message(struct brw_compile
*p
,
199 unsigned binding_table_index
,
202 unsigned response_length
,
204 unsigned header_present
,
206 unsigned return_format
);
208 void brw_set_indirect_send_descriptor(struct brw_compile
*p
,
211 struct brw_reg descriptor
);
213 void brw_set_dp_read_message(struct brw_compile
*p
,
215 unsigned binding_table_index
,
216 unsigned msg_control
,
218 unsigned target_cache
,
221 unsigned response_length
);
223 void brw_set_dp_write_message(struct brw_compile
*p
,
225 unsigned binding_table_index
,
226 unsigned msg_control
,
230 unsigned last_render_target
,
231 unsigned response_length
,
232 unsigned end_of_thread
,
233 unsigned send_commit_msg
);
235 void brw_urb_WRITE(struct brw_compile
*p
,
239 enum brw_urb_write_flags flags
,
241 unsigned response_length
,
245 void brw_ff_sync(struct brw_compile
*p
,
250 unsigned response_length
,
253 void brw_svb_write(struct brw_compile
*p
,
257 unsigned binding_table_index
,
258 bool send_commit_msg
);
260 void brw_fb_WRITE(struct brw_compile
*p
,
264 unsigned msg_control
,
265 unsigned binding_table_index
,
267 unsigned response_length
,
269 bool header_present
);
271 void brw_SAMPLE(struct brw_compile
*p
,
275 unsigned binding_table_index
,
278 unsigned response_length
,
280 unsigned header_present
,
282 unsigned return_format
);
284 void brw_adjust_sampler_state_pointer(struct brw_compile
*p
,
285 struct brw_reg header
,
286 struct brw_reg sampler_index
,
287 struct brw_reg scratch
);
289 void gen4_math(struct brw_compile
*p
,
295 unsigned precision
);
297 void gen6_math(struct brw_compile
*p
,
301 struct brw_reg src1
);
303 void brw_oword_block_read(struct brw_compile
*p
,
307 uint32_t bind_table_index
);
309 void brw_oword_block_read_scratch(struct brw_compile
*p
,
315 void brw_oword_block_write_scratch(struct brw_compile
*p
,
320 void gen7_block_read_scratch(struct brw_compile
*p
,
325 void brw_shader_time_add(struct brw_compile
*p
,
326 struct brw_reg payload
,
327 uint32_t surf_index
);
330 * Return the generation-specific jump distance scaling factor.
332 * Given the number of instructions to jump, we need to scale by
333 * some number to obtain the actual jump distance to program in an
336 static inline unsigned
337 brw_jump_scale(const struct brw_context
*brw
)
339 /* Broadwell measures jump targets in bytes. */
343 /* Ironlake and later measure jump targets in 64-bit data chunks (in order
344 * (to support compaction), so each 128-bit instruction requires 2 chunks.
349 /* Gen4 simply uses the number of 128-bit instructions. */
353 /* If/else/endif. Works by manipulating the execution flags on each
356 brw_inst
*brw_IF(struct brw_compile
*p
, unsigned execute_size
);
357 brw_inst
*gen6_IF(struct brw_compile
*p
, enum brw_conditional_mod conditional
,
358 struct brw_reg src0
, struct brw_reg src1
);
360 void brw_ELSE(struct brw_compile
*p
);
361 void brw_ENDIF(struct brw_compile
*p
);
365 brw_inst
*brw_DO(struct brw_compile
*p
, unsigned execute_size
);
367 brw_inst
*brw_WHILE(struct brw_compile
*p
);
369 brw_inst
*brw_BREAK(struct brw_compile
*p
);
370 brw_inst
*brw_CONT(struct brw_compile
*p
);
371 brw_inst
*gen6_HALT(struct brw_compile
*p
);
375 void brw_land_fwd_jump(struct brw_compile
*p
, int jmp_insn_idx
);
377 brw_inst
*brw_JMPI(struct brw_compile
*p
, struct brw_reg index
,
378 unsigned predicate_control
);
380 void brw_NOP(struct brw_compile
*p
);
382 /* Special case: there is never a destination, execution size will be
385 void brw_CMP(struct brw_compile
*p
,
387 unsigned conditional
,
389 struct brw_reg src1
);
392 brw_untyped_atomic(struct brw_compile
*p
,
396 unsigned bind_table_index
,
398 unsigned response_length
);
401 brw_untyped_surface_read(struct brw_compile
*p
,
404 unsigned bind_table_index
,
406 unsigned response_length
);
409 brw_pixel_interpolator_query(struct brw_compile
*p
,
416 unsigned response_length
);
418 /***********************************************************************
422 void brw_copy_indirect_to_indirect(struct brw_compile
*p
,
423 struct brw_indirect dst_ptr
,
424 struct brw_indirect src_ptr
,
427 void brw_copy_from_indirect(struct brw_compile
*p
,
429 struct brw_indirect ptr
,
432 void brw_copy4(struct brw_compile
*p
,
437 void brw_copy8(struct brw_compile
*p
,
442 void brw_math_invert( struct brw_compile
*p
,
446 void brw_set_src1(struct brw_compile
*p
, brw_inst
*insn
, struct brw_reg reg
);
448 void brw_set_uip_jip(struct brw_compile
*p
);
450 enum brw_conditional_mod
brw_swap_cmod(uint32_t cmod
);
452 /* brw_eu_compact.c */
453 void brw_init_compaction_tables(struct brw_context
*brw
);
454 void brw_compact_instructions(struct brw_compile
*p
, int start_offset
,
455 int num_annotations
, struct annotation
*annotation
);
456 void brw_uncompact_instruction(struct brw_context
*brw
, brw_inst
*dst
,
457 brw_compact_inst
*src
);
458 bool brw_try_compact_instruction(struct brw_context
*brw
, brw_compact_inst
*dst
,
461 void brw_debug_compact_uncompact(struct brw_context
*brw
, brw_inst
*orig
,
462 brw_inst
*uncompacted
);
465 next_offset(const struct brw_context
*brw
, void *store
, int offset
)
467 brw_inst
*insn
= (brw_inst
*)((char *)store
+ offset
);
469 if (brw_inst_cmpt_control(brw
, insn
))