i965: "Fix" aux offsets
[mesa.git] / src / mesa / drivers / dri / i965 / brw_eu_validate.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 /** @file brw_eu_validate.c
25 *
26 * This file implements a pass that validates shader assembly.
27 */
28
29 #include "brw_eu.h"
30
31 /* We're going to do lots of string concatenation, so this should help. */
32 struct string {
33 char *str;
34 size_t len;
35 };
36
37 static void
38 cat(struct string *dest, const struct string src)
39 {
40 dest->str = realloc(dest->str, dest->len + src.len + 1);
41 memcpy(dest->str + dest->len, src.str, src.len);
42 dest->str[dest->len + src.len] = '\0';
43 dest->len = dest->len + src.len;
44 }
45 #define CAT(dest, src) cat(&dest, (struct string){src, strlen(src)})
46
47 #define error(str) "\tERROR: " str "\n"
48
49 #define ERROR_IF(cond, msg) \
50 do { \
51 if (cond) { \
52 CAT(error_msg, error(msg)); \
53 valid = false; \
54 } \
55 } while(0)
56
57 static bool
58 src0_is_null(const struct gen_device_info *devinfo, const brw_inst *inst)
59 {
60 return brw_inst_src0_reg_file(devinfo, inst) == BRW_ARCHITECTURE_REGISTER_FILE &&
61 brw_inst_src0_da_reg_nr(devinfo, inst) == BRW_ARF_NULL;
62 }
63
64 static bool
65 src1_is_null(const struct gen_device_info *devinfo, const brw_inst *inst)
66 {
67 return brw_inst_src1_reg_file(devinfo, inst) == BRW_ARCHITECTURE_REGISTER_FILE &&
68 brw_inst_src1_da_reg_nr(devinfo, inst) == BRW_ARF_NULL;
69 }
70
71 static bool
72 src0_is_grf(const struct gen_device_info *devinfo, const brw_inst *inst)
73 {
74 return brw_inst_src0_reg_file(devinfo, inst) == BRW_GENERAL_REGISTER_FILE;
75 }
76
77 static unsigned
78 num_sources_from_inst(const struct gen_device_info *devinfo,
79 const brw_inst *inst)
80 {
81 const struct opcode_desc *desc =
82 brw_opcode_desc(devinfo, brw_inst_opcode(devinfo, inst));
83 unsigned math_function;
84
85 if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MATH) {
86 math_function = brw_inst_math_function(devinfo, inst);
87 } else if (devinfo->gen < 6 &&
88 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND) {
89 if (brw_inst_sfid(devinfo, inst) == BRW_SFID_MATH) {
90 math_function = brw_inst_math_msg_function(devinfo, inst);
91 } else {
92 /* Send instructions are allowed to have null sources since they use
93 * the base_mrf field to specify which message register source.
94 */
95 return 0;
96 }
97 } else if (desc) {
98 return desc->nsrc;
99 } else {
100 return 0;
101 }
102
103 switch (math_function) {
104 case BRW_MATH_FUNCTION_INV:
105 case BRW_MATH_FUNCTION_LOG:
106 case BRW_MATH_FUNCTION_EXP:
107 case BRW_MATH_FUNCTION_SQRT:
108 case BRW_MATH_FUNCTION_RSQ:
109 case BRW_MATH_FUNCTION_SIN:
110 case BRW_MATH_FUNCTION_COS:
111 case BRW_MATH_FUNCTION_SINCOS:
112 case GEN8_MATH_FUNCTION_INVM:
113 case GEN8_MATH_FUNCTION_RSQRTM:
114 return 1;
115 case BRW_MATH_FUNCTION_FDIV:
116 case BRW_MATH_FUNCTION_POW:
117 case BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER:
118 case BRW_MATH_FUNCTION_INT_DIV_QUOTIENT:
119 case BRW_MATH_FUNCTION_INT_DIV_REMAINDER:
120 return 2;
121 default:
122 unreachable("not reached");
123 }
124 }
125
126 static bool
127 is_unsupported_inst(const struct gen_device_info *devinfo,
128 const brw_inst *inst)
129 {
130 return brw_opcode_desc(devinfo, brw_inst_opcode(devinfo, inst)) == NULL;
131 }
132
133 bool
134 brw_validate_instructions(const struct brw_codegen *p, int start_offset,
135 struct annotation_info *annotation)
136 {
137 const struct gen_device_info *devinfo = p->devinfo;
138 const void *store = p->store + start_offset / 16;
139 bool valid = true;
140
141 for (int src_offset = 0; src_offset < p->next_insn_offset - start_offset;
142 src_offset += sizeof(brw_inst)) {
143 struct string error_msg = { .str = NULL, .len = 0 };
144 const brw_inst *inst = store + src_offset;
145
146 switch (num_sources_from_inst(devinfo, inst)) {
147 case 3:
148 /* Nothing to test. 3-src instructions can only have GRF sources, and
149 * there's no bit to control the file.
150 */
151 break;
152 case 2:
153 ERROR_IF(src1_is_null(devinfo, inst), "src1 is null");
154 /* fallthrough */
155 case 1:
156 ERROR_IF(src0_is_null(devinfo, inst), "src0 is null");
157 break;
158 case 0:
159 default:
160 break;
161 }
162
163 ERROR_IF(is_unsupported_inst(devinfo, inst),
164 "Instruction not supported on this Gen");
165
166 if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND) {
167 ERROR_IF(brw_inst_src0_address_mode(devinfo, inst) !=
168 BRW_ADDRESS_DIRECT, "send must use direct addressing");
169
170 if (devinfo->gen >= 7) {
171 ERROR_IF(!src0_is_grf(devinfo, inst), "send from non-GRF");
172 ERROR_IF(brw_inst_eot(devinfo, inst) &&
173 brw_inst_src0_da_reg_nr(devinfo, inst) < 112,
174 "send with EOT must use g112-g127");
175 }
176 }
177
178 if (error_msg.str && annotation) {
179 annotation_insert_error(annotation, src_offset, error_msg.str);
180 }
181 free(error_msg.str);
182 }
183
184 return valid;
185 }