src/mesa/drivers/dri/i965/brw_fs.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #pragma once
  29
  30 #include "brw_shader.h"
  31 #include "brw_ir_fs.h"
  32
  33 extern "C" {
  34
  35 #include <sys/types.h>
  36
  37 #include "main/macros.h"
  38 #include "main/shaderobj.h"
  39 #include "main/uniforms.h"
  40 #include "program/prog_parameter.h"
  41 #include "program/prog_print.h"
  42 #include "program/prog_optimize.h"
  43 #include "util/register_allocate.h"
  44 #include "program/hash_table.h"
  45 #include "brw_context.h"
  46 #include "brw_eu.h"
  47 #include "brw_wm.h"
  48 #include "intel_asm_annotation.h"
  49 }
  50 #include "glsl/glsl_types.h"
  51 #include "glsl/ir.h"
  52 #include "glsl/nir/nir.h"
  53 #include "program/sampler.h"
  54
  55 struct bblock_t;
  56 namespace {
  57    struct acp_entry;
  58 }
  59
  60 namespace brw {
  61    class fs_live_variables;
  62 }
  63
  64 /**
  65  * The fragment shader front-end.
  66  *
  67  * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
  68  */
  69 class fs_visitor : public backend_visitor
  70 {
  71 public:
  72    const fs_reg reg_null_f;
  73    const fs_reg reg_null_d;
  74    const fs_reg reg_null_ud;
  75
  76    fs_visitor(struct brw_context *brw,
  77               void *mem_ctx,
  78               const struct brw_wm_prog_key *key,
  79               struct brw_wm_prog_data *prog_data,
  80               struct gl_shader_program *shader_prog,
  81               struct gl_fragment_program *fp,
  82               unsigned dispatch_width);
  83
  84    fs_visitor(struct brw_context *brw,
  85               void *mem_ctx,
  86               const struct brw_vs_prog_key *key,
  87               struct brw_vs_prog_data *prog_data,
  88               struct gl_shader_program *shader_prog,
  89               struct gl_vertex_program *cp,
  90               unsigned dispatch_width);
  91
  92    fs_visitor(struct brw_context *brw,
  93               void *mem_ctx,
  94               const struct brw_cs_prog_key *key,
  95               struct brw_cs_prog_data *prog_data,
  96               struct gl_shader_program *shader_prog,
  97               struct gl_compute_program *cp,
  98               unsigned dispatch_width);
  99
 100    ~fs_visitor();
 101    void init();
 102
 103    fs_reg *variable_storage(ir_variable *var);
 104    fs_reg vgrf(const glsl_type *const type);
 105    fs_reg vgrf(int num_components);
 106    void import_uniforms(fs_visitor *v);
 107    void setup_uniform_clipplane_values();
 108    void compute_clip_distance();
 109
 110    void visit(ir_variable *ir);
 111    void visit(ir_assignment *ir);
 112    void visit(ir_dereference_variable *ir);
 113    void visit(ir_dereference_record *ir);
 114    void visit(ir_dereference_array *ir);
 115    void visit(ir_expression *ir);
 116    void visit(ir_texture *ir);
 117    void visit(ir_if *ir);
 118    void visit(ir_constant *ir);
 119    void visit(ir_swizzle *ir);
 120    void visit(ir_return *ir);
 121    void visit(ir_loop *ir);
 122    void visit(ir_loop_jump *ir);
 123    void visit(ir_discard *ir);
 124    void visit(ir_call *ir);
 125    void visit(ir_function *ir);
 126    void visit(ir_function_signature *ir);
 127    void visit(ir_emit_vertex *);
 128    void visit(ir_end_primitive *);
 129
 130    uint32_t gather_channel(int orig_chan, uint32_t sampler);
 131    void swizzle_result(ir_texture_opcode op, int dest_components,
 132                        fs_reg orig_val, uint32_t sampler);
 133
 134    fs_inst *emit(fs_inst *inst);
 135    void emit(exec_list list);
 136
 137    fs_inst *emit(enum opcode opcode);
 138    fs_inst *emit(enum opcode opcode, const fs_reg &dst);
 139    fs_inst *emit(enum opcode opcode, const fs_reg &dst, const fs_reg &src0);
 140    fs_inst *emit(enum opcode opcode, const fs_reg &dst, const fs_reg &src0,
 141                  const fs_reg &src1);
 142    fs_inst *emit(enum opcode opcode, const fs_reg &dst,
 143                  const fs_reg &src0, const fs_reg &src1, const fs_reg &src2);
 144    fs_inst *emit(enum opcode opcode, const fs_reg &dst,
 145                  fs_reg src[], int sources);
 146
 147    fs_inst *MOV(const fs_reg &dst, const fs_reg &src);
 148    fs_inst *NOT(const fs_reg &dst, const fs_reg &src);
 149    fs_inst *RNDD(const fs_reg &dst, const fs_reg &src);
 150    fs_inst *RNDE(const fs_reg &dst, const fs_reg &src);
 151    fs_inst *RNDZ(const fs_reg &dst, const fs_reg &src);
 152    fs_inst *FRC(const fs_reg &dst, const fs_reg &src);
 153    fs_inst *ADD(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 154    fs_inst *MUL(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 155    fs_inst *MACH(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 156    fs_inst *MAC(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 157    fs_inst *SHL(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 158    fs_inst *SHR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 159    fs_inst *ASR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 160    fs_inst *AND(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 161    fs_inst *OR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 162    fs_inst *XOR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 163    fs_inst *IF(enum brw_predicate predicate);
 164    fs_inst *IF(const fs_reg &src0, const fs_reg &src1,
 165                enum brw_conditional_mod condition);
 166    fs_inst *CMP(fs_reg dst, fs_reg src0, fs_reg src1,
 167                 enum brw_conditional_mod condition);
 168    fs_inst *LRP(const fs_reg &dst, const fs_reg &a, const fs_reg &y,
 169                 const fs_reg &x);
 170    fs_inst *DEP_RESOLVE_MOV(int grf);
 171    fs_inst *BFREV(const fs_reg &dst, const fs_reg &value);
 172    fs_inst *BFE(const fs_reg &dst, const fs_reg &bits, const fs_reg &offset,
 173                 const fs_reg &value);
 174    fs_inst *BFI1(const fs_reg &dst, const fs_reg &bits, const fs_reg &offset);
 175    fs_inst *BFI2(const fs_reg &dst, const fs_reg &bfi1_dst,
 176                  const fs_reg &insert, const fs_reg &base);
 177    fs_inst *FBH(const fs_reg &dst, const fs_reg &value);
 178    fs_inst *FBL(const fs_reg &dst, const fs_reg &value);
 179    fs_inst *CBIT(const fs_reg &dst, const fs_reg &value);
 180    fs_inst *MAD(const fs_reg &dst, const fs_reg &c, const fs_reg &b,
 181                 const fs_reg &a);
 182    fs_inst *ADDC(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 183    fs_inst *SUBB(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 184    fs_inst *SEL(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 185
 186    int type_size(const struct glsl_type *type);
 187    fs_inst *get_instruction_generating_reg(fs_inst *start,
 188                                            fs_inst *end,
 189                                            const fs_reg &reg);
 190
 191    fs_inst *LOAD_PAYLOAD(const fs_reg &dst, fs_reg *src, int sources);
 192
 193    exec_list VARYING_PULL_CONSTANT_LOAD(const fs_reg &dst,
 194                                         const fs_reg &surf_index,
 195                                         const fs_reg &varying_offset,
 196                                         uint32_t const_offset);
 197
 198    bool run_fs();
 199    bool run_vs();
 200    bool run_cs();
 201    void optimize();
 202    void allocate_registers();
 203    void assign_binding_table_offsets();
 204    void setup_payload_gen4();
 205    void setup_payload_gen6();
 206    void setup_vs_payload();
 207    void setup_cs_payload();
 208    void fixup_3src_null_dest();
 209    void assign_curb_setup();
 210    void calculate_urb_setup();
 211    void assign_urb_setup();
 212    void assign_vs_urb_setup();
 213    bool assign_regs(bool allow_spilling);
 214    void assign_regs_trivial();
 215    void get_used_mrfs(bool *mrf_used);
 216    void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
 217                                    int first_payload_node);
 218    void setup_mrf_hack_interference(struct ra_graph *g,
 219                                     int first_mrf_hack_node);
 220    int choose_spill_reg(struct ra_graph *g);
 221    void spill_reg(int spill_reg);
 222    void split_virtual_grfs();
 223    bool compact_virtual_grfs();
 224    void move_uniform_array_access_to_pull_constants();
 225    void assign_constant_locations();
 226    void demote_pull_constants();
 227    void invalidate_live_intervals();
 228    void calculate_live_intervals();
 229    void calculate_register_pressure();
 230    bool opt_algebraic();
 231    bool opt_redundant_discard_jumps();
 232    bool opt_cse();
 233    bool opt_cse_local(bblock_t *block);
 234    bool opt_copy_propagate();
 235    bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
 236    bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
 237    bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
 238                                  exec_list *acp);
 239    bool opt_register_renaming();
 240    bool register_coalesce();
 241    bool compute_to_mrf();
 242    bool dead_code_eliminate();
 243    bool remove_duplicate_mrf_writes();
 244
 245    bool opt_sampler_eot();
 246    bool virtual_grf_interferes(int a, int b);
 247    void schedule_instructions(instruction_scheduler_mode mode);
 248    void insert_gen4_send_dependency_workarounds();
 249    void insert_gen4_pre_send_dependency_workarounds(bblock_t *block,
 250                                                     fs_inst *inst);
 251    void insert_gen4_post_send_dependency_workarounds(bblock_t *block,
 252                                                      fs_inst *inst);
 253    void vfail(const char *msg, va_list args);
 254    void fail(const char *msg, ...);
 255    void no16(const char *msg, ...);
 256    void lower_uniform_pull_constant_loads();
 257    bool lower_load_payload();
 258    bool opt_combine_constants();
 259
 260    void emit_dummy_fs();
 261    void emit_repclear_shader();
 262    fs_reg *emit_fragcoord_interpolation(bool pixel_center_integer,
 263                                         bool origin_upper_left);
 264    fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
 265                          glsl_interp_qualifier interpolation_mode,
 266                          bool is_centroid, bool is_sample);
 267    fs_reg *emit_frontfacing_interpolation();
 268    fs_reg *emit_samplepos_setup();
 269    fs_reg *emit_sampleid_setup();
 270    void emit_general_interpolation(fs_reg attr, const char *name,
 271                                    const glsl_type *type,
 272                                    glsl_interp_qualifier interpolation_mode,
 273                                    int location, bool mod_centroid,
 274                                    bool mod_sample);
 275    fs_reg *emit_vs_system_value(int location);
 276    void emit_interpolation_setup_gen4();
 277    void emit_interpolation_setup_gen6();
 278    void compute_sample_position(fs_reg dst, fs_reg int_sample_pos);
 279    fs_reg rescale_texcoord(fs_reg coordinate, int coord_components,
 280                            bool is_rect, uint32_t sampler, int texunit);
 281    fs_inst *emit_texture_gen4(ir_texture_opcode op, fs_reg dst,
 282                               fs_reg coordinate, int coord_components,
 283                               fs_reg shadow_comp,
 284                               fs_reg lod, fs_reg lod2, int grad_components,
 285                               uint32_t sampler);
 286    fs_inst *emit_texture_gen4_simd16(ir_texture_opcode op, fs_reg dst,
 287                                      fs_reg coordinate, int vector_elements,
 288                                      fs_reg shadow_c, fs_reg lod,
 289                                      uint32_t sampler);
 290    fs_inst *emit_texture_gen5(ir_texture_opcode op, fs_reg dst,
 291                               fs_reg coordinate, int coord_components,
 292                               fs_reg shadow_comp,
 293                               fs_reg lod, fs_reg lod2, int grad_components,
 294                               fs_reg sample_index, uint32_t sampler,
 295                               bool has_offset);
 296    fs_inst *emit_texture_gen7(ir_texture_opcode op, fs_reg dst,
 297                               fs_reg coordinate, int coord_components,
 298                               fs_reg shadow_comp,
 299                               fs_reg lod, fs_reg lod2, int grad_components,
 300                               fs_reg sample_index, fs_reg mcs, fs_reg sampler,
 301                               fs_reg offset_value);
 302    void emit_texture(ir_texture_opcode op,
 303                      const glsl_type *dest_type,
 304                      fs_reg coordinate, int components,
 305                      fs_reg shadow_c,
 306                      fs_reg lod, fs_reg dpdy, int grad_components,
 307                      fs_reg sample_index,
 308                      fs_reg offset,
 309                      fs_reg mcs,
 310                      int gather_component,
 311                      bool is_cube_array,
 312                      bool is_rect,
 313                      uint32_t sampler,
 314                      fs_reg sampler_reg,
 315                      int texunit);
 316    fs_reg emit_mcs_fetch(fs_reg coordinate, int components, fs_reg sampler);
 317    void emit_gen6_gather_wa(uint8_t wa, fs_reg dst);
 318    void resolve_source_modifiers(fs_reg *src);
 319    fs_reg fix_math_operand(fs_reg src);
 320    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0);
 321    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0, fs_reg src1);
 322    fs_inst *emit_lrp(const fs_reg &dst, const fs_reg &x, const fs_reg &y,
 323                      const fs_reg &a);
 324    void emit_minmax(enum brw_conditional_mod conditionalmod, const fs_reg &dst,
 325                     const fs_reg &src0, const fs_reg &src1);
 326    void emit_discard_jump();
 327    bool try_emit_b2f_of_comparison(ir_expression *ir);
 328    bool try_emit_saturate(ir_expression *ir);
 329    bool try_emit_line(ir_expression *ir);
 330    bool try_emit_mad(ir_expression *ir);
 331    bool try_replace_with_sel();
 332    bool try_opt_frontfacing_ternary(ir_if *ir);
 333    bool opt_peephole_sel();
 334    bool opt_peephole_predicated_break();
 335    bool opt_saturate_propagation();
 336    bool opt_cmod_propagation();
 337    bool opt_zero_samples();
 338    void emit_bool_to_cond_code(ir_rvalue *condition);
 339    void emit_bool_to_cond_code_of_reg(ir_expression *expr, fs_reg op[3]);
 340    void emit_if_gen6(ir_if *ir);
 341    void emit_unspill(bblock_t *block, fs_inst *inst, fs_reg reg,
 342                      uint32_t spill_offset, int count);
 343    void emit_spill(bblock_t *block, fs_inst *inst, fs_reg reg,
 344                    uint32_t spill_offset, int count);
 345
 346    void emit_fragment_program_code();
 347    void setup_fp_regs();
 348    fs_reg get_fp_src_reg(const prog_src_register *src);
 349    fs_reg get_fp_dst_reg(const prog_dst_register *dst);
 350    void emit_fp_alu1(enum opcode opcode,
 351                      const struct prog_instruction *fpi,
 352                      fs_reg dst, fs_reg src);
 353    void emit_fp_alu2(enum opcode opcode,
 354                      const struct prog_instruction *fpi,
 355                      fs_reg dst, fs_reg src0, fs_reg src1);
 356    void emit_fp_scalar_write(const struct prog_instruction *fpi,
 357                              fs_reg dst, fs_reg src);
 358    void emit_fp_scalar_math(enum opcode opcode,
 359                             const struct prog_instruction *fpi,
 360                             fs_reg dst, fs_reg src);
 361
 362    void emit_fp_minmax(const struct prog_instruction *fpi,
 363                        fs_reg dst, fs_reg src0, fs_reg src1);
 364
 365    void emit_fp_sop(enum brw_conditional_mod conditional_mod,
 366                     const struct prog_instruction *fpi,
 367                     fs_reg dst, fs_reg src0, fs_reg src1, fs_reg one);
 368
 369    void emit_nir_code();
 370    void nir_setup_inputs(nir_shader *shader);
 371    void nir_setup_outputs(nir_shader *shader);
 372    void nir_setup_uniforms(nir_shader *shader);
 373    void nir_setup_uniform(nir_variable *var);
 374    void nir_setup_builtin_uniform(nir_variable *var);
 375    void nir_emit_system_values(nir_shader *shader);
 376    void nir_emit_impl(nir_function_impl *impl);
 377    void nir_emit_cf_list(exec_list *list);
 378    void nir_emit_if(nir_if *if_stmt);
 379    void nir_emit_loop(nir_loop *loop);
 380    void nir_emit_block(nir_block *block);
 381    void nir_emit_instr(nir_instr *instr);
 382    void nir_emit_alu(nir_alu_instr *instr);
 383    void nir_emit_intrinsic(nir_intrinsic_instr *instr);
 384    void nir_emit_texture(nir_tex_instr *instr);
 385    void nir_emit_jump(nir_jump_instr *instr);
 386    fs_reg get_nir_src(nir_src src);
 387    fs_reg get_nir_dest(nir_dest dest);
 388    void emit_percomp(fs_inst *inst, unsigned wr_mask);
 389
 390    bool optimize_frontfacing_ternary(nir_alu_instr *instr,
 391                                      const fs_reg &result);
 392
 393    int setup_color_payload(fs_reg *dst, fs_reg color, unsigned components,
 394                            bool use_2nd_half);
 395    void emit_alpha_test();
 396    fs_inst *emit_single_fb_write(fs_reg color1, fs_reg color2,
 397                                  fs_reg src0_alpha, unsigned components,
 398                                  bool use_2nd_half = false);
 399    void emit_fb_writes();
 400    void emit_urb_writes();
 401    void emit_cs_terminate();
 402
 403    void emit_shader_time_begin();
 404    void emit_shader_time_end();
 405    fs_inst *SHADER_TIME_ADD(enum shader_time_shader_type type, fs_reg value);
 406
 407    void emit_untyped_atomic(unsigned atomic_op, unsigned surf_index,
 408                             fs_reg dst, fs_reg offset, fs_reg src0,
 409                             fs_reg src1);
 410
 411    void emit_untyped_surface_read(unsigned surf_index, fs_reg dst,
 412                                   fs_reg offset);
 413
 414    void emit_interpolate_expression(ir_expression *ir);
 415
 416    bool try_rewrite_rhs_to_dst(ir_assignment *ir,
 417                                fs_reg dst,
 418                                fs_reg src,
 419                                fs_inst *pre_rhs_inst,
 420                                fs_inst *last_rhs_inst);
 421    void emit_assignment_writes(fs_reg &l, fs_reg &r,
 422                                const glsl_type *type, bool predicated);
 423    void resolve_ud_negate(fs_reg *reg);
 424    void resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg);
 425
 426    fs_reg get_timestamp(fs_inst **out_mov);
 427
 428    struct brw_reg interp_reg(int location, int channel);
 429    void setup_uniform_values(ir_variable *ir);
 430    void setup_builtin_uniform_values(ir_variable *ir);
 431    int implied_mrf_writes(fs_inst *inst);
 432
 433    virtual void dump_instructions();
 434    virtual void dump_instructions(const char *name);
 435    void dump_instruction(backend_instruction *inst);
 436    void dump_instruction(backend_instruction *inst, FILE *file);
 437
 438    void visit_atomic_counter_intrinsic(ir_call *ir);
 439
 440    const void *const key;
 441    const struct brw_sampler_prog_key_data *key_tex;
 442
 443    struct brw_stage_prog_data *prog_data;
 444    unsigned int sanity_param_count;
 445
 446    int *param_size;
 447
 448    int *virtual_grf_start;
 449    int *virtual_grf_end;
 450    brw::fs_live_variables *live_intervals;
 451
 452    int *regs_live_at_ip;
 453
 454    /** Number of uniform variable components visited. */
 455    unsigned uniforms;
 456
 457    /** Total number of direct uniforms we can get from NIR */
 458    unsigned num_direct_uniforms;
 459
 460    /** Byte-offset for the next available spot in the scratch space buffer. */
 461    unsigned last_scratch;
 462
 463    /**
 464     * Array mapping UNIFORM register numbers to the pull parameter index,
 465     * or -1 if this uniform register isn't being uploaded as a pull constant.
 466     */
 467    int *pull_constant_loc;
 468
 469    /**
 470     * Array mapping UNIFORM register numbers to the push parameter index,
 471     * or -1 if this uniform register isn't being uploaded as a push constant.
 472     */
 473    int *push_constant_loc;
 474
 475    struct hash_table *variable_ht;
 476    fs_reg frag_depth;
 477    fs_reg sample_mask;
 478    fs_reg outputs[VARYING_SLOT_MAX];
 479    unsigned output_components[VARYING_SLOT_MAX];
 480    fs_reg dual_src_output;
 481    bool do_dual_src;
 482    int first_non_payload_grf;
 483    /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
 484    unsigned max_grf;
 485
 486    fs_reg *fp_temp_regs;
 487    fs_reg *fp_input_regs;
 488
 489    fs_reg *nir_locals;
 490    fs_reg *nir_globals;
 491    fs_reg nir_inputs;
 492    fs_reg nir_outputs;
 493    fs_reg *nir_system_values;
 494
 495    /** @{ debug annotation info */
 496    const char *current_annotation;
 497    const void *base_ir;
 498    /** @} */
 499
 500    bool failed;
 501    char *fail_msg;
 502    bool simd16_unsupported;
 503    char *no16_msg;
 504
 505    /* Result of last visit() method. */
 506    fs_reg result;
 507
 508    /** Register numbers for thread payload fields. */
 509    struct {
 510       uint8_t source_depth_reg;
 511       uint8_t source_w_reg;
 512       uint8_t aa_dest_stencil_reg;
 513       uint8_t dest_depth_reg;
 514       uint8_t sample_pos_reg;
 515       uint8_t sample_mask_in_reg;
 516       uint8_t barycentric_coord_reg[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 517
 518       /** The number of thread payload registers the hardware will supply. */
 519       uint8_t num_regs;
 520    } payload;
 521
 522    bool source_depth_to_render_target;
 523    bool runtime_check_aads_emit;
 524
 525    fs_reg pixel_x;
 526    fs_reg pixel_y;
 527    fs_reg wpos_w;
 528    fs_reg pixel_w;
 529    fs_reg delta_xy[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 530    fs_reg shader_start_time;
 531    fs_reg userplane[MAX_CLIP_PLANES];
 532
 533    unsigned grf_used;
 534    bool spilled_any_registers;
 535
 536    const unsigned dispatch_width; /**< 8 or 16 */
 537
 538    unsigned promoted_constants;
 539 };
 540
 541 /**
 542  * The fragment shader code generator.
 543  *
 544  * Translates FS IR to actual i965 assembly code.
 545  */
 546 class fs_generator
 547 {
 548 public:
 549    fs_generator(struct brw_context *brw,
 550                 void *mem_ctx,
 551                 const void *key,
 552                 struct brw_stage_prog_data *prog_data,
 553                 struct gl_program *fp,
 554                 unsigned promoted_constants,
 555                 bool runtime_check_aads_emit,
 556                 const char *stage_abbrev);
 557    ~fs_generator();
 558
 559    void enable_debug(const char *shader_name);
 560    int generate_code(const cfg_t *cfg, int dispatch_width);
 561    const unsigned *get_assembly(unsigned int *assembly_size);
 562
 563 private:
 564    void fire_fb_write(fs_inst *inst,
 565                       struct brw_reg payload,
 566                       struct brw_reg implied_header,
 567                       GLuint nr);
 568    void generate_fb_write(fs_inst *inst, struct brw_reg payload);
 569    void generate_urb_write(fs_inst *inst, struct brw_reg payload);
 570    void generate_cs_terminate(fs_inst *inst, struct brw_reg payload);
 571    void generate_blorp_fb_write(fs_inst *inst);
 572    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 573                          struct brw_reg *src);
 574    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 575                      struct brw_reg sampler_index);
 576    void generate_math_gen6(fs_inst *inst,
 577                            struct brw_reg dst,
 578                            struct brw_reg src0,
 579                            struct brw_reg src1);
 580    void generate_math_gen4(fs_inst *inst,
 581                            struct brw_reg dst,
 582                            struct brw_reg src);
 583    void generate_math_g45(fs_inst *inst,
 584                           struct brw_reg dst,
 585                           struct brw_reg src);
 586    void generate_ddx(enum opcode op, struct brw_reg dst, struct brw_reg src);
 587    void generate_ddy(enum opcode op, struct brw_reg dst, struct brw_reg src,
 588                      bool negate_value);
 589    void generate_scratch_write(fs_inst *inst, struct brw_reg src);
 590    void generate_scratch_read(fs_inst *inst, struct brw_reg dst);
 591    void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst);
 592    void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 593                                             struct brw_reg index,
 594                                             struct brw_reg offset);
 595    void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
 596                                                  struct brw_reg dst,
 597                                                  struct brw_reg surf_index,
 598                                                  struct brw_reg offset);
 599    void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 600                                             struct brw_reg index,
 601                                             struct brw_reg offset);
 602    void generate_varying_pull_constant_load_gen7(fs_inst *inst,
 603                                                  struct brw_reg dst,
 604                                                  struct brw_reg index,
 605                                                  struct brw_reg offset);
 606    void generate_mov_dispatch_to_flags(fs_inst *inst);
 607
 608    void generate_pixel_interpolator_query(fs_inst *inst,
 609                                           struct brw_reg dst,
 610                                           struct brw_reg src,
 611                                           struct brw_reg msg_data,
 612                                           unsigned msg_type);
 613
 614    void generate_set_omask(fs_inst *inst,
 615                            struct brw_reg dst,
 616                            struct brw_reg sample_mask);
 617
 618    void generate_set_sample_id(fs_inst *inst,
 619                                struct brw_reg dst,
 620                                struct brw_reg src0,
 621                                struct brw_reg src1);
 622
 623    void generate_set_simd4x2_offset(fs_inst *inst,
 624                                     struct brw_reg dst,
 625                                     struct brw_reg offset);
 626    void generate_discard_jump(fs_inst *inst);
 627
 628    void generate_pack_half_2x16_split(fs_inst *inst,
 629                                       struct brw_reg dst,
 630                                       struct brw_reg x,
 631                                       struct brw_reg y);
 632    void generate_unpack_half_2x16_split(fs_inst *inst,
 633                                         struct brw_reg dst,
 634                                         struct brw_reg src);
 635
 636    void generate_shader_time_add(fs_inst *inst,
 637                                  struct brw_reg payload,
 638                                  struct brw_reg offset,
 639                                  struct brw_reg value);
 640
 641    void generate_untyped_atomic(fs_inst *inst,
 642                                 struct brw_reg dst,
 643                                 struct brw_reg payload,
 644                                 struct brw_reg atomic_op,
 645                                 struct brw_reg surf_index);
 646
 647    void generate_untyped_surface_read(fs_inst *inst,
 648                                       struct brw_reg dst,
 649                                       struct brw_reg payload,
 650                                       struct brw_reg surf_index);
 651
 652    bool patch_discard_jumps_to_fb_writes();
 653
 654    struct brw_context *brw;
 655    const struct brw_device_info *devinfo;
 656
 657    struct brw_codegen *p;
 658    const void * const key;
 659    struct brw_stage_prog_data * const prog_data;
 660
 661    const struct gl_program *prog;
 662
 663    unsigned dispatch_width; /**< 8 or 16 */
 664
 665    exec_list discard_halt_patches;
 666    unsigned promoted_constants;
 667    bool runtime_check_aads_emit;
 668    bool debug_flag;
 669    const char *shader_name;
 670    const char *stage_abbrev;
 671    void *mem_ctx;
 672 };
 673
 674 bool brw_do_channel_expressions(struct exec_list *instructions);
 675 bool brw_do_vector_splitting(struct exec_list *instructions);
 676 void brw_setup_tex_for_precompile(struct brw_context *brw,
 677                                   struct brw_sampler_prog_key_data *tex,
 678                                   struct gl_program *prog);