i965: Switch fs_inst to the non-zeroing allocator.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_fs.h
1 /*
2 * Copyright © 2010 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28 #pragma once
29
30 #include "brw_shader.h"
31
32 extern "C" {
33
34 #include <sys/types.h>
35
36 #include "main/macros.h"
37 #include "main/shaderobj.h"
38 #include "main/uniforms.h"
39 #include "program/prog_parameter.h"
40 #include "program/prog_print.h"
41 #include "program/prog_optimize.h"
42 #include "program/register_allocate.h"
43 #include "program/sampler.h"
44 #include "program/hash_table.h"
45 #include "brw_context.h"
46 #include "brw_eu.h"
47 #include "brw_wm.h"
48 #include "brw_shader.h"
49 }
50 #include "glsl/glsl_types.h"
51 #include "glsl/ir.h"
52
53 class bblock_t;
54 namespace {
55 struct acp_entry;
56 }
57
58 class fs_reg {
59 public:
60 DECLARE_RALLOC_CXX_OPERATORS(fs_reg)
61
62 void init();
63
64 fs_reg();
65 fs_reg(float f);
66 fs_reg(int32_t i);
67 fs_reg(uint32_t u);
68 fs_reg(struct brw_reg fixed_hw_reg);
69 fs_reg(enum register_file file, int reg);
70 fs_reg(enum register_file file, int reg, uint32_t type);
71 fs_reg(class fs_visitor *v, const struct glsl_type *type);
72
73 bool equals(const fs_reg &r) const;
74 bool is_zero() const;
75 bool is_one() const;
76 bool is_valid_3src() const;
77
78 /** Register file: ARF, GRF, MRF, IMM. */
79 enum register_file file;
80 /**
81 * Register number. For ARF/MRF, it's the hardware register. For
82 * GRF, it's a virtual register number until register allocation
83 */
84 int reg;
85 /**
86 * For virtual registers, this is a hardware register offset from
87 * the start of the register block (for example, a constant index
88 * in an array access).
89 */
90 int reg_offset;
91 /** Register type. BRW_REGISTER_TYPE_* */
92 int type;
93 bool negate;
94 bool abs;
95 bool sechalf;
96 struct brw_reg fixed_hw_reg;
97 int smear; /* -1, or a channel of the reg to smear to all channels. */
98
99 /** Value for file == IMM */
100 union {
101 int32_t i;
102 uint32_t u;
103 float f;
104 } imm;
105
106 fs_reg *reladdr;
107 };
108
109 static const fs_reg reg_undef;
110 static const fs_reg reg_null_f(ARF, BRW_ARF_NULL, BRW_REGISTER_TYPE_F);
111 static const fs_reg reg_null_d(ARF, BRW_ARF_NULL, BRW_REGISTER_TYPE_D);
112
113 class ip_record : public exec_node {
114 public:
115 DECLARE_RALLOC_CXX_OPERATORS(ip_record)
116
117 ip_record(int ip)
118 {
119 this->ip = ip;
120 }
121
122 int ip;
123 };
124
125 class fs_inst : public backend_instruction {
126 public:
127 DECLARE_RALLOC_CXX_OPERATORS(fs_inst)
128
129 void init();
130
131 fs_inst();
132 fs_inst(enum opcode opcode);
133 fs_inst(enum opcode opcode, fs_reg dst);
134 fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0);
135 fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
136 fs_inst(enum opcode opcode, fs_reg dst,
137 fs_reg src0, fs_reg src1,fs_reg src2);
138
139 bool equals(fs_inst *inst);
140 bool overwrites_reg(const fs_reg &reg);
141 bool is_send_from_grf();
142 bool is_partial_write();
143
144 fs_reg dst;
145 fs_reg src[3];
146 bool saturate;
147 int conditional_mod; /**< BRW_CONDITIONAL_* */
148
149 /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional
150 * mod and predication.
151 */
152 uint8_t flag_subreg;
153
154 int mlen; /**< SEND message length */
155 int regs_written; /**< Number of vgrfs written by a SEND message, or 1 */
156 int base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
157 uint32_t texture_offset; /**< Texture offset bitfield */
158 int sampler;
159 int target; /**< MRT target. */
160 bool eot;
161 bool header_present;
162 bool shadow_compare;
163 bool force_uncompressed;
164 bool force_sechalf;
165 bool force_writemask_all;
166 uint32_t offset; /* spill/unspill offset */
167
168 /** @{
169 * Annotation for the generated IR. One of the two can be set.
170 */
171 const void *ir;
172 const char *annotation;
173 /** @} */
174 };
175
176 /**
177 * The fragment shader front-end.
178 *
179 * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
180 */
181 class fs_visitor : public backend_visitor
182 {
183 public:
184
185 fs_visitor(struct brw_context *brw,
186 struct brw_wm_compile *c,
187 struct gl_shader_program *shader_prog,
188 struct gl_fragment_program *fp,
189 unsigned dispatch_width);
190 ~fs_visitor();
191
192 fs_reg *variable_storage(ir_variable *var);
193 int virtual_grf_alloc(int size);
194 void import_uniforms(fs_visitor *v);
195
196 void visit(ir_variable *ir);
197 void visit(ir_assignment *ir);
198 void visit(ir_dereference_variable *ir);
199 void visit(ir_dereference_record *ir);
200 void visit(ir_dereference_array *ir);
201 void visit(ir_expression *ir);
202 void visit(ir_texture *ir);
203 void visit(ir_if *ir);
204 void visit(ir_constant *ir);
205 void visit(ir_swizzle *ir);
206 void visit(ir_return *ir);
207 void visit(ir_loop *ir);
208 void visit(ir_loop_jump *ir);
209 void visit(ir_discard *ir);
210 void visit(ir_call *ir);
211 void visit(ir_function *ir);
212 void visit(ir_function_signature *ir);
213 void visit(ir_emit_vertex *);
214 void visit(ir_end_primitive *);
215
216 void swizzle_result(ir_texture *ir, fs_reg orig_val, int sampler);
217
218 bool can_do_source_mods(fs_inst *inst);
219
220 fs_inst *emit(fs_inst inst);
221 fs_inst *emit(fs_inst *inst);
222 void emit(exec_list list);
223
224 fs_inst *emit(enum opcode opcode);
225 fs_inst *emit(enum opcode opcode, fs_reg dst);
226 fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0);
227 fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
228 fs_inst *emit(enum opcode opcode, fs_reg dst,
229 fs_reg src0, fs_reg src1, fs_reg src2);
230
231 fs_inst *MOV(fs_reg dst, fs_reg src);
232 fs_inst *NOT(fs_reg dst, fs_reg src);
233 fs_inst *RNDD(fs_reg dst, fs_reg src);
234 fs_inst *RNDE(fs_reg dst, fs_reg src);
235 fs_inst *RNDZ(fs_reg dst, fs_reg src);
236 fs_inst *FRC(fs_reg dst, fs_reg src);
237 fs_inst *ADD(fs_reg dst, fs_reg src0, fs_reg src1);
238 fs_inst *MUL(fs_reg dst, fs_reg src0, fs_reg src1);
239 fs_inst *MACH(fs_reg dst, fs_reg src0, fs_reg src1);
240 fs_inst *MAC(fs_reg dst, fs_reg src0, fs_reg src1);
241 fs_inst *SHL(fs_reg dst, fs_reg src0, fs_reg src1);
242 fs_inst *SHR(fs_reg dst, fs_reg src0, fs_reg src1);
243 fs_inst *ASR(fs_reg dst, fs_reg src0, fs_reg src1);
244 fs_inst *AND(fs_reg dst, fs_reg src0, fs_reg src1);
245 fs_inst *OR(fs_reg dst, fs_reg src0, fs_reg src1);
246 fs_inst *XOR(fs_reg dst, fs_reg src0, fs_reg src1);
247 fs_inst *IF(uint32_t predicate);
248 fs_inst *IF(fs_reg src0, fs_reg src1, uint32_t condition);
249 fs_inst *CMP(fs_reg dst, fs_reg src0, fs_reg src1,
250 uint32_t condition);
251 fs_inst *LRP(fs_reg dst, fs_reg a, fs_reg y, fs_reg x);
252 fs_inst *DEP_RESOLVE_MOV(int grf);
253 fs_inst *BFREV(fs_reg dst, fs_reg value);
254 fs_inst *BFE(fs_reg dst, fs_reg bits, fs_reg offset, fs_reg value);
255 fs_inst *BFI1(fs_reg dst, fs_reg bits, fs_reg offset);
256 fs_inst *BFI2(fs_reg dst, fs_reg bfi1_dst, fs_reg insert, fs_reg base);
257 fs_inst *FBH(fs_reg dst, fs_reg value);
258 fs_inst *FBL(fs_reg dst, fs_reg value);
259 fs_inst *CBIT(fs_reg dst, fs_reg value);
260 fs_inst *MAD(fs_reg dst, fs_reg c, fs_reg b, fs_reg a);
261
262 int type_size(const struct glsl_type *type);
263 fs_inst *get_instruction_generating_reg(fs_inst *start,
264 fs_inst *end,
265 fs_reg reg);
266
267 exec_list VARYING_PULL_CONSTANT_LOAD(fs_reg dst, fs_reg surf_index,
268 fs_reg varying_offset,
269 uint32_t const_offset);
270
271 bool run();
272 void setup_payload_gen4();
273 void setup_payload_gen6();
274 void assign_curb_setup();
275 void calculate_urb_setup();
276 void assign_urb_setup();
277 bool assign_regs();
278 void assign_regs_trivial();
279 void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
280 int first_payload_node);
281 void setup_mrf_hack_interference(struct ra_graph *g,
282 int first_mrf_hack_node);
283 int choose_spill_reg(struct ra_graph *g);
284 void spill_reg(int spill_reg);
285 void split_virtual_grfs();
286 void compact_virtual_grfs();
287 void move_uniform_array_access_to_pull_constants();
288 void setup_pull_constants();
289 void calculate_live_intervals();
290 bool opt_algebraic();
291 bool opt_cse();
292 bool opt_cse_local(bblock_t *block, exec_list *aeb);
293 bool opt_copy_propagate();
294 bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
295 bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
296 bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
297 exec_list *acp);
298 bool register_coalesce();
299 bool register_coalesce_2();
300 bool compute_to_mrf();
301 bool dead_code_eliminate();
302 bool dead_code_eliminate_local();
303 bool remove_dead_constants();
304 bool remove_duplicate_mrf_writes();
305 bool virtual_grf_interferes(int a, int b);
306 void schedule_instructions(bool post_reg_alloc);
307 void insert_gen4_send_dependency_workarounds();
308 void insert_gen4_pre_send_dependency_workarounds(fs_inst *inst);
309 void insert_gen4_post_send_dependency_workarounds(fs_inst *inst);
310 void fail(const char *msg, ...);
311 void lower_uniform_pull_constant_loads();
312
313 void push_force_uncompressed();
314 void pop_force_uncompressed();
315 void push_force_sechalf();
316 void pop_force_sechalf();
317
318 void emit_dummy_fs();
319 fs_reg *emit_fragcoord_interpolation(ir_variable *ir);
320 fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
321 glsl_interp_qualifier interpolation_mode,
322 bool is_centroid);
323 fs_reg *emit_frontfacing_interpolation(ir_variable *ir);
324 fs_reg *emit_general_interpolation(ir_variable *ir);
325 void emit_interpolation_setup_gen4();
326 void emit_interpolation_setup_gen6();
327 fs_reg rescale_texcoord(ir_texture *ir, fs_reg coordinate,
328 bool is_rect, int sampler, int texunit);
329 fs_inst *emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
330 fs_reg shadow_comp, fs_reg lod, fs_reg lod2);
331 fs_inst *emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate,
332 fs_reg shadow_comp, fs_reg lod, fs_reg lod2,
333 fs_reg sample_index);
334 fs_inst *emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate,
335 fs_reg shadow_comp, fs_reg lod, fs_reg lod2,
336 fs_reg sample_index);
337 fs_reg fix_math_operand(fs_reg src);
338 fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0);
339 fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0, fs_reg src1);
340 void emit_lrp(fs_reg dst, fs_reg x, fs_reg y, fs_reg a);
341 void emit_minmax(uint32_t conditionalmod, fs_reg dst,
342 fs_reg src0, fs_reg src1);
343 bool try_emit_saturate(ir_expression *ir);
344 bool try_emit_mad(ir_expression *ir, int mul_arg);
345 void try_replace_with_sel();
346 void emit_bool_to_cond_code(ir_rvalue *condition);
347 void emit_if_gen6(ir_if *ir);
348 void emit_unspill(fs_inst *inst, fs_reg reg, uint32_t spill_offset);
349
350 void emit_fragment_program_code();
351 void setup_fp_regs();
352 fs_reg get_fp_src_reg(const prog_src_register *src);
353 fs_reg get_fp_dst_reg(const prog_dst_register *dst);
354 void emit_fp_alu1(enum opcode opcode,
355 const struct prog_instruction *fpi,
356 fs_reg dst, fs_reg src);
357 void emit_fp_alu2(enum opcode opcode,
358 const struct prog_instruction *fpi,
359 fs_reg dst, fs_reg src0, fs_reg src1);
360 void emit_fp_scalar_write(const struct prog_instruction *fpi,
361 fs_reg dst, fs_reg src);
362 void emit_fp_scalar_math(enum opcode opcode,
363 const struct prog_instruction *fpi,
364 fs_reg dst, fs_reg src);
365
366 void emit_fp_minmax(const struct prog_instruction *fpi,
367 fs_reg dst, fs_reg src0, fs_reg src1);
368
369 void emit_fp_sop(uint32_t conditional_mod,
370 const struct prog_instruction *fpi,
371 fs_reg dst, fs_reg src0, fs_reg src1, fs_reg one);
372
373 void emit_color_write(int target, int index, int first_color_mrf);
374 void emit_fb_writes();
375
376 void emit_shader_time_begin();
377 void emit_shader_time_end();
378 void emit_shader_time_write(enum shader_time_shader_type type,
379 fs_reg value);
380
381 bool try_rewrite_rhs_to_dst(ir_assignment *ir,
382 fs_reg dst,
383 fs_reg src,
384 fs_inst *pre_rhs_inst,
385 fs_inst *last_rhs_inst);
386 void emit_assignment_writes(fs_reg &l, fs_reg &r,
387 const glsl_type *type, bool predicated);
388 void resolve_ud_negate(fs_reg *reg);
389 void resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg);
390
391 fs_reg get_timestamp();
392
393 struct brw_reg interp_reg(int location, int channel);
394 void setup_uniform_values(ir_variable *ir);
395 void setup_builtin_uniform_values(ir_variable *ir);
396 int implied_mrf_writes(fs_inst *inst);
397
398 void dump_instruction(backend_instruction *inst);
399
400 struct gl_fragment_program *fp;
401 struct brw_wm_compile *c;
402 unsigned int sanity_param_count;
403
404 int param_size[MAX_UNIFORMS * 4];
405
406 int *virtual_grf_sizes;
407 int virtual_grf_count;
408 int virtual_grf_array_size;
409 int *virtual_grf_start;
410 int *virtual_grf_end;
411 bool live_intervals_valid;
412
413 /* This is the map from UNIFORM hw_reg + reg_offset as generated by
414 * the visitor to the packed uniform number after
415 * remove_dead_constants() that represents the actual uploaded
416 * uniform index.
417 */
418 int *params_remap;
419 int nr_params_remap;
420
421 struct hash_table *variable_ht;
422 fs_reg frag_depth;
423 fs_reg outputs[BRW_MAX_DRAW_BUFFERS];
424 unsigned output_components[BRW_MAX_DRAW_BUFFERS];
425 fs_reg dual_src_output;
426 int first_non_payload_grf;
427 /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
428 int max_grf;
429
430 fs_reg *fp_temp_regs;
431 fs_reg *fp_input_regs;
432
433 /** @{ debug annotation info */
434 const char *current_annotation;
435 const void *base_ir;
436 /** @} */
437
438 bool failed;
439 char *fail_msg;
440
441 /* Result of last visit() method. */
442 fs_reg result;
443
444 fs_reg pixel_x;
445 fs_reg pixel_y;
446 fs_reg wpos_w;
447 fs_reg pixel_w;
448 fs_reg delta_x[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
449 fs_reg delta_y[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
450 fs_reg shader_start_time;
451
452 int grf_used;
453
454 const unsigned dispatch_width; /**< 8 or 16 */
455
456 int force_uncompressed_stack;
457 int force_sechalf_stack;
458 };
459
460 /**
461 * The fragment shader code generator.
462 *
463 * Translates FS IR to actual i965 assembly code.
464 */
465 class fs_generator
466 {
467 public:
468 fs_generator(struct brw_context *brw,
469 struct brw_wm_compile *c,
470 struct gl_shader_program *prog,
471 struct gl_fragment_program *fp,
472 bool dual_source_output);
473 ~fs_generator();
474
475 const unsigned *generate_assembly(exec_list *simd8_instructions,
476 exec_list *simd16_instructions,
477 unsigned *assembly_size);
478
479 private:
480 void generate_code(exec_list *instructions);
481 void generate_fb_write(fs_inst *inst);
482 void generate_pixel_xy(struct brw_reg dst, bool is_x);
483 void generate_linterp(fs_inst *inst, struct brw_reg dst,
484 struct brw_reg *src);
485 void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
486 void generate_math1_gen7(fs_inst *inst,
487 struct brw_reg dst,
488 struct brw_reg src);
489 void generate_math2_gen7(fs_inst *inst,
490 struct brw_reg dst,
491 struct brw_reg src0,
492 struct brw_reg src1);
493 void generate_math1_gen6(fs_inst *inst,
494 struct brw_reg dst,
495 struct brw_reg src);
496 void generate_math2_gen6(fs_inst *inst,
497 struct brw_reg dst,
498 struct brw_reg src0,
499 struct brw_reg src1);
500 void generate_math_gen4(fs_inst *inst,
501 struct brw_reg dst,
502 struct brw_reg src);
503 void generate_math_g45(fs_inst *inst,
504 struct brw_reg dst,
505 struct brw_reg src);
506 void generate_ddx(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
507 void generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
508 bool negate_value);
509 void generate_spill(fs_inst *inst, struct brw_reg src);
510 void generate_unspill(fs_inst *inst, struct brw_reg dst);
511 void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
512 struct brw_reg index,
513 struct brw_reg offset);
514 void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
515 struct brw_reg dst,
516 struct brw_reg surf_index,
517 struct brw_reg offset);
518 void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst,
519 struct brw_reg index,
520 struct brw_reg offset);
521 void generate_varying_pull_constant_load_gen7(fs_inst *inst,
522 struct brw_reg dst,
523 struct brw_reg index,
524 struct brw_reg offset);
525 void generate_mov_dispatch_to_flags(fs_inst *inst);
526 void generate_set_simd4x2_offset(fs_inst *inst,
527 struct brw_reg dst,
528 struct brw_reg offset);
529 void generate_discard_jump(fs_inst *inst);
530
531 void generate_pack_half_2x16_split(fs_inst *inst,
532 struct brw_reg dst,
533 struct brw_reg x,
534 struct brw_reg y);
535 void generate_unpack_half_2x16_split(fs_inst *inst,
536 struct brw_reg dst,
537 struct brw_reg src);
538
539 void generate_shader_time_add(fs_inst *inst,
540 struct brw_reg payload,
541 struct brw_reg offset,
542 struct brw_reg value);
543
544 void mark_surface_used(unsigned surf_index);
545
546 void patch_discard_jumps_to_fb_writes();
547
548 struct brw_context *brw;
549 struct gl_context *ctx;
550
551 struct brw_compile *p;
552 struct brw_wm_compile *c;
553
554 struct gl_shader_program *prog;
555 struct gl_shader *shader;
556 const struct gl_fragment_program *fp;
557
558 unsigned dispatch_width; /**< 8 or 16 */
559
560 exec_list discard_halt_patches;
561 bool dual_source_output;
562 void *mem_ctx;
563 };
564
565 bool brw_do_channel_expressions(struct exec_list *instructions);
566 bool brw_do_vector_splitting(struct exec_list *instructions);
567 bool brw_fs_precompile(struct gl_context *ctx, struct gl_shader_program *prog);