2 * Copyright © 2010 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
30 #include "brw_shader.h"
31 #include "brw_ir_fs.h"
35 #include <sys/types.h>
37 #include "main/macros.h"
38 #include "main/shaderobj.h"
39 #include "main/uniforms.h"
40 #include "program/prog_parameter.h"
41 #include "program/prog_print.h"
42 #include "program/prog_optimize.h"
43 #include "util/register_allocate.h"
44 #include "program/hash_table.h"
45 #include "brw_context.h"
48 #include "intel_asm_annotation.h"
50 #include "glsl/glsl_types.h"
52 #include "glsl/nir/nir.h"
53 #include "program/sampler.h"
61 class fs_live_variables
;
65 * The fragment shader front-end.
67 * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
69 class fs_visitor
: public backend_visitor
72 const fs_reg reg_null_f
;
73 const fs_reg reg_null_d
;
74 const fs_reg reg_null_ud
;
76 fs_visitor(struct brw_context
*brw
,
78 const struct brw_wm_prog_key
*key
,
79 struct brw_wm_prog_data
*prog_data
,
80 struct gl_shader_program
*shader_prog
,
81 struct gl_fragment_program
*fp
,
82 unsigned dispatch_width
);
84 fs_visitor(struct brw_context
*brw
,
86 const struct brw_vs_prog_key
*key
,
87 struct brw_vs_prog_data
*prog_data
,
88 struct gl_shader_program
*shader_prog
,
89 struct gl_vertex_program
*cp
,
90 unsigned dispatch_width
);
95 fs_reg
*variable_storage(ir_variable
*var
);
96 fs_reg
vgrf(const glsl_type
*const type
);
97 fs_reg
vgrf(int num_components
);
98 void import_uniforms(fs_visitor
*v
);
99 void setup_uniform_clipplane_values();
100 void compute_clip_distance();
102 void visit(ir_variable
*ir
);
103 void visit(ir_assignment
*ir
);
104 void visit(ir_dereference_variable
*ir
);
105 void visit(ir_dereference_record
*ir
);
106 void visit(ir_dereference_array
*ir
);
107 void visit(ir_expression
*ir
);
108 void visit(ir_texture
*ir
);
109 void visit(ir_if
*ir
);
110 void visit(ir_constant
*ir
);
111 void visit(ir_swizzle
*ir
);
112 void visit(ir_return
*ir
);
113 void visit(ir_loop
*ir
);
114 void visit(ir_loop_jump
*ir
);
115 void visit(ir_discard
*ir
);
116 void visit(ir_call
*ir
);
117 void visit(ir_function
*ir
);
118 void visit(ir_function_signature
*ir
);
119 void visit(ir_emit_vertex
*);
120 void visit(ir_end_primitive
*);
122 uint32_t gather_channel(int orig_chan
, uint32_t sampler
);
123 void swizzle_result(ir_texture_opcode op
, int dest_components
,
124 fs_reg orig_val
, uint32_t sampler
);
126 fs_inst
*emit(fs_inst
*inst
);
127 void emit(exec_list list
);
129 fs_inst
*emit(enum opcode opcode
);
130 fs_inst
*emit(enum opcode opcode
, const fs_reg
&dst
);
131 fs_inst
*emit(enum opcode opcode
, const fs_reg
&dst
, const fs_reg
&src0
);
132 fs_inst
*emit(enum opcode opcode
, const fs_reg
&dst
, const fs_reg
&src0
,
134 fs_inst
*emit(enum opcode opcode
, const fs_reg
&dst
,
135 const fs_reg
&src0
, const fs_reg
&src1
, const fs_reg
&src2
);
136 fs_inst
*emit(enum opcode opcode
, const fs_reg
&dst
,
137 fs_reg src
[], int sources
);
139 fs_inst
*MOV(const fs_reg
&dst
, const fs_reg
&src
);
140 fs_inst
*NOT(const fs_reg
&dst
, const fs_reg
&src
);
141 fs_inst
*RNDD(const fs_reg
&dst
, const fs_reg
&src
);
142 fs_inst
*RNDE(const fs_reg
&dst
, const fs_reg
&src
);
143 fs_inst
*RNDZ(const fs_reg
&dst
, const fs_reg
&src
);
144 fs_inst
*FRC(const fs_reg
&dst
, const fs_reg
&src
);
145 fs_inst
*ADD(const fs_reg
&dst
, const fs_reg
&src0
, const fs_reg
&src1
);
146 fs_inst
*MUL(const fs_reg
&dst
, const fs_reg
&src0
, const fs_reg
&src1
);
147 fs_inst
*MACH(const fs_reg
&dst
, const fs_reg
&src0
, const fs_reg
&src1
);
148 fs_inst
*MAC(const fs_reg
&dst
, const fs_reg
&src0
, const fs_reg
&src1
);
149 fs_inst
*SHL(const fs_reg
&dst
, const fs_reg
&src0
, const fs_reg
&src1
);
150 fs_inst
*SHR(const fs_reg
&dst
, const fs_reg
&src0
, const fs_reg
&src1
);
151 fs_inst
*ASR(const fs_reg
&dst
, const fs_reg
&src0
, const fs_reg
&src1
);
152 fs_inst
*AND(const fs_reg
&dst
, const fs_reg
&src0
, const fs_reg
&src1
);
153 fs_inst
*OR(const fs_reg
&dst
, const fs_reg
&src0
, const fs_reg
&src1
);
154 fs_inst
*XOR(const fs_reg
&dst
, const fs_reg
&src0
, const fs_reg
&src1
);
155 fs_inst
*IF(enum brw_predicate predicate
);
156 fs_inst
*IF(const fs_reg
&src0
, const fs_reg
&src1
,
157 enum brw_conditional_mod condition
);
158 fs_inst
*CMP(fs_reg dst
, fs_reg src0
, fs_reg src1
,
159 enum brw_conditional_mod condition
);
160 fs_inst
*LRP(const fs_reg
&dst
, const fs_reg
&a
, const fs_reg
&y
,
162 fs_inst
*DEP_RESOLVE_MOV(int grf
);
163 fs_inst
*BFREV(const fs_reg
&dst
, const fs_reg
&value
);
164 fs_inst
*BFE(const fs_reg
&dst
, const fs_reg
&bits
, const fs_reg
&offset
,
165 const fs_reg
&value
);
166 fs_inst
*BFI1(const fs_reg
&dst
, const fs_reg
&bits
, const fs_reg
&offset
);
167 fs_inst
*BFI2(const fs_reg
&dst
, const fs_reg
&bfi1_dst
,
168 const fs_reg
&insert
, const fs_reg
&base
);
169 fs_inst
*FBH(const fs_reg
&dst
, const fs_reg
&value
);
170 fs_inst
*FBL(const fs_reg
&dst
, const fs_reg
&value
);
171 fs_inst
*CBIT(const fs_reg
&dst
, const fs_reg
&value
);
172 fs_inst
*MAD(const fs_reg
&dst
, const fs_reg
&c
, const fs_reg
&b
,
174 fs_inst
*ADDC(const fs_reg
&dst
, const fs_reg
&src0
, const fs_reg
&src1
);
175 fs_inst
*SUBB(const fs_reg
&dst
, const fs_reg
&src0
, const fs_reg
&src1
);
176 fs_inst
*SEL(const fs_reg
&dst
, const fs_reg
&src0
, const fs_reg
&src1
);
178 int type_size(const struct glsl_type
*type
);
179 fs_inst
*get_instruction_generating_reg(fs_inst
*start
,
183 fs_inst
*LOAD_PAYLOAD(const fs_reg
&dst
, fs_reg
*src
, int sources
);
185 exec_list
VARYING_PULL_CONSTANT_LOAD(const fs_reg
&dst
,
186 const fs_reg
&surf_index
,
187 const fs_reg
&varying_offset
,
188 uint32_t const_offset
);
193 void allocate_registers();
194 void assign_binding_table_offsets();
195 void setup_payload_gen4();
196 void setup_payload_gen6();
197 void setup_vs_payload();
198 void fixup_3src_null_dest();
199 void assign_curb_setup();
200 void calculate_urb_setup();
201 void assign_urb_setup();
202 void assign_vs_urb_setup();
203 bool assign_regs(bool allow_spilling
);
204 void assign_regs_trivial();
205 void get_used_mrfs(bool *mrf_used
);
206 void setup_payload_interference(struct ra_graph
*g
, int payload_reg_count
,
207 int first_payload_node
);
208 void setup_mrf_hack_interference(struct ra_graph
*g
,
209 int first_mrf_hack_node
);
210 int choose_spill_reg(struct ra_graph
*g
);
211 void spill_reg(int spill_reg
);
212 void split_virtual_grfs();
213 bool compact_virtual_grfs();
214 void move_uniform_array_access_to_pull_constants();
215 void assign_constant_locations();
216 void demote_pull_constants();
217 void invalidate_live_intervals();
218 void calculate_live_intervals();
219 void calculate_register_pressure();
220 bool opt_algebraic();
222 bool opt_cse_local(bblock_t
*block
);
223 bool opt_copy_propagate();
224 bool try_copy_propagate(fs_inst
*inst
, int arg
, acp_entry
*entry
);
225 bool try_constant_propagate(fs_inst
*inst
, acp_entry
*entry
);
226 bool opt_copy_propagate_local(void *mem_ctx
, bblock_t
*block
,
228 bool opt_register_renaming();
229 bool register_coalesce();
230 bool compute_to_mrf();
231 bool dead_code_eliminate();
232 bool remove_duplicate_mrf_writes();
233 bool virtual_grf_interferes(int a
, int b
);
234 void schedule_instructions(instruction_scheduler_mode mode
);
235 void insert_gen4_send_dependency_workarounds();
236 void insert_gen4_pre_send_dependency_workarounds(bblock_t
*block
,
238 void insert_gen4_post_send_dependency_workarounds(bblock_t
*block
,
240 void vfail(const char *msg
, va_list args
);
241 void fail(const char *msg
, ...);
242 void no16(const char *msg
, ...);
243 void lower_uniform_pull_constant_loads();
244 bool lower_load_payload();
245 bool opt_combine_constants();
247 void emit_dummy_fs();
248 void emit_repclear_shader();
249 fs_reg
*emit_fragcoord_interpolation(bool pixel_center_integer
,
250 bool origin_upper_left
);
251 fs_inst
*emit_linterp(const fs_reg
&attr
, const fs_reg
&interp
,
252 glsl_interp_qualifier interpolation_mode
,
253 bool is_centroid
, bool is_sample
);
254 fs_reg
*emit_frontfacing_interpolation();
255 fs_reg
*emit_samplepos_setup();
256 fs_reg
*emit_sampleid_setup();
257 void emit_general_interpolation(fs_reg attr
, const char *name
,
258 const glsl_type
*type
,
259 glsl_interp_qualifier interpolation_mode
,
260 int location
, bool mod_centroid
,
262 fs_reg
*emit_vs_system_value(int location
);
263 void emit_interpolation_setup_gen4();
264 void emit_interpolation_setup_gen6();
265 void compute_sample_position(fs_reg dst
, fs_reg int_sample_pos
);
266 fs_reg
rescale_texcoord(fs_reg coordinate
, int coord_components
,
267 bool is_rect
, uint32_t sampler
, int texunit
);
268 fs_inst
*emit_texture_gen4(ir_texture_opcode op
, fs_reg dst
,
269 fs_reg coordinate
, int coord_components
,
271 fs_reg lod
, fs_reg lod2
, int grad_components
,
273 fs_inst
*emit_texture_gen5(ir_texture_opcode op
, fs_reg dst
,
274 fs_reg coordinate
, int coord_components
,
276 fs_reg lod
, fs_reg lod2
, int grad_components
,
277 fs_reg sample_index
, uint32_t sampler
,
279 fs_inst
*emit_texture_gen7(ir_texture_opcode op
, fs_reg dst
,
280 fs_reg coordinate
, int coord_components
,
282 fs_reg lod
, fs_reg lod2
, int grad_components
,
283 fs_reg sample_index
, fs_reg mcs
, fs_reg sampler
,
284 fs_reg offset_value
);
285 void emit_texture(ir_texture_opcode op
,
286 const glsl_type
*dest_type
,
287 fs_reg coordinate
, int components
,
289 fs_reg lod
, fs_reg dpdy
, int grad_components
,
291 fs_reg offset
, unsigned offset_components
,
293 int gather_component
,
299 fs_reg
emit_mcs_fetch(fs_reg coordinate
, int components
, fs_reg sampler
);
300 void emit_gen6_gather_wa(uint8_t wa
, fs_reg dst
);
301 fs_reg
fix_math_operand(fs_reg src
);
302 fs_inst
*emit_math(enum opcode op
, fs_reg dst
, fs_reg src0
);
303 fs_inst
*emit_math(enum opcode op
, fs_reg dst
, fs_reg src0
, fs_reg src1
);
304 void emit_lrp(const fs_reg
&dst
, const fs_reg
&x
, const fs_reg
&y
,
306 void emit_minmax(enum brw_conditional_mod conditionalmod
, const fs_reg
&dst
,
307 const fs_reg
&src0
, const fs_reg
&src1
);
308 bool try_emit_saturate(ir_expression
*ir
);
309 bool try_emit_line(ir_expression
*ir
);
310 bool try_emit_mad(ir_expression
*ir
);
311 bool try_replace_with_sel();
312 bool try_opt_frontfacing_ternary(ir_if
*ir
);
313 bool opt_peephole_sel();
314 bool opt_peephole_predicated_break();
315 bool opt_saturate_propagation();
316 bool opt_cmod_propagation();
317 void emit_bool_to_cond_code(ir_rvalue
*condition
);
318 void emit_if_gen6(ir_if
*ir
);
319 void emit_unspill(bblock_t
*block
, fs_inst
*inst
, fs_reg reg
,
320 uint32_t spill_offset
, int count
);
321 void emit_spill(bblock_t
*block
, fs_inst
*inst
, fs_reg reg
,
322 uint32_t spill_offset
, int count
);
324 void emit_fragment_program_code();
325 void setup_fp_regs();
326 fs_reg
get_fp_src_reg(const prog_src_register
*src
);
327 fs_reg
get_fp_dst_reg(const prog_dst_register
*dst
);
328 void emit_fp_alu1(enum opcode opcode
,
329 const struct prog_instruction
*fpi
,
330 fs_reg dst
, fs_reg src
);
331 void emit_fp_alu2(enum opcode opcode
,
332 const struct prog_instruction
*fpi
,
333 fs_reg dst
, fs_reg src0
, fs_reg src1
);
334 void emit_fp_scalar_write(const struct prog_instruction
*fpi
,
335 fs_reg dst
, fs_reg src
);
336 void emit_fp_scalar_math(enum opcode opcode
,
337 const struct prog_instruction
*fpi
,
338 fs_reg dst
, fs_reg src
);
340 void emit_fp_minmax(const struct prog_instruction
*fpi
,
341 fs_reg dst
, fs_reg src0
, fs_reg src1
);
343 void emit_fp_sop(enum brw_conditional_mod conditional_mod
,
344 const struct prog_instruction
*fpi
,
345 fs_reg dst
, fs_reg src0
, fs_reg src1
, fs_reg one
);
347 void emit_nir_code();
348 void nir_setup_inputs(nir_shader
*shader
);
349 void nir_setup_outputs(nir_shader
*shader
);
350 void nir_setup_uniforms(nir_shader
*shader
);
351 void nir_setup_uniform(nir_variable
*var
);
352 void nir_setup_builtin_uniform(nir_variable
*var
);
353 void nir_emit_system_values(nir_shader
*shader
);
354 void nir_emit_impl(nir_function_impl
*impl
);
355 void nir_emit_cf_list(exec_list
*list
);
356 void nir_emit_if(nir_if
*if_stmt
);
357 void nir_emit_loop(nir_loop
*loop
);
358 void nir_emit_block(nir_block
*block
);
359 void nir_emit_instr(nir_instr
*instr
);
360 void nir_emit_alu(nir_alu_instr
*instr
);
361 void nir_emit_intrinsic(nir_intrinsic_instr
*instr
);
362 void nir_emit_texture(nir_tex_instr
*instr
);
363 void nir_emit_jump(nir_jump_instr
*instr
);
364 fs_reg
get_nir_src(nir_src src
);
365 fs_reg
get_nir_dest(nir_dest dest
);
366 void emit_percomp(fs_inst
*inst
, unsigned wr_mask
);
368 bool optimize_frontfacing_ternary(nir_alu_instr
*instr
,
369 const fs_reg
&result
);
371 int setup_color_payload(fs_reg
*dst
, fs_reg color
, unsigned components
);
372 void emit_alpha_test();
373 fs_inst
*emit_single_fb_write(fs_reg color1
, fs_reg color2
,
374 fs_reg src0_alpha
, unsigned components
);
375 void emit_fb_writes();
376 void emit_urb_writes();
378 void emit_shader_time_begin();
379 void emit_shader_time_end();
380 void emit_shader_time_write(enum shader_time_shader_type type
,
383 void emit_untyped_atomic(unsigned atomic_op
, unsigned surf_index
,
384 fs_reg dst
, fs_reg offset
, fs_reg src0
,
387 void emit_untyped_surface_read(unsigned surf_index
, fs_reg dst
,
390 void emit_interpolate_expression(ir_expression
*ir
);
392 bool try_rewrite_rhs_to_dst(ir_assignment
*ir
,
395 fs_inst
*pre_rhs_inst
,
396 fs_inst
*last_rhs_inst
);
397 void emit_assignment_writes(fs_reg
&l
, fs_reg
&r
,
398 const glsl_type
*type
, bool predicated
);
399 void resolve_ud_negate(fs_reg
*reg
);
400 void resolve_bool_comparison(ir_rvalue
*rvalue
, fs_reg
*reg
);
402 fs_reg
get_timestamp();
404 struct brw_reg
interp_reg(int location
, int channel
);
405 void setup_uniform_values(ir_variable
*ir
);
406 void setup_builtin_uniform_values(ir_variable
*ir
);
407 int implied_mrf_writes(fs_inst
*inst
);
409 virtual void dump_instructions();
410 virtual void dump_instructions(const char *name
);
411 void dump_instruction(backend_instruction
*inst
);
412 void dump_instruction(backend_instruction
*inst
, FILE *file
);
414 void visit_atomic_counter_intrinsic(ir_call
*ir
);
416 const void *const key
;
417 struct brw_stage_prog_data
*prog_data
;
418 unsigned int sanity_param_count
;
422 int *virtual_grf_start
;
423 int *virtual_grf_end
;
424 brw::fs_live_variables
*live_intervals
;
426 int *regs_live_at_ip
;
428 /** Number of uniform variable components visited. */
431 /** Byte-offset for the next available spot in the scratch space buffer. */
432 unsigned last_scratch
;
435 * Array mapping UNIFORM register numbers to the pull parameter index,
436 * or -1 if this uniform register isn't being uploaded as a pull constant.
438 int *pull_constant_loc
;
441 * Array mapping UNIFORM register numbers to the push parameter index,
442 * or -1 if this uniform register isn't being uploaded as a push constant.
444 int *push_constant_loc
;
446 struct hash_table
*variable_ht
;
449 fs_reg outputs
[VARYING_SLOT_MAX
];
450 unsigned output_components
[VARYING_SLOT_MAX
];
451 fs_reg dual_src_output
;
453 int first_non_payload_grf
;
454 /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
457 fs_reg
*fp_temp_regs
;
458 fs_reg
*fp_input_regs
;
465 fs_reg
*nir_system_values
;
467 /** @{ debug annotation info */
468 const char *current_annotation
;
474 bool simd16_unsupported
;
477 /* Result of last visit() method. */
480 /** Register numbers for thread payload fields. */
482 uint8_t source_depth_reg
;
483 uint8_t source_w_reg
;
484 uint8_t aa_dest_stencil_reg
;
485 uint8_t dest_depth_reg
;
486 uint8_t sample_pos_reg
;
487 uint8_t sample_mask_in_reg
;
488 uint8_t barycentric_coord_reg
[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT
];
490 /** The number of thread payload registers the hardware will supply. */
494 bool source_depth_to_render_target
;
495 bool runtime_check_aads_emit
;
501 fs_reg delta_x
[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT
];
502 fs_reg delta_y
[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT
];
503 fs_reg shader_start_time
;
504 fs_reg userplane
[MAX_CLIP_PLANES
];
507 bool spilled_any_registers
;
509 const unsigned dispatch_width
; /**< 8 or 16 */
513 * The fragment shader code generator.
515 * Translates FS IR to actual i965 assembly code.
520 fs_generator(struct brw_context
*brw
,
523 struct brw_stage_prog_data
*prog_data
,
524 struct gl_program
*fp
,
525 bool runtime_check_aads_emit
,
526 const char *stage_abbrev
);
529 void enable_debug(const char *shader_name
);
530 int generate_code(const cfg_t
*cfg
, int dispatch_width
);
531 const unsigned *get_assembly(unsigned int *assembly_size
);
534 void fire_fb_write(fs_inst
*inst
,
535 struct brw_reg payload
,
536 struct brw_reg implied_header
,
538 void generate_fb_write(fs_inst
*inst
, struct brw_reg payload
);
539 void generate_urb_write(fs_inst
*inst
, struct brw_reg payload
);
540 void generate_blorp_fb_write(fs_inst
*inst
);
541 void generate_pixel_xy(struct brw_reg dst
, bool is_x
);
542 void generate_linterp(fs_inst
*inst
, struct brw_reg dst
,
543 struct brw_reg
*src
);
544 void generate_tex(fs_inst
*inst
, struct brw_reg dst
, struct brw_reg src
,
545 struct brw_reg sampler_index
);
546 void generate_math_gen6(fs_inst
*inst
,
549 struct brw_reg src1
);
550 void generate_math_gen4(fs_inst
*inst
,
553 void generate_math_g45(fs_inst
*inst
,
556 void generate_ddx(enum opcode op
, struct brw_reg dst
, struct brw_reg src
);
557 void generate_ddy(enum opcode op
, struct brw_reg dst
, struct brw_reg src
,
559 void generate_scratch_write(fs_inst
*inst
, struct brw_reg src
);
560 void generate_scratch_read(fs_inst
*inst
, struct brw_reg dst
);
561 void generate_scratch_read_gen7(fs_inst
*inst
, struct brw_reg dst
);
562 void generate_uniform_pull_constant_load(fs_inst
*inst
, struct brw_reg dst
,
563 struct brw_reg index
,
564 struct brw_reg offset
);
565 void generate_uniform_pull_constant_load_gen7(fs_inst
*inst
,
567 struct brw_reg surf_index
,
568 struct brw_reg offset
);
569 void generate_varying_pull_constant_load(fs_inst
*inst
, struct brw_reg dst
,
570 struct brw_reg index
,
571 struct brw_reg offset
);
572 void generate_varying_pull_constant_load_gen7(fs_inst
*inst
,
574 struct brw_reg index
,
575 struct brw_reg offset
);
576 void generate_mov_dispatch_to_flags(fs_inst
*inst
);
578 void generate_pixel_interpolator_query(fs_inst
*inst
,
581 struct brw_reg msg_data
,
584 void generate_set_omask(fs_inst
*inst
,
586 struct brw_reg sample_mask
);
588 void generate_set_sample_id(fs_inst
*inst
,
591 struct brw_reg src1
);
593 void generate_set_simd4x2_offset(fs_inst
*inst
,
595 struct brw_reg offset
);
596 void generate_discard_jump(fs_inst
*inst
);
598 void generate_pack_half_2x16_split(fs_inst
*inst
,
602 void generate_unpack_half_2x16_split(fs_inst
*inst
,
606 void generate_shader_time_add(fs_inst
*inst
,
607 struct brw_reg payload
,
608 struct brw_reg offset
,
609 struct brw_reg value
);
611 void generate_untyped_atomic(fs_inst
*inst
,
613 struct brw_reg payload
,
614 struct brw_reg atomic_op
,
615 struct brw_reg surf_index
);
617 void generate_untyped_surface_read(fs_inst
*inst
,
619 struct brw_reg payload
,
620 struct brw_reg surf_index
);
622 bool patch_discard_jumps_to_fb_writes();
624 struct brw_context
*brw
;
625 struct gl_context
*ctx
;
627 struct brw_compile
*p
;
628 const void * const key
;
629 struct brw_stage_prog_data
* const prog_data
;
631 const struct gl_program
*prog
;
633 unsigned dispatch_width
; /**< 8 or 16 */
635 exec_list discard_halt_patches
;
636 bool runtime_check_aads_emit
;
638 const char *shader_name
;
639 const char *stage_abbrev
;
643 bool brw_do_channel_expressions(struct exec_list
*instructions
);
644 bool brw_do_vector_splitting(struct exec_list
*instructions
);