src/mesa/drivers/dri/i965/brw_fs.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #pragma once
  29
  30 #include "brw_shader.h"
  31
  32 extern "C" {
  33
  34 #include <sys/types.h>
  35
  36 #include "main/macros.h"
  37 #include "main/shaderobj.h"
  38 #include "main/uniforms.h"
  39 #include "program/prog_parameter.h"
  40 #include "program/prog_print.h"
  41 #include "program/prog_optimize.h"
  42 #include "program/register_allocate.h"
  43 #include "program/sampler.h"
  44 #include "program/hash_table.h"
  45 #include "brw_context.h"
  46 #include "brw_eu.h"
  47 #include "brw_wm.h"
  48 #include "brw_shader.h"
  49 }
  50 #include "glsl/glsl_types.h"
  51 #include "glsl/ir.h"
  52
  53 class bblock_t;
  54 namespace {
  55    class acp_entry;
  56 }
  57
  58 enum register_file {
  59    BAD_FILE,
  60    ARF,
  61    GRF,
  62    MRF,
  63    IMM,
  64    FIXED_HW_REG, /* a struct brw_reg */
  65    UNIFORM, /* prog_data->params[reg] */
  66 };
  67
  68 class fs_reg {
  69 public:
  70    /* Callers of this ralloc-based new need not call delete. It's
  71     * easier to just ralloc_free 'ctx' (or any of its ancestors). */
  72    static void* operator new(size_t size, void *ctx)
  73    {
  74       void *node;
  75
  76       node = ralloc_size(ctx, size);
  77       assert(node != NULL);
  78
  79       return node;
  80    }
  81
  82    void init();
  83
  84    fs_reg();
  85    fs_reg(float f);
  86    fs_reg(int32_t i);
  87    fs_reg(uint32_t u);
  88    fs_reg(struct brw_reg fixed_hw_reg);
  89    fs_reg(enum register_file file, int reg);
  90    fs_reg(enum register_file file, int reg, uint32_t type);
  91    fs_reg(class fs_visitor *v, const struct glsl_type *type);
  92
  93    bool equals(const fs_reg &r) const;
  94
  95    /** Register file: ARF, GRF, MRF, IMM. */
  96    enum register_file file;
  97    /**
  98     * Register number.  For ARF/MRF, it's the hardware register.  For
  99     * GRF, it's a virtual register number until register allocation
 100     */
 101    int reg;
 102    /**
 103     * For virtual registers, this is a hardware register offset from
 104     * the start of the register block (for example, a constant index
 105     * in an array access).
 106     */
 107    int reg_offset;
 108    /** Register type.  BRW_REGISTER_TYPE_* */
 109    int type;
 110    bool negate;
 111    bool abs;
 112    bool sechalf;
 113    struct brw_reg fixed_hw_reg;
 114    int smear; /* -1, or a channel of the reg to smear to all channels. */
 115
 116    /** Value for file == IMM */
 117    union {
 118       int32_t i;
 119       uint32_t u;
 120       float f;
 121    } imm;
 122 };
 123
 124 static const fs_reg reg_undef;
 125 static const fs_reg reg_null_f(ARF, BRW_ARF_NULL, BRW_REGISTER_TYPE_F);
 126 static const fs_reg reg_null_d(ARF, BRW_ARF_NULL, BRW_REGISTER_TYPE_D);
 127
 128 class fs_inst : public backend_instruction {
 129 public:
 130    /* Callers of this ralloc-based new need not call delete. It's
 131     * easier to just ralloc_free 'ctx' (or any of its ancestors). */
 132    static void* operator new(size_t size, void *ctx)
 133    {
 134       void *node;
 135
 136       node = rzalloc_size(ctx, size);
 137       assert(node != NULL);
 138
 139       return node;
 140    }
 141
 142    void init();
 143
 144    fs_inst();
 145    fs_inst(enum opcode opcode);
 146    fs_inst(enum opcode opcode, fs_reg dst);
 147    fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0);
 148    fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
 149    fs_inst(enum opcode opcode, fs_reg dst,
 150            fs_reg src0, fs_reg src1,fs_reg src2);
 151
 152    bool equals(fs_inst *inst);
 153    int regs_written();
 154    bool overwrites_reg(const fs_reg &reg);
 155    bool is_tex();
 156    bool is_math();
 157
 158    fs_reg dst;
 159    fs_reg src[3];
 160    bool saturate;
 161    int conditional_mod; /**< BRW_CONDITIONAL_* */
 162
 163    int mlen; /**< SEND message length */
 164    int base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
 165    uint32_t texture_offset; /**< Texture offset bitfield */
 166    int sampler;
 167    int target; /**< MRT target. */
 168    bool eot;
 169    bool header_present;
 170    bool shadow_compare;
 171    bool force_uncompressed;
 172    bool force_sechalf;
 173    uint32_t offset; /* spill/unspill offset */
 174
 175    /** @{
 176     * Annotation for the generated IR.  One of the two can be set.
 177     */
 178    const void *ir;
 179    const char *annotation;
 180    /** @} */
 181 };
 182
 183 class fs_visitor : public backend_visitor
 184 {
 185 public:
 186
 187    fs_visitor(struct brw_wm_compile *c,
 188               struct gl_shader_program *prog,
 189               struct gl_fragment_program *fp,
 190               unsigned dispatch_width);
 191    ~fs_visitor();
 192
 193    fs_reg *variable_storage(ir_variable *var);
 194    int virtual_grf_alloc(int size);
 195    void import_uniforms(fs_visitor *v);
 196
 197    void visit(ir_variable *ir);
 198    void visit(ir_assignment *ir);
 199    void visit(ir_dereference_variable *ir);
 200    void visit(ir_dereference_record *ir);
 201    void visit(ir_dereference_array *ir);
 202    void visit(ir_expression *ir);
 203    void visit(ir_texture *ir);
 204    void visit(ir_if *ir);
 205    void visit(ir_constant *ir);
 206    void visit(ir_swizzle *ir);
 207    void visit(ir_return *ir);
 208    void visit(ir_loop *ir);
 209    void visit(ir_loop_jump *ir);
 210    void visit(ir_discard *ir);
 211    void visit(ir_call *ir);
 212    void visit(ir_function *ir);
 213    void visit(ir_function_signature *ir);
 214
 215    void swizzle_result(ir_texture *ir, fs_reg orig_val, int sampler);
 216
 217    fs_inst *emit(fs_inst inst);
 218    fs_inst *emit(fs_inst *inst);
 219
 220    fs_inst *emit(enum opcode opcode);
 221    fs_inst *emit(enum opcode opcode, fs_reg dst);
 222    fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0);
 223    fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
 224    fs_inst *emit(enum opcode opcode, fs_reg dst,
 225                  fs_reg src0, fs_reg src1, fs_reg src2);
 226
 227    fs_inst *MOV(fs_reg dst, fs_reg src);
 228    fs_inst *NOT(fs_reg dst, fs_reg src);
 229    fs_inst *RNDD(fs_reg dst, fs_reg src);
 230    fs_inst *RNDE(fs_reg dst, fs_reg src);
 231    fs_inst *RNDZ(fs_reg dst, fs_reg src);
 232    fs_inst *FRC(fs_reg dst, fs_reg src);
 233    fs_inst *ADD(fs_reg dst, fs_reg src0, fs_reg src1);
 234    fs_inst *MUL(fs_reg dst, fs_reg src0, fs_reg src1);
 235    fs_inst *MACH(fs_reg dst, fs_reg src0, fs_reg src1);
 236    fs_inst *MAC(fs_reg dst, fs_reg src0, fs_reg src1);
 237    fs_inst *SHL(fs_reg dst, fs_reg src0, fs_reg src1);
 238    fs_inst *SHR(fs_reg dst, fs_reg src0, fs_reg src1);
 239    fs_inst *ASR(fs_reg dst, fs_reg src0, fs_reg src1);
 240    fs_inst *AND(fs_reg dst, fs_reg src0, fs_reg src1);
 241    fs_inst *OR(fs_reg dst, fs_reg src0, fs_reg src1);
 242    fs_inst *XOR(fs_reg dst, fs_reg src0, fs_reg src1);
 243    fs_inst *IF(uint32_t predicate);
 244    fs_inst *IF(fs_reg src0, fs_reg src1, uint32_t condition);
 245    fs_inst *CMP(fs_reg dst, fs_reg src0, fs_reg src1,
 246                 uint32_t condition);
 247
 248    int type_size(const struct glsl_type *type);
 249    fs_inst *get_instruction_generating_reg(fs_inst *start,
 250                                            fs_inst *end,
 251                                            fs_reg reg);
 252
 253    bool run();
 254    void setup_payload_gen4();
 255    void setup_payload_gen6();
 256    void setup_paramvalues_refs();
 257    void assign_curb_setup();
 258    void calculate_urb_setup();
 259    void assign_urb_setup();
 260    bool assign_regs();
 261    void assign_regs_trivial();
 262    void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
 263                                    int first_payload_node);
 264    void setup_mrf_hack_interference(struct ra_graph *g,
 265                                     int first_mrf_hack_node);
 266    int choose_spill_reg(struct ra_graph *g);
 267    void spill_reg(int spill_reg);
 268    void split_virtual_grfs();
 269    void compact_virtual_grfs();
 270    void setup_pull_constants();
 271    void calculate_live_intervals();
 272    bool opt_algebraic();
 273    bool opt_cse();
 274    bool opt_cse_local(bblock_t *block, exec_list *aeb);
 275    bool opt_copy_propagate();
 276    bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
 277    bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
 278    bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
 279                                  exec_list *acp);
 280    bool register_coalesce();
 281    bool register_coalesce_2();
 282    bool compute_to_mrf();
 283    bool dead_code_eliminate();
 284    bool remove_dead_constants();
 285    bool remove_duplicate_mrf_writes();
 286    bool virtual_grf_interferes(int a, int b);
 287    void schedule_instructions();
 288    void fail(const char *msg, ...);
 289
 290    void push_force_uncompressed();
 291    void pop_force_uncompressed();
 292    void push_force_sechalf();
 293    void pop_force_sechalf();
 294
 295    void generate_code();
 296    void generate_fb_write(fs_inst *inst);
 297    void generate_pixel_xy(struct brw_reg dst, bool is_x);
 298    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 299                          struct brw_reg *src);
 300    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 301    void generate_math1_gen7(fs_inst *inst,
 302                             struct brw_reg dst,
 303                             struct brw_reg src);
 304    void generate_math2_gen7(fs_inst *inst,
 305                             struct brw_reg dst,
 306                             struct brw_reg src0,
 307                             struct brw_reg src1);
 308    void generate_math1_gen6(fs_inst *inst,
 309                             struct brw_reg dst,
 310                             struct brw_reg src);
 311    void generate_math2_gen6(fs_inst *inst,
 312                             struct brw_reg dst,
 313                             struct brw_reg src0,
 314                             struct brw_reg src1);
 315    void generate_math_gen4(fs_inst *inst,
 316                            struct brw_reg dst,
 317                            struct brw_reg src);
 318    void generate_discard(fs_inst *inst);
 319    void generate_ddx(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 320    void generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 321                      bool negate_value);
 322    void generate_spill(fs_inst *inst, struct brw_reg src);
 323    void generate_unspill(fs_inst *inst, struct brw_reg dst);
 324    void generate_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 325                                     struct brw_reg index,
 326                                     struct brw_reg offset);
 327    void generate_mov_dispatch_to_flags();
 328
 329    void emit_dummy_fs();
 330    fs_reg *emit_fragcoord_interpolation(ir_variable *ir);
 331    fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
 332                          glsl_interp_qualifier interpolation_mode,
 333                          bool is_centroid);
 334    fs_reg *emit_frontfacing_interpolation(ir_variable *ir);
 335    fs_reg *emit_general_interpolation(ir_variable *ir);
 336    void emit_interpolation_setup_gen4();
 337    void emit_interpolation_setup_gen6();
 338    fs_reg rescale_texcoord(ir_texture *ir, fs_reg coordinate,
 339                            bool is_rect, int sampler, int texunit);
 340    fs_inst *emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 341                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2);
 342    fs_inst *emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 343                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2);
 344    fs_inst *emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 345                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2);
 346    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0);
 347    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0, fs_reg src1);
 348    void emit_minmax(uint32_t conditionalmod, fs_reg dst,
 349                     fs_reg src0, fs_reg src1);
 350    bool try_emit_saturate(ir_expression *ir);
 351    bool try_emit_mad(ir_expression *ir, int mul_arg);
 352    void emit_bool_to_cond_code(ir_rvalue *condition);
 353    void emit_if_gen6(ir_if *ir);
 354    void emit_unspill(fs_inst *inst, fs_reg reg, uint32_t spill_offset);
 355
 356    void emit_fragment_program_code();
 357    void setup_fp_regs();
 358    fs_reg get_fp_src_reg(const prog_src_register *src);
 359    fs_reg get_fp_dst_reg(const prog_dst_register *dst);
 360    void emit_fp_alu1(enum opcode opcode,
 361                      const struct prog_instruction *fpi,
 362                      fs_reg dst, fs_reg src);
 363    void emit_fp_alu2(enum opcode opcode,
 364                      const struct prog_instruction *fpi,
 365                      fs_reg dst, fs_reg src0, fs_reg src1);
 366    void emit_fp_scalar_write(const struct prog_instruction *fpi,
 367                              fs_reg dst, fs_reg src);
 368    void emit_fp_scalar_math(enum opcode opcode,
 369                             const struct prog_instruction *fpi,
 370                             fs_reg dst, fs_reg src);
 371
 372    void emit_fp_minmax(const struct prog_instruction *fpi,
 373                        fs_reg dst, fs_reg src0, fs_reg src1);
 374
 375    void emit_fp_sop(uint32_t conditional_mod,
 376                     const struct prog_instruction *fpi,
 377                     fs_reg dst, fs_reg src0, fs_reg src1, fs_reg one);
 378
 379    void emit_color_write(int target, int index, int first_color_mrf);
 380    void emit_fb_writes();
 381    bool try_rewrite_rhs_to_dst(ir_assignment *ir,
 382                                fs_reg dst,
 383                                fs_reg src,
 384                                fs_inst *pre_rhs_inst,
 385                                fs_inst *last_rhs_inst);
 386    void emit_assignment_writes(fs_reg &l, fs_reg &r,
 387                                const glsl_type *type, bool predicated);
 388    void resolve_ud_negate(fs_reg *reg);
 389    void resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg);
 390
 391    struct brw_reg interp_reg(int location, int channel);
 392    int setup_uniform_values(int loc, const glsl_type *type);
 393    void setup_builtin_uniform_values(ir_variable *ir);
 394    int implied_mrf_writes(fs_inst *inst);
 395
 396    const struct gl_fragment_program *fp;
 397    struct brw_wm_compile *c;
 398
 399    /* Delayed setup of c->prog_data.params[] due to realloc of
 400     * ParamValues[] during compile.
 401     */
 402    int param_index[MAX_UNIFORMS * 4];
 403    int param_offset[MAX_UNIFORMS * 4];
 404
 405    int *virtual_grf_sizes;
 406    int virtual_grf_count;
 407    int virtual_grf_array_size;
 408    int *virtual_grf_def;
 409    int *virtual_grf_use;
 410    bool live_intervals_valid;
 411
 412    /* This is the map from UNIFORM hw_reg + reg_offset as generated by
 413     * the visitor to the packed uniform number after
 414     * remove_dead_constants() that represents the actual uploaded
 415     * uniform index.
 416     */
 417    int *params_remap;
 418
 419    struct hash_table *variable_ht;
 420    fs_reg frag_depth;
 421    fs_reg outputs[BRW_MAX_DRAW_BUFFERS];
 422    unsigned output_components[BRW_MAX_DRAW_BUFFERS];
 423    fs_reg dual_src_output;
 424    int first_non_payload_grf;
 425    /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
 426    int max_grf;
 427    int urb_setup[FRAG_ATTRIB_MAX];
 428
 429    fs_reg *fp_temp_regs;
 430    fs_reg *fp_input_regs;
 431
 432    /** @{ debug annotation info */
 433    const char *current_annotation;
 434    const void *base_ir;
 435    /** @} */
 436
 437    bool failed;
 438    char *fail_msg;
 439
 440    /* Result of last visit() method. */
 441    fs_reg result;
 442
 443    fs_reg pixel_x;
 444    fs_reg pixel_y;
 445    fs_reg wpos_w;
 446    fs_reg pixel_w;
 447    fs_reg delta_x[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 448    fs_reg delta_y[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 449
 450    int grf_used;
 451
 452    const unsigned dispatch_width; /**< 8 or 16 */
 453
 454    int force_uncompressed_stack;
 455    int force_sechalf_stack;
 456 };
 457
 458 bool brw_do_channel_expressions(struct exec_list *instructions);
 459 bool brw_do_vector_splitting(struct exec_list *instructions);
 460 bool brw_fs_precompile(struct gl_context *ctx, struct gl_shader_program *prog);