src/mesa/drivers/dri/i965/brw_fs.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #pragma once
  29
  30 #include "brw_shader.h"
  31 #include "brw_ir_fs.h"
  32 #include "brw_fs_builder.h"
  33
  34 extern "C" {
  35
  36 #include <sys/types.h>
  37
  38 #include "main/macros.h"
  39 #include "main/shaderobj.h"
  40 #include "main/uniforms.h"
  41 #include "program/prog_parameter.h"
  42 #include "program/prog_print.h"
  43 #include "program/prog_optimize.h"
  44 #include "util/register_allocate.h"
  45 #include "program/hash_table.h"
  46 #include "brw_context.h"
  47 #include "brw_eu.h"
  48 #include "brw_wm.h"
  49 #include "intel_asm_annotation.h"
  50 }
  51 #include "glsl/glsl_types.h"
  52 #include "glsl/ir.h"
  53 #include "glsl/nir/nir.h"
  54 #include "program/sampler.h"
  55
  56 struct bblock_t;
  57 namespace {
  58    struct acp_entry;
  59 }
  60
  61 namespace brw {
  62    class fs_live_variables;
  63 }
  64
  65 static inline fs_reg
  66 offset(fs_reg reg, const brw::fs_builder& bld, unsigned delta)
  67 {
  68    switch (reg.file) {
  69    case BAD_FILE:
  70       break;
  71    case GRF:
  72    case MRF:
  73    case ATTR:
  74       return byte_offset(reg,
  75                          delta * MAX2(bld.dispatch_width() * reg.stride, 1) *
  76                          type_sz(reg.type));
  77    case UNIFORM:
  78       reg.reg_offset += delta;
  79       break;
  80    default:
  81       assert(delta == 0);
  82    }
  83    return reg;
  84 }
  85
  86 /**
  87  * The fragment shader front-end.
  88  *
  89  * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
  90  */
  91 class fs_visitor : public backend_shader
  92 {
  93 public:
  94    fs_visitor(const struct brw_compiler *compiler, void *log_data,
  95               void *mem_ctx,
  96               gl_shader_stage stage,
  97               const void *key,
  98               struct brw_stage_prog_data *prog_data,
  99               struct gl_shader_program *shader_prog,
 100               struct gl_program *prog,
 101               unsigned dispatch_width,
 102               int shader_time_index);
 103
 104    ~fs_visitor();
 105
 106    fs_reg vgrf(const glsl_type *const type);
 107    void import_uniforms(fs_visitor *v);
 108    void setup_uniform_clipplane_values(gl_clip_plane *clip_planes);
 109    void compute_clip_distance(gl_clip_plane *clip_planes);
 110
 111    uint32_t gather_channel(int orig_chan, uint32_t sampler);
 112    void swizzle_result(ir_texture_opcode op, int dest_components,
 113                        fs_reg orig_val, uint32_t sampler);
 114
 115    int type_size(const struct glsl_type *type);
 116    fs_inst *get_instruction_generating_reg(fs_inst *start,
 117                                            fs_inst *end,
 118                                            const fs_reg &reg);
 119
 120    void VARYING_PULL_CONSTANT_LOAD(const brw::fs_builder &bld,
 121                                    const fs_reg &dst,
 122                                    const fs_reg &surf_index,
 123                                    const fs_reg &varying_offset,
 124                                    uint32_t const_offset);
 125    void DEP_RESOLVE_MOV(const brw::fs_builder &bld, int grf);
 126
 127    bool run_fs(bool do_rep_send);
 128    bool run_vs(gl_clip_plane *clip_planes);
 129    bool run_cs();
 130    void optimize();
 131    void allocate_registers();
 132    void assign_binding_table_offsets();
 133    void setup_payload_gen4();
 134    void setup_payload_gen6();
 135    void setup_vs_payload();
 136    void setup_cs_payload();
 137    void fixup_3src_null_dest();
 138    void assign_curb_setup();
 139    void calculate_urb_setup();
 140    void assign_urb_setup();
 141    void assign_vs_urb_setup();
 142    bool assign_regs(bool allow_spilling);
 143    void assign_regs_trivial();
 144    void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
 145                                    int first_payload_node);
 146    int choose_spill_reg(struct ra_graph *g);
 147    void spill_reg(int spill_reg);
 148    void split_virtual_grfs();
 149    bool compact_virtual_grfs();
 150    void move_uniform_array_access_to_pull_constants();
 151    void assign_constant_locations();
 152    void demote_pull_constants();
 153    void invalidate_live_intervals();
 154    void calculate_live_intervals();
 155    void calculate_register_pressure();
 156    bool opt_algebraic();
 157    bool opt_redundant_discard_jumps();
 158    bool opt_cse();
 159    bool opt_cse_local(bblock_t *block);
 160    bool opt_copy_propagate();
 161    bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
 162    bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
 163    bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
 164                                  exec_list *acp);
 165    bool opt_register_renaming();
 166    bool register_coalesce();
 167    bool compute_to_mrf();
 168    bool eliminate_find_live_channel();
 169    bool dead_code_eliminate();
 170    bool remove_duplicate_mrf_writes();
 171
 172    bool opt_sampler_eot();
 173    bool virtual_grf_interferes(int a, int b);
 174    void schedule_instructions(instruction_scheduler_mode mode);
 175    void insert_gen4_send_dependency_workarounds();
 176    void insert_gen4_pre_send_dependency_workarounds(bblock_t *block,
 177                                                     fs_inst *inst);
 178    void insert_gen4_post_send_dependency_workarounds(bblock_t *block,
 179                                                      fs_inst *inst);
 180    void vfail(const char *msg, va_list args);
 181    void fail(const char *msg, ...);
 182    void no16(const char *msg);
 183    void lower_uniform_pull_constant_loads();
 184    bool lower_load_payload();
 185    bool lower_integer_multiplication();
 186    bool opt_combine_constants();
 187
 188    void emit_dummy_fs();
 189    void emit_repclear_shader();
 190    fs_reg *emit_fragcoord_interpolation(bool pixel_center_integer,
 191                                         bool origin_upper_left);
 192    fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
 193                          glsl_interp_qualifier interpolation_mode,
 194                          bool is_centroid, bool is_sample);
 195    fs_reg *emit_frontfacing_interpolation();
 196    fs_reg *emit_samplepos_setup();
 197    fs_reg *emit_sampleid_setup();
 198    void emit_general_interpolation(fs_reg attr, const char *name,
 199                                    const glsl_type *type,
 200                                    glsl_interp_qualifier interpolation_mode,
 201                                    int location, bool mod_centroid,
 202                                    bool mod_sample);
 203    fs_reg *emit_vs_system_value(int location);
 204    void emit_interpolation_setup_gen4();
 205    void emit_interpolation_setup_gen6();
 206    void compute_sample_position(fs_reg dst, fs_reg int_sample_pos);
 207    fs_reg rescale_texcoord(fs_reg coordinate, int coord_components,
 208                            bool is_rect, uint32_t sampler, int texunit);
 209    fs_inst *emit_texture_gen4(ir_texture_opcode op, fs_reg dst,
 210                               fs_reg coordinate, int coord_components,
 211                               fs_reg shadow_comp,
 212                               fs_reg lod, fs_reg lod2, int grad_components,
 213                               uint32_t sampler);
 214    fs_inst *emit_texture_gen4_simd16(ir_texture_opcode op, fs_reg dst,
 215                                      fs_reg coordinate, int vector_elements,
 216                                      fs_reg shadow_c, fs_reg lod,
 217                                      uint32_t sampler);
 218    fs_inst *emit_texture_gen5(ir_texture_opcode op, fs_reg dst,
 219                               fs_reg coordinate, int coord_components,
 220                               fs_reg shadow_comp,
 221                               fs_reg lod, fs_reg lod2, int grad_components,
 222                               fs_reg sample_index, uint32_t sampler,
 223                               bool has_offset);
 224    fs_inst *emit_texture_gen7(ir_texture_opcode op, fs_reg dst,
 225                               fs_reg coordinate, int coord_components,
 226                               fs_reg shadow_comp,
 227                               fs_reg lod, fs_reg lod2, int grad_components,
 228                               fs_reg sample_index, fs_reg mcs, fs_reg sampler,
 229                               fs_reg offset_value);
 230    void emit_texture(ir_texture_opcode op,
 231                      const glsl_type *dest_type,
 232                      fs_reg coordinate, int components,
 233                      fs_reg shadow_c,
 234                      fs_reg lod, fs_reg dpdy, int grad_components,
 235                      fs_reg sample_index,
 236                      fs_reg offset,
 237                      fs_reg mcs,
 238                      int gather_component,
 239                      bool is_cube_array,
 240                      bool is_rect,
 241                      uint32_t sampler,
 242                      fs_reg sampler_reg,
 243                      int texunit);
 244    fs_reg emit_mcs_fetch(fs_reg coordinate, int components, fs_reg sampler);
 245    void emit_gen6_gather_wa(uint8_t wa, fs_reg dst);
 246    void resolve_source_modifiers(fs_reg *src);
 247    void emit_discard_jump();
 248    bool try_replace_with_sel();
 249    bool opt_peephole_sel();
 250    bool opt_peephole_predicated_break();
 251    bool opt_saturate_propagation();
 252    bool opt_cmod_propagation();
 253    bool opt_zero_samples();
 254    void emit_unspill(bblock_t *block, fs_inst *inst, fs_reg reg,
 255                      uint32_t spill_offset, int count);
 256    void emit_spill(bblock_t *block, fs_inst *inst, fs_reg reg,
 257                    uint32_t spill_offset, int count);
 258
 259    void emit_nir_code();
 260    void nir_setup_inputs(nir_shader *shader);
 261    void nir_setup_outputs(nir_shader *shader);
 262    void nir_setup_uniforms(nir_shader *shader);
 263    void nir_setup_uniform(nir_variable *var);
 264    void nir_setup_builtin_uniform(nir_variable *var);
 265    void nir_emit_system_values(nir_shader *shader);
 266    void nir_emit_impl(nir_function_impl *impl);
 267    void nir_emit_cf_list(exec_list *list);
 268    void nir_emit_if(nir_if *if_stmt);
 269    void nir_emit_loop(nir_loop *loop);
 270    void nir_emit_block(nir_block *block);
 271    void nir_emit_instr(nir_instr *instr);
 272    void nir_emit_alu(const brw::fs_builder &bld, nir_alu_instr *instr);
 273    void nir_emit_load_const(const brw::fs_builder &bld,
 274                             nir_load_const_instr *instr);
 275    void nir_emit_undef(const brw::fs_builder &bld,
 276                        nir_ssa_undef_instr *instr);
 277    void nir_emit_intrinsic(const brw::fs_builder &bld,
 278                            nir_intrinsic_instr *instr);
 279    void nir_emit_texture(const brw::fs_builder &bld,
 280                          nir_tex_instr *instr);
 281    void nir_emit_jump(const brw::fs_builder &bld,
 282                       nir_jump_instr *instr);
 283    fs_reg get_nir_src(nir_src src);
 284    fs_reg get_nir_dest(nir_dest dest);
 285    void emit_percomp(const brw::fs_builder &bld, const fs_inst &inst,
 286                      unsigned wr_mask);
 287
 288    bool optimize_frontfacing_ternary(nir_alu_instr *instr,
 289                                      const fs_reg &result);
 290
 291    void setup_color_payload(fs_reg *dst, fs_reg color, unsigned components,
 292                             unsigned exec_size, bool use_2nd_half);
 293    void emit_alpha_test();
 294    fs_inst *emit_single_fb_write(const brw::fs_builder &bld,
 295                                  fs_reg color1, fs_reg color2,
 296                                  fs_reg src0_alpha, unsigned components,
 297                                  unsigned exec_size, bool use_2nd_half = false);
 298    void emit_fb_writes();
 299    void emit_urb_writes();
 300    void emit_cs_terminate();
 301
 302    void emit_barrier();
 303
 304    void emit_shader_time_begin();
 305    void emit_shader_time_end();
 306    void SHADER_TIME_ADD(const brw::fs_builder &bld,
 307                         int shader_time_subindex,
 308                         fs_reg value);
 309
 310    void emit_untyped_atomic(unsigned atomic_op, unsigned surf_index,
 311                             fs_reg dst, fs_reg offset, fs_reg src0,
 312                             fs_reg src1);
 313
 314    void emit_untyped_surface_read(unsigned surf_index, fs_reg dst,
 315                                   fs_reg offset);
 316
 317    fs_reg get_timestamp(const brw::fs_builder &bld);
 318
 319    struct brw_reg interp_reg(int location, int channel);
 320    int implied_mrf_writes(fs_inst *inst);
 321
 322    virtual void dump_instructions();
 323    virtual void dump_instructions(const char *name);
 324    void dump_instruction(backend_instruction *inst);
 325    void dump_instruction(backend_instruction *inst, FILE *file);
 326
 327    const void *const key;
 328    const struct brw_sampler_prog_key_data *key_tex;
 329
 330    struct brw_stage_prog_data *prog_data;
 331    unsigned int sanity_param_count;
 332
 333    int *param_size;
 334
 335    int *virtual_grf_start;
 336    int *virtual_grf_end;
 337    brw::fs_live_variables *live_intervals;
 338
 339    int *regs_live_at_ip;
 340
 341    /** Number of uniform variable components visited. */
 342    unsigned uniforms;
 343
 344    /** Total number of direct uniforms we can get from NIR */
 345    unsigned num_direct_uniforms;
 346
 347    /** Byte-offset for the next available spot in the scratch space buffer. */
 348    unsigned last_scratch;
 349
 350    /**
 351     * Array mapping UNIFORM register numbers to the pull parameter index,
 352     * or -1 if this uniform register isn't being uploaded as a pull constant.
 353     */
 354    int *pull_constant_loc;
 355
 356    /**
 357     * Array mapping UNIFORM register numbers to the push parameter index,
 358     * or -1 if this uniform register isn't being uploaded as a push constant.
 359     */
 360    int *push_constant_loc;
 361
 362    fs_reg frag_depth;
 363    fs_reg sample_mask;
 364    fs_reg outputs[VARYING_SLOT_MAX];
 365    unsigned output_components[VARYING_SLOT_MAX];
 366    fs_reg dual_src_output;
 367    bool do_dual_src;
 368    int first_non_payload_grf;
 369    /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
 370    unsigned max_grf;
 371
 372    fs_reg *nir_locals;
 373    fs_reg *nir_ssa_values;
 374    fs_reg *nir_globals;
 375    fs_reg nir_inputs;
 376    fs_reg nir_outputs;
 377    fs_reg *nir_system_values;
 378
 379    bool failed;
 380    char *fail_msg;
 381    bool simd16_unsupported;
 382    char *no16_msg;
 383
 384    /* Result of last visit() method. Still used by emit_texture() */
 385    fs_reg result;
 386
 387    /** Register numbers for thread payload fields. */
 388    struct {
 389       uint8_t source_depth_reg;
 390       uint8_t source_w_reg;
 391       uint8_t aa_dest_stencil_reg;
 392       uint8_t dest_depth_reg;
 393       uint8_t sample_pos_reg;
 394       uint8_t sample_mask_in_reg;
 395       uint8_t barycentric_coord_reg[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 396
 397       /** The number of thread payload registers the hardware will supply. */
 398       uint8_t num_regs;
 399    } payload;
 400
 401    bool source_depth_to_render_target;
 402    bool runtime_check_aads_emit;
 403
 404    fs_reg pixel_x;
 405    fs_reg pixel_y;
 406    fs_reg wpos_w;
 407    fs_reg pixel_w;
 408    fs_reg delta_xy[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 409    fs_reg shader_start_time;
 410    fs_reg userplane[MAX_CLIP_PLANES];
 411
 412    unsigned grf_used;
 413    bool spilled_any_registers;
 414
 415    const unsigned dispatch_width; /**< 8 or 16 */
 416
 417    int shader_time_index;
 418
 419    unsigned promoted_constants;
 420    brw::fs_builder bld;
 421 };
 422
 423 /**
 424  * The fragment shader code generator.
 425  *
 426  * Translates FS IR to actual i965 assembly code.
 427  */
 428 class fs_generator
 429 {
 430 public:
 431    fs_generator(const struct brw_compiler *compiler, void *log_data,
 432                 void *mem_ctx,
 433                 const void *key,
 434                 struct brw_stage_prog_data *prog_data,
 435                 struct gl_program *fp,
 436                 unsigned promoted_constants,
 437                 bool runtime_check_aads_emit,
 438                 const char *stage_abbrev);
 439    ~fs_generator();
 440
 441    void enable_debug(const char *shader_name);
 442    int generate_code(const cfg_t *cfg, int dispatch_width);
 443    const unsigned *get_assembly(unsigned int *assembly_size);
 444
 445 private:
 446    void fire_fb_write(fs_inst *inst,
 447                       struct brw_reg payload,
 448                       struct brw_reg implied_header,
 449                       GLuint nr);
 450    void generate_fb_write(fs_inst *inst, struct brw_reg payload);
 451    void generate_urb_write(fs_inst *inst, struct brw_reg payload);
 452    void generate_cs_terminate(fs_inst *inst, struct brw_reg payload);
 453    void generate_barrier(fs_inst *inst, struct brw_reg src);
 454    void generate_blorp_fb_write(fs_inst *inst);
 455    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 456                          struct brw_reg *src);
 457    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 458                      struct brw_reg sampler_index);
 459    void generate_math_gen6(fs_inst *inst,
 460                            struct brw_reg dst,
 461                            struct brw_reg src0,
 462                            struct brw_reg src1);
 463    void generate_math_gen4(fs_inst *inst,
 464                            struct brw_reg dst,
 465                            struct brw_reg src);
 466    void generate_math_g45(fs_inst *inst,
 467                           struct brw_reg dst,
 468                           struct brw_reg src);
 469    void generate_ddx(enum opcode op, struct brw_reg dst, struct brw_reg src);
 470    void generate_ddy(enum opcode op, struct brw_reg dst, struct brw_reg src,
 471                      bool negate_value);
 472    void generate_scratch_write(fs_inst *inst, struct brw_reg src);
 473    void generate_scratch_read(fs_inst *inst, struct brw_reg dst);
 474    void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst);
 475    void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 476                                             struct brw_reg index,
 477                                             struct brw_reg offset);
 478    void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
 479                                                  struct brw_reg dst,
 480                                                  struct brw_reg surf_index,
 481                                                  struct brw_reg offset);
 482    void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 483                                             struct brw_reg index,
 484                                             struct brw_reg offset);
 485    void generate_varying_pull_constant_load_gen7(fs_inst *inst,
 486                                                  struct brw_reg dst,
 487                                                  struct brw_reg index,
 488                                                  struct brw_reg offset);
 489    void generate_mov_dispatch_to_flags(fs_inst *inst);
 490
 491    void generate_pixel_interpolator_query(fs_inst *inst,
 492                                           struct brw_reg dst,
 493                                           struct brw_reg src,
 494                                           struct brw_reg msg_data,
 495                                           unsigned msg_type);
 496
 497    void generate_set_omask(fs_inst *inst,
 498                            struct brw_reg dst,
 499                            struct brw_reg sample_mask);
 500
 501    void generate_set_sample_id(fs_inst *inst,
 502                                struct brw_reg dst,
 503                                struct brw_reg src0,
 504                                struct brw_reg src1);
 505
 506    void generate_set_simd4x2_offset(fs_inst *inst,
 507                                     struct brw_reg dst,
 508                                     struct brw_reg offset);
 509    void generate_discard_jump(fs_inst *inst);
 510
 511    void generate_pack_half_2x16_split(fs_inst *inst,
 512                                       struct brw_reg dst,
 513                                       struct brw_reg x,
 514                                       struct brw_reg y);
 515    void generate_unpack_half_2x16_split(fs_inst *inst,
 516                                         struct brw_reg dst,
 517                                         struct brw_reg src);
 518
 519    void generate_shader_time_add(fs_inst *inst,
 520                                  struct brw_reg payload,
 521                                  struct brw_reg offset,
 522                                  struct brw_reg value);
 523
 524    bool patch_discard_jumps_to_fb_writes();
 525
 526    const struct brw_compiler *compiler;
 527    void *log_data; /* Passed to compiler->*_log functions */
 528
 529    const struct brw_device_info *devinfo;
 530
 531    struct brw_codegen *p;
 532    const void * const key;
 533    struct brw_stage_prog_data * const prog_data;
 534
 535    const struct gl_program *prog;
 536
 537    unsigned dispatch_width; /**< 8 or 16 */
 538
 539    exec_list discard_halt_patches;
 540    unsigned promoted_constants;
 541    bool runtime_check_aads_emit;
 542    bool debug_flag;
 543    const char *shader_name;
 544    const char *stage_abbrev;
 545    void *mem_ctx;
 546 };
 547
 548 bool brw_do_channel_expressions(struct exec_list *instructions);
 549 bool brw_do_vector_splitting(struct exec_list *instructions);
 550 void brw_setup_tex_for_precompile(struct brw_context *brw,
 551                                   struct brw_sampler_prog_key_data *tex,
 552                                   struct gl_program *prog);