src/mesa/drivers/dri/i965/brw_fs.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #pragma once
  29
  30 #include "brw_shader.h"
  31 #include "brw_ir_fs.h"
  32 #include "brw_fs_builder.h"
  33
  34 extern "C" {
  35
  36 #include <sys/types.h>
  37
  38 #include "main/macros.h"
  39 #include "main/shaderobj.h"
  40 #include "main/uniforms.h"
  41 #include "program/prog_parameter.h"
  42 #include "program/prog_print.h"
  43 #include "program/prog_optimize.h"
  44 #include "util/register_allocate.h"
  45 #include "program/hash_table.h"
  46 #include "brw_context.h"
  47 #include "brw_eu.h"
  48 #include "brw_wm.h"
  49 #include "intel_asm_annotation.h"
  50 }
  51 #include "glsl/glsl_types.h"
  52 #include "glsl/ir.h"
  53 #include "glsl/nir/nir.h"
  54 #include "program/sampler.h"
  55
  56 struct bblock_t;
  57 namespace {
  58    struct acp_entry;
  59 }
  60
  61 namespace brw {
  62    class fs_live_variables;
  63 }
  64
  65 static inline fs_reg
  66 offset(fs_reg reg, const brw::fs_builder& bld, unsigned delta)
  67 {
  68    switch (reg.file) {
  69    case BAD_FILE:
  70       break;
  71    case GRF:
  72    case MRF:
  73    case HW_REG:
  74    case ATTR:
  75       return byte_offset(reg,
  76                          delta * reg.component_size(bld.dispatch_width()));
  77    case UNIFORM:
  78       reg.reg_offset += delta;
  79       break;
  80    case IMM:
  81       assert(delta == 0);
  82    }
  83    return reg;
  84 }
  85
  86 /**
  87  * The fragment shader front-end.
  88  *
  89  * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
  90  */
  91 class fs_visitor : public backend_shader
  92 {
  93 public:
  94    fs_visitor(const struct brw_compiler *compiler, void *log_data,
  95               void *mem_ctx,
  96               gl_shader_stage stage,
  97               const void *key,
  98               struct brw_stage_prog_data *prog_data,
  99               struct gl_shader_program *shader_prog,
 100               struct gl_program *prog,
 101               unsigned dispatch_width,
 102               int shader_time_index);
 103
 104    ~fs_visitor();
 105
 106    fs_reg vgrf(const glsl_type *const type);
 107    void import_uniforms(fs_visitor *v);
 108    void setup_uniform_clipplane_values(gl_clip_plane *clip_planes);
 109    void compute_clip_distance(gl_clip_plane *clip_planes);
 110
 111    uint32_t gather_channel(int orig_chan, uint32_t sampler);
 112    void swizzle_result(ir_texture_opcode op, int dest_components,
 113                        fs_reg orig_val, uint32_t sampler);
 114
 115    fs_inst *get_instruction_generating_reg(fs_inst *start,
 116                                            fs_inst *end,
 117                                            const fs_reg &reg);
 118
 119    void VARYING_PULL_CONSTANT_LOAD(const brw::fs_builder &bld,
 120                                    const fs_reg &dst,
 121                                    const fs_reg &surf_index,
 122                                    const fs_reg &varying_offset,
 123                                    uint32_t const_offset);
 124    void DEP_RESOLVE_MOV(const brw::fs_builder &bld, int grf);
 125
 126    bool run_fs(bool do_rep_send);
 127    bool run_vs(gl_clip_plane *clip_planes);
 128    bool run_cs();
 129    void optimize();
 130    void allocate_registers();
 131    void assign_fs_binding_table_offsets();
 132    void assign_cs_binding_table_offsets();
 133    void setup_payload_gen4();
 134    void setup_payload_gen6();
 135    void setup_vs_payload();
 136    void setup_cs_payload();
 137    void fixup_3src_null_dest();
 138    void assign_curb_setup();
 139    void calculate_urb_setup();
 140    void assign_urb_setup();
 141    void assign_vs_urb_setup();
 142    bool assign_regs(bool allow_spilling);
 143    void assign_regs_trivial();
 144    void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
 145                                    int first_payload_node);
 146    int choose_spill_reg(struct ra_graph *g);
 147    void spill_reg(int spill_reg);
 148    void split_virtual_grfs();
 149    bool compact_virtual_grfs();
 150    void assign_constant_locations();
 151    void demote_pull_constants();
 152    void invalidate_live_intervals();
 153    void calculate_live_intervals();
 154    void calculate_register_pressure();
 155    void validate();
 156    bool opt_algebraic();
 157    bool opt_redundant_discard_jumps();
 158    bool opt_cse();
 159    bool opt_cse_local(bblock_t *block);
 160    bool opt_copy_propagate();
 161    bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
 162    bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
 163    bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
 164                                  exec_list *acp);
 165    bool opt_register_renaming();
 166    bool register_coalesce();
 167    bool compute_to_mrf();
 168    bool eliminate_find_live_channel();
 169    bool dead_code_eliminate();
 170    bool remove_duplicate_mrf_writes();
 171
 172    bool opt_sampler_eot();
 173    bool virtual_grf_interferes(int a, int b);
 174    void schedule_instructions(instruction_scheduler_mode mode);
 175    void insert_gen4_send_dependency_workarounds();
 176    void insert_gen4_pre_send_dependency_workarounds(bblock_t *block,
 177                                                     fs_inst *inst);
 178    void insert_gen4_post_send_dependency_workarounds(bblock_t *block,
 179                                                      fs_inst *inst);
 180    void vfail(const char *msg, va_list args);
 181    void fail(const char *msg, ...);
 182    void no16(const char *msg);
 183    void lower_uniform_pull_constant_loads();
 184    bool lower_load_payload();
 185    bool lower_logical_sends();
 186    bool lower_integer_multiplication();
 187    bool lower_simd_width();
 188    bool opt_combine_constants();
 189
 190    void emit_dummy_fs();
 191    void emit_repclear_shader();
 192    fs_reg *emit_fragcoord_interpolation(bool pixel_center_integer,
 193                                         bool origin_upper_left);
 194    fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
 195                          glsl_interp_qualifier interpolation_mode,
 196                          bool is_centroid, bool is_sample);
 197    fs_reg *emit_frontfacing_interpolation();
 198    fs_reg *emit_samplepos_setup();
 199    fs_reg *emit_sampleid_setup();
 200    void emit_general_interpolation(fs_reg attr, const char *name,
 201                                    const glsl_type *type,
 202                                    glsl_interp_qualifier interpolation_mode,
 203                                    int location, bool mod_centroid,
 204                                    bool mod_sample);
 205    fs_reg *emit_vs_system_value(int location);
 206    void emit_interpolation_setup_gen4();
 207    void emit_interpolation_setup_gen6();
 208    void compute_sample_position(fs_reg dst, fs_reg int_sample_pos);
 209    fs_reg rescale_texcoord(fs_reg coordinate, int coord_components,
 210                            bool is_rect, uint32_t sampler, int texunit);
 211    void emit_texture(ir_texture_opcode op,
 212                      const glsl_type *dest_type,
 213                      fs_reg coordinate, int components,
 214                      fs_reg shadow_c,
 215                      fs_reg lod, fs_reg dpdy, int grad_components,
 216                      fs_reg sample_index,
 217                      fs_reg offset,
 218                      fs_reg mcs,
 219                      int gather_component,
 220                      bool is_cube_array,
 221                      bool is_rect,
 222                      uint32_t sampler,
 223                      fs_reg sampler_reg,
 224                      int texunit);
 225    fs_reg emit_mcs_fetch(const fs_reg &coordinate, unsigned components,
 226                          const fs_reg &sampler);
 227    void emit_gen6_gather_wa(uint8_t wa, fs_reg dst);
 228    fs_reg resolve_source_modifiers(const fs_reg &src);
 229    void emit_discard_jump();
 230    bool opt_peephole_sel();
 231    bool opt_peephole_predicated_break();
 232    bool opt_saturate_propagation();
 233    bool opt_cmod_propagation();
 234    bool opt_zero_samples();
 235    void emit_unspill(bblock_t *block, fs_inst *inst, fs_reg reg,
 236                      uint32_t spill_offset, int count);
 237    void emit_spill(bblock_t *block, fs_inst *inst, fs_reg reg,
 238                    uint32_t spill_offset, int count);
 239
 240    void emit_nir_code();
 241    void nir_setup_inputs(nir_shader *shader);
 242    void nir_setup_outputs(nir_shader *shader);
 243    void nir_setup_uniforms(nir_shader *shader);
 244    void nir_setup_uniform(nir_variable *var);
 245    void nir_setup_builtin_uniform(nir_variable *var);
 246    void nir_emit_system_values(nir_shader *shader);
 247    void nir_emit_impl(nir_function_impl *impl);
 248    void nir_emit_cf_list(exec_list *list);
 249    void nir_emit_if(nir_if *if_stmt);
 250    void nir_emit_loop(nir_loop *loop);
 251    void nir_emit_block(nir_block *block);
 252    void nir_emit_instr(nir_instr *instr);
 253    void nir_emit_alu(const brw::fs_builder &bld, nir_alu_instr *instr);
 254    void nir_emit_load_const(const brw::fs_builder &bld,
 255                             nir_load_const_instr *instr);
 256    void nir_emit_undef(const brw::fs_builder &bld,
 257                        nir_ssa_undef_instr *instr);
 258    void nir_emit_intrinsic(const brw::fs_builder &bld,
 259                            nir_intrinsic_instr *instr);
 260    void nir_emit_ssbo_atomic(const brw::fs_builder &bld,
 261                              int op, nir_intrinsic_instr *instr);
 262    void nir_emit_texture(const brw::fs_builder &bld,
 263                          nir_tex_instr *instr);
 264    void nir_emit_jump(const brw::fs_builder &bld,
 265                       nir_jump_instr *instr);
 266    fs_reg get_nir_src(nir_src src);
 267    fs_reg get_nir_dest(nir_dest dest);
 268    fs_reg get_nir_image_deref(const nir_deref_var *deref);
 269    void emit_percomp(const brw::fs_builder &bld, const fs_inst &inst,
 270                      unsigned wr_mask);
 271
 272    bool optimize_frontfacing_ternary(nir_alu_instr *instr,
 273                                      const fs_reg &result);
 274
 275    void emit_alpha_test();
 276    fs_inst *emit_single_fb_write(const brw::fs_builder &bld,
 277                                  fs_reg color1, fs_reg color2,
 278                                  fs_reg src0_alpha, unsigned components);
 279    void emit_fb_writes();
 280    void emit_urb_writes();
 281    void emit_cs_terminate();
 282    fs_reg *emit_cs_local_invocation_id_setup();
 283    fs_reg *emit_cs_work_group_id_setup();
 284
 285    void emit_barrier();
 286
 287    void emit_shader_time_begin();
 288    void emit_shader_time_end();
 289    void SHADER_TIME_ADD(const brw::fs_builder &bld,
 290                         int shader_time_subindex,
 291                         fs_reg value);
 292
 293    fs_reg get_timestamp(const brw::fs_builder &bld);
 294
 295    struct brw_reg interp_reg(int location, int channel);
 296
 297    virtual void setup_vec4_uniform_value(unsigned param_offset,
 298                                          const gl_constant_value *values,
 299                                          unsigned n);
 300
 301    int implied_mrf_writes(fs_inst *inst);
 302
 303    virtual void dump_instructions();
 304    virtual void dump_instructions(const char *name);
 305    void dump_instruction(backend_instruction *inst);
 306    void dump_instruction(backend_instruction *inst, FILE *file);
 307
 308    const void *const key;
 309    const struct brw_sampler_prog_key_data *key_tex;
 310
 311    struct brw_stage_prog_data *prog_data;
 312    unsigned int sanity_param_count;
 313
 314    int *param_size;
 315
 316    int *virtual_grf_start;
 317    int *virtual_grf_end;
 318    brw::fs_live_variables *live_intervals;
 319
 320    int *regs_live_at_ip;
 321
 322    /** Number of uniform variable components visited. */
 323    unsigned uniforms;
 324
 325    /** Byte-offset for the next available spot in the scratch space buffer. */
 326    unsigned last_scratch;
 327
 328    /**
 329     * Array mapping UNIFORM register numbers to the pull parameter index,
 330     * or -1 if this uniform register isn't being uploaded as a pull constant.
 331     */
 332    int *pull_constant_loc;
 333
 334    /**
 335     * Array mapping UNIFORM register numbers to the push parameter index,
 336     * or -1 if this uniform register isn't being uploaded as a push constant.
 337     */
 338    int *push_constant_loc;
 339
 340    fs_reg frag_depth;
 341    fs_reg sample_mask;
 342    fs_reg outputs[VARYING_SLOT_MAX];
 343    unsigned output_components[VARYING_SLOT_MAX];
 344    fs_reg dual_src_output;
 345    bool do_dual_src;
 346    int first_non_payload_grf;
 347    /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
 348    unsigned max_grf;
 349
 350    fs_reg *nir_locals;
 351    fs_reg *nir_ssa_values;
 352    fs_reg nir_inputs;
 353    fs_reg nir_outputs;
 354    fs_reg *nir_system_values;
 355
 356    bool failed;
 357    char *fail_msg;
 358    bool simd16_unsupported;
 359    char *no16_msg;
 360
 361    /* Result of last visit() method. Still used by emit_texture() */
 362    fs_reg result;
 363
 364    /** Register numbers for thread payload fields. */
 365    struct thread_payload {
 366       uint8_t source_depth_reg;
 367       uint8_t source_w_reg;
 368       uint8_t aa_dest_stencil_reg;
 369       uint8_t dest_depth_reg;
 370       uint8_t sample_pos_reg;
 371       uint8_t sample_mask_in_reg;
 372       uint8_t barycentric_coord_reg[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 373       uint8_t local_invocation_id_reg;
 374
 375       /** The number of thread payload registers the hardware will supply. */
 376       uint8_t num_regs;
 377    } payload;
 378
 379    bool source_depth_to_render_target;
 380    bool runtime_check_aads_emit;
 381
 382    fs_reg pixel_x;
 383    fs_reg pixel_y;
 384    fs_reg wpos_w;
 385    fs_reg pixel_w;
 386    fs_reg delta_xy[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 387    fs_reg shader_start_time;
 388    fs_reg userplane[MAX_CLIP_PLANES];
 389
 390    unsigned grf_used;
 391    bool spilled_any_registers;
 392
 393    const unsigned dispatch_width; /**< 8 or 16 */
 394
 395    int shader_time_index;
 396
 397    unsigned promoted_constants;
 398    brw::fs_builder bld;
 399 };
 400
 401 /**
 402  * The fragment shader code generator.
 403  *
 404  * Translates FS IR to actual i965 assembly code.
 405  */
 406 class fs_generator
 407 {
 408 public:
 409    fs_generator(const struct brw_compiler *compiler, void *log_data,
 410                 void *mem_ctx,
 411                 const void *key,
 412                 struct brw_stage_prog_data *prog_data,
 413                 struct gl_program *fp,
 414                 unsigned promoted_constants,
 415                 bool runtime_check_aads_emit,
 416                 const char *stage_abbrev);
 417    ~fs_generator();
 418
 419    void enable_debug(const char *shader_name);
 420    int generate_code(const cfg_t *cfg, int dispatch_width);
 421    const unsigned *get_assembly(unsigned int *assembly_size);
 422
 423 private:
 424    void fire_fb_write(fs_inst *inst,
 425                       struct brw_reg payload,
 426                       struct brw_reg implied_header,
 427                       GLuint nr);
 428    void generate_fb_write(fs_inst *inst, struct brw_reg payload);
 429    void generate_urb_write(fs_inst *inst, struct brw_reg payload);
 430    void generate_cs_terminate(fs_inst *inst, struct brw_reg payload);
 431    void generate_barrier(fs_inst *inst, struct brw_reg src);
 432    void generate_blorp_fb_write(fs_inst *inst);
 433    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 434                          struct brw_reg *src);
 435    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 436                      struct brw_reg sampler_index);
 437    void generate_get_buffer_size(fs_inst *inst, struct brw_reg dst,
 438                                  struct brw_reg src,
 439                                  struct brw_reg surf_index);
 440    void generate_math_gen6(fs_inst *inst,
 441                            struct brw_reg dst,
 442                            struct brw_reg src0,
 443                            struct brw_reg src1);
 444    void generate_math_gen4(fs_inst *inst,
 445                            struct brw_reg dst,
 446                            struct brw_reg src);
 447    void generate_math_g45(fs_inst *inst,
 448                           struct brw_reg dst,
 449                           struct brw_reg src);
 450    void generate_ddx(enum opcode op, struct brw_reg dst, struct brw_reg src);
 451    void generate_ddy(enum opcode op, struct brw_reg dst, struct brw_reg src,
 452                      bool negate_value);
 453    void generate_scratch_write(fs_inst *inst, struct brw_reg src);
 454    void generate_scratch_read(fs_inst *inst, struct brw_reg dst);
 455    void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst);
 456    void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 457                                             struct brw_reg index,
 458                                             struct brw_reg offset);
 459    void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
 460                                                  struct brw_reg dst,
 461                                                  struct brw_reg surf_index,
 462                                                  struct brw_reg offset);
 463    void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 464                                             struct brw_reg index,
 465                                             struct brw_reg offset);
 466    void generate_varying_pull_constant_load_gen7(fs_inst *inst,
 467                                                  struct brw_reg dst,
 468                                                  struct brw_reg index,
 469                                                  struct brw_reg offset);
 470    void generate_mov_dispatch_to_flags(fs_inst *inst);
 471
 472    void generate_pixel_interpolator_query(fs_inst *inst,
 473                                           struct brw_reg dst,
 474                                           struct brw_reg src,
 475                                           struct brw_reg msg_data,
 476                                           unsigned msg_type);
 477
 478    void generate_set_sample_id(fs_inst *inst,
 479                                struct brw_reg dst,
 480                                struct brw_reg src0,
 481                                struct brw_reg src1);
 482
 483    void generate_set_simd4x2_offset(fs_inst *inst,
 484                                     struct brw_reg dst,
 485                                     struct brw_reg offset);
 486    void generate_discard_jump(fs_inst *inst);
 487
 488    void generate_pack_half_2x16_split(fs_inst *inst,
 489                                       struct brw_reg dst,
 490                                       struct brw_reg x,
 491                                       struct brw_reg y);
 492    void generate_unpack_half_2x16_split(fs_inst *inst,
 493                                         struct brw_reg dst,
 494                                         struct brw_reg src);
 495
 496    void generate_shader_time_add(fs_inst *inst,
 497                                  struct brw_reg payload,
 498                                  struct brw_reg offset,
 499                                  struct brw_reg value);
 500
 501    bool patch_discard_jumps_to_fb_writes();
 502
 503    const struct brw_compiler *compiler;
 504    void *log_data; /* Passed to compiler->*_log functions */
 505
 506    const struct brw_device_info *devinfo;
 507
 508    struct brw_codegen *p;
 509    const void * const key;
 510    struct brw_stage_prog_data * const prog_data;
 511
 512    const struct gl_program *prog;
 513
 514    unsigned dispatch_width; /**< 8 or 16 */
 515
 516    exec_list discard_halt_patches;
 517    unsigned promoted_constants;
 518    bool runtime_check_aads_emit;
 519    bool debug_flag;
 520    const char *shader_name;
 521    const char *stage_abbrev;
 522    void *mem_ctx;
 523 };
 524
 525 bool brw_do_channel_expressions(struct exec_list *instructions);
 526 bool brw_do_vector_splitting(struct exec_list *instructions);