src/mesa/drivers/dri/i965/brw_fs.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #pragma once
  29
  30 #include "brw_shader.h"
  31 #include "brw_ir_fs.h"
  32 #include "brw_fs_builder.h"
  33 #include "compiler/nir/nir.h"
  34
  35 struct bblock_t;
  36 namespace {
  37    struct acp_entry;
  38 }
  39
  40 namespace brw {
  41    class fs_live_variables;
  42 }
  43
  44 struct brw_gs_compile;
  45
  46 static inline fs_reg
  47 offset(fs_reg reg, const brw::fs_builder& bld, unsigned delta)
  48 {
  49    switch (reg.file) {
  50    case BAD_FILE:
  51       break;
  52    case ARF:
  53    case FIXED_GRF:
  54    case MRF:
  55    case VGRF:
  56    case ATTR:
  57    case UNIFORM:
  58       return byte_offset(reg,
  59                          delta * reg.component_size(bld.dispatch_width()));
  60    case IMM:
  61       assert(delta == 0);
  62    }
  63    return reg;
  64 }
  65
  66 /**
  67  * The fragment shader front-end.
  68  *
  69  * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
  70  */
  71 class fs_visitor : public backend_shader
  72 {
  73 public:
  74    fs_visitor(const struct brw_compiler *compiler, void *log_data,
  75               void *mem_ctx,
  76               const void *key,
  77               struct brw_stage_prog_data *prog_data,
  78               struct gl_program *prog,
  79               const nir_shader *shader,
  80               unsigned dispatch_width,
  81               int shader_time_index,
  82               const struct brw_vue_map *input_vue_map = NULL);
  83    fs_visitor(const struct brw_compiler *compiler, void *log_data,
  84               void *mem_ctx,
  85               struct brw_gs_compile *gs_compile,
  86               struct brw_gs_prog_data *prog_data,
  87               const nir_shader *shader,
  88               int shader_time_index);
  89    void init();
  90    ~fs_visitor();
  91
  92    fs_reg vgrf(const glsl_type *const type);
  93    void import_uniforms(fs_visitor *v);
  94    void setup_uniform_clipplane_values(gl_clip_plane *clip_planes);
  95    void compute_clip_distance(gl_clip_plane *clip_planes);
  96
  97    fs_inst *get_instruction_generating_reg(fs_inst *start,
  98                                            fs_inst *end,
  99                                            const fs_reg &reg);
 100
 101    void VARYING_PULL_CONSTANT_LOAD(const brw::fs_builder &bld,
 102                                    const fs_reg &dst,
 103                                    const fs_reg &surf_index,
 104                                    const fs_reg &varying_offset,
 105                                    uint32_t const_offset);
 106    void DEP_RESOLVE_MOV(const brw::fs_builder &bld, int grf);
 107
 108    bool run_fs(bool allow_spilling, bool do_rep_send);
 109    bool run_vs(gl_clip_plane *clip_planes);
 110    bool run_tcs_single_patch();
 111    bool run_tes();
 112    bool run_gs();
 113    bool run_cs();
 114    void optimize();
 115    void allocate_registers(bool allow_spilling);
 116    void setup_fs_payload_gen4();
 117    void setup_fs_payload_gen6();
 118    void setup_vs_payload();
 119    void setup_gs_payload();
 120    void setup_cs_payload();
 121    void fixup_3src_null_dest();
 122    void assign_curb_setup();
 123    void calculate_urb_setup();
 124    void assign_urb_setup();
 125    void convert_attr_sources_to_hw_regs(fs_inst *inst);
 126    void assign_vs_urb_setup();
 127    void assign_tcs_single_patch_urb_setup();
 128    void assign_tes_urb_setup();
 129    void assign_gs_urb_setup();
 130    bool assign_regs(bool allow_spilling, bool spill_all);
 131    void assign_regs_trivial();
 132    void calculate_payload_ranges(int payload_node_count,
 133                                  int *payload_last_use_ip);
 134    void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
 135                                    int first_payload_node);
 136    int choose_spill_reg(struct ra_graph *g);
 137    void spill_reg(int spill_reg);
 138    void split_virtual_grfs();
 139    bool compact_virtual_grfs();
 140    void assign_constant_locations();
 141    void lower_constant_loads();
 142    void invalidate_live_intervals();
 143    void calculate_live_intervals();
 144    void calculate_register_pressure();
 145    void validate();
 146    bool opt_algebraic();
 147    bool opt_redundant_discard_jumps();
 148    bool opt_cse();
 149    bool opt_cse_local(bblock_t *block);
 150    bool opt_copy_propagate();
 151    bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
 152    bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
 153    bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
 154                                  exec_list *acp);
 155    bool opt_drop_redundant_mov_to_flags();
 156    bool opt_register_renaming();
 157    bool register_coalesce();
 158    bool compute_to_mrf();
 159    bool eliminate_find_live_channel();
 160    bool dead_code_eliminate();
 161    bool remove_duplicate_mrf_writes();
 162
 163    bool opt_sampler_eot();
 164    bool virtual_grf_interferes(int a, int b);
 165    void schedule_instructions(instruction_scheduler_mode mode);
 166    void insert_gen4_send_dependency_workarounds();
 167    void insert_gen4_pre_send_dependency_workarounds(bblock_t *block,
 168                                                     fs_inst *inst);
 169    void insert_gen4_post_send_dependency_workarounds(bblock_t *block,
 170                                                      fs_inst *inst);
 171    void vfail(const char *msg, va_list args);
 172    void fail(const char *msg, ...);
 173    void no16(const char *msg);
 174    void lower_uniform_pull_constant_loads();
 175    bool lower_load_payload();
 176    bool lower_pack();
 177    bool lower_d2x();
 178    bool lower_logical_sends();
 179    bool lower_integer_multiplication();
 180    bool lower_minmax();
 181    bool lower_simd_width();
 182    bool opt_combine_constants();
 183
 184    void emit_dummy_fs();
 185    void emit_repclear_shader();
 186    fs_reg *emit_fragcoord_interpolation(bool pixel_center_integer,
 187                                         bool origin_upper_left);
 188    fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
 189                          glsl_interp_qualifier interpolation_mode,
 190                          bool is_centroid, bool is_sample);
 191    fs_reg *emit_frontfacing_interpolation();
 192    fs_reg *emit_samplepos_setup();
 193    fs_reg *emit_sampleid_setup();
 194    fs_reg *emit_samplemaskin_setup();
 195    void emit_general_interpolation(fs_reg *attr, const char *name,
 196                                    const glsl_type *type,
 197                                    glsl_interp_qualifier interpolation_mode,
 198                                    int *location, bool mod_centroid,
 199                                    bool mod_sample);
 200    fs_reg *emit_vs_system_value(int location);
 201    void emit_interpolation_setup_gen4();
 202    void emit_interpolation_setup_gen6();
 203    void compute_sample_position(fs_reg dst, fs_reg int_sample_pos);
 204    fs_reg emit_mcs_fetch(const fs_reg &coordinate, unsigned components,
 205                          const fs_reg &sampler);
 206    void emit_gen6_gather_wa(uint8_t wa, fs_reg dst);
 207    fs_reg resolve_source_modifiers(const fs_reg &src);
 208    void emit_discard_jump();
 209    bool opt_peephole_sel();
 210    bool opt_peephole_predicated_break();
 211    bool opt_saturate_propagation();
 212    bool opt_cmod_propagation();
 213    bool opt_zero_samples();
 214    void emit_unspill(bblock_t *block, fs_inst *inst, fs_reg reg,
 215                      uint32_t spill_offset, int count);
 216    void emit_spill(bblock_t *block, fs_inst *inst, fs_reg reg,
 217                    uint32_t spill_offset, int count);
 218
 219    void emit_nir_code();
 220    void nir_setup_inputs();
 221    void nir_setup_single_output_varying(fs_reg *reg, const glsl_type *type,
 222                                         unsigned *location);
 223    void nir_setup_outputs();
 224    void nir_setup_uniforms();
 225    void nir_emit_system_values();
 226    void nir_emit_impl(nir_function_impl *impl);
 227    void nir_emit_cf_list(exec_list *list);
 228    void nir_emit_if(nir_if *if_stmt);
 229    void nir_emit_loop(nir_loop *loop);
 230    void nir_emit_block(nir_block *block);
 231    void nir_emit_instr(nir_instr *instr);
 232    void nir_emit_alu(const brw::fs_builder &bld, nir_alu_instr *instr);
 233    void nir_emit_load_const(const brw::fs_builder &bld,
 234                             nir_load_const_instr *instr);
 235    void nir_emit_undef(const brw::fs_builder &bld,
 236                        nir_ssa_undef_instr *instr);
 237    void nir_emit_vs_intrinsic(const brw::fs_builder &bld,
 238                               nir_intrinsic_instr *instr);
 239    void nir_emit_tcs_intrinsic(const brw::fs_builder &bld,
 240                                nir_intrinsic_instr *instr);
 241    void nir_emit_gs_intrinsic(const brw::fs_builder &bld,
 242                               nir_intrinsic_instr *instr);
 243    void nir_emit_fs_intrinsic(const brw::fs_builder &bld,
 244                               nir_intrinsic_instr *instr);
 245    void nir_emit_cs_intrinsic(const brw::fs_builder &bld,
 246                               nir_intrinsic_instr *instr);
 247    void nir_emit_intrinsic(const brw::fs_builder &bld,
 248                            nir_intrinsic_instr *instr);
 249    void nir_emit_tes_intrinsic(const brw::fs_builder &bld,
 250                                nir_intrinsic_instr *instr);
 251    void nir_emit_ssbo_atomic(const brw::fs_builder &bld,
 252                              int op, nir_intrinsic_instr *instr);
 253    void nir_emit_shared_atomic(const brw::fs_builder &bld,
 254                                int op, nir_intrinsic_instr *instr);
 255    void nir_emit_texture(const brw::fs_builder &bld,
 256                          nir_tex_instr *instr);
 257    void nir_emit_jump(const brw::fs_builder &bld,
 258                       nir_jump_instr *instr);
 259    fs_reg get_nir_src(nir_src src);
 260    fs_reg get_nir_dest(nir_dest dest);
 261    fs_reg get_nir_image_deref(const nir_deref_var *deref);
 262    fs_reg get_indirect_offset(nir_intrinsic_instr *instr);
 263    void emit_percomp(const brw::fs_builder &bld, const fs_inst &inst,
 264                      unsigned wr_mask);
 265
 266    bool optimize_extract_to_float(nir_alu_instr *instr,
 267                                   const fs_reg &result);
 268    bool optimize_frontfacing_ternary(nir_alu_instr *instr,
 269                                      const fs_reg &result);
 270
 271    void emit_alpha_test();
 272    fs_inst *emit_single_fb_write(const brw::fs_builder &bld,
 273                                  fs_reg color1, fs_reg color2,
 274                                  fs_reg src0_alpha, unsigned components);
 275    void emit_fb_writes();
 276    void emit_urb_writes(const fs_reg &gs_vertex_count = fs_reg());
 277    void set_gs_stream_control_data_bits(const fs_reg &vertex_count,
 278                                         unsigned stream_id);
 279    void emit_gs_control_data_bits(const fs_reg &vertex_count);
 280    void emit_gs_end_primitive(const nir_src &vertex_count_nir_src);
 281    void emit_gs_vertex(const nir_src &vertex_count_nir_src,
 282                        unsigned stream_id);
 283    void emit_gs_thread_end();
 284    void emit_gs_input_load(const fs_reg &dst, const nir_src &vertex_src,
 285                            unsigned base_offset, const nir_src &offset_src,
 286                            unsigned num_components);
 287    void emit_cs_terminate();
 288    fs_reg *emit_cs_local_invocation_id_setup();
 289    fs_reg *emit_cs_work_group_id_setup();
 290
 291    void emit_barrier();
 292
 293    void emit_shader_time_begin();
 294    void emit_shader_time_end();
 295    void SHADER_TIME_ADD(const brw::fs_builder &bld,
 296                         int shader_time_subindex,
 297                         fs_reg value);
 298
 299    fs_reg get_timestamp(const brw::fs_builder &bld);
 300
 301    struct brw_reg interp_reg(int location, int channel);
 302
 303    int implied_mrf_writes(fs_inst *inst);
 304
 305    virtual void dump_instructions();
 306    virtual void dump_instructions(const char *name);
 307    void dump_instruction(backend_instruction *inst);
 308    void dump_instruction(backend_instruction *inst, FILE *file);
 309
 310    const void *const key;
 311    const struct brw_sampler_prog_key_data *key_tex;
 312
 313    struct brw_gs_compile *gs_compile;
 314
 315    struct brw_stage_prog_data *prog_data;
 316    struct gl_program *prog;
 317
 318    const struct brw_vue_map *input_vue_map;
 319
 320    int *virtual_grf_start;
 321    int *virtual_grf_end;
 322    brw::fs_live_variables *live_intervals;
 323
 324    int *regs_live_at_ip;
 325
 326    /** Number of uniform variable components visited. */
 327    unsigned uniforms;
 328
 329    /** Byte-offset for the next available spot in the scratch space buffer. */
 330    unsigned last_scratch;
 331
 332    /**
 333     * Array mapping UNIFORM register numbers to the pull parameter index,
 334     * or -1 if this uniform register isn't being uploaded as a pull constant.
 335     */
 336    int *pull_constant_loc;
 337
 338    /**
 339     * Array mapping UNIFORM register numbers to the push parameter index,
 340     * or -1 if this uniform register isn't being uploaded as a push constant.
 341     */
 342    int *push_constant_loc;
 343
 344    fs_reg frag_depth;
 345    fs_reg frag_stencil;
 346    fs_reg sample_mask;
 347    fs_reg outputs[VARYING_SLOT_MAX];
 348    unsigned output_components[VARYING_SLOT_MAX];
 349    fs_reg dual_src_output;
 350    bool do_dual_src;
 351    int first_non_payload_grf;
 352    /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
 353    unsigned max_grf;
 354
 355    fs_reg *nir_locals;
 356    fs_reg *nir_ssa_values;
 357    fs_reg nir_inputs;
 358    fs_reg nir_outputs;
 359    fs_reg *nir_system_values;
 360
 361    bool failed;
 362    char *fail_msg;
 363    bool simd16_unsupported;
 364    char *no16_msg;
 365
 366    /** Register numbers for thread payload fields. */
 367    struct thread_payload {
 368       uint8_t source_depth_reg;
 369       uint8_t source_w_reg;
 370       uint8_t aa_dest_stencil_reg;
 371       uint8_t dest_depth_reg;
 372       uint8_t sample_pos_reg;
 373       uint8_t sample_mask_in_reg;
 374       uint8_t barycentric_coord_reg[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 375       uint8_t local_invocation_id_reg;
 376
 377       /** The number of thread payload registers the hardware will supply. */
 378       uint8_t num_regs;
 379    } payload;
 380
 381    bool source_depth_to_render_target;
 382    bool runtime_check_aads_emit;
 383
 384    fs_reg pixel_x;
 385    fs_reg pixel_y;
 386    fs_reg wpos_w;
 387    fs_reg pixel_w;
 388    fs_reg delta_xy[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 389    fs_reg shader_start_time;
 390    fs_reg userplane[MAX_CLIP_PLANES];
 391    fs_reg final_gs_vertex_count;
 392    fs_reg control_data_bits;
 393    fs_reg invocation_id;
 394
 395    unsigned grf_used;
 396    bool spilled_any_registers;
 397
 398    const unsigned dispatch_width; /**< 8 or 16 */
 399    unsigned min_dispatch_width;
 400
 401    int shader_time_index;
 402
 403    unsigned promoted_constants;
 404    brw::fs_builder bld;
 405 };
 406
 407 /**
 408  * The fragment shader code generator.
 409  *
 410  * Translates FS IR to actual i965 assembly code.
 411  */
 412 class fs_generator
 413 {
 414 public:
 415    fs_generator(const struct brw_compiler *compiler, void *log_data,
 416                 void *mem_ctx,
 417                 const void *key,
 418                 struct brw_stage_prog_data *prog_data,
 419                 unsigned promoted_constants,
 420                 bool runtime_check_aads_emit,
 421                 gl_shader_stage stage);
 422    ~fs_generator();
 423
 424    void enable_debug(const char *shader_name);
 425    int generate_code(const cfg_t *cfg, int dispatch_width);
 426    const unsigned *get_assembly(unsigned int *assembly_size);
 427
 428 private:
 429    void fire_fb_write(fs_inst *inst,
 430                       struct brw_reg payload,
 431                       struct brw_reg implied_header,
 432                       GLuint nr);
 433    void generate_fb_write(fs_inst *inst, struct brw_reg payload);
 434    void generate_urb_read(fs_inst *inst, struct brw_reg dst, struct brw_reg payload);
 435    void generate_urb_write(fs_inst *inst, struct brw_reg payload);
 436    void generate_cs_terminate(fs_inst *inst, struct brw_reg payload);
 437    void generate_stencil_ref_packing(fs_inst *inst, struct brw_reg dst,
 438                                      struct brw_reg src);
 439    void generate_barrier(fs_inst *inst, struct brw_reg src);
 440    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 441                          struct brw_reg *src);
 442    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 443                      struct brw_reg surface_index,
 444                      struct brw_reg sampler_index);
 445    void generate_get_buffer_size(fs_inst *inst, struct brw_reg dst,
 446                                  struct brw_reg src,
 447                                  struct brw_reg surf_index);
 448    void generate_math_gen6(fs_inst *inst,
 449                            struct brw_reg dst,
 450                            struct brw_reg src0,
 451                            struct brw_reg src1);
 452    void generate_math_gen4(fs_inst *inst,
 453                            struct brw_reg dst,
 454                            struct brw_reg src);
 455    void generate_math_g45(fs_inst *inst,
 456                           struct brw_reg dst,
 457                           struct brw_reg src);
 458    void generate_ddx(enum opcode op, struct brw_reg dst, struct brw_reg src);
 459    void generate_ddy(enum opcode op, struct brw_reg dst, struct brw_reg src,
 460                      bool negate_value);
 461    void generate_scratch_write(fs_inst *inst, struct brw_reg src);
 462    void generate_scratch_read(fs_inst *inst, struct brw_reg dst);
 463    void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst);
 464    void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 465                                             struct brw_reg index,
 466                                             struct brw_reg offset);
 467    void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
 468                                                  struct brw_reg dst,
 469                                                  struct brw_reg surf_index,
 470                                                  struct brw_reg offset);
 471    void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 472                                             struct brw_reg index,
 473                                             struct brw_reg offset);
 474    void generate_varying_pull_constant_load_gen7(fs_inst *inst,
 475                                                  struct brw_reg dst,
 476                                                  struct brw_reg index,
 477                                                  struct brw_reg offset);
 478    void generate_mov_dispatch_to_flags(fs_inst *inst);
 479
 480    void generate_pixel_interpolator_query(fs_inst *inst,
 481                                           struct brw_reg dst,
 482                                           struct brw_reg src,
 483                                           struct brw_reg msg_data,
 484                                           unsigned msg_type);
 485
 486    void generate_set_sample_id(fs_inst *inst,
 487                                struct brw_reg dst,
 488                                struct brw_reg src0,
 489                                struct brw_reg src1);
 490
 491    void generate_set_simd4x2_offset(fs_inst *inst,
 492                                     struct brw_reg dst,
 493                                     struct brw_reg offset);
 494    void generate_discard_jump(fs_inst *inst);
 495
 496    void generate_pack_half_2x16_split(fs_inst *inst,
 497                                       struct brw_reg dst,
 498                                       struct brw_reg x,
 499                                       struct brw_reg y);
 500    void generate_unpack_half_2x16_split(fs_inst *inst,
 501                                         struct brw_reg dst,
 502                                         struct brw_reg src);
 503
 504    void generate_shader_time_add(fs_inst *inst,
 505                                  struct brw_reg payload,
 506                                  struct brw_reg offset,
 507                                  struct brw_reg value);
 508
 509    void generate_mov_indirect(fs_inst *inst,
 510                               struct brw_reg dst,
 511                               struct brw_reg reg,
 512                               struct brw_reg indirect_byte_offset);
 513
 514    bool patch_discard_jumps_to_fb_writes();
 515
 516    const struct brw_compiler *compiler;
 517    void *log_data; /* Passed to compiler->*_log functions */
 518
 519    const struct brw_device_info *devinfo;
 520
 521    struct brw_codegen *p;
 522    const void * const key;
 523    struct brw_stage_prog_data * const prog_data;
 524
 525    unsigned dispatch_width; /**< 8 or 16 */
 526
 527    exec_list discard_halt_patches;
 528    unsigned promoted_constants;
 529    bool runtime_check_aads_emit;
 530    bool debug_flag;
 531    const char *shader_name;
 532    gl_shader_stage stage;
 533    void *mem_ctx;
 534 };
 535
 536 bool brw_do_channel_expressions(struct exec_list *instructions);
 537 bool brw_do_vector_splitting(struct exec_list *instructions);
 538
 539 void shuffle_32bit_load_result_to_64bit_data(const brw::fs_builder &bld,
 540                                              const fs_reg &dst,
 541                                              const fs_reg &src,
 542                                              uint32_t components);
 543
 544 void shuffle_64bit_data_for_32bit_write(const brw::fs_builder &bld,
 545                                         const fs_reg &dst,
 546                                         const fs_reg &src,
 547                                         uint32_t components);