src/mesa/drivers/dri/i965/brw_fs.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #pragma once
  29
  30 #include "brw_shader.h"
  31 #include "brw_ir_fs.h"
  32
  33 extern "C" {
  34
  35 #include <sys/types.h>
  36
  37 #include "main/macros.h"
  38 #include "main/shaderobj.h"
  39 #include "main/uniforms.h"
  40 #include "program/prog_parameter.h"
  41 #include "program/prog_print.h"
  42 #include "program/prog_optimize.h"
  43 #include "util/register_allocate.h"
  44 #include "program/hash_table.h"
  45 #include "brw_context.h"
  46 #include "brw_eu.h"
  47 #include "brw_wm.h"
  48 #include "intel_asm_annotation.h"
  49 }
  50 #include "glsl/glsl_types.h"
  51 #include "glsl/ir.h"
  52 #include "glsl/nir/nir.h"
  53 #include "program/sampler.h"
  54
  55 struct bblock_t;
  56 namespace {
  57    struct acp_entry;
  58 }
  59
  60 namespace brw {
  61    class fs_live_variables;
  62 }
  63
  64 /**
  65  * The fragment shader front-end.
  66  *
  67  * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
  68  */
  69 class fs_visitor : public backend_visitor
  70 {
  71 public:
  72    const fs_reg reg_null_f;
  73    const fs_reg reg_null_d;
  74    const fs_reg reg_null_ud;
  75
  76    fs_visitor(struct brw_context *brw,
  77               void *mem_ctx,
  78               const struct brw_wm_prog_key *key,
  79               struct brw_wm_prog_data *prog_data,
  80               struct gl_shader_program *shader_prog,
  81               struct gl_fragment_program *fp,
  82               unsigned dispatch_width);
  83
  84    fs_visitor(struct brw_context *brw,
  85               void *mem_ctx,
  86               const struct brw_vs_prog_key *key,
  87               struct brw_vs_prog_data *prog_data,
  88               struct gl_shader_program *shader_prog,
  89               struct gl_vertex_program *cp,
  90               unsigned dispatch_width);
  91
  92    ~fs_visitor();
  93    void init();
  94
  95    fs_reg *variable_storage(ir_variable *var);
  96    fs_reg vgrf(const glsl_type *const type);
  97    fs_reg vgrf(int num_components);
  98    void import_uniforms(fs_visitor *v);
  99    void setup_uniform_clipplane_values();
 100    void compute_clip_distance();
 101
 102    void visit(ir_variable *ir);
 103    void visit(ir_assignment *ir);
 104    void visit(ir_dereference_variable *ir);
 105    void visit(ir_dereference_record *ir);
 106    void visit(ir_dereference_array *ir);
 107    void visit(ir_expression *ir);
 108    void visit(ir_texture *ir);
 109    void visit(ir_if *ir);
 110    void visit(ir_constant *ir);
 111    void visit(ir_swizzle *ir);
 112    void visit(ir_return *ir);
 113    void visit(ir_loop *ir);
 114    void visit(ir_loop_jump *ir);
 115    void visit(ir_discard *ir);
 116    void visit(ir_call *ir);
 117    void visit(ir_function *ir);
 118    void visit(ir_function_signature *ir);
 119    void visit(ir_emit_vertex *);
 120    void visit(ir_end_primitive *);
 121
 122    uint32_t gather_channel(int orig_chan, uint32_t sampler);
 123    void swizzle_result(ir_texture_opcode op, int dest_components,
 124                        fs_reg orig_val, uint32_t sampler);
 125
 126    fs_inst *emit(fs_inst *inst);
 127    void emit(exec_list list);
 128
 129    fs_inst *emit(enum opcode opcode);
 130    fs_inst *emit(enum opcode opcode, const fs_reg &dst);
 131    fs_inst *emit(enum opcode opcode, const fs_reg &dst, const fs_reg &src0);
 132    fs_inst *emit(enum opcode opcode, const fs_reg &dst, const fs_reg &src0,
 133                  const fs_reg &src1);
 134    fs_inst *emit(enum opcode opcode, const fs_reg &dst,
 135                  const fs_reg &src0, const fs_reg &src1, const fs_reg &src2);
 136    fs_inst *emit(enum opcode opcode, const fs_reg &dst,
 137                  fs_reg src[], int sources);
 138
 139    fs_inst *MOV(const fs_reg &dst, const fs_reg &src);
 140    fs_inst *NOT(const fs_reg &dst, const fs_reg &src);
 141    fs_inst *RNDD(const fs_reg &dst, const fs_reg &src);
 142    fs_inst *RNDE(const fs_reg &dst, const fs_reg &src);
 143    fs_inst *RNDZ(const fs_reg &dst, const fs_reg &src);
 144    fs_inst *FRC(const fs_reg &dst, const fs_reg &src);
 145    fs_inst *ADD(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 146    fs_inst *MUL(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 147    fs_inst *MACH(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 148    fs_inst *MAC(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 149    fs_inst *SHL(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 150    fs_inst *SHR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 151    fs_inst *ASR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 152    fs_inst *AND(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 153    fs_inst *OR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 154    fs_inst *XOR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 155    fs_inst *IF(enum brw_predicate predicate);
 156    fs_inst *IF(const fs_reg &src0, const fs_reg &src1,
 157                enum brw_conditional_mod condition);
 158    fs_inst *CMP(fs_reg dst, fs_reg src0, fs_reg src1,
 159                 enum brw_conditional_mod condition);
 160    fs_inst *LRP(const fs_reg &dst, const fs_reg &a, const fs_reg &y,
 161                 const fs_reg &x);
 162    fs_inst *DEP_RESOLVE_MOV(int grf);
 163    fs_inst *BFREV(const fs_reg &dst, const fs_reg &value);
 164    fs_inst *BFE(const fs_reg &dst, const fs_reg &bits, const fs_reg &offset,
 165                 const fs_reg &value);
 166    fs_inst *BFI1(const fs_reg &dst, const fs_reg &bits, const fs_reg &offset);
 167    fs_inst *BFI2(const fs_reg &dst, const fs_reg &bfi1_dst,
 168                  const fs_reg &insert, const fs_reg &base);
 169    fs_inst *FBH(const fs_reg &dst, const fs_reg &value);
 170    fs_inst *FBL(const fs_reg &dst, const fs_reg &value);
 171    fs_inst *CBIT(const fs_reg &dst, const fs_reg &value);
 172    fs_inst *MAD(const fs_reg &dst, const fs_reg &c, const fs_reg &b,
 173                 const fs_reg &a);
 174    fs_inst *ADDC(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 175    fs_inst *SUBB(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 176    fs_inst *SEL(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 177
 178    int type_size(const struct glsl_type *type);
 179    fs_inst *get_instruction_generating_reg(fs_inst *start,
 180                                            fs_inst *end,
 181                                            const fs_reg &reg);
 182
 183    fs_inst *LOAD_PAYLOAD(const fs_reg &dst, fs_reg *src, int sources);
 184
 185    exec_list VARYING_PULL_CONSTANT_LOAD(const fs_reg &dst,
 186                                         const fs_reg &surf_index,
 187                                         const fs_reg &varying_offset,
 188                                         uint32_t const_offset);
 189
 190    bool run_fs();
 191    bool run_vs();
 192    void optimize();
 193    void allocate_registers();
 194    void assign_binding_table_offsets();
 195    void setup_payload_gen4();
 196    void setup_payload_gen6();
 197    void setup_vs_payload();
 198    void fixup_3src_null_dest();
 199    void assign_curb_setup();
 200    void calculate_urb_setup();
 201    void assign_urb_setup();
 202    void assign_vs_urb_setup();
 203    bool assign_regs(bool allow_spilling);
 204    void assign_regs_trivial();
 205    void get_used_mrfs(bool *mrf_used);
 206    void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
 207                                    int first_payload_node);
 208    void setup_mrf_hack_interference(struct ra_graph *g,
 209                                     int first_mrf_hack_node);
 210    int choose_spill_reg(struct ra_graph *g);
 211    void spill_reg(int spill_reg);
 212    void split_virtual_grfs();
 213    bool compact_virtual_grfs();
 214    void move_uniform_array_access_to_pull_constants();
 215    void assign_constant_locations();
 216    void demote_pull_constants();
 217    void invalidate_live_intervals();
 218    void calculate_live_intervals();
 219    void calculate_register_pressure();
 220    bool opt_algebraic();
 221    bool opt_cse();
 222    bool opt_cse_local(bblock_t *block);
 223    bool opt_copy_propagate();
 224    bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
 225    bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
 226    bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
 227                                  exec_list *acp);
 228    bool opt_register_renaming();
 229    bool register_coalesce();
 230    bool compute_to_mrf();
 231    bool dead_code_eliminate();
 232    bool remove_duplicate_mrf_writes();
 233    bool virtual_grf_interferes(int a, int b);
 234    void schedule_instructions(instruction_scheduler_mode mode);
 235    void insert_gen4_send_dependency_workarounds();
 236    void insert_gen4_pre_send_dependency_workarounds(bblock_t *block,
 237                                                     fs_inst *inst);
 238    void insert_gen4_post_send_dependency_workarounds(bblock_t *block,
 239                                                      fs_inst *inst);
 240    void vfail(const char *msg, va_list args);
 241    void fail(const char *msg, ...);
 242    void no16(const char *msg, ...);
 243    void lower_uniform_pull_constant_loads();
 244    bool lower_load_payload();
 245
 246    void emit_dummy_fs();
 247    void emit_repclear_shader();
 248    fs_reg *emit_fragcoord_interpolation(bool pixel_center_integer,
 249                                         bool origin_upper_left);
 250    fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
 251                          glsl_interp_qualifier interpolation_mode,
 252                          bool is_centroid, bool is_sample);
 253    fs_reg *emit_frontfacing_interpolation();
 254    fs_reg *emit_samplepos_setup();
 255    fs_reg *emit_sampleid_setup();
 256    void emit_general_interpolation(fs_reg attr, const char *name,
 257                                    const glsl_type *type,
 258                                    glsl_interp_qualifier interpolation_mode,
 259                                    int location, bool mod_centroid,
 260                                    bool mod_sample);
 261    fs_reg *emit_vs_system_value(enum brw_reg_type type, int location);
 262    void emit_interpolation_setup_gen4();
 263    void emit_interpolation_setup_gen6();
 264    void compute_sample_position(fs_reg dst, fs_reg int_sample_pos);
 265    fs_reg rescale_texcoord(fs_reg coordinate, int coord_components,
 266                            bool is_rect, uint32_t sampler, int texunit);
 267    fs_inst *emit_texture_gen4(ir_texture_opcode op, fs_reg dst,
 268                               fs_reg coordinate, int coord_components,
 269                               fs_reg shadow_comp,
 270                               fs_reg lod, fs_reg lod2, int grad_components,
 271                               uint32_t sampler);
 272    fs_inst *emit_texture_gen5(ir_texture_opcode op, fs_reg dst,
 273                               fs_reg coordinate, int coord_components,
 274                               fs_reg shadow_comp,
 275                               fs_reg lod, fs_reg lod2, int grad_components,
 276                               fs_reg sample_index, uint32_t sampler,
 277                               bool has_offset);
 278    fs_inst *emit_texture_gen7(ir_texture_opcode op, fs_reg dst,
 279                               fs_reg coordinate, int coord_components,
 280                               fs_reg shadow_comp,
 281                               fs_reg lod, fs_reg lod2, int grad_components,
 282                               fs_reg sample_index, fs_reg mcs, fs_reg sampler,
 283                               fs_reg offset_value);
 284    void emit_texture(ir_texture_opcode op,
 285                      const glsl_type *dest_type,
 286                      fs_reg coordinate, int components,
 287                      fs_reg shadow_c,
 288                      fs_reg lod, fs_reg dpdy, int grad_components,
 289                      fs_reg sample_index,
 290                      fs_reg offset, unsigned offset_components,
 291                      fs_reg mcs,
 292                      int gather_component,
 293                      bool is_cube_array,
 294                      bool is_rect,
 295                      uint32_t sampler,
 296                      fs_reg sampler_reg,
 297                      int texunit);
 298    fs_reg emit_mcs_fetch(fs_reg coordinate, int components, fs_reg sampler);
 299    void emit_gen6_gather_wa(uint8_t wa, fs_reg dst);
 300    fs_reg fix_math_operand(fs_reg src);
 301    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0);
 302    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0, fs_reg src1);
 303    void emit_lrp(const fs_reg &dst, const fs_reg &x, const fs_reg &y,
 304                  const fs_reg &a);
 305    void emit_minmax(enum brw_conditional_mod conditionalmod, const fs_reg &dst,
 306                     const fs_reg &src0, const fs_reg &src1);
 307    bool try_emit_saturate(ir_expression *ir);
 308    bool try_emit_line(ir_expression *ir);
 309    bool try_emit_mad(ir_expression *ir);
 310    bool try_replace_with_sel();
 311    bool opt_peephole_sel();
 312    bool opt_peephole_predicated_break();
 313    bool opt_saturate_propagation();
 314    bool opt_cmod_propagation();
 315    void emit_bool_to_cond_code(ir_rvalue *condition);
 316    void emit_if_gen6(ir_if *ir);
 317    void emit_unspill(bblock_t *block, fs_inst *inst, fs_reg reg,
 318                      uint32_t spill_offset, int count);
 319    void emit_spill(bblock_t *block, fs_inst *inst, fs_reg reg,
 320                    uint32_t spill_offset, int count);
 321
 322    void emit_fragment_program_code();
 323    void setup_fp_regs();
 324    fs_reg get_fp_src_reg(const prog_src_register *src);
 325    fs_reg get_fp_dst_reg(const prog_dst_register *dst);
 326    void emit_fp_alu1(enum opcode opcode,
 327                      const struct prog_instruction *fpi,
 328                      fs_reg dst, fs_reg src);
 329    void emit_fp_alu2(enum opcode opcode,
 330                      const struct prog_instruction *fpi,
 331                      fs_reg dst, fs_reg src0, fs_reg src1);
 332    void emit_fp_scalar_write(const struct prog_instruction *fpi,
 333                              fs_reg dst, fs_reg src);
 334    void emit_fp_scalar_math(enum opcode opcode,
 335                             const struct prog_instruction *fpi,
 336                             fs_reg dst, fs_reg src);
 337
 338    void emit_fp_minmax(const struct prog_instruction *fpi,
 339                        fs_reg dst, fs_reg src0, fs_reg src1);
 340
 341    void emit_fp_sop(enum brw_conditional_mod conditional_mod,
 342                     const struct prog_instruction *fpi,
 343                     fs_reg dst, fs_reg src0, fs_reg src1, fs_reg one);
 344
 345    void emit_nir_code();
 346    void nir_setup_inputs(nir_shader *shader);
 347    void nir_setup_outputs(nir_shader *shader);
 348    void nir_setup_uniforms(nir_shader *shader);
 349    void nir_setup_uniform(nir_variable *var);
 350    void nir_setup_builtin_uniform(nir_variable *var);
 351    void nir_emit_system_values(nir_shader *shader);
 352    void nir_emit_impl(nir_function_impl *impl);
 353    void nir_emit_cf_list(exec_list *list);
 354    void nir_emit_if(nir_if *if_stmt);
 355    void nir_emit_loop(nir_loop *loop);
 356    void nir_emit_block(nir_block *block);
 357    void nir_emit_instr(nir_instr *instr);
 358    void nir_emit_alu(nir_alu_instr *instr);
 359    void nir_emit_intrinsic(nir_intrinsic_instr *instr);
 360    void nir_emit_texture(nir_tex_instr *instr);
 361    void nir_emit_jump(nir_jump_instr *instr);
 362    fs_reg get_nir_src(nir_src src);
 363    fs_reg get_nir_dest(nir_dest dest);
 364    void emit_percomp(fs_inst *inst, unsigned wr_mask);
 365
 366    int setup_color_payload(fs_reg *dst, fs_reg color, unsigned components);
 367    void emit_alpha_test();
 368    fs_inst *emit_single_fb_write(fs_reg color1, fs_reg color2,
 369                                  fs_reg src0_alpha, unsigned components);
 370    void emit_fb_writes();
 371    void emit_urb_writes();
 372
 373    void emit_shader_time_begin();
 374    void emit_shader_time_end();
 375    void emit_shader_time_write(enum shader_time_shader_type type,
 376                                fs_reg value);
 377
 378    void emit_untyped_atomic(unsigned atomic_op, unsigned surf_index,
 379                             fs_reg dst, fs_reg offset, fs_reg src0,
 380                             fs_reg src1);
 381
 382    void emit_untyped_surface_read(unsigned surf_index, fs_reg dst,
 383                                   fs_reg offset);
 384
 385    void emit_interpolate_expression(ir_expression *ir);
 386
 387    bool try_rewrite_rhs_to_dst(ir_assignment *ir,
 388                                fs_reg dst,
 389                                fs_reg src,
 390                                fs_inst *pre_rhs_inst,
 391                                fs_inst *last_rhs_inst);
 392    void emit_assignment_writes(fs_reg &l, fs_reg &r,
 393                                const glsl_type *type, bool predicated);
 394    void resolve_ud_negate(fs_reg *reg);
 395    void resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg);
 396
 397    fs_reg get_timestamp();
 398
 399    struct brw_reg interp_reg(int location, int channel);
 400    void setup_uniform_values(ir_variable *ir);
 401    void setup_builtin_uniform_values(ir_variable *ir);
 402    int implied_mrf_writes(fs_inst *inst);
 403
 404    virtual void dump_instructions();
 405    virtual void dump_instructions(const char *name);
 406    void dump_instruction(backend_instruction *inst);
 407    void dump_instruction(backend_instruction *inst, FILE *file);
 408
 409    void visit_atomic_counter_intrinsic(ir_call *ir);
 410
 411    const void *const key;
 412    struct brw_stage_prog_data *prog_data;
 413    unsigned int sanity_param_count;
 414
 415    int *param_size;
 416
 417    int *virtual_grf_start;
 418    int *virtual_grf_end;
 419    brw::fs_live_variables *live_intervals;
 420
 421    int *regs_live_at_ip;
 422
 423    /** Number of uniform variable components visited. */
 424    unsigned uniforms;
 425
 426    /** Byte-offset for the next available spot in the scratch space buffer. */
 427    unsigned last_scratch;
 428
 429    /**
 430     * Array mapping UNIFORM register numbers to the pull parameter index,
 431     * or -1 if this uniform register isn't being uploaded as a pull constant.
 432     */
 433    int *pull_constant_loc;
 434
 435    /**
 436     * Array mapping UNIFORM register numbers to the push parameter index,
 437     * or -1 if this uniform register isn't being uploaded as a push constant.
 438     */
 439    int *push_constant_loc;
 440
 441    struct hash_table *variable_ht;
 442    fs_reg frag_depth;
 443    fs_reg sample_mask;
 444    fs_reg outputs[VARYING_SLOT_MAX];
 445    unsigned output_components[VARYING_SLOT_MAX];
 446    fs_reg dual_src_output;
 447    bool do_dual_src;
 448    int first_non_payload_grf;
 449    /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
 450    unsigned max_grf;
 451
 452    fs_reg *fp_temp_regs;
 453    fs_reg *fp_input_regs;
 454
 455    fs_reg *nir_locals;
 456    fs_reg *nir_globals;
 457    fs_reg nir_inputs;
 458    fs_reg nir_outputs;
 459    fs_reg nir_uniforms;
 460    fs_reg *nir_system_values;
 461
 462    /** @{ debug annotation info */
 463    const char *current_annotation;
 464    const void *base_ir;
 465    /** @} */
 466
 467    bool failed;
 468    char *fail_msg;
 469    bool simd16_unsupported;
 470    char *no16_msg;
 471
 472    /* Result of last visit() method. */
 473    fs_reg result;
 474
 475    /** Register numbers for thread payload fields. */
 476    struct {
 477       uint8_t source_depth_reg;
 478       uint8_t source_w_reg;
 479       uint8_t aa_dest_stencil_reg;
 480       uint8_t dest_depth_reg;
 481       uint8_t sample_pos_reg;
 482       uint8_t sample_mask_in_reg;
 483       uint8_t barycentric_coord_reg[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 484
 485       /** The number of thread payload registers the hardware will supply. */
 486       uint8_t num_regs;
 487    } payload;
 488
 489    bool source_depth_to_render_target;
 490    bool runtime_check_aads_emit;
 491
 492    fs_reg pixel_x;
 493    fs_reg pixel_y;
 494    fs_reg wpos_w;
 495    fs_reg pixel_w;
 496    fs_reg delta_x[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 497    fs_reg delta_y[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 498    fs_reg shader_start_time;
 499    fs_reg userplane[MAX_CLIP_PLANES];
 500
 501    unsigned grf_used;
 502    bool spilled_any_registers;
 503
 504    const unsigned dispatch_width; /**< 8 or 16 */
 505 };
 506
 507 /**
 508  * The fragment shader code generator.
 509  *
 510  * Translates FS IR to actual i965 assembly code.
 511  */
 512 class fs_generator
 513 {
 514 public:
 515    fs_generator(struct brw_context *brw,
 516                 void *mem_ctx,
 517                 const void *key,
 518                 struct brw_stage_prog_data *prog_data,
 519                 struct gl_program *fp,
 520                 bool runtime_check_aads_emit,
 521                 const char *stage_abbrev);
 522    ~fs_generator();
 523
 524    void enable_debug(const char *shader_name);
 525    int generate_code(const cfg_t *cfg, int dispatch_width);
 526    const unsigned *get_assembly(unsigned int *assembly_size);
 527
 528 private:
 529    void fire_fb_write(fs_inst *inst,
 530                       struct brw_reg payload,
 531                       struct brw_reg implied_header,
 532                       GLuint nr);
 533    void generate_fb_write(fs_inst *inst, struct brw_reg payload);
 534    void generate_urb_write(fs_inst *inst, struct brw_reg payload);
 535    void generate_blorp_fb_write(fs_inst *inst);
 536    void generate_pixel_xy(struct brw_reg dst, bool is_x);
 537    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 538                          struct brw_reg *src);
 539    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 540                      struct brw_reg sampler_index);
 541    void generate_math_gen6(fs_inst *inst,
 542                            struct brw_reg dst,
 543                            struct brw_reg src0,
 544                            struct brw_reg src1);
 545    void generate_math_gen4(fs_inst *inst,
 546                            struct brw_reg dst,
 547                            struct brw_reg src);
 548    void generate_math_g45(fs_inst *inst,
 549                           struct brw_reg dst,
 550                           struct brw_reg src);
 551    void generate_ddx(enum opcode op, struct brw_reg dst, struct brw_reg src);
 552    void generate_ddy(enum opcode op, struct brw_reg dst, struct brw_reg src,
 553                      bool negate_value);
 554    void generate_scratch_write(fs_inst *inst, struct brw_reg src);
 555    void generate_scratch_read(fs_inst *inst, struct brw_reg dst);
 556    void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst);
 557    void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 558                                             struct brw_reg index,
 559                                             struct brw_reg offset);
 560    void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
 561                                                  struct brw_reg dst,
 562                                                  struct brw_reg surf_index,
 563                                                  struct brw_reg offset);
 564    void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 565                                             struct brw_reg index,
 566                                             struct brw_reg offset);
 567    void generate_varying_pull_constant_load_gen7(fs_inst *inst,
 568                                                  struct brw_reg dst,
 569                                                  struct brw_reg index,
 570                                                  struct brw_reg offset);
 571    void generate_mov_dispatch_to_flags(fs_inst *inst);
 572
 573    void generate_pixel_interpolator_query(fs_inst *inst,
 574                                           struct brw_reg dst,
 575                                           struct brw_reg src,
 576                                           struct brw_reg msg_data,
 577                                           unsigned msg_type);
 578
 579    void generate_set_omask(fs_inst *inst,
 580                            struct brw_reg dst,
 581                            struct brw_reg sample_mask);
 582
 583    void generate_set_sample_id(fs_inst *inst,
 584                                struct brw_reg dst,
 585                                struct brw_reg src0,
 586                                struct brw_reg src1);
 587
 588    void generate_set_simd4x2_offset(fs_inst *inst,
 589                                     struct brw_reg dst,
 590                                     struct brw_reg offset);
 591    void generate_discard_jump(fs_inst *inst);
 592
 593    void generate_pack_half_2x16_split(fs_inst *inst,
 594                                       struct brw_reg dst,
 595                                       struct brw_reg x,
 596                                       struct brw_reg y);
 597    void generate_unpack_half_2x16_split(fs_inst *inst,
 598                                         struct brw_reg dst,
 599                                         struct brw_reg src);
 600
 601    void generate_shader_time_add(fs_inst *inst,
 602                                  struct brw_reg payload,
 603                                  struct brw_reg offset,
 604                                  struct brw_reg value);
 605
 606    void generate_untyped_atomic(fs_inst *inst,
 607                                 struct brw_reg dst,
 608                                 struct brw_reg payload,
 609                                 struct brw_reg atomic_op,
 610                                 struct brw_reg surf_index);
 611
 612    void generate_untyped_surface_read(fs_inst *inst,
 613                                       struct brw_reg dst,
 614                                       struct brw_reg payload,
 615                                       struct brw_reg surf_index);
 616
 617    bool patch_discard_jumps_to_fb_writes();
 618
 619    struct brw_context *brw;
 620    struct gl_context *ctx;
 621
 622    struct brw_compile *p;
 623    const void * const key;
 624    struct brw_stage_prog_data * const prog_data;
 625
 626    const struct gl_program *prog;
 627
 628    unsigned dispatch_width; /**< 8 or 16 */
 629
 630    exec_list discard_halt_patches;
 631    bool runtime_check_aads_emit;
 632    bool debug_flag;
 633    const char *shader_name;
 634    const char *stage_abbrev;
 635    void *mem_ctx;
 636 };
 637
 638 bool brw_do_channel_expressions(struct exec_list *instructions);
 639 bool brw_do_vector_splitting(struct exec_list *instructions);