src/mesa/drivers/dri/i965/brw_fs.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #pragma once
  29
  30 #include "brw_shader.h"
  31
  32 extern "C" {
  33
  34 #include <sys/types.h>
  35
  36 #include "main/macros.h"
  37 #include "main/shaderobj.h"
  38 #include "main/uniforms.h"
  39 #include "program/prog_parameter.h"
  40 #include "program/prog_print.h"
  41 #include "program/prog_optimize.h"
  42 #include "program/register_allocate.h"
  43 #include "program/sampler.h"
  44 #include "program/hash_table.h"
  45 #include "brw_context.h"
  46 #include "brw_eu.h"
  47 #include "brw_wm.h"
  48 #include "brw_shader.h"
  49 }
  50 #include "glsl/glsl_types.h"
  51 #include "glsl/ir.h"
  52
  53 class bblock_t;
  54 namespace {
  55    class acp_entry;
  56 }
  57
  58 enum register_file {
  59    BAD_FILE,
  60    ARF,
  61    GRF,
  62    MRF,
  63    IMM,
  64    FIXED_HW_REG, /* a struct brw_reg */
  65    UNIFORM, /* prog_data->params[reg] */
  66 };
  67
  68 class fs_reg {
  69 public:
  70    /* Callers of this ralloc-based new need not call delete. It's
  71     * easier to just ralloc_free 'ctx' (or any of its ancestors). */
  72    static void* operator new(size_t size, void *ctx)
  73    {
  74       void *node;
  75
  76       node = ralloc_size(ctx, size);
  77       assert(node != NULL);
  78
  79       return node;
  80    }
  81
  82    void init();
  83
  84    fs_reg();
  85    fs_reg(float f);
  86    fs_reg(int32_t i);
  87    fs_reg(uint32_t u);
  88    fs_reg(struct brw_reg fixed_hw_reg);
  89    fs_reg(enum register_file file, int reg);
  90    fs_reg(enum register_file file, int reg, uint32_t type);
  91    fs_reg(class fs_visitor *v, const struct glsl_type *type);
  92
  93    bool equals(const fs_reg &r) const;
  94    bool is_zero() const;
  95    bool is_one() const;
  96
  97    /** Register file: ARF, GRF, MRF, IMM. */
  98    enum register_file file;
  99    /**
 100     * Register number.  For ARF/MRF, it's the hardware register.  For
 101     * GRF, it's a virtual register number until register allocation
 102     */
 103    int reg;
 104    /**
 105     * For virtual registers, this is a hardware register offset from
 106     * the start of the register block (for example, a constant index
 107     * in an array access).
 108     */
 109    int reg_offset;
 110    /** Register type.  BRW_REGISTER_TYPE_* */
 111    int type;
 112    bool negate;
 113    bool abs;
 114    bool sechalf;
 115    struct brw_reg fixed_hw_reg;
 116    int smear; /* -1, or a channel of the reg to smear to all channels. */
 117
 118    /** Value for file == IMM */
 119    union {
 120       int32_t i;
 121       uint32_t u;
 122       float f;
 123    } imm;
 124
 125    fs_reg *reladdr;
 126 };
 127
 128 static const fs_reg reg_undef;
 129 static const fs_reg reg_null_f(ARF, BRW_ARF_NULL, BRW_REGISTER_TYPE_F);
 130 static const fs_reg reg_null_d(ARF, BRW_ARF_NULL, BRW_REGISTER_TYPE_D);
 131
 132 class ip_record : public exec_node {
 133 public:
 134    static void* operator new(size_t size, void *ctx)
 135    {
 136       void *node;
 137
 138       node = rzalloc_size(ctx, size);
 139       assert(node != NULL);
 140
 141       return node;
 142    }
 143
 144    ip_record(int ip)
 145    {
 146       this->ip = ip;
 147    }
 148
 149    int ip;
 150 };
 151
 152 class fs_inst : public backend_instruction {
 153 public:
 154    /* Callers of this ralloc-based new need not call delete. It's
 155     * easier to just ralloc_free 'ctx' (or any of its ancestors). */
 156    static void* operator new(size_t size, void *ctx)
 157    {
 158       void *node;
 159
 160       node = rzalloc_size(ctx, size);
 161       assert(node != NULL);
 162
 163       return node;
 164    }
 165
 166    void init();
 167
 168    fs_inst();
 169    fs_inst(enum opcode opcode);
 170    fs_inst(enum opcode opcode, fs_reg dst);
 171    fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0);
 172    fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
 173    fs_inst(enum opcode opcode, fs_reg dst,
 174            fs_reg src0, fs_reg src1,fs_reg src2);
 175
 176    bool equals(fs_inst *inst);
 177    int regs_written();
 178    bool overwrites_reg(const fs_reg &reg);
 179    bool is_tex();
 180    bool is_math();
 181    bool is_send_from_grf();
 182
 183    fs_reg dst;
 184    fs_reg src[3];
 185    bool saturate;
 186    int conditional_mod; /**< BRW_CONDITIONAL_* */
 187
 188    /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional
 189     * mod and predication.
 190     */
 191    uint8_t flag_subreg;
 192
 193    int mlen; /**< SEND message length */
 194    int base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
 195    uint32_t texture_offset; /**< Texture offset bitfield */
 196    int sampler;
 197    int target; /**< MRT target. */
 198    bool eot;
 199    bool header_present;
 200    bool shadow_compare;
 201    bool force_uncompressed;
 202    bool force_sechalf;
 203    bool force_writemask_all;
 204    uint32_t offset; /* spill/unspill offset */
 205
 206    /** @{
 207     * Annotation for the generated IR.  One of the two can be set.
 208     */
 209    const void *ir;
 210    const char *annotation;
 211    /** @} */
 212 };
 213
 214 /**
 215  * The fragment shader front-end.
 216  *
 217  * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
 218  */
 219 class fs_visitor : public backend_visitor
 220 {
 221 public:
 222
 223    fs_visitor(struct brw_context *brw,
 224               struct brw_wm_compile *c,
 225               struct gl_shader_program *prog,
 226               struct gl_fragment_program *fp,
 227               unsigned dispatch_width);
 228    ~fs_visitor();
 229
 230    fs_reg *variable_storage(ir_variable *var);
 231    int virtual_grf_alloc(int size);
 232    void import_uniforms(fs_visitor *v);
 233
 234    void visit(ir_variable *ir);
 235    void visit(ir_assignment *ir);
 236    void visit(ir_dereference_variable *ir);
 237    void visit(ir_dereference_record *ir);
 238    void visit(ir_dereference_array *ir);
 239    void visit(ir_expression *ir);
 240    void visit(ir_texture *ir);
 241    void visit(ir_if *ir);
 242    void visit(ir_constant *ir);
 243    void visit(ir_swizzle *ir);
 244    void visit(ir_return *ir);
 245    void visit(ir_loop *ir);
 246    void visit(ir_loop_jump *ir);
 247    void visit(ir_discard *ir);
 248    void visit(ir_call *ir);
 249    void visit(ir_function *ir);
 250    void visit(ir_function_signature *ir);
 251
 252    void swizzle_result(ir_texture *ir, fs_reg orig_val, int sampler);
 253
 254    bool can_do_source_mods(fs_inst *inst);
 255
 256    fs_inst *emit(fs_inst inst);
 257    fs_inst *emit(fs_inst *inst);
 258    void emit(exec_list list);
 259
 260    fs_inst *emit(enum opcode opcode);
 261    fs_inst *emit(enum opcode opcode, fs_reg dst);
 262    fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0);
 263    fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
 264    fs_inst *emit(enum opcode opcode, fs_reg dst,
 265                  fs_reg src0, fs_reg src1, fs_reg src2);
 266
 267    fs_inst *MOV(fs_reg dst, fs_reg src);
 268    fs_inst *NOT(fs_reg dst, fs_reg src);
 269    fs_inst *RNDD(fs_reg dst, fs_reg src);
 270    fs_inst *RNDE(fs_reg dst, fs_reg src);
 271    fs_inst *RNDZ(fs_reg dst, fs_reg src);
 272    fs_inst *FRC(fs_reg dst, fs_reg src);
 273    fs_inst *ADD(fs_reg dst, fs_reg src0, fs_reg src1);
 274    fs_inst *MUL(fs_reg dst, fs_reg src0, fs_reg src1);
 275    fs_inst *MACH(fs_reg dst, fs_reg src0, fs_reg src1);
 276    fs_inst *MAC(fs_reg dst, fs_reg src0, fs_reg src1);
 277    fs_inst *SHL(fs_reg dst, fs_reg src0, fs_reg src1);
 278    fs_inst *SHR(fs_reg dst, fs_reg src0, fs_reg src1);
 279    fs_inst *ASR(fs_reg dst, fs_reg src0, fs_reg src1);
 280    fs_inst *AND(fs_reg dst, fs_reg src0, fs_reg src1);
 281    fs_inst *OR(fs_reg dst, fs_reg src0, fs_reg src1);
 282    fs_inst *XOR(fs_reg dst, fs_reg src0, fs_reg src1);
 283    fs_inst *IF(uint32_t predicate);
 284    fs_inst *IF(fs_reg src0, fs_reg src1, uint32_t condition);
 285    fs_inst *CMP(fs_reg dst, fs_reg src0, fs_reg src1,
 286                 uint32_t condition);
 287
 288    int type_size(const struct glsl_type *type);
 289    fs_inst *get_instruction_generating_reg(fs_inst *start,
 290                                            fs_inst *end,
 291                                            fs_reg reg);
 292
 293    exec_list VARYING_PULL_CONSTANT_LOAD(fs_reg dst, fs_reg surf_index,
 294                                         fs_reg offset);
 295
 296    bool run();
 297    void setup_payload_gen4();
 298    void setup_payload_gen6();
 299    void assign_curb_setup();
 300    void calculate_urb_setup();
 301    void assign_urb_setup();
 302    bool assign_regs();
 303    void assign_regs_trivial();
 304    void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
 305                                    int first_payload_node);
 306    void setup_mrf_hack_interference(struct ra_graph *g,
 307                                     int first_mrf_hack_node);
 308    int choose_spill_reg(struct ra_graph *g);
 309    void spill_reg(int spill_reg);
 310    void split_virtual_grfs();
 311    void compact_virtual_grfs();
 312    void move_uniform_array_access_to_pull_constants();
 313    void setup_pull_constants();
 314    void calculate_live_intervals();
 315    bool opt_algebraic();
 316    bool opt_cse();
 317    bool opt_cse_local(bblock_t *block, exec_list *aeb);
 318    bool opt_copy_propagate();
 319    bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
 320    bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
 321    bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
 322                                  exec_list *acp);
 323    bool register_coalesce();
 324    bool register_coalesce_2();
 325    bool compute_to_mrf();
 326    bool dead_code_eliminate();
 327    bool remove_dead_constants();
 328    bool remove_duplicate_mrf_writes();
 329    bool virtual_grf_interferes(int a, int b);
 330    void schedule_instructions(bool post_reg_alloc);
 331    void fail(const char *msg, ...);
 332
 333    void push_force_uncompressed();
 334    void pop_force_uncompressed();
 335    void push_force_sechalf();
 336    void pop_force_sechalf();
 337
 338    void emit_dummy_fs();
 339    fs_reg *emit_fragcoord_interpolation(ir_variable *ir);
 340    fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
 341                          glsl_interp_qualifier interpolation_mode,
 342                          bool is_centroid);
 343    fs_reg *emit_frontfacing_interpolation(ir_variable *ir);
 344    fs_reg *emit_general_interpolation(ir_variable *ir);
 345    void emit_interpolation_setup_gen4();
 346    void emit_interpolation_setup_gen6();
 347    fs_reg rescale_texcoord(ir_texture *ir, fs_reg coordinate,
 348                            bool is_rect, int sampler, int texunit);
 349    fs_inst *emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 350                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2);
 351    fs_inst *emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 352                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2);
 353    fs_inst *emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 354                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2);
 355    fs_reg fix_math_operand(fs_reg src);
 356    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0);
 357    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0, fs_reg src1);
 358    void emit_minmax(uint32_t conditionalmod, fs_reg dst,
 359                     fs_reg src0, fs_reg src1);
 360    bool try_emit_saturate(ir_expression *ir);
 361    bool try_emit_mad(ir_expression *ir, int mul_arg);
 362    void emit_bool_to_cond_code(ir_rvalue *condition);
 363    void emit_if_gen6(ir_if *ir);
 364    void emit_unspill(fs_inst *inst, fs_reg reg, uint32_t spill_offset);
 365
 366    void emit_fragment_program_code();
 367    void setup_fp_regs();
 368    fs_reg get_fp_src_reg(const prog_src_register *src);
 369    fs_reg get_fp_dst_reg(const prog_dst_register *dst);
 370    void emit_fp_alu1(enum opcode opcode,
 371                      const struct prog_instruction *fpi,
 372                      fs_reg dst, fs_reg src);
 373    void emit_fp_alu2(enum opcode opcode,
 374                      const struct prog_instruction *fpi,
 375                      fs_reg dst, fs_reg src0, fs_reg src1);
 376    void emit_fp_scalar_write(const struct prog_instruction *fpi,
 377                              fs_reg dst, fs_reg src);
 378    void emit_fp_scalar_math(enum opcode opcode,
 379                             const struct prog_instruction *fpi,
 380                             fs_reg dst, fs_reg src);
 381
 382    void emit_fp_minmax(const struct prog_instruction *fpi,
 383                        fs_reg dst, fs_reg src0, fs_reg src1);
 384
 385    void emit_fp_sop(uint32_t conditional_mod,
 386                     const struct prog_instruction *fpi,
 387                     fs_reg dst, fs_reg src0, fs_reg src1, fs_reg one);
 388
 389    void emit_color_write(int target, int index, int first_color_mrf);
 390    void emit_fb_writes();
 391
 392    void emit_shader_time_begin();
 393    void emit_shader_time_end();
 394    void emit_shader_time_write(enum shader_time_shader_type type,
 395                                fs_reg value);
 396
 397    bool try_rewrite_rhs_to_dst(ir_assignment *ir,
 398                                fs_reg dst,
 399                                fs_reg src,
 400                                fs_inst *pre_rhs_inst,
 401                                fs_inst *last_rhs_inst);
 402    void emit_assignment_writes(fs_reg &l, fs_reg &r,
 403                                const glsl_type *type, bool predicated);
 404    void resolve_ud_negate(fs_reg *reg);
 405    void resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg);
 406
 407    fs_reg get_timestamp();
 408
 409    struct brw_reg interp_reg(int location, int channel);
 410    int setup_uniform_values(int loc, const glsl_type *type);
 411    void setup_builtin_uniform_values(ir_variable *ir);
 412    int implied_mrf_writes(fs_inst *inst);
 413
 414    void dump_instructions();
 415    void dump_instruction(fs_inst *inst);
 416
 417    const struct gl_fragment_program *fp;
 418    struct brw_wm_compile *c;
 419    unsigned int sanity_param_count;
 420
 421    int param_size[MAX_UNIFORMS * 4];
 422
 423    int *virtual_grf_sizes;
 424    int virtual_grf_count;
 425    int virtual_grf_array_size;
 426    int *virtual_grf_def;
 427    int *virtual_grf_use;
 428    bool live_intervals_valid;
 429
 430    /* This is the map from UNIFORM hw_reg + reg_offset as generated by
 431     * the visitor to the packed uniform number after
 432     * remove_dead_constants() that represents the actual uploaded
 433     * uniform index.
 434     */
 435    int *params_remap;
 436
 437    struct hash_table *variable_ht;
 438    fs_reg frag_depth;
 439    fs_reg outputs[BRW_MAX_DRAW_BUFFERS];
 440    unsigned output_components[BRW_MAX_DRAW_BUFFERS];
 441    fs_reg dual_src_output;
 442    int first_non_payload_grf;
 443    /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
 444    int max_grf;
 445    int urb_setup[FRAG_ATTRIB_MAX];
 446
 447    fs_reg *fp_temp_regs;
 448    fs_reg *fp_input_regs;
 449
 450    /** @{ debug annotation info */
 451    const char *current_annotation;
 452    const void *base_ir;
 453    /** @} */
 454
 455    bool failed;
 456    char *fail_msg;
 457
 458    /* Result of last visit() method. */
 459    fs_reg result;
 460
 461    fs_reg pixel_x;
 462    fs_reg pixel_y;
 463    fs_reg wpos_w;
 464    fs_reg pixel_w;
 465    fs_reg delta_x[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 466    fs_reg delta_y[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 467    fs_reg shader_start_time;
 468
 469    int grf_used;
 470
 471    const unsigned dispatch_width; /**< 8 or 16 */
 472
 473    int force_uncompressed_stack;
 474    int force_sechalf_stack;
 475 };
 476
 477 /**
 478  * The fragment shader code generator.
 479  *
 480  * Translates FS IR to actual i965 assembly code.
 481  */
 482 class fs_generator
 483 {
 484 public:
 485    fs_generator(struct brw_context *brw,
 486                 struct brw_wm_compile *c,
 487                 struct gl_shader_program *prog,
 488                 struct gl_fragment_program *fp,
 489                 bool dual_source_output);
 490    ~fs_generator();
 491
 492    const unsigned *generate_assembly(exec_list *simd8_instructions,
 493                                      exec_list *simd16_instructions,
 494                                      unsigned *assembly_size);
 495
 496 private:
 497    void generate_code(exec_list *instructions);
 498    void generate_fb_write(fs_inst *inst);
 499    void generate_pixel_xy(struct brw_reg dst, bool is_x);
 500    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 501                          struct brw_reg *src);
 502    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 503    void generate_math1_gen7(fs_inst *inst,
 504                             struct brw_reg dst,
 505                             struct brw_reg src);
 506    void generate_math2_gen7(fs_inst *inst,
 507                             struct brw_reg dst,
 508                             struct brw_reg src0,
 509                             struct brw_reg src1);
 510    void generate_math1_gen6(fs_inst *inst,
 511                             struct brw_reg dst,
 512                             struct brw_reg src);
 513    void generate_math2_gen6(fs_inst *inst,
 514                             struct brw_reg dst,
 515                             struct brw_reg src0,
 516                             struct brw_reg src1);
 517    void generate_math_gen4(fs_inst *inst,
 518                            struct brw_reg dst,
 519                            struct brw_reg src);
 520    void generate_ddx(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 521    void generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 522                      bool negate_value);
 523    void generate_spill(fs_inst *inst, struct brw_reg src);
 524    void generate_unspill(fs_inst *inst, struct brw_reg dst);
 525    void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 526                                             struct brw_reg index,
 527                                             struct brw_reg offset);
 528    void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
 529                                                  struct brw_reg dst,
 530                                                  struct brw_reg surf_index,
 531                                                  struct brw_reg offset);
 532    void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 533                                             struct brw_reg index);
 534    void generate_varying_pull_constant_load_gen7(fs_inst *inst,
 535                                                  struct brw_reg dst,
 536                                                  struct brw_reg index,
 537                                                  struct brw_reg offset);
 538    void generate_mov_dispatch_to_flags(fs_inst *inst);
 539    void generate_set_global_offset(fs_inst *inst,
 540                                    struct brw_reg dst,
 541                                    struct brw_reg src,
 542                                    struct brw_reg offset);
 543    void generate_discard_jump(fs_inst *inst);
 544
 545    void patch_discard_jumps_to_fb_writes();
 546
 547    struct brw_context *brw;
 548    struct intel_context *intel;
 549    struct gl_context *ctx;
 550
 551    struct brw_compile *p;
 552    struct brw_wm_compile *c;
 553
 554    struct gl_shader_program *prog;
 555    struct gl_shader *shader;
 556    const struct gl_fragment_program *fp;
 557
 558    unsigned dispatch_width; /**< 8 or 16 */
 559
 560    exec_list discard_halt_patches;
 561    bool dual_source_output;
 562    void *mem_ctx;
 563 };
 564
 565 bool brw_do_channel_expressions(struct exec_list *instructions);
 566 bool brw_do_vector_splitting(struct exec_list *instructions);
 567 bool brw_fs_precompile(struct gl_context *ctx, struct gl_shader_program *prog);