src/mesa/drivers/dri/i965/brw_fs.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #pragma once
  29
  30 #include "brw_shader.h"
  31 #include "brw_ir_fs.h"
  32 #include "brw_fs_builder.h"
  33 #include "compiler/nir/nir.h"
  34
  35 struct bblock_t;
  36 namespace {
  37    struct acp_entry;
  38 }
  39
  40 namespace brw {
  41    class fs_live_variables;
  42 }
  43
  44 struct brw_gs_compile;
  45
  46 static inline fs_reg
  47 offset(const fs_reg &reg, const brw::fs_builder &bld, unsigned delta)
  48 {
  49    return offset(reg, bld.dispatch_width(), delta);
  50 }
  51
  52 /**
  53  * The fragment shader front-end.
  54  *
  55  * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
  56  */
  57 class fs_visitor : public backend_shader
  58 {
  59 public:
  60    fs_visitor(const struct brw_compiler *compiler, void *log_data,
  61               void *mem_ctx,
  62               const void *key,
  63               struct brw_stage_prog_data *prog_data,
  64               struct gl_program *prog,
  65               const nir_shader *shader,
  66               unsigned dispatch_width,
  67               int shader_time_index,
  68               const struct brw_vue_map *input_vue_map = NULL);
  69    fs_visitor(const struct brw_compiler *compiler, void *log_data,
  70               void *mem_ctx,
  71               struct brw_gs_compile *gs_compile,
  72               struct brw_gs_prog_data *prog_data,
  73               const nir_shader *shader,
  74               int shader_time_index);
  75    void init();
  76    ~fs_visitor();
  77
  78    fs_reg vgrf(const glsl_type *const type);
  79    void import_uniforms(fs_visitor *v);
  80    void setup_uniform_clipplane_values(gl_clip_plane *clip_planes);
  81    void compute_clip_distance(gl_clip_plane *clip_planes);
  82
  83    fs_inst *get_instruction_generating_reg(fs_inst *start,
  84                                            fs_inst *end,
  85                                            const fs_reg &reg);
  86
  87    void VARYING_PULL_CONSTANT_LOAD(const brw::fs_builder &bld,
  88                                    const fs_reg &dst,
  89                                    const fs_reg &surf_index,
  90                                    const fs_reg &varying_offset,
  91                                    uint32_t const_offset);
  92    void DEP_RESOLVE_MOV(const brw::fs_builder &bld, int grf);
  93
  94    bool run_fs(bool allow_spilling, bool do_rep_send);
  95    bool run_vs(gl_clip_plane *clip_planes);
  96    bool run_tcs_single_patch();
  97    bool run_tes();
  98    bool run_gs();
  99    bool run_cs();
 100    void optimize();
 101    void allocate_registers(bool allow_spilling);
 102    void setup_fs_payload_gen4();
 103    void setup_fs_payload_gen6();
 104    void setup_vs_payload();
 105    void setup_gs_payload();
 106    void setup_cs_payload();
 107    void fixup_3src_null_dest();
 108    void assign_curb_setup();
 109    void calculate_urb_setup();
 110    void assign_urb_setup();
 111    void convert_attr_sources_to_hw_regs(fs_inst *inst);
 112    void assign_vs_urb_setup();
 113    void assign_tcs_single_patch_urb_setup();
 114    void assign_tes_urb_setup();
 115    void assign_gs_urb_setup();
 116    bool assign_regs(bool allow_spilling, bool spill_all);
 117    void assign_regs_trivial();
 118    void calculate_payload_ranges(int payload_node_count,
 119                                  int *payload_last_use_ip);
 120    void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
 121                                    int first_payload_node);
 122    int choose_spill_reg(struct ra_graph *g);
 123    void spill_reg(int spill_reg);
 124    void split_virtual_grfs();
 125    bool compact_virtual_grfs();
 126    void assign_constant_locations();
 127    void lower_constant_loads();
 128    void invalidate_live_intervals();
 129    void calculate_live_intervals();
 130    void calculate_register_pressure();
 131    void validate();
 132    bool opt_algebraic();
 133    bool opt_redundant_discard_jumps();
 134    bool opt_cse();
 135    bool opt_cse_local(bblock_t *block);
 136    bool opt_copy_propagate();
 137    bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
 138    bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
 139    bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
 140                                  exec_list *acp);
 141    bool opt_drop_redundant_mov_to_flags();
 142    bool opt_register_renaming();
 143    bool register_coalesce();
 144    bool compute_to_mrf();
 145    bool eliminate_find_live_channel();
 146    bool dead_code_eliminate();
 147    bool remove_duplicate_mrf_writes();
 148
 149    bool opt_sampler_eot();
 150    bool virtual_grf_interferes(int a, int b);
 151    void schedule_instructions(instruction_scheduler_mode mode);
 152    void insert_gen4_send_dependency_workarounds();
 153    void insert_gen4_pre_send_dependency_workarounds(bblock_t *block,
 154                                                     fs_inst *inst);
 155    void insert_gen4_post_send_dependency_workarounds(bblock_t *block,
 156                                                      fs_inst *inst);
 157    void vfail(const char *msg, va_list args);
 158    void fail(const char *msg, ...);
 159    void limit_dispatch_width(unsigned n, const char *msg);
 160    void lower_uniform_pull_constant_loads();
 161    bool lower_load_payload();
 162    bool lower_pack();
 163    bool lower_d2x();
 164    bool lower_logical_sends();
 165    bool lower_integer_multiplication();
 166    bool lower_minmax();
 167    bool lower_simd_width();
 168    bool opt_combine_constants();
 169
 170    void emit_dummy_fs();
 171    void emit_repclear_shader();
 172    void emit_fragcoord_interpolation(fs_reg wpos);
 173    fs_reg *emit_frontfacing_interpolation();
 174    fs_reg *emit_samplepos_setup();
 175    fs_reg *emit_sampleid_setup();
 176    fs_reg *emit_samplemaskin_setup();
 177    fs_reg *emit_vs_system_value(int location);
 178    void emit_interpolation_setup_gen4();
 179    void emit_interpolation_setup_gen6();
 180    void compute_sample_position(fs_reg dst, fs_reg int_sample_pos);
 181    fs_reg emit_mcs_fetch(const fs_reg &coordinate, unsigned components,
 182                          const fs_reg &sampler);
 183    void emit_gen6_gather_wa(uint8_t wa, fs_reg dst);
 184    fs_reg resolve_source_modifiers(const fs_reg &src);
 185    void emit_discard_jump();
 186    bool opt_peephole_sel();
 187    bool opt_peephole_predicated_break();
 188    bool opt_saturate_propagation();
 189    bool opt_cmod_propagation();
 190    bool opt_zero_samples();
 191
 192    void emit_nir_code();
 193    void nir_setup_single_output_varying(fs_reg *reg, const glsl_type *type,
 194                                         unsigned *location);
 195    void nir_setup_outputs();
 196    void nir_setup_uniforms();
 197    void nir_emit_system_values();
 198    void nir_emit_impl(nir_function_impl *impl);
 199    void nir_emit_cf_list(exec_list *list);
 200    void nir_emit_if(nir_if *if_stmt);
 201    void nir_emit_loop(nir_loop *loop);
 202    void nir_emit_block(nir_block *block);
 203    void nir_emit_instr(nir_instr *instr);
 204    void nir_emit_alu(const brw::fs_builder &bld, nir_alu_instr *instr);
 205    void nir_emit_load_const(const brw::fs_builder &bld,
 206                             nir_load_const_instr *instr);
 207    void nir_emit_vs_intrinsic(const brw::fs_builder &bld,
 208                               nir_intrinsic_instr *instr);
 209    void nir_emit_tcs_intrinsic(const brw::fs_builder &bld,
 210                                nir_intrinsic_instr *instr);
 211    void nir_emit_gs_intrinsic(const brw::fs_builder &bld,
 212                               nir_intrinsic_instr *instr);
 213    void nir_emit_fs_intrinsic(const brw::fs_builder &bld,
 214                               nir_intrinsic_instr *instr);
 215    void nir_emit_cs_intrinsic(const brw::fs_builder &bld,
 216                               nir_intrinsic_instr *instr);
 217    void nir_emit_intrinsic(const brw::fs_builder &bld,
 218                            nir_intrinsic_instr *instr);
 219    void nir_emit_tes_intrinsic(const brw::fs_builder &bld,
 220                                nir_intrinsic_instr *instr);
 221    void nir_emit_ssbo_atomic(const brw::fs_builder &bld,
 222                              int op, nir_intrinsic_instr *instr);
 223    void nir_emit_shared_atomic(const brw::fs_builder &bld,
 224                                int op, nir_intrinsic_instr *instr);
 225    void nir_emit_texture(const brw::fs_builder &bld,
 226                          nir_tex_instr *instr);
 227    void nir_emit_jump(const brw::fs_builder &bld,
 228                       nir_jump_instr *instr);
 229    fs_reg get_nir_src(const nir_src &src);
 230    fs_reg get_nir_src_imm(const nir_src &src);
 231    fs_reg get_nir_dest(const nir_dest &dest);
 232    fs_reg get_nir_image_deref(const nir_deref_var *deref);
 233    fs_reg get_indirect_offset(nir_intrinsic_instr *instr);
 234    void emit_percomp(const brw::fs_builder &bld, const fs_inst &inst,
 235                      unsigned wr_mask);
 236
 237    bool optimize_extract_to_float(nir_alu_instr *instr,
 238                                   const fs_reg &result);
 239    bool optimize_frontfacing_ternary(nir_alu_instr *instr,
 240                                      const fs_reg &result);
 241
 242    void emit_alpha_test();
 243    fs_inst *emit_single_fb_write(const brw::fs_builder &bld,
 244                                  fs_reg color1, fs_reg color2,
 245                                  fs_reg src0_alpha, unsigned components);
 246    void emit_fb_writes();
 247    fs_inst *emit_non_coherent_fb_read(const brw::fs_builder &bld,
 248                                       const fs_reg &dst, unsigned target);
 249    void emit_urb_writes(const fs_reg &gs_vertex_count = fs_reg());
 250    void set_gs_stream_control_data_bits(const fs_reg &vertex_count,
 251                                         unsigned stream_id);
 252    void emit_gs_control_data_bits(const fs_reg &vertex_count);
 253    void emit_gs_end_primitive(const nir_src &vertex_count_nir_src);
 254    void emit_gs_vertex(const nir_src &vertex_count_nir_src,
 255                        unsigned stream_id);
 256    void emit_gs_thread_end();
 257    void emit_gs_input_load(const fs_reg &dst, const nir_src &vertex_src,
 258                            unsigned base_offset, const nir_src &offset_src,
 259                            unsigned num_components, unsigned first_component);
 260    void emit_cs_terminate();
 261    fs_reg *emit_cs_work_group_id_setup();
 262
 263    void emit_barrier();
 264
 265    void emit_shader_time_begin();
 266    void emit_shader_time_end();
 267    void SHADER_TIME_ADD(const brw::fs_builder &bld,
 268                         int shader_time_subindex,
 269                         fs_reg value);
 270
 271    fs_reg get_timestamp(const brw::fs_builder &bld);
 272
 273    struct brw_reg interp_reg(int location, int channel);
 274
 275    int implied_mrf_writes(fs_inst *inst);
 276
 277    virtual void dump_instructions();
 278    virtual void dump_instructions(const char *name);
 279    void dump_instruction(backend_instruction *inst);
 280    void dump_instruction(backend_instruction *inst, FILE *file);
 281
 282    const void *const key;
 283    const struct brw_sampler_prog_key_data *key_tex;
 284
 285    struct brw_gs_compile *gs_compile;
 286
 287    struct brw_stage_prog_data *prog_data;
 288    struct gl_program *prog;
 289
 290    const struct brw_vue_map *input_vue_map;
 291
 292    int *virtual_grf_start;
 293    int *virtual_grf_end;
 294    brw::fs_live_variables *live_intervals;
 295
 296    int *regs_live_at_ip;
 297
 298    /** Number of uniform variable components visited. */
 299    unsigned uniforms;
 300
 301    /** Byte-offset for the next available spot in the scratch space buffer. */
 302    unsigned last_scratch;
 303
 304    /**
 305     * Array mapping UNIFORM register numbers to the pull parameter index,
 306     * or -1 if this uniform register isn't being uploaded as a pull constant.
 307     */
 308    int *pull_constant_loc;
 309
 310    /**
 311     * Array mapping UNIFORM register numbers to the push parameter index,
 312     * or -1 if this uniform register isn't being uploaded as a push constant.
 313     */
 314    int *push_constant_loc;
 315
 316    fs_reg frag_depth;
 317    fs_reg frag_stencil;
 318    fs_reg sample_mask;
 319    fs_reg outputs[VARYING_SLOT_MAX];
 320    fs_reg dual_src_output;
 321    int first_non_payload_grf;
 322    /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
 323    unsigned max_grf;
 324
 325    fs_reg *nir_locals;
 326    fs_reg *nir_ssa_values;
 327    fs_reg *nir_system_values;
 328
 329    bool failed;
 330    char *fail_msg;
 331
 332    /** Register numbers for thread payload fields. */
 333    struct thread_payload {
 334       uint8_t source_depth_reg;
 335       uint8_t source_w_reg;
 336       uint8_t aa_dest_stencil_reg;
 337       uint8_t dest_depth_reg;
 338       uint8_t sample_pos_reg;
 339       uint8_t sample_mask_in_reg;
 340       uint8_t barycentric_coord_reg[BRW_BARYCENTRIC_MODE_COUNT];
 341       uint8_t local_invocation_id_reg;
 342
 343       /** The number of thread payload registers the hardware will supply. */
 344       uint8_t num_regs;
 345    } payload;
 346
 347    bool source_depth_to_render_target;
 348    bool runtime_check_aads_emit;
 349
 350    fs_reg pixel_x;
 351    fs_reg pixel_y;
 352    fs_reg wpos_w;
 353    fs_reg pixel_w;
 354    fs_reg delta_xy[BRW_BARYCENTRIC_MODE_COUNT];
 355    fs_reg shader_start_time;
 356    fs_reg userplane[MAX_CLIP_PLANES];
 357    fs_reg final_gs_vertex_count;
 358    fs_reg control_data_bits;
 359    fs_reg invocation_id;
 360
 361    unsigned grf_used;
 362    bool spilled_any_registers;
 363
 364    const unsigned dispatch_width; /**< 8, 16 or 32 */
 365    unsigned min_dispatch_width;
 366    unsigned max_dispatch_width;
 367
 368    int shader_time_index;
 369
 370    unsigned promoted_constants;
 371    brw::fs_builder bld;
 372 };
 373
 374 /**
 375  * The fragment shader code generator.
 376  *
 377  * Translates FS IR to actual i965 assembly code.
 378  */
 379 class fs_generator
 380 {
 381 public:
 382    fs_generator(const struct brw_compiler *compiler, void *log_data,
 383                 void *mem_ctx,
 384                 const void *key,
 385                 struct brw_stage_prog_data *prog_data,
 386                 unsigned promoted_constants,
 387                 bool runtime_check_aads_emit,
 388                 gl_shader_stage stage);
 389    ~fs_generator();
 390
 391    void enable_debug(const char *shader_name);
 392    int generate_code(const cfg_t *cfg, int dispatch_width);
 393    const unsigned *get_assembly(unsigned int *assembly_size);
 394
 395 private:
 396    void fire_fb_write(fs_inst *inst,
 397                       struct brw_reg payload,
 398                       struct brw_reg implied_header,
 399                       GLuint nr);
 400    void generate_fb_write(fs_inst *inst, struct brw_reg payload);
 401    void generate_fb_read(fs_inst *inst, struct brw_reg dst,
 402                          struct brw_reg payload);
 403    void generate_urb_read(fs_inst *inst, struct brw_reg dst, struct brw_reg payload);
 404    void generate_urb_write(fs_inst *inst, struct brw_reg payload);
 405    void generate_cs_terminate(fs_inst *inst, struct brw_reg payload);
 406    void generate_barrier(fs_inst *inst, struct brw_reg src);
 407    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 408                          struct brw_reg *src);
 409    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 410                      struct brw_reg surface_index,
 411                      struct brw_reg sampler_index);
 412    void generate_get_buffer_size(fs_inst *inst, struct brw_reg dst,
 413                                  struct brw_reg src,
 414                                  struct brw_reg surf_index);
 415    void generate_ddx(enum opcode op, struct brw_reg dst, struct brw_reg src);
 416    void generate_ddy(enum opcode op, struct brw_reg dst, struct brw_reg src);
 417    void generate_scratch_write(fs_inst *inst, struct brw_reg src);
 418    void generate_scratch_read(fs_inst *inst, struct brw_reg dst);
 419    void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst);
 420    void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 421                                             struct brw_reg index,
 422                                             struct brw_reg offset);
 423    void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
 424                                                  struct brw_reg dst,
 425                                                  struct brw_reg surf_index,
 426                                                  struct brw_reg offset);
 427    void generate_varying_pull_constant_load_gen4(fs_inst *inst,
 428                                                  struct brw_reg dst,
 429                                                  struct brw_reg index);
 430    void generate_varying_pull_constant_load_gen7(fs_inst *inst,
 431                                                  struct brw_reg dst,
 432                                                  struct brw_reg index,
 433                                                  struct brw_reg offset);
 434    void generate_mov_dispatch_to_flags(fs_inst *inst);
 435
 436    void generate_pixel_interpolator_query(fs_inst *inst,
 437                                           struct brw_reg dst,
 438                                           struct brw_reg src,
 439                                           struct brw_reg msg_data,
 440                                           unsigned msg_type);
 441
 442    void generate_set_sample_id(fs_inst *inst,
 443                                struct brw_reg dst,
 444                                struct brw_reg src0,
 445                                struct brw_reg src1);
 446
 447    void generate_set_simd4x2_offset(fs_inst *inst,
 448                                     struct brw_reg dst,
 449                                     struct brw_reg offset);
 450    void generate_discard_jump(fs_inst *inst);
 451
 452    void generate_pack_half_2x16_split(fs_inst *inst,
 453                                       struct brw_reg dst,
 454                                       struct brw_reg x,
 455                                       struct brw_reg y);
 456    void generate_unpack_half_2x16_split(fs_inst *inst,
 457                                         struct brw_reg dst,
 458                                         struct brw_reg src);
 459
 460    void generate_shader_time_add(fs_inst *inst,
 461                                  struct brw_reg payload,
 462                                  struct brw_reg offset,
 463                                  struct brw_reg value);
 464
 465    void generate_mov_indirect(fs_inst *inst,
 466                               struct brw_reg dst,
 467                               struct brw_reg reg,
 468                               struct brw_reg indirect_byte_offset);
 469
 470    bool patch_discard_jumps_to_fb_writes();
 471
 472    const struct brw_compiler *compiler;
 473    void *log_data; /* Passed to compiler->*_log functions */
 474
 475    const struct gen_device_info *devinfo;
 476
 477    struct brw_codegen *p;
 478    const void * const key;
 479    struct brw_stage_prog_data * const prog_data;
 480
 481    unsigned dispatch_width; /**< 8, 16 or 32 */
 482
 483    exec_list discard_halt_patches;
 484    unsigned promoted_constants;
 485    bool runtime_check_aads_emit;
 486    bool debug_flag;
 487    const char *shader_name;
 488    gl_shader_stage stage;
 489    void *mem_ctx;
 490 };
 491
 492 bool brw_do_channel_expressions(struct exec_list *instructions);
 493 bool brw_do_vector_splitting(struct exec_list *instructions);
 494
 495 void shuffle_32bit_load_result_to_64bit_data(const brw::fs_builder &bld,
 496                                              const fs_reg &dst,
 497                                              const fs_reg &src,
 498                                              uint32_t components);
 499
 500 void shuffle_64bit_data_for_32bit_write(const brw::fs_builder &bld,
 501                                         const fs_reg &dst,
 502                                         const fs_reg &src,
 503                                         uint32_t components);
 504 fs_reg setup_imm_df(const brw::fs_builder &bld,
 505                     double v);
 506
 507 enum brw_barycentric_mode brw_barycentric_mode(enum glsl_interp_mode mode,
 508                                                nir_intrinsic_op op);