src/mesa/drivers/dri/i965/brw_fs.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #pragma once
  29
  30 #include "brw_shader.h"
  31
  32 extern "C" {
  33
  34 #include <sys/types.h>
  35
  36 #include "main/macros.h"
  37 #include "main/shaderobj.h"
  38 #include "main/uniforms.h"
  39 #include "program/prog_parameter.h"
  40 #include "program/prog_print.h"
  41 #include "program/prog_optimize.h"
  42 #include "program/register_allocate.h"
  43 #include "program/sampler.h"
  44 #include "program/hash_table.h"
  45 #include "brw_context.h"
  46 #include "brw_eu.h"
  47 #include "brw_wm.h"
  48 #include "brw_shader.h"
  49 }
  50 #include "glsl/glsl_types.h"
  51 #include "glsl/ir.h"
  52
  53 class bblock_t;
  54 namespace {
  55    struct acp_entry;
  56 }
  57
  58 class fs_reg {
  59 public:
  60    DECLARE_RALLOC_CXX_OPERATORS(fs_reg)
  61
  62    void init();
  63
  64    fs_reg();
  65    fs_reg(float f);
  66    fs_reg(int32_t i);
  67    fs_reg(uint32_t u);
  68    fs_reg(struct brw_reg fixed_hw_reg);
  69    fs_reg(enum register_file file, int reg);
  70    fs_reg(enum register_file file, int reg, uint32_t type);
  71    fs_reg(class fs_visitor *v, const struct glsl_type *type);
  72
  73    bool equals(const fs_reg &r) const;
  74    bool is_zero() const;
  75    bool is_one() const;
  76    bool is_valid_3src() const;
  77
  78    /** Register file: ARF, GRF, MRF, IMM. */
  79    enum register_file file;
  80    /**
  81     * Register number.  For ARF/MRF, it's the hardware register.  For
  82     * GRF, it's a virtual register number until register allocation
  83     */
  84    int reg;
  85    /**
  86     * For virtual registers, this is a hardware register offset from
  87     * the start of the register block (for example, a constant index
  88     * in an array access).
  89     */
  90    int reg_offset;
  91    /** Register type.  BRW_REGISTER_TYPE_* */
  92    int type;
  93    bool negate;
  94    bool abs;
  95    bool sechalf;
  96    struct brw_reg fixed_hw_reg;
  97    int smear; /* -1, or a channel of the reg to smear to all channels. */
  98
  99    /** Value for file == IMM */
 100    union {
 101       int32_t i;
 102       uint32_t u;
 103       float f;
 104    } imm;
 105
 106    fs_reg *reladdr;
 107 };
 108
 109 static const fs_reg reg_undef;
 110 static const fs_reg reg_null_f(ARF, BRW_ARF_NULL, BRW_REGISTER_TYPE_F);
 111 static const fs_reg reg_null_d(ARF, BRW_ARF_NULL, BRW_REGISTER_TYPE_D);
 112 static const fs_reg reg_null_ud(ARF, BRW_ARF_NULL, BRW_REGISTER_TYPE_UD);
 113
 114 class ip_record : public exec_node {
 115 public:
 116    DECLARE_RALLOC_CXX_OPERATORS(ip_record)
 117
 118    ip_record(int ip)
 119    {
 120       this->ip = ip;
 121    }
 122
 123    int ip;
 124 };
 125
 126 class fs_inst : public backend_instruction {
 127 public:
 128    DECLARE_RALLOC_CXX_OPERATORS(fs_inst)
 129
 130    void init();
 131
 132    fs_inst();
 133    fs_inst(enum opcode opcode);
 134    fs_inst(enum opcode opcode, fs_reg dst);
 135    fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0);
 136    fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
 137    fs_inst(enum opcode opcode, fs_reg dst,
 138            fs_reg src0, fs_reg src1,fs_reg src2);
 139
 140    bool equals(fs_inst *inst);
 141    bool overwrites_reg(const fs_reg &reg);
 142    bool is_send_from_grf();
 143    bool is_partial_write();
 144
 145    fs_reg dst;
 146    fs_reg src[3];
 147    bool saturate;
 148    int conditional_mod; /**< BRW_CONDITIONAL_* */
 149
 150    /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional
 151     * mod and predication.
 152     */
 153    uint8_t flag_subreg;
 154
 155    int mlen; /**< SEND message length */
 156    int regs_written; /**< Number of vgrfs written by a SEND message, or 1 */
 157    int base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
 158    uint32_t texture_offset; /**< Texture offset bitfield */
 159    int sampler;
 160    int target; /**< MRT target. */
 161    bool eot;
 162    bool header_present;
 163    bool shadow_compare;
 164    bool force_uncompressed;
 165    bool force_sechalf;
 166    bool force_writemask_all;
 167    uint32_t offset; /* spill/unspill offset */
 168
 169    /** @{
 170     * Annotation for the generated IR.  One of the two can be set.
 171     */
 172    const void *ir;
 173    const char *annotation;
 174    /** @} */
 175 };
 176
 177 /**
 178  * The fragment shader front-end.
 179  *
 180  * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
 181  */
 182 class fs_visitor : public backend_visitor
 183 {
 184 public:
 185
 186    fs_visitor(struct brw_context *brw,
 187               struct brw_wm_compile *c,
 188               struct gl_shader_program *shader_prog,
 189               struct gl_fragment_program *fp,
 190               unsigned dispatch_width);
 191    ~fs_visitor();
 192
 193    fs_reg *variable_storage(ir_variable *var);
 194    int virtual_grf_alloc(int size);
 195    void import_uniforms(fs_visitor *v);
 196
 197    void visit(ir_variable *ir);
 198    void visit(ir_assignment *ir);
 199    void visit(ir_dereference_variable *ir);
 200    void visit(ir_dereference_record *ir);
 201    void visit(ir_dereference_array *ir);
 202    void visit(ir_expression *ir);
 203    void visit(ir_texture *ir);
 204    void visit(ir_if *ir);
 205    void visit(ir_constant *ir);
 206    void visit(ir_swizzle *ir);
 207    void visit(ir_return *ir);
 208    void visit(ir_loop *ir);
 209    void visit(ir_loop_jump *ir);
 210    void visit(ir_discard *ir);
 211    void visit(ir_call *ir);
 212    void visit(ir_function *ir);
 213    void visit(ir_function_signature *ir);
 214    void visit(ir_emit_vertex *);
 215    void visit(ir_end_primitive *);
 216
 217    uint32_t gather_channel(ir_texture *ir, int sampler);
 218    void swizzle_result(ir_texture *ir, fs_reg orig_val, int sampler);
 219
 220    bool can_do_source_mods(fs_inst *inst);
 221
 222    fs_inst *emit(fs_inst inst);
 223    fs_inst *emit(fs_inst *inst);
 224    void emit(exec_list list);
 225
 226    fs_inst *emit(enum opcode opcode);
 227    fs_inst *emit(enum opcode opcode, fs_reg dst);
 228    fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0);
 229    fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
 230    fs_inst *emit(enum opcode opcode, fs_reg dst,
 231                  fs_reg src0, fs_reg src1, fs_reg src2);
 232
 233    fs_inst *MOV(fs_reg dst, fs_reg src);
 234    fs_inst *NOT(fs_reg dst, fs_reg src);
 235    fs_inst *RNDD(fs_reg dst, fs_reg src);
 236    fs_inst *RNDE(fs_reg dst, fs_reg src);
 237    fs_inst *RNDZ(fs_reg dst, fs_reg src);
 238    fs_inst *FRC(fs_reg dst, fs_reg src);
 239    fs_inst *ADD(fs_reg dst, fs_reg src0, fs_reg src1);
 240    fs_inst *MUL(fs_reg dst, fs_reg src0, fs_reg src1);
 241    fs_inst *MACH(fs_reg dst, fs_reg src0, fs_reg src1);
 242    fs_inst *MAC(fs_reg dst, fs_reg src0, fs_reg src1);
 243    fs_inst *SHL(fs_reg dst, fs_reg src0, fs_reg src1);
 244    fs_inst *SHR(fs_reg dst, fs_reg src0, fs_reg src1);
 245    fs_inst *ASR(fs_reg dst, fs_reg src0, fs_reg src1);
 246    fs_inst *AND(fs_reg dst, fs_reg src0, fs_reg src1);
 247    fs_inst *OR(fs_reg dst, fs_reg src0, fs_reg src1);
 248    fs_inst *XOR(fs_reg dst, fs_reg src0, fs_reg src1);
 249    fs_inst *IF(uint32_t predicate);
 250    fs_inst *IF(fs_reg src0, fs_reg src1, uint32_t condition);
 251    fs_inst *CMP(fs_reg dst, fs_reg src0, fs_reg src1,
 252                 uint32_t condition);
 253    fs_inst *LRP(fs_reg dst, fs_reg a, fs_reg y, fs_reg x);
 254    fs_inst *DEP_RESOLVE_MOV(int grf);
 255    fs_inst *BFREV(fs_reg dst, fs_reg value);
 256    fs_inst *BFE(fs_reg dst, fs_reg bits, fs_reg offset, fs_reg value);
 257    fs_inst *BFI1(fs_reg dst, fs_reg bits, fs_reg offset);
 258    fs_inst *BFI2(fs_reg dst, fs_reg bfi1_dst, fs_reg insert, fs_reg base);
 259    fs_inst *FBH(fs_reg dst, fs_reg value);
 260    fs_inst *FBL(fs_reg dst, fs_reg value);
 261    fs_inst *CBIT(fs_reg dst, fs_reg value);
 262    fs_inst *MAD(fs_reg dst, fs_reg c, fs_reg b, fs_reg a);
 263    fs_inst *ADDC(fs_reg dst, fs_reg src0, fs_reg src1);
 264    fs_inst *SUBB(fs_reg dst, fs_reg src0, fs_reg src1);
 265
 266    int type_size(const struct glsl_type *type);
 267    fs_inst *get_instruction_generating_reg(fs_inst *start,
 268                                            fs_inst *end,
 269                                            fs_reg reg);
 270
 271    exec_list VARYING_PULL_CONSTANT_LOAD(fs_reg dst, fs_reg surf_index,
 272                                         fs_reg varying_offset,
 273                                         uint32_t const_offset);
 274
 275    bool run();
 276    void setup_payload_gen4();
 277    void setup_payload_gen6();
 278    void assign_curb_setup();
 279    void calculate_urb_setup();
 280    void assign_urb_setup();
 281    bool assign_regs();
 282    void assign_regs_trivial();
 283    void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
 284                                    int first_payload_node);
 285    void setup_mrf_hack_interference(struct ra_graph *g,
 286                                     int first_mrf_hack_node);
 287    int choose_spill_reg(struct ra_graph *g);
 288    void spill_reg(int spill_reg);
 289    void split_virtual_grfs();
 290    void compact_virtual_grfs();
 291    void move_uniform_array_access_to_pull_constants();
 292    void setup_pull_constants();
 293    void calculate_live_intervals();
 294    bool opt_algebraic();
 295    bool opt_cse();
 296    bool opt_cse_local(bblock_t *block, exec_list *aeb);
 297    bool opt_copy_propagate();
 298    bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
 299    bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
 300    bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
 301                                  exec_list *acp);
 302    bool register_coalesce();
 303    bool register_coalesce_2();
 304    bool compute_to_mrf();
 305    bool dead_code_eliminate();
 306    bool dead_code_eliminate_local();
 307    bool remove_dead_constants();
 308    bool remove_duplicate_mrf_writes();
 309    bool virtual_grf_interferes(int a, int b);
 310    void schedule_instructions(bool post_reg_alloc);
 311    void insert_gen4_send_dependency_workarounds();
 312    void insert_gen4_pre_send_dependency_workarounds(fs_inst *inst);
 313    void insert_gen4_post_send_dependency_workarounds(fs_inst *inst);
 314    void fail(const char *msg, ...);
 315    void lower_uniform_pull_constant_loads();
 316
 317    void push_force_uncompressed();
 318    void pop_force_uncompressed();
 319    void push_force_sechalf();
 320    void pop_force_sechalf();
 321
 322    void emit_dummy_fs();
 323    fs_reg *emit_fragcoord_interpolation(ir_variable *ir);
 324    fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
 325                          glsl_interp_qualifier interpolation_mode,
 326                          bool is_centroid);
 327    fs_reg *emit_frontfacing_interpolation(ir_variable *ir);
 328    fs_reg *emit_general_interpolation(ir_variable *ir);
 329    void emit_interpolation_setup_gen4();
 330    void emit_interpolation_setup_gen6();
 331    fs_reg rescale_texcoord(ir_texture *ir, fs_reg coordinate,
 332                            bool is_rect, int sampler, int texunit);
 333    fs_inst *emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 334                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2);
 335    fs_inst *emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 336                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2,
 337                               fs_reg sample_index);
 338    fs_inst *emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 339                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2,
 340                               fs_reg sample_index);
 341    fs_reg fix_math_operand(fs_reg src);
 342    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0);
 343    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0, fs_reg src1);
 344    void emit_lrp(fs_reg dst, fs_reg x, fs_reg y, fs_reg a);
 345    void emit_minmax(uint32_t conditionalmod, fs_reg dst,
 346                     fs_reg src0, fs_reg src1);
 347    bool try_emit_saturate(ir_expression *ir);
 348    bool try_emit_mad(ir_expression *ir, int mul_arg);
 349    void try_replace_with_sel();
 350    void emit_bool_to_cond_code(ir_rvalue *condition);
 351    void emit_if_gen6(ir_if *ir);
 352    void emit_unspill(fs_inst *inst, fs_reg reg, uint32_t spill_offset);
 353
 354    void emit_fragment_program_code();
 355    void setup_fp_regs();
 356    fs_reg get_fp_src_reg(const prog_src_register *src);
 357    fs_reg get_fp_dst_reg(const prog_dst_register *dst);
 358    void emit_fp_alu1(enum opcode opcode,
 359                      const struct prog_instruction *fpi,
 360                      fs_reg dst, fs_reg src);
 361    void emit_fp_alu2(enum opcode opcode,
 362                      const struct prog_instruction *fpi,
 363                      fs_reg dst, fs_reg src0, fs_reg src1);
 364    void emit_fp_scalar_write(const struct prog_instruction *fpi,
 365                              fs_reg dst, fs_reg src);
 366    void emit_fp_scalar_math(enum opcode opcode,
 367                             const struct prog_instruction *fpi,
 368                             fs_reg dst, fs_reg src);
 369
 370    void emit_fp_minmax(const struct prog_instruction *fpi,
 371                        fs_reg dst, fs_reg src0, fs_reg src1);
 372
 373    void emit_fp_sop(uint32_t conditional_mod,
 374                     const struct prog_instruction *fpi,
 375                     fs_reg dst, fs_reg src0, fs_reg src1, fs_reg one);
 376
 377    void emit_color_write(int target, int index, int first_color_mrf);
 378    void emit_fb_writes();
 379
 380    void emit_shader_time_begin();
 381    void emit_shader_time_end();
 382    void emit_shader_time_write(enum shader_time_shader_type type,
 383                                fs_reg value);
 384
 385    bool try_rewrite_rhs_to_dst(ir_assignment *ir,
 386                                fs_reg dst,
 387                                fs_reg src,
 388                                fs_inst *pre_rhs_inst,
 389                                fs_inst *last_rhs_inst);
 390    void emit_assignment_writes(fs_reg &l, fs_reg &r,
 391                                const glsl_type *type, bool predicated);
 392    void resolve_ud_negate(fs_reg *reg);
 393    void resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg);
 394
 395    fs_reg get_timestamp();
 396
 397    struct brw_reg interp_reg(int location, int channel);
 398    void setup_uniform_values(ir_variable *ir);
 399    void setup_builtin_uniform_values(ir_variable *ir);
 400    int implied_mrf_writes(fs_inst *inst);
 401
 402    void dump_instruction(backend_instruction *inst);
 403
 404    struct gl_fragment_program *fp;
 405    struct brw_wm_compile *c;
 406    unsigned int sanity_param_count;
 407
 408    int param_size[MAX_UNIFORMS * 4];
 409
 410    int *virtual_grf_sizes;
 411    int virtual_grf_count;
 412    int virtual_grf_array_size;
 413    int *virtual_grf_start;
 414    int *virtual_grf_end;
 415    bool live_intervals_valid;
 416
 417    /* This is the map from UNIFORM hw_reg + reg_offset as generated by
 418     * the visitor to the packed uniform number after
 419     * remove_dead_constants() that represents the actual uploaded
 420     * uniform index.
 421     */
 422    int *params_remap;
 423    int nr_params_remap;
 424
 425    struct hash_table *variable_ht;
 426    fs_reg frag_depth;
 427    fs_reg outputs[BRW_MAX_DRAW_BUFFERS];
 428    unsigned output_components[BRW_MAX_DRAW_BUFFERS];
 429    fs_reg dual_src_output;
 430    int first_non_payload_grf;
 431    /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
 432    int max_grf;
 433
 434    fs_reg *fp_temp_regs;
 435    fs_reg *fp_input_regs;
 436
 437    /** @{ debug annotation info */
 438    const char *current_annotation;
 439    const void *base_ir;
 440    /** @} */
 441
 442    bool failed;
 443    char *fail_msg;
 444
 445    /* Result of last visit() method. */
 446    fs_reg result;
 447
 448    fs_reg pixel_x;
 449    fs_reg pixel_y;
 450    fs_reg wpos_w;
 451    fs_reg pixel_w;
 452    fs_reg delta_x[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 453    fs_reg delta_y[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 454    fs_reg shader_start_time;
 455
 456    int grf_used;
 457
 458    const unsigned dispatch_width; /**< 8 or 16 */
 459
 460    int force_uncompressed_stack;
 461    int force_sechalf_stack;
 462 };
 463
 464 /**
 465  * The fragment shader code generator.
 466  *
 467  * Translates FS IR to actual i965 assembly code.
 468  */
 469 class fs_generator
 470 {
 471 public:
 472    fs_generator(struct brw_context *brw,
 473                 struct brw_wm_compile *c,
 474                 struct gl_shader_program *prog,
 475                 struct gl_fragment_program *fp,
 476                 bool dual_source_output);
 477    ~fs_generator();
 478
 479    const unsigned *generate_assembly(exec_list *simd8_instructions,
 480                                      exec_list *simd16_instructions,
 481                                      unsigned *assembly_size);
 482
 483 private:
 484    void generate_code(exec_list *instructions);
 485    void generate_fb_write(fs_inst *inst);
 486    void generate_pixel_xy(struct brw_reg dst, bool is_x);
 487    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 488                          struct brw_reg *src);
 489    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 490    void generate_math1_gen7(fs_inst *inst,
 491                             struct brw_reg dst,
 492                             struct brw_reg src);
 493    void generate_math2_gen7(fs_inst *inst,
 494                             struct brw_reg dst,
 495                             struct brw_reg src0,
 496                             struct brw_reg src1);
 497    void generate_math1_gen6(fs_inst *inst,
 498                             struct brw_reg dst,
 499                             struct brw_reg src);
 500    void generate_math2_gen6(fs_inst *inst,
 501                             struct brw_reg dst,
 502                             struct brw_reg src0,
 503                             struct brw_reg src1);
 504    void generate_math_gen4(fs_inst *inst,
 505                            struct brw_reg dst,
 506                            struct brw_reg src);
 507    void generate_math_g45(fs_inst *inst,
 508                           struct brw_reg dst,
 509                           struct brw_reg src);
 510    void generate_ddx(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 511    void generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 512                      bool negate_value);
 513    void generate_spill(fs_inst *inst, struct brw_reg src);
 514    void generate_unspill(fs_inst *inst, struct brw_reg dst);
 515    void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 516                                             struct brw_reg index,
 517                                             struct brw_reg offset);
 518    void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
 519                                                  struct brw_reg dst,
 520                                                  struct brw_reg surf_index,
 521                                                  struct brw_reg offset);
 522    void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 523                                             struct brw_reg index,
 524                                             struct brw_reg offset);
 525    void generate_varying_pull_constant_load_gen7(fs_inst *inst,
 526                                                  struct brw_reg dst,
 527                                                  struct brw_reg index,
 528                                                  struct brw_reg offset);
 529    void generate_mov_dispatch_to_flags(fs_inst *inst);
 530    void generate_set_simd4x2_offset(fs_inst *inst,
 531                                     struct brw_reg dst,
 532                                     struct brw_reg offset);
 533    void generate_discard_jump(fs_inst *inst);
 534
 535    void generate_pack_half_2x16_split(fs_inst *inst,
 536                                       struct brw_reg dst,
 537                                       struct brw_reg x,
 538                                       struct brw_reg y);
 539    void generate_unpack_half_2x16_split(fs_inst *inst,
 540                                         struct brw_reg dst,
 541                                         struct brw_reg src);
 542
 543    void generate_shader_time_add(fs_inst *inst,
 544                                  struct brw_reg payload,
 545                                  struct brw_reg offset,
 546                                  struct brw_reg value);
 547
 548    void mark_surface_used(unsigned surf_index);
 549
 550    void patch_discard_jumps_to_fb_writes();
 551
 552    struct brw_context *brw;
 553    struct gl_context *ctx;
 554
 555    struct brw_compile *p;
 556    struct brw_wm_compile *c;
 557
 558    struct gl_shader_program *prog;
 559    struct gl_shader *shader;
 560    const struct gl_fragment_program *fp;
 561
 562    unsigned dispatch_width; /**< 8 or 16 */
 563
 564    exec_list discard_halt_patches;
 565    bool dual_source_output;
 566    void *mem_ctx;
 567 };
 568
 569 bool brw_do_channel_expressions(struct exec_list *instructions);
 570 bool brw_do_vector_splitting(struct exec_list *instructions);
 571 bool brw_fs_precompile(struct gl_context *ctx, struct gl_shader_program *prog);