2 * Copyright © 2010 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
30 #include "brw_shader.h"
31 #include "brw_ir_fs.h"
32 #include "brw_fs_builder.h"
33 #include "compiler/nir/nir.h"
41 class fs_live_variables
;
44 struct brw_gs_compile
;
47 offset(const fs_reg
®
, const brw::fs_builder
&bld
, unsigned delta
)
49 return offset(reg
, bld
.dispatch_width(), delta
);
53 * The fragment shader front-end.
55 * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
57 class fs_visitor
: public backend_shader
60 fs_visitor(const struct brw_compiler
*compiler
, void *log_data
,
63 struct brw_stage_prog_data
*prog_data
,
64 struct gl_program
*prog
,
65 const nir_shader
*shader
,
66 unsigned dispatch_width
,
67 int shader_time_index
,
68 const struct brw_vue_map
*input_vue_map
= NULL
);
69 fs_visitor(const struct brw_compiler
*compiler
, void *log_data
,
71 struct brw_gs_compile
*gs_compile
,
72 struct brw_gs_prog_data
*prog_data
,
73 const nir_shader
*shader
,
74 int shader_time_index
);
78 fs_reg
vgrf(const glsl_type
*const type
);
79 void import_uniforms(fs_visitor
*v
);
80 void setup_uniform_clipplane_values(gl_clip_plane
*clip_planes
);
81 void compute_clip_distance(gl_clip_plane
*clip_planes
);
83 fs_inst
*get_instruction_generating_reg(fs_inst
*start
,
87 void VARYING_PULL_CONSTANT_LOAD(const brw::fs_builder
&bld
,
89 const fs_reg
&surf_index
,
90 const fs_reg
&varying_offset
,
91 uint32_t const_offset
);
92 void DEP_RESOLVE_MOV(const brw::fs_builder
&bld
, int grf
);
94 bool run_fs(bool allow_spilling
, bool do_rep_send
);
95 bool run_vs(gl_clip_plane
*clip_planes
);
96 bool run_tcs_single_patch();
101 void allocate_registers(bool allow_spilling
);
102 void setup_fs_payload_gen4();
103 void setup_fs_payload_gen6();
104 void setup_vs_payload();
105 void setup_gs_payload();
106 void setup_cs_payload();
107 void fixup_3src_null_dest();
108 void assign_curb_setup();
109 void calculate_urb_setup();
110 void assign_urb_setup();
111 void convert_attr_sources_to_hw_regs(fs_inst
*inst
);
112 void assign_vs_urb_setup();
113 void assign_tcs_single_patch_urb_setup();
114 void assign_tes_urb_setup();
115 void assign_gs_urb_setup();
116 bool assign_regs(bool allow_spilling
, bool spill_all
);
117 void assign_regs_trivial();
118 void calculate_payload_ranges(int payload_node_count
,
119 int *payload_last_use_ip
);
120 void setup_payload_interference(struct ra_graph
*g
, int payload_reg_count
,
121 int first_payload_node
);
122 int choose_spill_reg(struct ra_graph
*g
);
123 void spill_reg(int spill_reg
);
124 void split_virtual_grfs();
125 bool compact_virtual_grfs();
126 void assign_constant_locations();
127 void lower_constant_loads();
128 void invalidate_live_intervals();
129 void calculate_live_intervals();
130 void calculate_register_pressure();
132 bool opt_algebraic();
133 bool opt_redundant_discard_jumps();
135 bool opt_cse_local(bblock_t
*block
);
136 bool opt_copy_propagate();
137 bool try_copy_propagate(fs_inst
*inst
, int arg
, acp_entry
*entry
);
138 bool try_constant_propagate(fs_inst
*inst
, acp_entry
*entry
);
139 bool opt_copy_propagate_local(void *mem_ctx
, bblock_t
*block
,
141 bool opt_drop_redundant_mov_to_flags();
142 bool opt_register_renaming();
143 bool register_coalesce();
144 bool compute_to_mrf();
145 bool eliminate_find_live_channel();
146 bool dead_code_eliminate();
147 bool remove_duplicate_mrf_writes();
149 bool opt_sampler_eot();
150 bool virtual_grf_interferes(int a
, int b
);
151 void schedule_instructions(instruction_scheduler_mode mode
);
152 void insert_gen4_send_dependency_workarounds();
153 void insert_gen4_pre_send_dependency_workarounds(bblock_t
*block
,
155 void insert_gen4_post_send_dependency_workarounds(bblock_t
*block
,
157 void vfail(const char *msg
, va_list args
);
158 void fail(const char *msg
, ...);
159 void limit_dispatch_width(unsigned n
, const char *msg
);
160 void lower_uniform_pull_constant_loads();
161 bool lower_load_payload();
164 bool lower_logical_sends();
165 bool lower_integer_multiplication();
167 bool lower_simd_width();
168 bool opt_combine_constants();
170 void emit_dummy_fs();
171 void emit_repclear_shader();
172 void emit_fragcoord_interpolation(fs_reg wpos
);
173 fs_reg
*emit_frontfacing_interpolation();
174 fs_reg
*emit_samplepos_setup();
175 fs_reg
*emit_sampleid_setup();
176 fs_reg
*emit_samplemaskin_setup();
177 fs_reg
*emit_vs_system_value(int location
);
178 void emit_interpolation_setup_gen4();
179 void emit_interpolation_setup_gen6();
180 void compute_sample_position(fs_reg dst
, fs_reg int_sample_pos
);
181 fs_reg
emit_mcs_fetch(const fs_reg
&coordinate
, unsigned components
,
182 const fs_reg
&sampler
);
183 void emit_gen6_gather_wa(uint8_t wa
, fs_reg dst
);
184 fs_reg
resolve_source_modifiers(const fs_reg
&src
);
185 void emit_discard_jump();
186 bool opt_peephole_sel();
187 bool opt_peephole_predicated_break();
188 bool opt_saturate_propagation();
189 bool opt_cmod_propagation();
190 bool opt_zero_samples();
192 void emit_nir_code();
193 void nir_setup_single_output_varying(fs_reg
*reg
, const glsl_type
*type
,
195 void nir_setup_outputs();
196 void nir_setup_uniforms();
197 void nir_emit_system_values();
198 void nir_emit_impl(nir_function_impl
*impl
);
199 void nir_emit_cf_list(exec_list
*list
);
200 void nir_emit_if(nir_if
*if_stmt
);
201 void nir_emit_loop(nir_loop
*loop
);
202 void nir_emit_block(nir_block
*block
);
203 void nir_emit_instr(nir_instr
*instr
);
204 void nir_emit_alu(const brw::fs_builder
&bld
, nir_alu_instr
*instr
);
205 void nir_emit_load_const(const brw::fs_builder
&bld
,
206 nir_load_const_instr
*instr
);
207 void nir_emit_vs_intrinsic(const brw::fs_builder
&bld
,
208 nir_intrinsic_instr
*instr
);
209 void nir_emit_tcs_intrinsic(const brw::fs_builder
&bld
,
210 nir_intrinsic_instr
*instr
);
211 void nir_emit_gs_intrinsic(const brw::fs_builder
&bld
,
212 nir_intrinsic_instr
*instr
);
213 void nir_emit_fs_intrinsic(const brw::fs_builder
&bld
,
214 nir_intrinsic_instr
*instr
);
215 void nir_emit_cs_intrinsic(const brw::fs_builder
&bld
,
216 nir_intrinsic_instr
*instr
);
217 void nir_emit_intrinsic(const brw::fs_builder
&bld
,
218 nir_intrinsic_instr
*instr
);
219 void nir_emit_tes_intrinsic(const brw::fs_builder
&bld
,
220 nir_intrinsic_instr
*instr
);
221 void nir_emit_ssbo_atomic(const brw::fs_builder
&bld
,
222 int op
, nir_intrinsic_instr
*instr
);
223 void nir_emit_shared_atomic(const brw::fs_builder
&bld
,
224 int op
, nir_intrinsic_instr
*instr
);
225 void nir_emit_texture(const brw::fs_builder
&bld
,
226 nir_tex_instr
*instr
);
227 void nir_emit_jump(const brw::fs_builder
&bld
,
228 nir_jump_instr
*instr
);
229 fs_reg
get_nir_src(const nir_src
&src
);
230 fs_reg
get_nir_src_imm(const nir_src
&src
);
231 fs_reg
get_nir_dest(const nir_dest
&dest
);
232 fs_reg
get_nir_image_deref(const nir_deref_var
*deref
);
233 fs_reg
get_indirect_offset(nir_intrinsic_instr
*instr
);
234 void emit_percomp(const brw::fs_builder
&bld
, const fs_inst
&inst
,
237 bool optimize_extract_to_float(nir_alu_instr
*instr
,
238 const fs_reg
&result
);
239 bool optimize_frontfacing_ternary(nir_alu_instr
*instr
,
240 const fs_reg
&result
);
242 void emit_alpha_test();
243 fs_inst
*emit_single_fb_write(const brw::fs_builder
&bld
,
244 fs_reg color1
, fs_reg color2
,
245 fs_reg src0_alpha
, unsigned components
);
246 void emit_fb_writes();
247 void emit_urb_writes(const fs_reg
&gs_vertex_count
= fs_reg());
248 void set_gs_stream_control_data_bits(const fs_reg
&vertex_count
,
250 void emit_gs_control_data_bits(const fs_reg
&vertex_count
);
251 void emit_gs_end_primitive(const nir_src
&vertex_count_nir_src
);
252 void emit_gs_vertex(const nir_src
&vertex_count_nir_src
,
254 void emit_gs_thread_end();
255 void emit_gs_input_load(const fs_reg
&dst
, const nir_src
&vertex_src
,
256 unsigned base_offset
, const nir_src
&offset_src
,
257 unsigned num_components
, unsigned first_component
);
258 void emit_cs_terminate();
259 fs_reg
*emit_cs_work_group_id_setup();
263 void emit_shader_time_begin();
264 void emit_shader_time_end();
265 void SHADER_TIME_ADD(const brw::fs_builder
&bld
,
266 int shader_time_subindex
,
269 fs_reg
get_timestamp(const brw::fs_builder
&bld
);
271 struct brw_reg
interp_reg(int location
, int channel
);
273 int implied_mrf_writes(fs_inst
*inst
);
275 virtual void dump_instructions();
276 virtual void dump_instructions(const char *name
);
277 void dump_instruction(backend_instruction
*inst
);
278 void dump_instruction(backend_instruction
*inst
, FILE *file
);
280 const void *const key
;
281 const struct brw_sampler_prog_key_data
*key_tex
;
283 struct brw_gs_compile
*gs_compile
;
285 struct brw_stage_prog_data
*prog_data
;
286 struct gl_program
*prog
;
288 const struct brw_vue_map
*input_vue_map
;
290 int *virtual_grf_start
;
291 int *virtual_grf_end
;
292 brw::fs_live_variables
*live_intervals
;
294 int *regs_live_at_ip
;
296 /** Number of uniform variable components visited. */
299 /** Byte-offset for the next available spot in the scratch space buffer. */
300 unsigned last_scratch
;
303 * Array mapping UNIFORM register numbers to the pull parameter index,
304 * or -1 if this uniform register isn't being uploaded as a pull constant.
306 int *pull_constant_loc
;
309 * Array mapping UNIFORM register numbers to the push parameter index,
310 * or -1 if this uniform register isn't being uploaded as a push constant.
312 int *push_constant_loc
;
317 fs_reg outputs
[VARYING_SLOT_MAX
];
318 fs_reg dual_src_output
;
320 int first_non_payload_grf
;
321 /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
325 fs_reg
*nir_ssa_values
;
328 fs_reg
*nir_system_values
;
333 /** Register numbers for thread payload fields. */
334 struct thread_payload
{
335 uint8_t source_depth_reg
;
336 uint8_t source_w_reg
;
337 uint8_t aa_dest_stencil_reg
;
338 uint8_t dest_depth_reg
;
339 uint8_t sample_pos_reg
;
340 uint8_t sample_mask_in_reg
;
341 uint8_t barycentric_coord_reg
[BRW_BARYCENTRIC_MODE_COUNT
];
342 uint8_t local_invocation_id_reg
;
344 /** The number of thread payload registers the hardware will supply. */
348 bool source_depth_to_render_target
;
349 bool runtime_check_aads_emit
;
355 fs_reg delta_xy
[BRW_BARYCENTRIC_MODE_COUNT
];
356 fs_reg shader_start_time
;
357 fs_reg userplane
[MAX_CLIP_PLANES
];
358 fs_reg final_gs_vertex_count
;
359 fs_reg control_data_bits
;
360 fs_reg invocation_id
;
363 bool spilled_any_registers
;
365 const unsigned dispatch_width
; /**< 8, 16 or 32 */
366 unsigned min_dispatch_width
;
367 unsigned max_dispatch_width
;
369 int shader_time_index
;
371 unsigned promoted_constants
;
376 * The fragment shader code generator.
378 * Translates FS IR to actual i965 assembly code.
383 fs_generator(const struct brw_compiler
*compiler
, void *log_data
,
386 struct brw_stage_prog_data
*prog_data
,
387 unsigned promoted_constants
,
388 bool runtime_check_aads_emit
,
389 gl_shader_stage stage
);
392 void enable_debug(const char *shader_name
);
393 int generate_code(const cfg_t
*cfg
, int dispatch_width
);
394 const unsigned *get_assembly(unsigned int *assembly_size
);
397 void fire_fb_write(fs_inst
*inst
,
398 struct brw_reg payload
,
399 struct brw_reg implied_header
,
401 void generate_fb_write(fs_inst
*inst
, struct brw_reg payload
);
402 void generate_urb_read(fs_inst
*inst
, struct brw_reg dst
, struct brw_reg payload
);
403 void generate_urb_write(fs_inst
*inst
, struct brw_reg payload
);
404 void generate_cs_terminate(fs_inst
*inst
, struct brw_reg payload
);
405 void generate_barrier(fs_inst
*inst
, struct brw_reg src
);
406 void generate_linterp(fs_inst
*inst
, struct brw_reg dst
,
407 struct brw_reg
*src
);
408 void generate_tex(fs_inst
*inst
, struct brw_reg dst
, struct brw_reg src
,
409 struct brw_reg surface_index
,
410 struct brw_reg sampler_index
);
411 void generate_get_buffer_size(fs_inst
*inst
, struct brw_reg dst
,
413 struct brw_reg surf_index
);
414 void generate_ddx(enum opcode op
, struct brw_reg dst
, struct brw_reg src
);
415 void generate_ddy(enum opcode op
, struct brw_reg dst
, struct brw_reg src
);
416 void generate_scratch_write(fs_inst
*inst
, struct brw_reg src
);
417 void generate_scratch_read(fs_inst
*inst
, struct brw_reg dst
);
418 void generate_scratch_read_gen7(fs_inst
*inst
, struct brw_reg dst
);
419 void generate_uniform_pull_constant_load(fs_inst
*inst
, struct brw_reg dst
,
420 struct brw_reg index
,
421 struct brw_reg offset
);
422 void generate_uniform_pull_constant_load_gen7(fs_inst
*inst
,
424 struct brw_reg surf_index
,
425 struct brw_reg offset
);
426 void generate_varying_pull_constant_load_gen4(fs_inst
*inst
,
428 struct brw_reg index
);
429 void generate_varying_pull_constant_load_gen7(fs_inst
*inst
,
431 struct brw_reg index
,
432 struct brw_reg offset
);
433 void generate_mov_dispatch_to_flags(fs_inst
*inst
);
435 void generate_pixel_interpolator_query(fs_inst
*inst
,
438 struct brw_reg msg_data
,
441 void generate_set_sample_id(fs_inst
*inst
,
444 struct brw_reg src1
);
446 void generate_set_simd4x2_offset(fs_inst
*inst
,
448 struct brw_reg offset
);
449 void generate_discard_jump(fs_inst
*inst
);
451 void generate_pack_half_2x16_split(fs_inst
*inst
,
455 void generate_unpack_half_2x16_split(fs_inst
*inst
,
459 void generate_shader_time_add(fs_inst
*inst
,
460 struct brw_reg payload
,
461 struct brw_reg offset
,
462 struct brw_reg value
);
464 void generate_mov_indirect(fs_inst
*inst
,
467 struct brw_reg indirect_byte_offset
);
469 bool patch_discard_jumps_to_fb_writes();
471 const struct brw_compiler
*compiler
;
472 void *log_data
; /* Passed to compiler->*_log functions */
474 const struct brw_device_info
*devinfo
;
476 struct brw_codegen
*p
;
477 const void * const key
;
478 struct brw_stage_prog_data
* const prog_data
;
480 unsigned dispatch_width
; /**< 8, 16 or 32 */
482 exec_list discard_halt_patches
;
483 unsigned promoted_constants
;
484 bool runtime_check_aads_emit
;
486 const char *shader_name
;
487 gl_shader_stage stage
;
491 bool brw_do_channel_expressions(struct exec_list
*instructions
);
492 bool brw_do_vector_splitting(struct exec_list
*instructions
);
494 void shuffle_32bit_load_result_to_64bit_data(const brw::fs_builder
&bld
,
497 uint32_t components
);
499 void shuffle_64bit_data_for_32bit_write(const brw::fs_builder
&bld
,
502 uint32_t components
);
503 fs_reg
setup_imm_df(const brw::fs_builder
&bld
,
506 enum brw_barycentric_mode
brw_barycentric_mode(enum glsl_interp_mode mode
,
507 nir_intrinsic_op op
);